drivers/platform/x86/dell/dcdbas.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  *  dcdbas.h: Definitions for Dell Systems Management Base driver
   4  *
   5  *  Copyright (C) 1995-2005 Dell Inc.
   6  */
   7
   8 #ifndef _DCDBAS_H_
   9 #define _DCDBAS_H_
  10
  11 #include <linux/device.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/types.h>
  14
  15 #define MAX_SMI_DATA_BUF_SIZE                   (256 * 1024)
  16
  17 #define HC_ACTION_NONE                          (0)
  18 #define HC_ACTION_HOST_CONTROL_POWEROFF         BIT(1)
  19 #define HC_ACTION_HOST_CONTROL_POWERCYCLE       BIT(2)
  20
  21 #define HC_SMITYPE_NONE                         (0)
  22 #define HC_SMITYPE_TYPE1                        (1)
  23 #define HC_SMITYPE_TYPE2                        (2)
  24 #define HC_SMITYPE_TYPE3                        (3)
  25
  26 #define ESM_APM_CMD                             (0x0A0)
  27 #define ESM_APM_POWER_CYCLE                     (0x10)
  28 #define ESM_STATUS_CMD_UNSUCCESSFUL             (-1)
  29
  30 #define CMOS_BASE_PORT                          (0x070)
  31 #define CMOS_PAGE1_INDEX_PORT                   (0)
  32 #define CMOS_PAGE1_DATA_PORT                    (1)
  33 #define CMOS_PAGE2_INDEX_PORT_PIIX4             (2)
  34 #define CMOS_PAGE2_DATA_PORT_PIIX4              (3)
  35 #define PE1400_APM_CONTROL_PORT                 (0x0B0)
  36 #define PCAT_APM_CONTROL_PORT                   (0x0B2)
  37 #define PCAT_APM_STATUS_PORT                    (0x0B3)
  38 #define PE1300_CMOS_CMD_STRUCT_PTR              (0x38)
  39 #define PE1400_CMOS_CMD_STRUCT_PTR              (0x70)
  40
  41 #define MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN        (14)
  42 #define MAX_SYSMGMT_LONGCMD_SGENTRY_NUM         (16)
  43
  44 #define TIMEOUT_USEC_SHORT_SEMA_BLOCKING        (10000)
  45 #define EXPIRED_TIMER                           (0)
  46
  47 #define SMI_CMD_MAGIC                           (0x534D4931)
  48 #define SMM_EPS_SIG                             "$SCB"
  49
  50 #define DCDBAS_DEV_ATTR_RW(_name) \
  51         DEVICE_ATTR(_name,0600,_name##_show,_name##_store);
  52
  53 #define DCDBAS_DEV_ATTR_RO(_name) \
  54         DEVICE_ATTR(_name,0400,_name##_show,NULL);
  55
  56 #define DCDBAS_DEV_ATTR_WO(_name) \
  57         DEVICE_ATTR(_name,0200,NULL,_name##_store);
  58
  59 struct smi_cmd {
  60         __u32 magic;
  61         __u32 ebx;
  62         __u32 ecx;
  63         __u16 command_address;
  64         __u8 command_code;
  65         __u8 reserved;
  66         __u8 command_buffer[1];
  67 } __attribute__ ((packed));
  68
  69 struct apm_cmd {
  70         __u8 command;
  71         __s8 status;
  72         __u16 reserved;
  73         union {
  74                 struct {
  75                         __u8 parm[MAX_SYSMGMT_SHORTCMD_PARMBUF_LEN];
  76                 } __attribute__ ((packed)) shortreq;
  77
  78                 struct {
  79                         __u16 num_sg_entries;
  80                         struct {
  81                                 __u32 size;
  82                                 __u64 addr;
  83                         } __attribute__ ((packed))
  84                             sglist[MAX_SYSMGMT_LONGCMD_SGENTRY_NUM];
  85                 } __attribute__ ((packed)) longreq;
  86         } __attribute__ ((packed)) parameters;
  87 } __attribute__ ((packed));
  88
  89 int dcdbas_smi_request(struct smi_cmd *smi_cmd);
  90
  91 struct smm_eps_table {
  92         char smm_comm_buff_anchor[4];
  93         u8 length;
  94         u8 checksum;
  95         u8 version;
  96         u64 smm_comm_buff_addr;
  97         u64 num_of_4k_pages;
  98 } __packed;
  99
 100 struct smi_buffer {
 101         u8 *virt;
 102         unsigned long size;
 103         dma_addr_t dma;
 104 };
 105
 106 int dcdbas_smi_alloc(struct smi_buffer *smi_buffer, unsigned long size);
 107 void dcdbas_smi_free(struct smi_buffer *smi_buffer);
 108
 109 #endif /* _DCDBAS_H_ */
 110