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Linux 6.14-rc3
[linux.git] / drivers / net / wireless / ath / ath11k / wmi.h
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4  * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5  */
6
7 #ifndef ATH11K_WMI_H
8 #define ATH11K_WMI_H
9
10 #include <net/mac80211.h>
11 #include "htc.h"
12
13 struct ath11k_base;
14 struct ath11k;
15 struct ath11k_fw_stats;
16 struct ath11k_fw_dbglog;
17 struct ath11k_vif;
18 struct ath11k_reg_tpc_power_info;
19
20 #define PSOC_HOST_MAX_NUM_SS (8)
21
22 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */
23 #define MAX_HE_NSS               8
24 #define MAX_HE_MODULATION        8
25 #define MAX_HE_RU                4
26 #define HE_MODULATION_NONE       7
27 #define HE_PET_0_USEC            0
28 #define HE_PET_8_USEC            1
29 #define HE_PET_16_USEC           2
30
31 #define WMI_MAX_CHAINS           8
32
33 #define WMI_MAX_NUM_SS                    MAX_HE_NSS
34 #define WMI_MAX_NUM_RU                    MAX_HE_RU
35
36 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
37 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
38 #define WMI_TLV_CMD_UNSUPPORTED 0
39 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
40 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
41
42 struct wmi_cmd_hdr {
43         u32 cmd_id;
44 } __packed;
45
46 struct wmi_tlv {
47         u32 header;
48         u8 value[];
49 } __packed;
50
51 #define WMI_TLV_LEN     GENMASK(15, 0)
52 #define WMI_TLV_TAG     GENMASK(31, 16)
53 #define TLV_HDR_SIZE    sizeof_field(struct wmi_tlv, header)
54
55 #define WMI_CMD_HDR_CMD_ID      GENMASK(23, 0)
56 #define WMI_MAX_MEM_REQS        32
57 #define ATH11K_MAX_HW_LISTEN_INTERVAL 5
58
59 #define WLAN_SCAN_MAX_HINT_S_SSID        10
60 #define WLAN_SCAN_MAX_HINT_BSSID         10
61 #define MAX_RNR_BSS                    5
62
63 #define WLAN_SCAN_PARAMS_MAX_SSID    16
64 #define WLAN_SCAN_PARAMS_MAX_BSSID   4
65 #define WLAN_SCAN_PARAMS_MAX_IE_LEN  512
66
67 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
68
69 #define MAX_WMI_UTF_LEN 252
70 #define WMI_BA_MODE_BUFFER_SIZE_256  3
71 /*
72  * HW mode config type replicated from FW header
73  * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
74  * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
75  *                        one in 2G and another in 5G.
76  * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
77  *                        same band; no tx allowed.
78  * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
79  *                        Support for both PHYs within one band is planned
80  *                        for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
81  *                        but could be extended to other bands in the future.
82  *                        The separation of the band between the two PHYs needs
83  *                        to be communicated separately.
84  * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
85  *                           as in WMI_HW_MODE_SBS, and 3rd on the other band
86  * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
87  *                        5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
88  * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
89  */
90 enum wmi_host_hw_mode_config_type {
91         WMI_HOST_HW_MODE_SINGLE       = 0,
92         WMI_HOST_HW_MODE_DBS          = 1,
93         WMI_HOST_HW_MODE_SBS_PASSIVE  = 2,
94         WMI_HOST_HW_MODE_SBS          = 3,
95         WMI_HOST_HW_MODE_DBS_SBS      = 4,
96         WMI_HOST_HW_MODE_DBS_OR_SBS   = 5,
97
98         /* keep last */
99         WMI_HOST_HW_MODE_MAX
100 };
101
102 /* HW mode priority values used to detect the preferred HW mode
103  * on the available modes.
104  */
105 enum wmi_host_hw_mode_priority {
106         WMI_HOST_HW_MODE_DBS_SBS_PRI,
107         WMI_HOST_HW_MODE_DBS_PRI,
108         WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
109         WMI_HOST_HW_MODE_SBS_PRI,
110         WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
111         WMI_HOST_HW_MODE_SINGLE_PRI,
112
113         /* keep last the lowest priority */
114         WMI_HOST_HW_MODE_MAX_PRI
115 };
116
117 enum WMI_HOST_WLAN_BAND {
118         WMI_HOST_WLAN_2G_CAP    = 0x1,
119         WMI_HOST_WLAN_5G_CAP    = 0x2,
120         WMI_HOST_WLAN_2G_5G_CAP = WMI_HOST_WLAN_2G_CAP | WMI_HOST_WLAN_5G_CAP,
121 };
122
123 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command.
124  * Used only for HE auto rate mode.
125  */
126 enum {
127         /* HE LTF related configuration */
128         WMI_HE_AUTORATE_LTF_1X = BIT(0),
129         WMI_HE_AUTORATE_LTF_2X = BIT(1),
130         WMI_HE_AUTORATE_LTF_4X = BIT(2),
131
132         /* HE GI related configuration */
133         WMI_AUTORATE_400NS_GI = BIT(8),
134         WMI_AUTORATE_800NS_GI = BIT(9),
135         WMI_AUTORATE_1600NS_GI = BIT(10),
136         WMI_AUTORATE_3200NS_GI = BIT(11),
137 };
138
139 enum {
140         WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP       = 0x00000001,
141         WMI_HOST_VDEV_FLAGS_TRANSMIT_AP         = 0x00000002,
142         WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP     = 0x00000004,
143         WMI_HOST_VDEV_FLAGS_EMA_MODE            = 0x00000008,
144         WMI_HOST_VDEV_FLAGS_SCAN_MODE_VAP       = 0x00000010,
145 };
146
147 /*
148  * wmi command groups.
149  */
150 enum wmi_cmd_group {
151         /* 0 to 2 are reserved */
152         WMI_GRP_START = 0x3,
153         WMI_GRP_SCAN = WMI_GRP_START,
154         WMI_GRP_PDEV            = 0x4,
155         WMI_GRP_VDEV           = 0x5,
156         WMI_GRP_PEER           = 0x6,
157         WMI_GRP_MGMT           = 0x7,
158         WMI_GRP_BA_NEG         = 0x8,
159         WMI_GRP_STA_PS         = 0x9,
160         WMI_GRP_DFS            = 0xa,
161         WMI_GRP_ROAM           = 0xb,
162         WMI_GRP_OFL_SCAN       = 0xc,
163         WMI_GRP_P2P            = 0xd,
164         WMI_GRP_AP_PS          = 0xe,
165         WMI_GRP_RATE_CTRL      = 0xf,
166         WMI_GRP_PROFILE        = 0x10,
167         WMI_GRP_SUSPEND        = 0x11,
168         WMI_GRP_BCN_FILTER     = 0x12,
169         WMI_GRP_WOW            = 0x13,
170         WMI_GRP_RTT            = 0x14,
171         WMI_GRP_SPECTRAL       = 0x15,
172         WMI_GRP_STATS          = 0x16,
173         WMI_GRP_ARP_NS_OFL     = 0x17,
174         WMI_GRP_NLO_OFL        = 0x18,
175         WMI_GRP_GTK_OFL        = 0x19,
176         WMI_GRP_CSA_OFL        = 0x1a,
177         WMI_GRP_CHATTER        = 0x1b,
178         WMI_GRP_TID_ADDBA      = 0x1c,
179         WMI_GRP_MISC           = 0x1d,
180         WMI_GRP_GPIO           = 0x1e,
181         WMI_GRP_FWTEST         = 0x1f,
182         WMI_GRP_TDLS           = 0x20,
183         WMI_GRP_RESMGR         = 0x21,
184         WMI_GRP_STA_SMPS       = 0x22,
185         WMI_GRP_WLAN_HB        = 0x23,
186         WMI_GRP_RMC            = 0x24,
187         WMI_GRP_MHF_OFL        = 0x25,
188         WMI_GRP_LOCATION_SCAN  = 0x26,
189         WMI_GRP_OEM            = 0x27,
190         WMI_GRP_NAN            = 0x28,
191         WMI_GRP_COEX           = 0x29,
192         WMI_GRP_OBSS_OFL       = 0x2a,
193         WMI_GRP_LPI            = 0x2b,
194         WMI_GRP_EXTSCAN        = 0x2c,
195         WMI_GRP_DHCP_OFL       = 0x2d,
196         WMI_GRP_IPA            = 0x2e,
197         WMI_GRP_MDNS_OFL       = 0x2f,
198         WMI_GRP_SAP_OFL        = 0x30,
199         WMI_GRP_OCB            = 0x31,
200         WMI_GRP_SOC            = 0x32,
201         WMI_GRP_PKT_FILTER     = 0x33,
202         WMI_GRP_MAWC           = 0x34,
203         WMI_GRP_PMF_OFFLOAD    = 0x35,
204         WMI_GRP_BPF_OFFLOAD    = 0x36,
205         WMI_GRP_NAN_DATA       = 0x37,
206         WMI_GRP_PROTOTYPE      = 0x38,
207         WMI_GRP_MONITOR        = 0x39,
208         WMI_GRP_REGULATORY     = 0x3a,
209         WMI_GRP_HW_DATA_FILTER = 0x3b,
210         WMI_GRP_WLM            = 0x3c,
211         WMI_GRP_11K_OFFLOAD    = 0x3d,
212         WMI_GRP_TWT            = 0x3e,
213         WMI_GRP_MOTION_DET     = 0x3f,
214         WMI_GRP_SPATIAL_REUSE  = 0x40,
215 };
216
217 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
218 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
219
220 #define WMI_CMD_UNSUPPORTED 0
221
222 enum wmi_tlv_cmd_id {
223         WMI_INIT_CMDID = 0x1,
224         WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
225         WMI_STOP_SCAN_CMDID,
226         WMI_SCAN_CHAN_LIST_CMDID,
227         WMI_SCAN_SCH_PRIO_TBL_CMDID,
228         WMI_SCAN_UPDATE_REQUEST_CMDID,
229         WMI_SCAN_PROB_REQ_OUI_CMDID,
230         WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
231         WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
232         WMI_PDEV_SET_CHANNEL_CMDID,
233         WMI_PDEV_SET_PARAM_CMDID,
234         WMI_PDEV_PKTLOG_ENABLE_CMDID,
235         WMI_PDEV_PKTLOG_DISABLE_CMDID,
236         WMI_PDEV_SET_WMM_PARAMS_CMDID,
237         WMI_PDEV_SET_HT_CAP_IE_CMDID,
238         WMI_PDEV_SET_VHT_CAP_IE_CMDID,
239         WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
240         WMI_PDEV_SET_QUIET_MODE_CMDID,
241         WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
242         WMI_PDEV_GET_TPC_CONFIG_CMDID,
243         WMI_PDEV_SET_BASE_MACADDR_CMDID,
244         WMI_PDEV_DUMP_CMDID,
245         WMI_PDEV_SET_LED_CONFIG_CMDID,
246         WMI_PDEV_GET_TEMPERATURE_CMDID,
247         WMI_PDEV_SET_LED_FLASHING_CMDID,
248         WMI_PDEV_SMART_ANT_ENABLE_CMDID,
249         WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
250         WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
251         WMI_PDEV_SET_CTL_TABLE_CMDID,
252         WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
253         WMI_PDEV_FIPS_CMDID,
254         WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
255         WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
256         WMI_PDEV_GET_NFCAL_POWER_CMDID,
257         WMI_PDEV_GET_TPC_CMDID,
258         WMI_MIB_STATS_ENABLE_CMDID,
259         WMI_PDEV_SET_PCL_CMDID,
260         WMI_PDEV_SET_HW_MODE_CMDID,
261         WMI_PDEV_SET_MAC_CONFIG_CMDID,
262         WMI_PDEV_SET_ANTENNA_MODE_CMDID,
263         WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
264         WMI_PDEV_WAL_POWER_DEBUG_CMDID,
265         WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
266         WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
267         WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
268         WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
269         WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
270         WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
271         WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
272         WMI_PDEV_CHECK_CAL_VERSION_CMDID,
273         WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
274         WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
275         WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
276         WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
277         WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
278         WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
279         WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
280         WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
281         WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
282         WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
283         WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
284         WMI_PDEV_PKTLOG_FILTER_CMDID,
285         WMI_PDEV_SET_RAP_CONFIG_CMDID,
286         WMI_PDEV_DSM_FILTER_CMDID,
287         WMI_PDEV_FRAME_INJECT_CMDID,
288         WMI_PDEV_TBTT_OFFSET_SYNC_CMDID,
289         WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID,
290         WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID,
291         WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
292         WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
293         WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
294         WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
295         WMI_PDEV_GET_TPC_STATS_CMDID,
296         WMI_PDEV_ENABLE_DURATION_BASED_TX_MODE_SELECTION_CMDID,
297         WMI_PDEV_GET_DPD_STATUS_CMDID,
298         WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID,
299         WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID,
300         WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
301         WMI_VDEV_DELETE_CMDID,
302         WMI_VDEV_START_REQUEST_CMDID,
303         WMI_VDEV_RESTART_REQUEST_CMDID,
304         WMI_VDEV_UP_CMDID,
305         WMI_VDEV_STOP_CMDID,
306         WMI_VDEV_DOWN_CMDID,
307         WMI_VDEV_SET_PARAM_CMDID,
308         WMI_VDEV_INSTALL_KEY_CMDID,
309         WMI_VDEV_WNM_SLEEPMODE_CMDID,
310         WMI_VDEV_WMM_ADDTS_CMDID,
311         WMI_VDEV_WMM_DELTS_CMDID,
312         WMI_VDEV_SET_WMM_PARAMS_CMDID,
313         WMI_VDEV_SET_GTX_PARAMS_CMDID,
314         WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
315         WMI_VDEV_PLMREQ_START_CMDID,
316         WMI_VDEV_PLMREQ_STOP_CMDID,
317         WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
318         WMI_VDEV_SET_IE_CMDID,
319         WMI_VDEV_RATEMASK_CMDID,
320         WMI_VDEV_ATF_REQUEST_CMDID,
321         WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
322         WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
323         WMI_VDEV_SET_QUIET_MODE_CMDID,
324         WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
325         WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
326         WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
327         WMI_VDEV_SET_ARP_STAT_CMDID,
328         WMI_VDEV_GET_ARP_STAT_CMDID,
329         WMI_VDEV_GET_TX_POWER_CMDID,
330         WMI_VDEV_LIMIT_OFFCHAN_CMDID,
331         WMI_VDEV_SET_CUSTOM_SW_RETRY_TH_CMDID,
332         WMI_VDEV_CHAINMASK_CONFIG_CMDID,
333         WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID,
334         WMI_VDEV_GET_MWS_COEX_INFO_CMDID,
335         WMI_VDEV_DELETE_ALL_PEER_CMDID,
336         WMI_VDEV_BSS_MAX_IDLE_TIME_CMDID,
337         WMI_VDEV_AUDIO_SYNC_TRIGGER_CMDID,
338         WMI_VDEV_AUDIO_SYNC_QTIMER_CMDID,
339         WMI_VDEV_SET_PCL_CMDID,
340         WMI_VDEV_GET_BIG_DATA_CMDID,
341         WMI_VDEV_GET_BIG_DATA_P2_CMDID,
342         WMI_VDEV_SET_TPC_POWER_CMDID,
343         WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
344         WMI_PEER_DELETE_CMDID,
345         WMI_PEER_FLUSH_TIDS_CMDID,
346         WMI_PEER_SET_PARAM_CMDID,
347         WMI_PEER_ASSOC_CMDID,
348         WMI_PEER_ADD_WDS_ENTRY_CMDID,
349         WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
350         WMI_PEER_MCAST_GROUP_CMDID,
351         WMI_PEER_INFO_REQ_CMDID,
352         WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
353         WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
354         WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
355         WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
356         WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
357         WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
358         WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
359         WMI_PEER_ATF_REQUEST_CMDID,
360         WMI_PEER_BWF_REQUEST_CMDID,
361         WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
362         WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
363         WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
364         WMI_PEER_ANTDIV_INFO_REQ_CMDID,
365         WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
366         WMI_PDEV_SEND_BCN_CMDID,
367         WMI_BCN_TMPL_CMDID,
368         WMI_BCN_FILTER_RX_CMDID,
369         WMI_PRB_REQ_FILTER_RX_CMDID,
370         WMI_MGMT_TX_CMDID,
371         WMI_PRB_TMPL_CMDID,
372         WMI_MGMT_TX_SEND_CMDID,
373         WMI_OFFCHAN_DATA_TX_SEND_CMDID,
374         WMI_PDEV_SEND_FD_CMDID,
375         WMI_BCN_OFFLOAD_CTRL_CMDID,
376         WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
377         WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
378         WMI_FILS_DISCOVERY_TMPL_CMDID,
379         WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
380         WMI_ADDBA_SEND_CMDID,
381         WMI_ADDBA_STATUS_CMDID,
382         WMI_DELBA_SEND_CMDID,
383         WMI_ADDBA_SET_RESP_CMDID,
384         WMI_SEND_SINGLEAMSDU_CMDID,
385         WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
386         WMI_STA_POWERSAVE_PARAM_CMDID,
387         WMI_STA_MIMO_PS_MODE_CMDID,
388         WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
389         WMI_PDEV_DFS_DISABLE_CMDID,
390         WMI_DFS_PHYERR_FILTER_ENA_CMDID,
391         WMI_DFS_PHYERR_FILTER_DIS_CMDID,
392         WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
393         WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
394         WMI_VDEV_ADFS_CH_CFG_CMDID,
395         WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
396         WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
397         WMI_ROAM_SCAN_RSSI_THRESHOLD,
398         WMI_ROAM_SCAN_PERIOD,
399         WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
400         WMI_ROAM_AP_PROFILE,
401         WMI_ROAM_CHAN_LIST,
402         WMI_ROAM_SCAN_CMD,
403         WMI_ROAM_SYNCH_COMPLETE,
404         WMI_ROAM_SET_RIC_REQUEST_CMDID,
405         WMI_ROAM_INVOKE_CMDID,
406         WMI_ROAM_FILTER_CMDID,
407         WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
408         WMI_ROAM_CONFIGURE_MAWC_CMDID,
409         WMI_ROAM_SET_MBO_PARAM_CMDID,
410         WMI_ROAM_PER_CONFIG_CMDID,
411         WMI_ROAM_BTM_CONFIG_CMDID,
412         WMI_ENABLE_FILS_CMDID,
413         WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
414         WMI_OFL_SCAN_REMOVE_AP_PROFILE,
415         WMI_OFL_SCAN_PERIOD,
416         WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
417         WMI_P2P_DEV_SET_DISCOVERABILITY,
418         WMI_P2P_GO_SET_BEACON_IE,
419         WMI_P2P_GO_SET_PROBE_RESP_IE,
420         WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
421         WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
422         WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
423         WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
424         WMI_P2P_SET_OPPPS_PARAM_CMDID,
425         WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
426         WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
427         WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
428         WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
429         WMI_AP_PS_EGAP_PARAM_CMDID,
430         WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
431         WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
432         WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
433         WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
434         WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
435         WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
436         WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
437         WMI_PDEV_RESUME_CMDID,
438         WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
439         WMI_RMV_BCN_FILTER_CMDID,
440         WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
441         WMI_WOW_DEL_WAKE_PATTERN_CMDID,
442         WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
443         WMI_WOW_ENABLE_CMDID,
444         WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
445         WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
446         WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
447         WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
448         WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
449         WMI_D0_WOW_ENABLE_DISABLE_CMDID,
450         WMI_EXTWOW_ENABLE_CMDID,
451         WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
452         WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
453         WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
454         WMI_WOW_UDP_SVC_OFLD_CMDID,
455         WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
456         WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
457         WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
458         WMI_RTT_TSF_CMDID,
459         WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
460         WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
461         WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
462         WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
463         WMI_REQUEST_STATS_EXT_CMDID,
464         WMI_REQUEST_LINK_STATS_CMDID,
465         WMI_START_LINK_STATS_CMDID,
466         WMI_CLEAR_LINK_STATS_CMDID,
467         WMI_GET_FW_MEM_DUMP_CMDID,
468         WMI_DEBUG_MESG_FLUSH_CMDID,
469         WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
470         WMI_REQUEST_WLAN_STATS_CMDID,
471         WMI_REQUEST_RCPI_CMDID,
472         WMI_REQUEST_PEER_STATS_INFO_CMDID,
473         WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
474         WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
475         WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
476         WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
477         WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
478         WMI_APFIND_CMDID,
479         WMI_PASSPOINT_LIST_CONFIG_CMDID,
480         WMI_NLO_CONFIGURE_MAWC_CMDID,
481         WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
482         WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
483         WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
484         WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
485         WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
486         WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
487         WMI_CHATTER_COALESCING_QUERY_CMDID,
488         WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
489         WMI_PEER_TID_DELBA_CMDID,
490         WMI_STA_DTIM_PS_METHOD_CMDID,
491         WMI_STA_UAPSD_AUTO_TRIG_CMDID,
492         WMI_STA_KEEPALIVE_CMDID,
493         WMI_BA_REQ_SSN_CMDID,
494         WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
495         WMI_PDEV_UTF_CMDID,
496         WMI_DBGLOG_CFG_CMDID,
497         WMI_PDEV_QVIT_CMDID,
498         WMI_PDEV_FTM_INTG_CMDID,
499         WMI_VDEV_SET_KEEPALIVE_CMDID,
500         WMI_VDEV_GET_KEEPALIVE_CMDID,
501         WMI_FORCE_FW_HANG_CMDID,
502         WMI_SET_MCASTBCAST_FILTER_CMDID,
503         WMI_THERMAL_MGMT_CMDID,
504         WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
505         WMI_TPC_CHAINMASK_CONFIG_CMDID,
506         WMI_SET_ANTENNA_DIVERSITY_CMDID,
507         WMI_OCB_SET_SCHED_CMDID,
508         WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
509         WMI_LRO_CONFIG_CMDID,
510         WMI_TRANSFER_DATA_TO_FLASH_CMDID,
511         WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
512         WMI_VDEV_WISA_CMDID,
513         WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
514         WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
515         WMI_READ_DATA_FROM_FLASH_CMDID,
516         WMI_THERM_THROT_SET_CONF_CMDID,
517         WMI_RUNTIME_DPD_RECAL_CMDID,
518         WMI_GET_TPC_POWER_CMDID,
519         WMI_IDLE_TRIGGER_MONITOR_CMDID,
520         WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
521         WMI_GPIO_OUTPUT_CMDID,
522         WMI_TXBF_CMDID,
523         WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
524         WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
525         WMI_UNIT_TEST_CMDID,
526         WMI_FWTEST_CMDID,
527         WMI_QBOOST_CFG_CMDID,
528         WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
529         WMI_TDLS_PEER_UPDATE_CMDID,
530         WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
531         WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
532         WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
533         WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
534         WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
535         WMI_STA_SMPS_PARAM_CMDID,
536         WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
537         WMI_HB_SET_TCP_PARAMS_CMDID,
538         WMI_HB_SET_TCP_PKT_FILTER_CMDID,
539         WMI_HB_SET_UDP_PARAMS_CMDID,
540         WMI_HB_SET_UDP_PKT_FILTER_CMDID,
541         WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
542         WMI_RMC_SET_ACTION_PERIOD_CMDID,
543         WMI_RMC_CONFIG_CMDID,
544         WMI_RMC_SET_MANUAL_LEADER_CMDID,
545         WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
546         WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
547         WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
548         WMI_BATCH_SCAN_DISABLE_CMDID,
549         WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
550         WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
551         WMI_OEM_REQUEST_CMDID,
552         WMI_LPI_OEM_REQ_CMDID,
553         WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
554         WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
555         WMI_CHAN_AVOID_UPDATE_CMDID,
556         WMI_COEX_CONFIG_CMDID,
557         WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
558         WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
559         WMI_SAR_LIMITS_CMDID,
560         WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
561         WMI_OBSS_SCAN_DISABLE_CMDID,
562         WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
563         WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
564         WMI_LPI_START_SCAN_CMDID,
565         WMI_LPI_STOP_SCAN_CMDID,
566         WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
567         WMI_EXTSCAN_STOP_CMDID,
568         WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
569         WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
570         WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
571         WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
572         WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
573         WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
574         WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
575         WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
576         WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
577         WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
578         WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
579         WMI_MDNS_SET_FQDN_CMDID,
580         WMI_MDNS_SET_RESPONSE_CMDID,
581         WMI_MDNS_GET_STATS_CMDID,
582         WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
583         WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
584         WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
585         WMI_OCB_SET_UTC_TIME_CMDID,
586         WMI_OCB_START_TIMING_ADVERT_CMDID,
587         WMI_OCB_STOP_TIMING_ADVERT_CMDID,
588         WMI_OCB_GET_TSF_TIMER_CMDID,
589         WMI_DCC_GET_STATS_CMDID,
590         WMI_DCC_CLEAR_STATS_CMDID,
591         WMI_DCC_UPDATE_NDL_CMDID,
592         WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
593         WMI_SOC_SET_HW_MODE_CMDID,
594         WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
595         WMI_SOC_SET_ANTENNA_MODE_CMDID,
596         WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
597         WMI_PACKET_FILTER_ENABLE_CMDID,
598         WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
599         WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
600         WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
601         WMI_BPF_GET_VDEV_STATS_CMDID,
602         WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
603         WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
604         WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
605         WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
606         WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
607         WMI_11D_SCAN_START_CMDID,
608         WMI_11D_SCAN_STOP_CMDID,
609         WMI_SET_INIT_COUNTRY_CMDID,
610         WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
611         WMI_NDP_INITIATOR_REQ_CMDID,
612         WMI_NDP_RESPONDER_REQ_CMDID,
613         WMI_NDP_END_REQ_CMDID,
614         WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
615         WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
616         WMI_TWT_DISABLE_CMDID,
617         WMI_TWT_ADD_DIALOG_CMDID,
618         WMI_TWT_DEL_DIALOG_CMDID,
619         WMI_TWT_PAUSE_DIALOG_CMDID,
620         WMI_TWT_RESUME_DIALOG_CMDID,
621         WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
622                                 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
623         WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
624 };
625
626 enum wmi_tlv_event_id {
627         WMI_SERVICE_READY_EVENTID = 0x1,
628         WMI_READY_EVENTID,
629         WMI_SERVICE_AVAILABLE_EVENTID,
630         WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
631         WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
632         WMI_CHAN_INFO_EVENTID,
633         WMI_PHYERR_EVENTID,
634         WMI_PDEV_DUMP_EVENTID,
635         WMI_TX_PAUSE_EVENTID,
636         WMI_DFS_RADAR_EVENTID,
637         WMI_PDEV_L1SS_TRACK_EVENTID,
638         WMI_PDEV_TEMPERATURE_EVENTID,
639         WMI_SERVICE_READY_EXT_EVENTID,
640         WMI_PDEV_FIPS_EVENTID,
641         WMI_PDEV_CHANNEL_HOPPING_EVENTID,
642         WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
643         WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
644         WMI_PDEV_TPC_EVENTID,
645         WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
646         WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
647         WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
648         WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
649         WMI_PDEV_ANTDIV_STATUS_EVENTID,
650         WMI_PDEV_CHIP_POWER_STATS_EVENTID,
651         WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
652         WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
653         WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
654         WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
655         WMI_PDEV_BSS_CHAN_INFO_EVENTID,
656         WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
657         WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
658         WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
659         WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
660         WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
661         WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
662         WMI_PDEV_RAP_INFO_EVENTID,
663         WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
664         WMI_SERVICE_READY_EXT2_EVENTID,
665         WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
666         WMI_VDEV_STOPPED_EVENTID,
667         WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
668         WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
669         WMI_VDEV_TSF_REPORT_EVENTID,
670         WMI_VDEV_DELETE_RESP_EVENTID,
671         WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
672         WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
673         WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
674         WMI_PEER_INFO_EVENTID,
675         WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
676         WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
677         WMI_PEER_STATE_EVENTID,
678         WMI_PEER_ASSOC_CONF_EVENTID,
679         WMI_PEER_DELETE_RESP_EVENTID,
680         WMI_PEER_RATECODE_LIST_EVENTID,
681         WMI_WDS_PEER_EVENTID,
682         WMI_PEER_STA_PS_STATECHG_EVENTID,
683         WMI_PEER_ANTDIV_INFO_EVENTID,
684         WMI_PEER_RESERVED0_EVENTID,
685         WMI_PEER_RESERVED1_EVENTID,
686         WMI_PEER_RESERVED2_EVENTID,
687         WMI_PEER_RESERVED3_EVENTID,
688         WMI_PEER_RESERVED4_EVENTID,
689         WMI_PEER_RESERVED5_EVENTID,
690         WMI_PEER_RESERVED6_EVENTID,
691         WMI_PEER_RESERVED7_EVENTID,
692         WMI_PEER_RESERVED8_EVENTID,
693         WMI_PEER_RESERVED9_EVENTID,
694         WMI_PEER_RESERVED10_EVENTID,
695         WMI_PEER_OPER_MODE_CHANGE_EVENTID,
696         WMI_PEER_TX_PN_RESPONSE_EVENTID,
697         WMI_PEER_CFR_CAPTURE_EVENTID,
698         WMI_PEER_CREATE_CONF_EVENTID,
699         WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
700         WMI_HOST_SWBA_EVENTID,
701         WMI_TBTTOFFSET_UPDATE_EVENTID,
702         WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
703         WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
704         WMI_MGMT_TX_COMPLETION_EVENTID,
705         WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
706         WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
707         WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID,
708         WMI_HOST_FILS_DISCOVERY_EVENTID,
709         WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
710         WMI_TX_ADDBA_COMPLETE_EVENTID,
711         WMI_BA_RSP_SSN_EVENTID,
712         WMI_AGGR_STATE_TRIG_EVENTID,
713         WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
714         WMI_PROFILE_MATCH,
715         WMI_ROAM_SYNCH_EVENTID,
716         WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
717         WMI_P2P_NOA_EVENTID,
718         WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
719         WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
720         WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
721         WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
722         WMI_D0_WOW_DISABLE_ACK_EVENTID,
723         WMI_WOW_INITIAL_WAKEUP_EVENTID,
724         WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
725         WMI_TSF_MEASUREMENT_REPORT_EVENTID,
726         WMI_RTT_ERROR_REPORT_EVENTID,
727         WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
728         WMI_IFACE_LINK_STATS_EVENTID,
729         WMI_PEER_LINK_STATS_EVENTID,
730         WMI_RADIO_LINK_STATS_EVENTID,
731         WMI_UPDATE_FW_MEM_DUMP_EVENTID,
732         WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
733         WMI_INST_RSSI_STATS_EVENTID,
734         WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
735         WMI_REPORT_STATS_EVENTID,
736         WMI_UPDATE_RCPI_EVENTID,
737         WMI_PEER_STATS_INFO_EVENTID,
738         WMI_RADIO_CHAN_STATS_EVENTID,
739         WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
740         WMI_NLO_SCAN_COMPLETE_EVENTID,
741         WMI_APFIND_EVENTID,
742         WMI_PASSPOINT_MATCH_EVENTID,
743         WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
744         WMI_GTK_REKEY_FAIL_EVENTID,
745         WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
746         WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
747         WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
748         WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
749         WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
750         WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
751         WMI_PDEV_UTF_EVENTID,
752         WMI_DEBUG_MESG_EVENTID,
753         WMI_UPDATE_STATS_EVENTID,
754         WMI_DEBUG_PRINT_EVENTID,
755         WMI_DCS_INTERFERENCE_EVENTID,
756         WMI_PDEV_QVIT_EVENTID,
757         WMI_WLAN_PROFILE_DATA_EVENTID,
758         WMI_PDEV_FTM_INTG_EVENTID,
759         WMI_WLAN_FREQ_AVOID_EVENTID,
760         WMI_VDEV_GET_KEEPALIVE_EVENTID,
761         WMI_THERMAL_MGMT_EVENTID,
762         WMI_DIAG_DATA_CONTAINER_EVENTID,
763         WMI_HOST_AUTO_SHUTDOWN_EVENTID,
764         WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
765         WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
766         WMI_DIAG_EVENTID,
767         WMI_OCB_SET_SCHED_EVENTID,
768         WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
769         WMI_RSSI_BREACH_EVENTID,
770         WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
771         WMI_PDEV_UTF_SCPC_EVENTID,
772         WMI_READ_DATA_FROM_FLASH_EVENTID,
773         WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
774         WMI_PKGID_EVENTID,
775         WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
776         WMI_UPLOADH_EVENTID,
777         WMI_CAPTUREH_EVENTID,
778         WMI_RFKILL_STATE_CHANGE_EVENTID,
779         WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
780         WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
781         WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
782         WMI_BATCH_SCAN_RESULT_EVENTID,
783         WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
784         WMI_OEM_MEASUREMENT_REPORT_EVENTID,
785         WMI_OEM_ERROR_REPORT_EVENTID,
786         WMI_OEM_RESPONSE_EVENTID,
787         WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
788         WMI_NAN_DISC_IFACE_CREATED_EVENTID,
789         WMI_NAN_DISC_IFACE_DELETED_EVENTID,
790         WMI_NAN_STARTED_CLUSTER_EVENTID,
791         WMI_NAN_JOINED_CLUSTER_EVENTID,
792         WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
793         WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
794         WMI_LPI_STATUS_EVENTID,
795         WMI_LPI_HANDOFF_EVENTID,
796         WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
797         WMI_EXTSCAN_OPERATION_EVENTID,
798         WMI_EXTSCAN_TABLE_USAGE_EVENTID,
799         WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
800         WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
801         WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
802         WMI_EXTSCAN_CAPABILITIES_EVENTID,
803         WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
804         WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
805         WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
806         WMI_SAP_OFL_DEL_STA_EVENTID,
807         WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID =
808                 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL),
809         WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
810         WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
811         WMI_DCC_GET_STATS_RESP_EVENTID,
812         WMI_DCC_UPDATE_NDL_RESP_EVENTID,
813         WMI_DCC_STATS_EVENTID,
814         WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
815         WMI_SOC_HW_MODE_TRANSITION_EVENTID,
816         WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
817         WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
818         WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
819         WMI_BPF_VDEV_STATS_INFO_EVENTID,
820         WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
821         WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
822         WMI_11D_NEW_COUNTRY_EVENTID,
823         WMI_REG_CHAN_LIST_CC_EXT_EVENTID,
824         WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
825         WMI_NDP_INITIATOR_RSP_EVENTID,
826         WMI_NDP_RESPONDER_RSP_EVENTID,
827         WMI_NDP_END_RSP_EVENTID,
828         WMI_NDP_INDICATION_EVENTID,
829         WMI_NDP_CONFIRM_EVENTID,
830         WMI_NDP_END_INDICATION_EVENTID,
831
832         WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
833         WMI_TWT_DISABLE_EVENTID,
834         WMI_TWT_ADD_DIALOG_EVENTID,
835         WMI_TWT_DEL_DIALOG_EVENTID,
836         WMI_TWT_PAUSE_DIALOG_EVENTID,
837         WMI_TWT_RESUME_DIALOG_EVENTID,
838 };
839
840 enum wmi_tlv_pdev_param {
841         WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
842         WMI_PDEV_PARAM_RX_CHAIN_MASK,
843         WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
844         WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
845         WMI_PDEV_PARAM_TXPOWER_SCALE,
846         WMI_PDEV_PARAM_BEACON_GEN_MODE,
847         WMI_PDEV_PARAM_BEACON_TX_MODE,
848         WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
849         WMI_PDEV_PARAM_PROTECTION_MODE,
850         WMI_PDEV_PARAM_DYNAMIC_BW,
851         WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
852         WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
853         WMI_PDEV_PARAM_STA_KICKOUT_TH,
854         WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
855         WMI_PDEV_PARAM_LTR_ENABLE,
856         WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
857         WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
858         WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
859         WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
860         WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
861         WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
862         WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
863         WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
864         WMI_PDEV_PARAM_L1SS_ENABLE,
865         WMI_PDEV_PARAM_DSLEEP_ENABLE,
866         WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
867         WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
868         WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
869         WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
870         WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
871         WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
872         WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
873         WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
874         WMI_PDEV_PARAM_PMF_QOS,
875         WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
876         WMI_PDEV_PARAM_DCS,
877         WMI_PDEV_PARAM_ANI_ENABLE,
878         WMI_PDEV_PARAM_ANI_POLL_PERIOD,
879         WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
880         WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
881         WMI_PDEV_PARAM_ANI_CCK_LEVEL,
882         WMI_PDEV_PARAM_DYNTXCHAIN,
883         WMI_PDEV_PARAM_PROXY_STA,
884         WMI_PDEV_PARAM_IDLE_PS_CONFIG,
885         WMI_PDEV_PARAM_POWER_GATING_SLEEP,
886         WMI_PDEV_PARAM_RFKILL_ENABLE,
887         WMI_PDEV_PARAM_BURST_DUR,
888         WMI_PDEV_PARAM_BURST_ENABLE,
889         WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
890         WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
891         WMI_PDEV_PARAM_L1SS_TRACK,
892         WMI_PDEV_PARAM_HYST_EN,
893         WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
894         WMI_PDEV_PARAM_LED_SYS_STATE,
895         WMI_PDEV_PARAM_LED_ENABLE,
896         WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
897         WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
898         WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
899         WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
900         WMI_PDEV_PARAM_CTS_CBW,
901         WMI_PDEV_PARAM_WNTS_CONFIG,
902         WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
903         WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
904         WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
905         WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
906         WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
907         WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
908         WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
909         WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
910         WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
911         WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
912         WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
913         WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
914         WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
915         WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
916         WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
917         WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
918         WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
919         WMI_PDEV_PARAM_TXPOWER_DECR_DB,
920         WMI_PDEV_PARAM_AGGR_BURST,
921         WMI_PDEV_PARAM_RX_DECAP_MODE,
922         WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
923         WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
924         WMI_PDEV_PARAM_ANTENNA_GAIN,
925         WMI_PDEV_PARAM_RX_FILTER,
926         WMI_PDEV_SET_MCAST_TO_UCAST_TID,
927         WMI_PDEV_PARAM_PROXY_STA_MODE,
928         WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
929         WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
930         WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
931         WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
932         WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
933         WMI_PDEV_PARAM_BLOCK_INTERBSS,
934         WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
935         WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
936         WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
937         WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
938         WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
939         WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
940         WMI_PDEV_PARAM_EN_STATS,
941         WMI_PDEV_PARAM_MU_GROUP_POLICY,
942         WMI_PDEV_PARAM_NOISE_DETECTION,
943         WMI_PDEV_PARAM_NOISE_THRESHOLD,
944         WMI_PDEV_PARAM_DPD_ENABLE,
945         WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
946         WMI_PDEV_PARAM_ATF_STRICT_SCH,
947         WMI_PDEV_PARAM_ATF_SCHED_DURATION,
948         WMI_PDEV_PARAM_ANT_PLZN,
949         WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
950         WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
951         WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
952         WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
953         WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
954         WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
955         WMI_PDEV_PARAM_CCA_THRESHOLD,
956         WMI_PDEV_PARAM_RTS_FIXED_RATE,
957         WMI_PDEV_PARAM_PDEV_RESET,
958         WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
959         WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
960         WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
961         WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
962         WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
963         WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
964         WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
965         WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
966         WMI_PDEV_PARAM_PROPAGATION_DELAY,
967         WMI_PDEV_PARAM_ENA_ANT_DIV,
968         WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
969         WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
970         WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
971         WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
972         WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
973         WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
974         WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
975         WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
976         WMI_PDEV_PARAM_TX_SCH_DELAY,
977         WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
978         WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
979         WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
980         WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
981         WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
982         WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
983         WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
984         WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc,
985         WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe,
986         WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6,
987 };
988
989 enum wmi_tlv_vdev_param {
990         WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
991         WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
992         WMI_VDEV_PARAM_BEACON_INTERVAL,
993         WMI_VDEV_PARAM_LISTEN_INTERVAL,
994         WMI_VDEV_PARAM_MULTICAST_RATE,
995         WMI_VDEV_PARAM_MGMT_TX_RATE,
996         WMI_VDEV_PARAM_SLOT_TIME,
997         WMI_VDEV_PARAM_PREAMBLE,
998         WMI_VDEV_PARAM_SWBA_TIME,
999         WMI_VDEV_STATS_UPDATE_PERIOD,
1000         WMI_VDEV_PWRSAVE_AGEOUT_TIME,
1001         WMI_VDEV_HOST_SWBA_INTERVAL,
1002         WMI_VDEV_PARAM_DTIM_PERIOD,
1003         WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1004         WMI_VDEV_PARAM_WDS,
1005         WMI_VDEV_PARAM_ATIM_WINDOW,
1006         WMI_VDEV_PARAM_BMISS_COUNT_MAX,
1007         WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
1008         WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
1009         WMI_VDEV_PARAM_FEATURE_WMM,
1010         WMI_VDEV_PARAM_CHWIDTH,
1011         WMI_VDEV_PARAM_CHEXTOFFSET,
1012         WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
1013         WMI_VDEV_PARAM_STA_QUICKKICKOUT,
1014         WMI_VDEV_PARAM_MGMT_RATE,
1015         WMI_VDEV_PARAM_PROTECTION_MODE,
1016         WMI_VDEV_PARAM_FIXED_RATE,
1017         WMI_VDEV_PARAM_SGI,
1018         WMI_VDEV_PARAM_LDPC,
1019         WMI_VDEV_PARAM_TX_STBC,
1020         WMI_VDEV_PARAM_RX_STBC,
1021         WMI_VDEV_PARAM_INTRA_BSS_FWD,
1022         WMI_VDEV_PARAM_DEF_KEYID,
1023         WMI_VDEV_PARAM_NSS,
1024         WMI_VDEV_PARAM_BCAST_DATA_RATE,
1025         WMI_VDEV_PARAM_MCAST_DATA_RATE,
1026         WMI_VDEV_PARAM_MCAST_INDICATE,
1027         WMI_VDEV_PARAM_DHCP_INDICATE,
1028         WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1029         WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1030         WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1031         WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1032         WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
1033         WMI_VDEV_PARAM_ENABLE_RTSCTS,
1034         WMI_VDEV_PARAM_TXBF,
1035         WMI_VDEV_PARAM_PACKET_POWERSAVE,
1036         WMI_VDEV_PARAM_DROP_UNENCRY,
1037         WMI_VDEV_PARAM_TX_ENCAP_TYPE,
1038         WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1039         WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1040         WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1041         WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1042         WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1043         WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1044         WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1045         WMI_VDEV_PARAM_TX_PWRLIMIT,
1046         WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
1047         WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
1048         WMI_VDEV_PARAM_ENABLE_RMC,
1049         WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
1050         WMI_VDEV_PARAM_MAX_RATE,
1051         WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
1052         WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
1053         WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
1054         WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
1055         WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
1056         WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
1057         WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
1058         WMI_VDEV_PARAM_INACTIVITY_CNT,
1059         WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
1060         WMI_VDEV_PARAM_DTIM_POLICY,
1061         WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
1062         WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
1063         WMI_VDEV_PARAM_RX_LEAK_WINDOW,
1064         WMI_VDEV_PARAM_STATS_AVG_FACTOR,
1065         WMI_VDEV_PARAM_DISCONNECT_TH,
1066         WMI_VDEV_PARAM_RTSCTS_RATE,
1067         WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
1068         WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
1069         WMI_VDEV_PARAM_TXPOWER_SCALE,
1070         WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
1071         WMI_VDEV_PARAM_MCAST2UCAST_SET,
1072         WMI_VDEV_PARAM_RC_NUM_RETRIES,
1073         WMI_VDEV_PARAM_CABQ_MAXDUR,
1074         WMI_VDEV_PARAM_MFPTEST_SET,
1075         WMI_VDEV_PARAM_RTS_FIXED_RATE,
1076         WMI_VDEV_PARAM_VHT_SGIMASK,
1077         WMI_VDEV_PARAM_VHT80_RATEMASK,
1078         WMI_VDEV_PARAM_PROXY_STA,
1079         WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
1080         WMI_VDEV_PARAM_RX_DECAP_TYPE,
1081         WMI_VDEV_PARAM_BW_NSS_RATEMASK,
1082         WMI_VDEV_PARAM_SENSOR_AP,
1083         WMI_VDEV_PARAM_BEACON_RATE,
1084         WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
1085         WMI_VDEV_PARAM_STA_KICKOUT,
1086         WMI_VDEV_PARAM_CAPABILITIES,
1087         WMI_VDEV_PARAM_TSF_INCREMENT,
1088         WMI_VDEV_PARAM_AMPDU_PER_AC,
1089         WMI_VDEV_PARAM_RX_FILTER,
1090         WMI_VDEV_PARAM_MGMT_TX_POWER,
1091         WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
1092         WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
1093         WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
1094         WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
1095         WMI_VDEV_PARAM_HE_DCM,
1096         WMI_VDEV_PARAM_HE_RANGE_EXT,
1097         WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
1098         WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
1099         WMI_VDEV_PARAM_HE_LTF = 0x74,
1100         WMI_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE = 0x7d,
1101         WMI_VDEV_PARAM_BA_MODE = 0x7e,
1102         WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
1103         WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
1104         WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
1105         WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
1106         WMI_VDEV_PARAM_BSS_COLOR,
1107         WMI_VDEV_PARAM_SET_HEMU_MODE,
1108         WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
1109 };
1110
1111 enum wmi_tlv_peer_flags {
1112         WMI_PEER_AUTH           = 0x00000001,
1113         WMI_PEER_QOS            = 0x00000002,
1114         WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
1115         WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
1116         WMI_PEER_HE             = 0x00000400,
1117         WMI_PEER_APSD           = 0x00000800,
1118         WMI_PEER_HT             = 0x00001000,
1119         WMI_PEER_40MHZ          = 0x00002000,
1120         WMI_PEER_STBC           = 0x00008000,
1121         WMI_PEER_LDPC           = 0x00010000,
1122         WMI_PEER_DYN_MIMOPS     = 0x00020000,
1123         WMI_PEER_STATIC_MIMOPS  = 0x00040000,
1124         WMI_PEER_SPATIAL_MUX    = 0x00200000,
1125         WMI_PEER_TWT_REQ        = 0x00400000,
1126         WMI_PEER_TWT_RESP       = 0x00800000,
1127         WMI_PEER_VHT            = 0x02000000,
1128         WMI_PEER_80MHZ          = 0x04000000,
1129         WMI_PEER_PMF            = 0x08000000,
1130         WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
1131         WMI_PEER_160MHZ         = 0x40000000,
1132         WMI_PEER_SAFEMODE_EN    = 0x80000000,
1133 };
1134
1135 /** Enum list of TLV Tags for each parameter structure type. */
1136 enum wmi_tlv_tag {
1137         WMI_TAG_LAST_RESERVED = 15,
1138         WMI_TAG_FIRST_ARRAY_ENUM,
1139         WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
1140         WMI_TAG_ARRAY_BYTE,
1141         WMI_TAG_ARRAY_STRUCT,
1142         WMI_TAG_ARRAY_FIXED_STRUCT,
1143         WMI_TAG_LAST_ARRAY_ENUM = 31,
1144         WMI_TAG_SERVICE_READY_EVENT,
1145         WMI_TAG_HAL_REG_CAPABILITIES,
1146         WMI_TAG_WLAN_HOST_MEM_REQ,
1147         WMI_TAG_READY_EVENT,
1148         WMI_TAG_SCAN_EVENT,
1149         WMI_TAG_PDEV_TPC_CONFIG_EVENT,
1150         WMI_TAG_CHAN_INFO_EVENT,
1151         WMI_TAG_COMB_PHYERR_RX_HDR,
1152         WMI_TAG_VDEV_START_RESPONSE_EVENT,
1153         WMI_TAG_VDEV_STOPPED_EVENT,
1154         WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
1155         WMI_TAG_PEER_STA_KICKOUT_EVENT,
1156         WMI_TAG_MGMT_RX_HDR,
1157         WMI_TAG_TBTT_OFFSET_EVENT,
1158         WMI_TAG_TX_DELBA_COMPLETE_EVENT,
1159         WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
1160         WMI_TAG_ROAM_EVENT,
1161         WMI_TAG_WOW_EVENT_INFO,
1162         WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
1163         WMI_TAG_RTT_EVENT_HEADER,
1164         WMI_TAG_RTT_ERROR_REPORT_EVENT,
1165         WMI_TAG_RTT_MEAS_EVENT,
1166         WMI_TAG_ECHO_EVENT,
1167         WMI_TAG_FTM_INTG_EVENT,
1168         WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
1169         WMI_TAG_GPIO_INPUT_EVENT,
1170         WMI_TAG_CSA_EVENT,
1171         WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
1172         WMI_TAG_IGTK_INFO,
1173         WMI_TAG_DCS_INTERFERENCE_EVENT,
1174         WMI_TAG_ATH_DCS_CW_INT,
1175         WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
1176                 WMI_TAG_ATH_DCS_CW_INT,
1177         WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1178         WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
1179                 WMI_TAG_ATH_DCS_WLAN_INT_STAT,
1180         WMI_TAG_WLAN_PROFILE_CTX_T,
1181         WMI_TAG_WLAN_PROFILE_T,
1182         WMI_TAG_PDEV_QVIT_EVENT,
1183         WMI_TAG_HOST_SWBA_EVENT,
1184         WMI_TAG_TIM_INFO,
1185         WMI_TAG_P2P_NOA_INFO,
1186         WMI_TAG_STATS_EVENT,
1187         WMI_TAG_AVOID_FREQ_RANGES_EVENT,
1188         WMI_TAG_AVOID_FREQ_RANGE_DESC,
1189         WMI_TAG_GTK_REKEY_FAIL_EVENT,
1190         WMI_TAG_INIT_CMD,
1191         WMI_TAG_RESOURCE_CONFIG,
1192         WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
1193         WMI_TAG_START_SCAN_CMD,
1194         WMI_TAG_STOP_SCAN_CMD,
1195         WMI_TAG_SCAN_CHAN_LIST_CMD,
1196         WMI_TAG_CHANNEL,
1197         WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1198         WMI_TAG_PDEV_SET_PARAM_CMD,
1199         WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
1200         WMI_TAG_WMM_PARAMS,
1201         WMI_TAG_PDEV_SET_QUIET_CMD,
1202         WMI_TAG_VDEV_CREATE_CMD,
1203         WMI_TAG_VDEV_DELETE_CMD,
1204         WMI_TAG_VDEV_START_REQUEST_CMD,
1205         WMI_TAG_P2P_NOA_DESCRIPTOR,
1206         WMI_TAG_P2P_GO_SET_BEACON_IE,
1207         WMI_TAG_GTK_OFFLOAD_CMD,
1208         WMI_TAG_VDEV_UP_CMD,
1209         WMI_TAG_VDEV_STOP_CMD,
1210         WMI_TAG_VDEV_DOWN_CMD,
1211         WMI_TAG_VDEV_SET_PARAM_CMD,
1212         WMI_TAG_VDEV_INSTALL_KEY_CMD,
1213         WMI_TAG_PEER_CREATE_CMD,
1214         WMI_TAG_PEER_DELETE_CMD,
1215         WMI_TAG_PEER_FLUSH_TIDS_CMD,
1216         WMI_TAG_PEER_SET_PARAM_CMD,
1217         WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
1218         WMI_TAG_VHT_RATE_SET,
1219         WMI_TAG_BCN_TMPL_CMD,
1220         WMI_TAG_PRB_TMPL_CMD,
1221         WMI_TAG_BCN_PRB_INFO,
1222         WMI_TAG_PEER_TID_ADDBA_CMD,
1223         WMI_TAG_PEER_TID_DELBA_CMD,
1224         WMI_TAG_STA_POWERSAVE_MODE_CMD,
1225         WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1226         WMI_TAG_STA_DTIM_PS_METHOD_CMD,
1227         WMI_TAG_ROAM_SCAN_MODE,
1228         WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
1229         WMI_TAG_ROAM_SCAN_PERIOD,
1230         WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1231         WMI_TAG_PDEV_SUSPEND_CMD,
1232         WMI_TAG_PDEV_RESUME_CMD,
1233         WMI_TAG_ADD_BCN_FILTER_CMD,
1234         WMI_TAG_RMV_BCN_FILTER_CMD,
1235         WMI_TAG_WOW_ENABLE_CMD,
1236         WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
1237         WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
1238         WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
1239         WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
1240         WMI_TAG_ARP_OFFLOAD_TUPLE,
1241         WMI_TAG_NS_OFFLOAD_TUPLE,
1242         WMI_TAG_FTM_INTG_CMD,
1243         WMI_TAG_STA_KEEPALIVE_CMD,
1244         WMI_TAG_STA_KEEPALIVE_ARP_RESPONSE,
1245         WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
1246         WMI_TAG_AP_PS_PEER_CMD,
1247         WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
1248         WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
1249         WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
1250         WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
1251         WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
1252         WMI_TAG_WOW_DEL_PATTERN_CMD,
1253         WMI_TAG_WOW_ADD_DEL_EVT_CMD,
1254         WMI_TAG_RTT_MEASREQ_HEAD,
1255         WMI_TAG_RTT_MEASREQ_BODY,
1256         WMI_TAG_RTT_TSF_CMD,
1257         WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
1258         WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
1259         WMI_TAG_REQUEST_STATS_CMD,
1260         WMI_TAG_NLO_CONFIG_CMD,
1261         WMI_TAG_NLO_CONFIGURED_PARAMETERS,
1262         WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
1263         WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
1264         WMI_TAG_CHATTER_SET_MODE_CMD,
1265         WMI_TAG_ECHO_CMD,
1266         WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
1267         WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
1268         WMI_TAG_FORCE_FW_HANG_CMD,
1269         WMI_TAG_GPIO_CONFIG_CMD,
1270         WMI_TAG_GPIO_OUTPUT_CMD,
1271         WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
1272         WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
1273         WMI_TAG_BCN_TX_HDR,
1274         WMI_TAG_BCN_SEND_FROM_HOST_CMD,
1275         WMI_TAG_MGMT_TX_HDR,
1276         WMI_TAG_ADDBA_CLEAR_RESP_CMD,
1277         WMI_TAG_ADDBA_SEND_CMD,
1278         WMI_TAG_DELBA_SEND_CMD,
1279         WMI_TAG_ADDBA_SETRESPONSE_CMD,
1280         WMI_TAG_SEND_SINGLEAMSDU_CMD,
1281         WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
1282         WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
1283         WMI_TAG_PDEV_SET_HT_IE_CMD,
1284         WMI_TAG_PDEV_SET_VHT_IE_CMD,
1285         WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
1286         WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
1287         WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
1288         WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
1289         WMI_TAG_PEER_MCAST_GROUP_CMD,
1290         WMI_TAG_ROAM_AP_PROFILE,
1291         WMI_TAG_AP_PROFILE,
1292         WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
1293         WMI_TAG_PDEV_DFS_ENABLE_CMD,
1294         WMI_TAG_PDEV_DFS_DISABLE_CMD,
1295         WMI_TAG_WOW_ADD_PATTERN_CMD,
1296         WMI_TAG_WOW_BITMAP_PATTERN_T,
1297         WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
1298         WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
1299         WMI_TAG_WOW_MAGIC_PATTERN_CMD,
1300         WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
1301         WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
1302         WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
1303         WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
1304         WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
1305         WMI_TAG_TXBF_CMD,
1306         WMI_TAG_DEBUG_LOG_CONFIG_CMD,
1307         WMI_TAG_NLO_EVENT,
1308         WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
1309         WMI_TAG_UPLOAD_H_HDR,
1310         WMI_TAG_CAPTURE_H_EVENT_HDR,
1311         WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
1312         WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
1313         WMI_TAG_VDEV_WMM_ADDTS_CMD,
1314         WMI_TAG_VDEV_WMM_DELTS_CMD,
1315         WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
1316         WMI_TAG_TDLS_SET_STATE_CMD,
1317         WMI_TAG_TDLS_PEER_UPDATE_CMD,
1318         WMI_TAG_TDLS_PEER_EVENT,
1319         WMI_TAG_TDLS_PEER_CAPABILITIES,
1320         WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
1321         WMI_TAG_ROAM_CHAN_LIST,
1322         WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
1323         WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
1324         WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
1325         WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
1326         WMI_TAG_BA_REQ_SSN_CMD,
1327         WMI_TAG_BA_RSP_SSN_EVENT,
1328         WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
1329         WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
1330         WMI_TAG_P2P_SET_OPPPS_CMD,
1331         WMI_TAG_P2P_SET_NOA_CMD,
1332         WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
1333         WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
1334         WMI_TAG_STA_SMPS_PARAM_CMD,
1335         WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
1336         WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
1337         WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
1338         WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
1339         WMI_TAG_P2P_NOA_EVENT,
1340         WMI_TAG_HB_SET_ENABLE_CMD,
1341         WMI_TAG_HB_SET_TCP_PARAMS_CMD,
1342         WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
1343         WMI_TAG_HB_SET_UDP_PARAMS_CMD,
1344         WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
1345         WMI_TAG_HB_IND_EVENT,
1346         WMI_TAG_TX_PAUSE_EVENT,
1347         WMI_TAG_RFKILL_EVENT,
1348         WMI_TAG_DFS_RADAR_EVENT,
1349         WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
1350         WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
1351         WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
1352         WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
1353         WMI_TAG_BATCH_SCAN_ENABLE_CMD,
1354         WMI_TAG_BATCH_SCAN_DISABLE_CMD,
1355         WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
1356         WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
1357         WMI_TAG_BATCH_SCAN_RESULT_EVENT,
1358         WMI_TAG_VDEV_PLMREQ_START_CMD,
1359         WMI_TAG_VDEV_PLMREQ_STOP_CMD,
1360         WMI_TAG_THERMAL_MGMT_CMD,
1361         WMI_TAG_THERMAL_MGMT_EVENT,
1362         WMI_TAG_PEER_INFO_REQ_CMD,
1363         WMI_TAG_PEER_INFO_EVENT,
1364         WMI_TAG_PEER_INFO,
1365         WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
1366         WMI_TAG_RMC_SET_MODE_CMD,
1367         WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
1368         WMI_TAG_RMC_CONFIG_CMD,
1369         WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
1370         WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
1371         WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
1372         WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
1373         WMI_TAG_NAN_CMD_PARAM,
1374         WMI_TAG_NAN_EVENT_HDR,
1375         WMI_TAG_PDEV_L1SS_TRACK_EVENT,
1376         WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
1377         WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
1378         WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
1379         WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
1380         WMI_TAG_AGGR_STATE_TRIG_EVENT,
1381         WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
1382         WMI_TAG_ROAM_SCAN_CMD,
1383         WMI_TAG_REQ_STATS_EXT_CMD,
1384         WMI_TAG_STATS_EXT_EVENT,
1385         WMI_TAG_OBSS_SCAN_ENABLE_CMD,
1386         WMI_TAG_OBSS_SCAN_DISABLE_CMD,
1387         WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
1388         WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
1389         WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
1390         WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
1391         WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
1392         WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
1393         WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
1394         WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
1395         WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
1396         WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
1397         WMI_TAG_WOW_IOAC_KEEPALIVE_T,
1398         WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
1399         WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
1400         WMI_TAG_START_LINK_STATS_CMD,
1401         WMI_TAG_CLEAR_LINK_STATS_CMD,
1402         WMI_TAG_REQUEST_LINK_STATS_CMD,
1403         WMI_TAG_IFACE_LINK_STATS_EVENT,
1404         WMI_TAG_RADIO_LINK_STATS_EVENT,
1405         WMI_TAG_PEER_STATS_EVENT,
1406         WMI_TAG_CHANNEL_STATS,
1407         WMI_TAG_RADIO_LINK_STATS,
1408         WMI_TAG_RATE_STATS,
1409         WMI_TAG_PEER_LINK_STATS,
1410         WMI_TAG_WMM_AC_STATS,
1411         WMI_TAG_IFACE_LINK_STATS,
1412         WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
1413         WMI_TAG_LPI_START_SCAN_CMD,
1414         WMI_TAG_LPI_STOP_SCAN_CMD,
1415         WMI_TAG_LPI_RESULT_EVENT,
1416         WMI_TAG_PEER_STATE_EVENT,
1417         WMI_TAG_EXTSCAN_BUCKET_CMD,
1418         WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
1419         WMI_TAG_EXTSCAN_START_CMD,
1420         WMI_TAG_EXTSCAN_STOP_CMD,
1421         WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
1422         WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
1423         WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
1424         WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
1425         WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
1426         WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
1427         WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
1428         WMI_TAG_EXTSCAN_OPERATION_EVENT,
1429         WMI_TAG_EXTSCAN_START_STOP_EVENT,
1430         WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
1431         WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
1432         WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
1433         WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
1434         WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
1435         WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
1436         WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
1437         WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
1438         WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
1439         WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
1440         WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
1441         WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
1442         WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
1443         WMI_TAG_UNIT_TEST_CMD,
1444         WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
1445         WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
1446         WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
1447         WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
1448         WMI_TAG_ROAM_SYNCH_EVENT,
1449         WMI_TAG_ROAM_SYNCH_COMPLETE,
1450         WMI_TAG_EXTWOW_ENABLE_CMD,
1451         WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
1452         WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
1453         WMI_TAG_LPI_STATUS_EVENT,
1454         WMI_TAG_LPI_HANDOFF_EVENT,
1455         WMI_TAG_VDEV_RATE_STATS_EVENT,
1456         WMI_TAG_VDEV_RATE_HT_INFO,
1457         WMI_TAG_RIC_REQUEST,
1458         WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1459         WMI_TAG_PDEV_TEMPERATURE_EVENT,
1460         WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
1461         WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
1462         WMI_TAG_RIC_TSPEC,
1463         WMI_TAG_TPC_CHAINMASK_CONFIG,
1464         WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
1465         WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
1466         WMI_TAG_KEY_MATERIAL,
1467         WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
1468         WMI_TAG_SET_LED_FLASHING_CMD,
1469         WMI_TAG_MDNS_OFFLOAD_CMD,
1470         WMI_TAG_MDNS_SET_FQDN_CMD,
1471         WMI_TAG_MDNS_SET_RESP_CMD,
1472         WMI_TAG_MDNS_GET_STATS_CMD,
1473         WMI_TAG_MDNS_STATS_EVENT,
1474         WMI_TAG_ROAM_INVOKE_CMD,
1475         WMI_TAG_PDEV_RESUME_EVENT,
1476         WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
1477         WMI_TAG_SAP_OFL_ENABLE_CMD,
1478         WMI_TAG_SAP_OFL_ADD_STA_EVENT,
1479         WMI_TAG_SAP_OFL_DEL_STA_EVENT,
1480         WMI_TAG_APFIND_CMD_PARAM,
1481         WMI_TAG_APFIND_EVENT_HDR,
1482         WMI_TAG_OCB_SET_SCHED_CMD,
1483         WMI_TAG_OCB_SET_SCHED_EVENT,
1484         WMI_TAG_OCB_SET_CONFIG_CMD,
1485         WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
1486         WMI_TAG_OCB_SET_UTC_TIME_CMD,
1487         WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
1488         WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
1489         WMI_TAG_OCB_GET_TSF_TIMER_CMD,
1490         WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
1491         WMI_TAG_DCC_GET_STATS_CMD,
1492         WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
1493         WMI_TAG_DCC_GET_STATS_RESP_EVENT,
1494         WMI_TAG_DCC_CLEAR_STATS_CMD,
1495         WMI_TAG_DCC_UPDATE_NDL_CMD,
1496         WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
1497         WMI_TAG_DCC_STATS_EVENT,
1498         WMI_TAG_OCB_CHANNEL,
1499         WMI_TAG_OCB_SCHEDULE_ELEMENT,
1500         WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
1501         WMI_TAG_DCC_NDL_CHAN,
1502         WMI_TAG_QOS_PARAMETER,
1503         WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
1504         WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
1505         WMI_TAG_ROAM_FILTER,
1506         WMI_TAG_PASSPOINT_CONFIG_CMD,
1507         WMI_TAG_PASSPOINT_EVENT_HDR,
1508         WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
1509         WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
1510         WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
1511         WMI_TAG_VDEV_TSF_REPORT_EVENT,
1512         WMI_TAG_GET_FW_MEM_DUMP,
1513         WMI_TAG_UPDATE_FW_MEM_DUMP,
1514         WMI_TAG_FW_MEM_DUMP_PARAMS,
1515         WMI_TAG_DEBUG_MESG_FLUSH,
1516         WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
1517         WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
1518         WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
1519         WMI_TAG_VDEV_SET_IE_CMD,
1520         WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
1521         WMI_TAG_RSSI_BREACH_EVENT,
1522         WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
1523         WMI_TAG_SOC_SET_PCL_CMD,
1524         WMI_TAG_SOC_SET_HW_MODE_CMD,
1525         WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
1526         WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
1527         WMI_TAG_VDEV_TXRX_STREAMS,
1528         WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1529         WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
1530         WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
1531         WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
1532         WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
1533         WMI_TAG_DIAG_EVENT_LOG_CONFIG,
1534         WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
1535         WMI_TAG_PACKET_FILTER_CONFIG,
1536         WMI_TAG_PACKET_FILTER_ENABLE,
1537         WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
1538         WMI_TAG_MGMT_TX_SEND_CMD,
1539         WMI_TAG_MGMT_TX_COMPL_EVENT,
1540         WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
1541         WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
1542         WMI_TAG_LRO_INFO_CMD,
1543         WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
1544         WMI_TAG_SERVICE_READY_EXT_EVENT,
1545         WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
1546         WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
1547         WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
1548         WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
1549         WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
1550         WMI_TAG_PEER_ASSOC_CONF_EVENT,
1551         WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
1552         WMI_TAG_AP_PS_EGAP_PARAM_CMD,
1553         WMI_TAG_AP_PS_EGAP_INFO_EVENT,
1554         WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
1555         WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
1556         WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
1557         WMI_TAG_SCPC_EVENT,
1558         WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
1559         WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
1560         WMI_TAG_BPF_GET_CAPABILITY_CMD,
1561         WMI_TAG_BPF_CAPABILITY_INFO_EVT,
1562         WMI_TAG_BPF_GET_VDEV_STATS_CMD,
1563         WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
1564         WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
1565         WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
1566         WMI_TAG_VDEV_DELETE_RESP_EVENT,
1567         WMI_TAG_PEER_DELETE_RESP_EVENT,
1568         WMI_TAG_ROAM_DENSE_THRES_PARAM,
1569         WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
1570         WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
1571         WMI_TAG_VDEV_CONFIG_RATEMASK,
1572         WMI_TAG_PDEV_FIPS_CMD,
1573         WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
1574         WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
1575         WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
1576         WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
1577         WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
1578         WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
1579         WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
1580         WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
1581         WMI_TAG_FWTEST_SET_PARAM_CMD,
1582         WMI_TAG_PEER_ATF_REQUEST,
1583         WMI_TAG_VDEV_ATF_REQUEST,
1584         WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
1585         WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
1586         WMI_TAG_INST_RSSI_STATS_RESP,
1587         WMI_TAG_MED_UTIL_REPORT_EVENT,
1588         WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
1589         WMI_TAG_WDS_ADDR_EVENT,
1590         WMI_TAG_PEER_RATECODE_LIST_EVENT,
1591         WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
1592         WMI_TAG_PDEV_TPC_EVENT,
1593         WMI_TAG_ANI_OFDM_EVENT,
1594         WMI_TAG_ANI_CCK_EVENT,
1595         WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
1596         WMI_TAG_PDEV_FIPS_EVENT,
1597         WMI_TAG_ATF_PEER_INFO,
1598         WMI_TAG_PDEV_GET_TPC_CMD,
1599         WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
1600         WMI_TAG_QBOOST_CFG_CMD,
1601         WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
1602         WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
1603         WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
1604         WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
1605         WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
1606         WMI_TAG_PEER_MCS_RATE_INFO,
1607         WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
1608         WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
1609         WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
1610         WMI_TAG_MU_REPORT_TOTAL_MU,
1611         WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
1612         WMI_TAG_ROAM_SET_MBO,
1613         WMI_TAG_MIB_STATS_ENABLE_CMD,
1614         WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
1615         WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
1616         WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
1617         WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
1618         WMI_TAG_NDI_GET_CAP_REQ,
1619         WMI_TAG_NDP_INITIATOR_REQ,
1620         WMI_TAG_NDP_RESPONDER_REQ,
1621         WMI_TAG_NDP_END_REQ,
1622         WMI_TAG_NDI_CAP_RSP_EVENT,
1623         WMI_TAG_NDP_INITIATOR_RSP_EVENT,
1624         WMI_TAG_NDP_RESPONDER_RSP_EVENT,
1625         WMI_TAG_NDP_END_RSP_EVENT,
1626         WMI_TAG_NDP_INDICATION_EVENT,
1627         WMI_TAG_NDP_CONFIRM_EVENT,
1628         WMI_TAG_NDP_END_INDICATION_EVENT,
1629         WMI_TAG_VDEV_SET_QUIET_CMD,
1630         WMI_TAG_PDEV_SET_PCL_CMD,
1631         WMI_TAG_PDEV_SET_HW_MODE_CMD,
1632         WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
1633         WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
1634         WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
1635         WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
1636         WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
1637         WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
1638         WMI_TAG_COEX_CONFIG_CMD,
1639         WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
1640         WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
1641         WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1642         WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
1643         WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
1644         WMI_TAG_MAC_PHY_CAPABILITIES,
1645         WMI_TAG_HW_MODE_CAPABILITIES,
1646         WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
1647         WMI_TAG_HAL_REG_CAPABILITIES_EXT,
1648         WMI_TAG_SOC_HAL_REG_CAPABILITIES,
1649         WMI_TAG_VDEV_WISA_CMD,
1650         WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
1651         WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
1652         WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
1653         WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
1654         WMI_TAG_NDP_END_RSP_PER_NDI,
1655         WMI_TAG_PEER_BWF_REQUEST,
1656         WMI_TAG_BWF_PEER_INFO,
1657         WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
1658         WMI_TAG_RMC_SET_LEADER_CMD,
1659         WMI_TAG_RMC_MANUAL_LEADER_EVENT,
1660         WMI_TAG_PER_CHAIN_RSSI_STATS,
1661         WMI_TAG_RSSI_STATS,
1662         WMI_TAG_P2P_LO_START_CMD,
1663         WMI_TAG_P2P_LO_STOP_CMD,
1664         WMI_TAG_P2P_LO_STOPPED_EVENT,
1665         WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1666         WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1667         WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
1668         WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
1669         WMI_TAG_READ_DATA_FROM_FLASH_CMD,
1670         WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
1671         WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
1672         WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
1673         WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
1674         WMI_TAG_TLV_BUF_LEN_PARAM,
1675         WMI_TAG_SERVICE_AVAILABLE_EVENT,
1676         WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
1677         WMI_TAG_PEER_ANTDIV_INFO_EVENT,
1678         WMI_TAG_PEER_ANTDIV_INFO,
1679         WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
1680         WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
1681         WMI_TAG_MNT_FILTER_CMD,
1682         WMI_TAG_GET_CHIP_POWER_STATS_CMD,
1683         WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
1684         WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
1685         WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
1686         WMI_TAG_CHAN_CCA_STATS,
1687         WMI_TAG_PEER_SIGNAL_STATS,
1688         WMI_TAG_TX_STATS,
1689         WMI_TAG_PEER_AC_TX_STATS,
1690         WMI_TAG_RX_STATS,
1691         WMI_TAG_PEER_AC_RX_STATS,
1692         WMI_TAG_REPORT_STATS_EVENT,
1693         WMI_TAG_CHAN_CCA_STATS_THRESH,
1694         WMI_TAG_PEER_SIGNAL_STATS_THRESH,
1695         WMI_TAG_TX_STATS_THRESH,
1696         WMI_TAG_RX_STATS_THRESH,
1697         WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
1698         WMI_TAG_REQUEST_WLAN_STATS_CMD,
1699         WMI_TAG_RX_AGGR_FAILURE_EVENT,
1700         WMI_TAG_RX_AGGR_FAILURE_INFO,
1701         WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
1702         WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
1703         WMI_TAG_PDEV_BAND_TO_MAC,
1704         WMI_TAG_TBTT_OFFSET_INFO,
1705         WMI_TAG_TBTT_OFFSET_EXT_EVENT,
1706         WMI_TAG_SAR_LIMITS_CMD,
1707         WMI_TAG_SAR_LIMIT_CMD_ROW,
1708         WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
1709         WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
1710         WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
1711         WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
1712         WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
1713         WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
1714         WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
1715         WMI_TAG_VENDOR_OUI,
1716         WMI_TAG_REQUEST_RCPI_CMD,
1717         WMI_TAG_UPDATE_RCPI_EVENT,
1718         WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
1719         WMI_TAG_PEER_STATS_INFO,
1720         WMI_TAG_PEER_STATS_INFO_EVENT,
1721         WMI_TAG_PKGID_EVENT,
1722         WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
1723         WMI_TAG_SET_CURRENT_COUNTRY_CMD,
1724         WMI_TAG_REGULATORY_RULE_STRUCT,
1725         WMI_TAG_REG_CHAN_LIST_CC_EVENT,
1726         WMI_TAG_11D_SCAN_START_CMD,
1727         WMI_TAG_11D_SCAN_STOP_CMD,
1728         WMI_TAG_11D_NEW_COUNTRY_EVENT,
1729         WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
1730         WMI_TAG_RADIO_CHAN_STATS,
1731         WMI_TAG_RADIO_CHAN_STATS_EVENT,
1732         WMI_TAG_ROAM_PER_CONFIG,
1733         WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
1734         WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
1735         WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
1736         WMI_TAG_HW_DATA_FILTER_CMD,
1737         WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
1738         WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
1739         WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
1740         WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
1741         WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
1742         WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
1743         WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
1744         WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
1745         WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
1746         WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
1747         WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
1748         WMI_TAG_VDEV_SET_ARP_STATS_CMD,
1749         WMI_TAG_VDEV_GET_ARP_STATS_CMD,
1750         WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
1751         WMI_TAG_IFACE_OFFLOAD_STATS,
1752         WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
1753         WMI_TAG_RSSI_CTL_EXT,
1754         WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
1755         WMI_TAG_COEX_BT_ACTIVITY_EVENT,
1756         WMI_TAG_VDEV_GET_TX_POWER_CMD,
1757         WMI_TAG_VDEV_TX_POWER_EVENT,
1758         WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
1759         WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
1760         WMI_TAG_TX_SEND_PARAMS,
1761         WMI_TAG_HE_RATE_SET,
1762         WMI_TAG_CONGESTION_STATS,
1763         WMI_TAG_SET_INIT_COUNTRY_CMD,
1764         WMI_TAG_SCAN_DBS_DUTY_CYCLE,
1765         WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
1766         WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
1767         WMI_TAG_THERM_THROT_CONFIG_REQUEST,
1768         WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
1769         WMI_TAG_THERM_THROT_STATS_EVENT,
1770         WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
1771         WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
1772         WMI_TAG_OEM_DMA_RING_CAPABILITIES,
1773         WMI_TAG_OEM_DMA_RING_CFG_REQ,
1774         WMI_TAG_OEM_DMA_RING_CFG_RSP,
1775         WMI_TAG_OEM_INDIRECT_DATA,
1776         WMI_TAG_OEM_DMA_BUF_RELEASE,
1777         WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
1778         WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1779         WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
1780         WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
1781         WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
1782         WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
1783         WMI_TAG_UNIT_TEST_EVENT,
1784         WMI_TAG_ROAM_FILS_OFFLOAD,
1785         WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
1786         WMI_TAG_PMK_CACHE,
1787         WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
1788         WMI_TAG_ROAM_FILS_SYNCH,
1789         WMI_TAG_GTK_OFFLOAD_EXTENDED,
1790         WMI_TAG_ROAM_BG_SCAN_ROAMING,
1791         WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
1792         WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
1793         WMI_TAG_OIC_PING_HANDOFF_EVENT,
1794         WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
1795         WMI_TAG_DHCP_LEASE_RENEW_EVENT,
1796         WMI_TAG_BTM_CONFIG,
1797         WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
1798         WMI_TAG_WLM_CONFIG_CMD,
1799         WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
1800         WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
1801         WMI_TAG_ROAM_CND_SCORING_PARAM,
1802         WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
1803         WMI_TAG_VENDOR_OUI_EXT,
1804         WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
1805         WMI_TAG_FD_SEND_FROM_HOST_CMD,
1806         WMI_TAG_ENABLE_FILS_CMD,
1807         WMI_TAG_HOST_SWFDA_EVENT,
1808         WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1809         WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
1810         WMI_TAG_STATS_PERIOD,
1811         WMI_TAG_NDL_SCHEDULE_UPDATE,
1812         WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
1813         WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
1814         WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
1815         WMI_TAG_SAR2_RESULT_EVENT,
1816         WMI_TAG_SAR_CAPABILITIES,
1817         WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
1818         WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
1819         WMI_TAG_DMA_RING_CAPABILITIES,
1820         WMI_TAG_DMA_RING_CFG_REQ,
1821         WMI_TAG_DMA_RING_CFG_RSP,
1822         WMI_TAG_DMA_BUF_RELEASE,
1823         WMI_TAG_DMA_BUF_RELEASE_ENTRY,
1824         WMI_TAG_SAR_GET_LIMITS_CMD,
1825         WMI_TAG_SAR_GET_LIMITS_EVENT,
1826         WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
1827         WMI_TAG_OFFLOAD_11K_REPORT,
1828         WMI_TAG_INVOKE_NEIGHBOR_REPORT,
1829         WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
1830         WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
1831         WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
1832         WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
1833         WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
1834         WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
1835         WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
1836         WMI_TAG_PDEV_GET_NFCAL_POWER,
1837         WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
1838         WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
1839         WMI_TAG_OBSS_COLOR_COLLISION_EVT,
1840         WMI_TAG_RUNTIME_DPD_RECAL_CMD,
1841         WMI_TAG_TWT_ENABLE_CMD,
1842         WMI_TAG_TWT_DISABLE_CMD,
1843         WMI_TAG_TWT_ADD_DIALOG_CMD,
1844         WMI_TAG_TWT_DEL_DIALOG_CMD,
1845         WMI_TAG_TWT_PAUSE_DIALOG_CMD,
1846         WMI_TAG_TWT_RESUME_DIALOG_CMD,
1847         WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
1848         WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
1849         WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
1850         WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
1851         WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
1852         WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
1853         WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
1854         WMI_TAG_ROAM_SCAN_STATS_EVENT,
1855         WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
1856         WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
1857         WMI_TAG_GET_TPC_POWER_CMD,
1858         WMI_TAG_GET_TPC_POWER_EVENT,
1859         WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
1860         WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
1861         WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
1862         WMI_TAG_MOTION_DET_START_STOP_CMD,
1863         WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
1864         WMI_TAG_MOTION_DET_EVENT,
1865         WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
1866         WMI_TAG_NDP_TRANSPORT_IP,
1867         WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
1868         WMI_TAG_ESP_ESTIMATE_EVENT,
1869         WMI_TAG_NAN_HOST_CONFIG,
1870         WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
1871         WMI_TAG_PEER_CFR_CAPTURE_CMD,
1872         WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
1873         WMI_TAG_CHAN_WIDTH_PEER_LIST,
1874         WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
1875         WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
1876         WMI_TAG_PEER_EXTD2_STATS,
1877         WMI_TAG_HPCS_PULSE_START_CMD,
1878         WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
1879         WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
1880         WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
1881         WMI_TAG_NAN_EVENT_INFO,
1882         WMI_TAG_NDP_CHANNEL_INFO,
1883         WMI_TAG_NDP_CMD,
1884         WMI_TAG_NDP_EVENT,
1885         WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
1886         WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
1887         WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344,
1888         WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b,
1889         WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD,
1890         WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381,
1891         WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1892         WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
1893         WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
1894         WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9,
1895         WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT,
1896         WMI_TAG_VDEV_SET_TPC_POWER_CMD = 0x3B5,
1897         WMI_TAG_VDEV_CH_POWER_INFO,
1898         WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
1899         WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
1900         WMI_TAG_MAX
1901 };
1902
1903 enum wmi_tlv_service {
1904         WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
1905         WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
1906         WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
1907         WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
1908         WMI_TLV_SERVICE_STA_PWRSAVE = 4,
1909         WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
1910         WMI_TLV_SERVICE_AP_UAPSD = 6,
1911         WMI_TLV_SERVICE_AP_DFS = 7,
1912         WMI_TLV_SERVICE_11AC = 8,
1913         WMI_TLV_SERVICE_BLOCKACK = 9,
1914         WMI_TLV_SERVICE_PHYERR = 10,
1915         WMI_TLV_SERVICE_BCN_FILTER = 11,
1916         WMI_TLV_SERVICE_RTT = 12,
1917         WMI_TLV_SERVICE_WOW = 13,
1918         WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
1919         WMI_TLV_SERVICE_IRAM_TIDS = 15,
1920         WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
1921         WMI_TLV_SERVICE_NLO = 17,
1922         WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
1923         WMI_TLV_SERVICE_SCAN_SCH = 19,
1924         WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
1925         WMI_TLV_SERVICE_CHATTER = 21,
1926         WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
1927         WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
1928         WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
1929         WMI_TLV_SERVICE_GPIO = 25,
1930         WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
1931         WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
1932         WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
1933         WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
1934         WMI_TLV_SERVICE_TX_ENCAP = 30,
1935         WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
1936         WMI_TLV_SERVICE_EARLY_RX = 32,
1937         WMI_TLV_SERVICE_STA_SMPS = 33,
1938         WMI_TLV_SERVICE_FWTEST = 34,
1939         WMI_TLV_SERVICE_STA_WMMAC = 35,
1940         WMI_TLV_SERVICE_TDLS = 36,
1941         WMI_TLV_SERVICE_BURST = 37,
1942         WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
1943         WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
1944         WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
1945         WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
1946         WMI_TLV_SERVICE_WLAN_HB = 42,
1947         WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
1948         WMI_TLV_SERVICE_BATCH_SCAN = 44,
1949         WMI_TLV_SERVICE_QPOWER = 45,
1950         WMI_TLV_SERVICE_PLMREQ = 46,
1951         WMI_TLV_SERVICE_THERMAL_MGMT = 47,
1952         WMI_TLV_SERVICE_RMC = 48,
1953         WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
1954         WMI_TLV_SERVICE_COEX_SAR = 50,
1955         WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
1956         WMI_TLV_SERVICE_NAN = 52,
1957         WMI_TLV_SERVICE_L1SS_STAT = 53,
1958         WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
1959         WMI_TLV_SERVICE_OBSS_SCAN = 55,
1960         WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
1961         WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
1962         WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
1963         WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
1964         WMI_TLV_SERVICE_LPASS = 60,
1965         WMI_TLV_SERVICE_EXTSCAN = 61,
1966         WMI_TLV_SERVICE_D0WOW = 62,
1967         WMI_TLV_SERVICE_HSOFFLOAD = 63,
1968         WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
1969         WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
1970         WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
1971         WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
1972         WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
1973         WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
1974         WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
1975         WMI_TLV_SERVICE_OCB = 71,
1976         WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
1977         WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
1978         WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
1979         WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
1980         WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
1981         WMI_TLV_SERVICE_EXT_MSG = 77,
1982         WMI_TLV_SERVICE_MAWC = 78,
1983         WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
1984         WMI_TLV_SERVICE_EGAP = 80,
1985         WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
1986         WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
1987         WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
1988         WMI_TLV_SERVICE_ATF = 84,
1989         WMI_TLV_SERVICE_COEX_GPIO = 85,
1990         WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
1991         WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
1992         WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
1993         WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
1994         WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
1995         WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
1996         WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
1997         WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
1998         WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
1999         WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
2000         WMI_TLV_SERVICE_NAN_DATA = 96,
2001         WMI_TLV_SERVICE_NAN_RTT = 97,
2002         WMI_TLV_SERVICE_11AX = 98,
2003         WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
2004         WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
2005         WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
2006         WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
2007         WMI_TLV_SERVICE_MESH_11S = 103,
2008         WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
2009         WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
2010         WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
2011         WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
2012         WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
2013         WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
2014         WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
2015         WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
2016         WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
2017         WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
2018         WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
2019         WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
2020         WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
2021         WMI_TLV_SERVICE_REGULATORY_DB = 117,
2022         WMI_TLV_SERVICE_11D_OFFLOAD = 118,
2023         WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
2024         WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
2025         WMI_TLV_SERVICE_PKT_ROUTING = 121,
2026         WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
2027         WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
2028         WMI_TLV_SERVICE_8SS_TX_BFEE  =  124,
2029         WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
2030         WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
2031         WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
2032
2033         /* The first 128 bits */
2034         WMI_MAX_SERVICE = 128,
2035
2036         WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
2037         WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
2038         WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
2039         WMI_TLV_SERVICE_FILS_SUPPORT = 131,
2040         WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
2041         WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
2042         WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
2043         WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
2044         WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
2045         WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
2046         WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
2047         WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
2048         WMI_TLV_SERVICE_THERM_THROT = 140,
2049         WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
2050         WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
2051         WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
2052         WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
2053         WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
2054         WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
2055         WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
2056         WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
2057         WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
2058         WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
2059         WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
2060         WMI_TLV_SERVICE_STA_TWT = 152,
2061         WMI_TLV_SERVICE_AP_TWT = 153,
2062         WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
2063         WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
2064         WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
2065         WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
2066         WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
2067         WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
2068         WMI_TLV_SERVICE_MOTION_DET = 160,
2069         WMI_TLV_SERVICE_INFRA_MBSSID = 161,
2070         WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
2071         WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
2072         WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
2073         WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
2074         WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
2075         WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
2076         WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
2077         WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
2078         WMI_TLV_SERVICE_ESP_SUPPORT = 170,
2079         WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
2080         WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
2081         WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
2082         WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
2083         WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
2084         WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
2085         WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
2086         WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
2087         WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
2088         WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
2089         WMI_TLV_SERVICE_FETCH_TX_PN = 181,
2090         WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
2091         WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
2092         WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
2093         WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
2094         WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
2095         WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
2096         WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
2097         WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
2098         WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
2099         WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
2100         WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
2101         WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
2102         WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
2103         WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
2104         WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
2105         WMI_TLV_SERVICE_VOW_ENABLE = 197,
2106         WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
2107         WMI_TLV_SERVICE_BROADCAST_TWT = 199,
2108         WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
2109         WMI_TLV_SERVICE_PS_TDCC = 201,
2110         WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY   = 202,
2111         WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
2112         WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
2113         WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
2114         WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
2115         WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
2116         WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
2117         WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
2118         WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
2119         WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
2120         WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
2121         WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
2122         WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
2123         WMI_TLV_SERVICE_EXT2_MSG = 220,
2124         WMI_TLV_SERVICE_PEER_POWER_SAVE_DURATION_SUPPORT = 246,
2125         WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
2126         WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253,
2127         WMI_TLV_SERVICE_PASSIVE_SCAN_START_TIME_ENHANCE = 263,
2128
2129         /* The second 128 bits */
2130         WMI_MAX_EXT_SERVICE = 256,
2131         WMI_TLV_SERVICE_SCAN_CONFIG_PER_CHANNEL = 265,
2132         WMI_TLV_SERVICE_EXT_TPC_REG_SUPPORT = 280,
2133         WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281,
2134         WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
2135         WMI_TLV_SERVICE_SUPPORT_11D_FOR_HOST_SCAN = 357,
2136
2137         /* The third 128 bits */
2138         WMI_MAX_EXT2_SERVICE = 384
2139 };
2140
2141 enum {
2142         WMI_SMPS_FORCED_MODE_NONE = 0,
2143         WMI_SMPS_FORCED_MODE_DISABLED,
2144         WMI_SMPS_FORCED_MODE_STATIC,
2145         WMI_SMPS_FORCED_MODE_DYNAMIC
2146 };
2147
2148 #define WMI_TPC_CHAINMASK_CONFIG_BAND_2G      0
2149 #define WMI_TPC_CHAINMASK_CONFIG_BAND_5G      1
2150 #define WMI_NUM_SUPPORTED_BAND_MAX 2
2151
2152 #define WMI_PEER_MIMO_PS_STATE                          0x1
2153 #define WMI_PEER_AMPDU                                  0x2
2154 #define WMI_PEER_AUTHORIZE                              0x3
2155 #define WMI_PEER_CHWIDTH                                0x4
2156 #define WMI_PEER_NSS                                    0x5
2157 #define WMI_PEER_USE_4ADDR                              0x6
2158 #define WMI_PEER_MEMBERSHIP                             0x7
2159 #define WMI_PEER_USERPOS                                0x8
2160 #define WMI_PEER_CRIT_PROTO_HINT_ENABLED                0x9
2161 #define WMI_PEER_TX_FAIL_CNT_THR                        0xA
2162 #define WMI_PEER_SET_HW_RETRY_CTS2S                     0xB
2163 #define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH                0xC
2164 #define WMI_PEER_PHYMODE                                0xD
2165 #define WMI_PEER_USE_FIXED_PWR                          0xE
2166 #define WMI_PEER_PARAM_FIXED_RATE                       0xF
2167 #define WMI_PEER_SET_MU_WHITELIST                       0x10
2168 #define WMI_PEER_SET_MAX_TX_RATE                        0x11
2169 #define WMI_PEER_SET_MIN_TX_RATE                        0x12
2170 #define WMI_PEER_SET_DEFAULT_ROUTING                    0x13
2171
2172 /* slot time long */
2173 #define WMI_VDEV_SLOT_TIME_LONG         0x1
2174 /* slot time short */
2175 #define WMI_VDEV_SLOT_TIME_SHORT        0x2
2176 /* preablbe long */
2177 #define WMI_VDEV_PREAMBLE_LONG          0x1
2178 /* preablbe short */
2179 #define WMI_VDEV_PREAMBLE_SHORT         0x2
2180
2181 enum wmi_peer_smps_state {
2182         WMI_PEER_SMPS_PS_NONE = 0x0,
2183         WMI_PEER_SMPS_STATIC  = 0x1,
2184         WMI_PEER_SMPS_DYNAMIC = 0x2
2185 };
2186
2187 enum wmi_peer_chwidth {
2188         WMI_PEER_CHWIDTH_20MHZ = 0,
2189         WMI_PEER_CHWIDTH_40MHZ = 1,
2190         WMI_PEER_CHWIDTH_80MHZ = 2,
2191         WMI_PEER_CHWIDTH_160MHZ = 3,
2192 };
2193
2194 enum wmi_beacon_gen_mode {
2195         WMI_BEACON_STAGGERED_MODE = 0,
2196         WMI_BEACON_BURST_MODE = 1
2197 };
2198
2199 enum wmi_direct_buffer_module {
2200         WMI_DIRECT_BUF_SPECTRAL = 0,
2201         WMI_DIRECT_BUF_CFR = 1,
2202
2203         /* keep it last */
2204         WMI_DIRECT_BUF_MAX
2205 };
2206
2207 /* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext
2208  *                      event
2209  * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss
2210  *                         of 80MHz
2211  * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss
2212  *                          of 80MHz
2213  * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz
2214  * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max
2215  *                       nss of 80MHz
2216  */
2217
2218 enum wmi_nss_ratio {
2219         WMI_NSS_RATIO_1BY2_NSS = 0x0,
2220         WMI_NSS_RATIO_3BY4_NSS = 0x1,
2221         WMI_NSS_RATIO_1_NSS = 0x2,
2222         WMI_NSS_RATIO_2_NSS = 0x3,
2223 };
2224
2225 enum wmi_dtim_policy {
2226         WMI_DTIM_POLICY_IGNORE = 1,
2227         WMI_DTIM_POLICY_NORMAL = 2,
2228         WMI_DTIM_POLICY_STICK  = 3,
2229         WMI_DTIM_POLICY_AUTO   = 4,
2230 };
2231
2232 struct wmi_host_pdev_band_to_mac {
2233         u32 pdev_id;
2234         u32 start_freq;
2235         u32 end_freq;
2236 };
2237
2238 struct ath11k_ppe_threshold {
2239         u32 numss_m1;
2240         u32 ru_bit_mask;
2241         u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2242 };
2243
2244 struct ath11k_service_ext_param {
2245         u32 default_conc_scan_config_bits;
2246         u32 default_fw_config_bits;
2247         struct ath11k_ppe_threshold ppet;
2248         u32 he_cap_info;
2249         u32 mpdu_density;
2250         u32 max_bssid_rx_filters;
2251         u32 num_hw_modes;
2252         u32 num_phy;
2253 };
2254
2255 struct ath11k_hw_mode_caps {
2256         u32 hw_mode_id;
2257         u32 phy_id_map;
2258         u32 hw_mode_config_type;
2259 };
2260
2261 #define PSOC_HOST_MAX_PHY_SIZE (3)
2262 #define ATH11K_11B_SUPPORT                 BIT(0)
2263 #define ATH11K_11G_SUPPORT                 BIT(1)
2264 #define ATH11K_11A_SUPPORT                 BIT(2)
2265 #define ATH11K_11N_SUPPORT                 BIT(3)
2266 #define ATH11K_11AC_SUPPORT                BIT(4)
2267 #define ATH11K_11AX_SUPPORT                BIT(5)
2268
2269 struct ath11k_hal_reg_capabilities_ext {
2270         u32 phy_id;
2271         u32 eeprom_reg_domain;
2272         u32 eeprom_reg_domain_ext;
2273         u32 regcap1;
2274         u32 regcap2;
2275         u32 wireless_modes;
2276         u32 low_2ghz_chan;
2277         u32 high_2ghz_chan;
2278         u32 low_5ghz_chan;
2279         u32 high_5ghz_chan;
2280 };
2281
2282 #define WMI_HOST_MAX_PDEV 3
2283
2284 struct wlan_host_mem_chunk {
2285         u32 tlv_header;
2286         u32 req_id;
2287         u32 ptr;
2288         u32 size;
2289 } __packed;
2290
2291 struct wmi_host_mem_chunk {
2292         void *vaddr;
2293         dma_addr_t paddr;
2294         u32 len;
2295         u32 req_id;
2296 };
2297
2298 struct wmi_init_cmd_param {
2299         u32 tlv_header;
2300         struct target_resource_config *res_cfg;
2301         u8 num_mem_chunks;
2302         struct wmi_host_mem_chunk *mem_chunks;
2303         u32 hw_mode_id;
2304         u32 num_band_to_mac;
2305         struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
2306 };
2307
2308 struct wmi_pdev_band_to_mac {
2309         u32 tlv_header;
2310         u32 pdev_id;
2311         u32 start_freq;
2312         u32 end_freq;
2313 } __packed;
2314
2315 struct wmi_pdev_set_hw_mode_cmd_param {
2316         u32 tlv_header;
2317         u32 pdev_id;
2318         u32 hw_mode_index;
2319         u32 num_band_to_mac;
2320 } __packed;
2321
2322 struct wmi_ppe_threshold {
2323         u32 numss_m1; /** NSS - 1*/
2324         union {
2325                 u32 ru_count;
2326                 u32 ru_mask;
2327         } __packed;
2328         u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
2329 } __packed;
2330
2331 #define HW_BD_INFO_SIZE       5
2332
2333 struct wmi_abi_version {
2334         u32 abi_version_0;
2335         u32 abi_version_1;
2336         u32 abi_version_ns_0;
2337         u32 abi_version_ns_1;
2338         u32 abi_version_ns_2;
2339         u32 abi_version_ns_3;
2340 } __packed;
2341
2342 struct wmi_init_cmd {
2343         u32 tlv_header;
2344         struct wmi_abi_version host_abi_vers;
2345         u32 num_host_mem_chunks;
2346 } __packed;
2347
2348 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
2349 #define WMI_RSRC_CFG_FLAG2_CALC_NEXT_DTIM_COUNT_SET BIT(9)
2350 #define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
2351
2352 #define WMI_CFG_HOST_SERVICE_FLAG_REG_CC_EXT 4
2353
2354 struct wmi_resource_config {
2355         u32 tlv_header;
2356         u32 num_vdevs;
2357         u32 num_peers;
2358         u32 num_offload_peers;
2359         u32 num_offload_reorder_buffs;
2360         u32 num_peer_keys;
2361         u32 num_tids;
2362         u32 ast_skid_limit;
2363         u32 tx_chain_mask;
2364         u32 rx_chain_mask;
2365         u32 rx_timeout_pri[4];
2366         u32 rx_decap_mode;
2367         u32 scan_max_pending_req;
2368         u32 bmiss_offload_max_vdev;
2369         u32 roam_offload_max_vdev;
2370         u32 roam_offload_max_ap_profiles;
2371         u32 num_mcast_groups;
2372         u32 num_mcast_table_elems;
2373         u32 mcast2ucast_mode;
2374         u32 tx_dbg_log_size;
2375         u32 num_wds_entries;
2376         u32 dma_burst_size;
2377         u32 mac_aggr_delim;
2378         u32 rx_skip_defrag_timeout_dup_detection_check;
2379         u32 vow_config;
2380         u32 gtk_offload_max_vdev;
2381         u32 num_msdu_desc;
2382         u32 max_frag_entries;
2383         u32 num_tdls_vdevs;
2384         u32 num_tdls_conn_table_entries;
2385         u32 beacon_tx_offload_max_vdev;
2386         u32 num_multicast_filter_entries;
2387         u32 num_wow_filters;
2388         u32 num_keep_alive_pattern;
2389         u32 keep_alive_pattern_size;
2390         u32 max_tdls_concurrent_sleep_sta;
2391         u32 max_tdls_concurrent_buffer_sta;
2392         u32 wmi_send_separate;
2393         u32 num_ocb_vdevs;
2394         u32 num_ocb_channels;
2395         u32 num_ocb_schedules;
2396         u32 flag1;
2397         u32 smart_ant_cap;
2398         u32 bk_minfree;
2399         u32 be_minfree;
2400         u32 vi_minfree;
2401         u32 vo_minfree;
2402         u32 alloc_frag_desc_for_data_pkt;
2403         u32 num_ns_ext_tuples_cfg;
2404         u32 bpf_instruction_size;
2405         u32 max_bssid_rx_filters;
2406         u32 use_pdev_id;
2407         u32 max_num_dbs_scan_duty_cycle;
2408         u32 max_num_group_keys;
2409         u32 peer_map_unmap_v2_support;
2410         u32 sched_params;
2411         u32 twt_ap_pdev_count;
2412         u32 twt_ap_sta_count;
2413         u32 max_nlo_ssids;
2414         u32 num_pkt_filters;
2415         u32 num_max_sta_vdevs;
2416         u32 max_bssid_indicator;
2417         u32 ul_resp_config;
2418         u32 msdu_flow_override_config0;
2419         u32 msdu_flow_override_config1;
2420         u32 flags2;
2421         u32 host_service_flags;
2422         u32 max_rnr_neighbours;
2423         u32 ema_max_vap_cnt;
2424         u32 ema_max_profile_period;
2425 } __packed;
2426
2427 struct wmi_service_ready_event {
2428         u32 fw_build_vers;
2429         struct wmi_abi_version fw_abi_vers;
2430         u32 phy_capability;
2431         u32 max_frag_entry;
2432         u32 num_rf_chains;
2433         u32 ht_cap_info;
2434         u32 vht_cap_info;
2435         u32 vht_supp_mcs;
2436         u32 hw_min_tx_power;
2437         u32 hw_max_tx_power;
2438         u32 sys_cap_info;
2439         u32 min_pkt_size_enable;
2440         u32 max_bcn_ie_size;
2441         u32 num_mem_reqs;
2442         u32 max_num_scan_channels;
2443         u32 hw_bd_id;
2444         u32 hw_bd_info[HW_BD_INFO_SIZE];
2445         u32 max_supported_macs;
2446         u32 wmi_fw_sub_feat_caps;
2447         u32 num_dbs_hw_modes;
2448         /* txrx_chainmask
2449          *    [7:0]   - 2G band tx chain mask
2450          *    [15:8]  - 2G band rx chain mask
2451          *    [23:16] - 5G band tx chain mask
2452          *    [31:24] - 5G band rx chain mask
2453          */
2454         u32 txrx_chainmask;
2455         u32 default_dbs_hw_mode_index;
2456         u32 num_msdu_desc;
2457 } __packed;
2458
2459 #define WMI_SERVICE_BM_SIZE     ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
2460
2461 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
2462 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
2463 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
2464 #define WMI_SERVICE_BITS_IN_SIZE32 4
2465
2466 struct wmi_service_ready_ext_event {
2467         u32 default_conc_scan_config_bits;
2468         u32 default_fw_config_bits;
2469         struct wmi_ppe_threshold ppet;
2470         u32 he_cap_info;
2471         u32 mpdu_density;
2472         u32 max_bssid_rx_filters;
2473         u32 fw_build_vers_ext;
2474         u32 max_nlo_ssids;
2475         u32 max_bssid_indicator;
2476         u32 he_cap_info_ext;
2477 } __packed;
2478
2479 struct wmi_soc_mac_phy_hw_mode_caps {
2480         u32 num_hw_modes;
2481         u32 num_chainmask_tables;
2482 } __packed;
2483
2484 struct wmi_hw_mode_capabilities {
2485         u32 tlv_header;
2486         u32 hw_mode_id;
2487         u32 phy_id_map;
2488         u32 hw_mode_config_type;
2489 } __packed;
2490
2491 #define WMI_MAX_HECAP_PHY_SIZE                 (3)
2492 #define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS    BIT(0)
2493 #define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \
2494         FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val)
2495 #define WMI_NSS_RATIO_INFO_BITPOS              GENMASK(4, 1)
2496 #define WMI_NSS_RATIO_INFO_GET(_val) \
2497         FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val)
2498
2499 struct wmi_mac_phy_capabilities {
2500         u32 hw_mode_id;
2501         u32 pdev_id;
2502         u32 phy_id;
2503         u32 supported_flags;
2504         u32 supported_bands;
2505         u32 ampdu_density;
2506         u32 max_bw_supported_2g;
2507         u32 ht_cap_info_2g;
2508         u32 vht_cap_info_2g;
2509         u32 vht_supp_mcs_2g;
2510         u32 he_cap_info_2g;
2511         u32 he_supp_mcs_2g;
2512         u32 tx_chain_mask_2g;
2513         u32 rx_chain_mask_2g;
2514         u32 max_bw_supported_5g;
2515         u32 ht_cap_info_5g;
2516         u32 vht_cap_info_5g;
2517         u32 vht_supp_mcs_5g;
2518         u32 he_cap_info_5g;
2519         u32 he_supp_mcs_5g;
2520         u32 tx_chain_mask_5g;
2521         u32 rx_chain_mask_5g;
2522         u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
2523         u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
2524         struct wmi_ppe_threshold he_ppet2g;
2525         struct wmi_ppe_threshold he_ppet5g;
2526         u32 chainmask_table_id;
2527         u32 lmac_id;
2528         u32 he_cap_info_2g_ext;
2529         u32 he_cap_info_5g_ext;
2530         u32 he_cap_info_internal;
2531         u32 wireless_modes;
2532         u32 low_2ghz_chan_freq;
2533         u32 high_2ghz_chan_freq;
2534         u32 low_5ghz_chan_freq;
2535         u32 high_5ghz_chan_freq;
2536         u32 nss_ratio;
2537 } __packed;
2538
2539 struct wmi_hal_reg_capabilities_ext {
2540         u32 tlv_header;
2541         u32 phy_id;
2542         u32 eeprom_reg_domain;
2543         u32 eeprom_reg_domain_ext;
2544         u32 regcap1;
2545         u32 regcap2;
2546         u32 wireless_modes;
2547         u32 low_2ghz_chan;
2548         u32 high_2ghz_chan;
2549         u32 low_5ghz_chan;
2550         u32 high_5ghz_chan;
2551 } __packed;
2552
2553 struct wmi_soc_hal_reg_capabilities {
2554         u32 num_phy;
2555 } __packed;
2556
2557 /* 2 word representation of MAC addr */
2558 struct wmi_mac_addr {
2559         union {
2560                 u8 addr[6];
2561                 struct {
2562                         u32 word0;
2563                         u32 word1;
2564                 } __packed;
2565         } __packed;
2566 } __packed;
2567
2568 struct wmi_dma_ring_capabilities {
2569         u32 tlv_header;
2570         u32 pdev_id;
2571         u32 module_id;
2572         u32 min_elem;
2573         u32 min_buf_sz;
2574         u32 min_buf_align;
2575 } __packed;
2576
2577 struct wmi_ready_event_min {
2578         struct wmi_abi_version fw_abi_vers;
2579         struct wmi_mac_addr mac_addr;
2580         u32 status;
2581         u32 num_dscp_table;
2582         u32 num_extra_mac_addr;
2583         u32 num_total_peers;
2584         u32 num_extra_peers;
2585 } __packed;
2586
2587 struct wmi_ready_event {
2588         struct wmi_ready_event_min ready_event_min;
2589         u32 max_ast_index;
2590         u32 pktlog_defs_checksum;
2591 } __packed;
2592
2593 struct wmi_service_available_event {
2594         u32 wmi_service_segment_offset;
2595         u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
2596 } __packed;
2597
2598 struct ath11k_pdev_wmi {
2599         struct ath11k_wmi_base *wmi_ab;
2600         enum ath11k_htc_ep_id eid;
2601         u32 rx_decap_mode;
2602         wait_queue_head_t tx_ce_desc_wq;
2603 };
2604
2605 struct vdev_create_params {
2606         u8 if_id;
2607         u32 type;
2608         u32 subtype;
2609         struct {
2610                 u8 tx;
2611                 u8 rx;
2612         } chains[NUM_NL80211_BANDS];
2613         u32 pdev_id;
2614         u32 mbssid_flags;
2615         u32 mbssid_tx_vdev_id;
2616 };
2617
2618 struct wmi_vdev_create_cmd {
2619         u32 tlv_header;
2620         u32 vdev_id;
2621         u32 vdev_type;
2622         u32 vdev_subtype;
2623         struct wmi_mac_addr vdev_macaddr;
2624         u32 num_cfg_txrx_streams;
2625         u32 pdev_id;
2626         u32 mbssid_flags;
2627         u32 mbssid_tx_vdev_id;
2628 } __packed;
2629
2630 struct wmi_vdev_txrx_streams {
2631         u32 tlv_header;
2632         u32 band;
2633         u32 supported_tx_streams;
2634         u32 supported_rx_streams;
2635 } __packed;
2636
2637 struct wmi_vdev_delete_cmd {
2638         u32 tlv_header;
2639         u32 vdev_id;
2640 } __packed;
2641
2642 struct wmi_vdev_up_cmd {
2643         u32 tlv_header;
2644         u32 vdev_id;
2645         u32 vdev_assoc_id;
2646         struct wmi_mac_addr vdev_bssid;
2647         struct wmi_mac_addr tx_vdev_bssid;
2648         u32 nontx_profile_idx;
2649         u32 nontx_profile_cnt;
2650 } __packed;
2651
2652 struct wmi_vdev_stop_cmd {
2653         u32 tlv_header;
2654         u32 vdev_id;
2655 } __packed;
2656
2657 struct wmi_vdev_down_cmd {
2658         u32 tlv_header;
2659         u32 vdev_id;
2660 } __packed;
2661
2662 #define WMI_VDEV_START_HIDDEN_SSID  BIT(0)
2663 #define WMI_VDEV_START_PMF_ENABLED  BIT(1)
2664 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
2665 #define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4)
2666
2667 struct wmi_ssid {
2668         u32 ssid_len;
2669         u32 ssid[8];
2670 } __packed;
2671
2672 #define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
2673
2674 struct wmi_vdev_start_request_cmd {
2675         u32 tlv_header;
2676         u32 vdev_id;
2677         u32 requestor_id;
2678         u32 beacon_interval;
2679         u32 dtim_period;
2680         u32 flags;
2681         struct wmi_ssid ssid;
2682         u32 bcn_tx_rate;
2683         u32 bcn_txpower;
2684         u32 num_noa_descriptors;
2685         u32 disable_hw_ack;
2686         u32 preferred_tx_streams;
2687         u32 preferred_rx_streams;
2688         u32 he_ops;
2689         u32 cac_duration_ms;
2690         u32 regdomain;
2691         u32 min_data_rate;
2692         u32 mbssid_flags;
2693         u32 mbssid_tx_vdev_id;
2694 } __packed;
2695
2696 #define MGMT_TX_DL_FRM_LEN                   64
2697 #define WMI_MAC_MAX_SSID_LENGTH              32
2698 struct mac_ssid {
2699         u8 length;
2700         u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
2701 } __packed;
2702
2703 struct wmi_p2p_noa_descriptor {
2704         u32 type_count;
2705         u32 duration;
2706         u32 interval;
2707         u32 start_time;
2708 };
2709
2710 struct channel_param {
2711         u8 chan_id;
2712         u8 pwr;
2713         u32 mhz;
2714         u32 half_rate:1,
2715             quarter_rate:1,
2716             dfs_set:1,
2717             dfs_set_cfreq2:1,
2718             is_chan_passive:1,
2719             allow_ht:1,
2720             allow_vht:1,
2721             allow_he:1,
2722             set_agile:1,
2723             psc_channel:1;
2724         u32 phy_mode;
2725         u32 cfreq1;
2726         u32 cfreq2;
2727         char   maxpower;
2728         char   minpower;
2729         char   maxregpower;
2730         u8  antennamax;
2731         u8  reg_class_id;
2732 } __packed;
2733
2734 enum wmi_phy_mode {
2735         MODE_11A        = 0,
2736         MODE_11G        = 1,   /* 11b/g Mode */
2737         MODE_11B        = 2,   /* 11b Mode */
2738         MODE_11GONLY    = 3,   /* 11g only Mode */
2739         MODE_11NA_HT20   = 4,
2740         MODE_11NG_HT20   = 5,
2741         MODE_11NA_HT40   = 6,
2742         MODE_11NG_HT40   = 7,
2743         MODE_11AC_VHT20 = 8,
2744         MODE_11AC_VHT40 = 9,
2745         MODE_11AC_VHT80 = 10,
2746         MODE_11AC_VHT20_2G = 11,
2747         MODE_11AC_VHT40_2G = 12,
2748         MODE_11AC_VHT80_2G = 13,
2749         MODE_11AC_VHT80_80 = 14,
2750         MODE_11AC_VHT160 = 15,
2751         MODE_11AX_HE20 = 16,
2752         MODE_11AX_HE40 = 17,
2753         MODE_11AX_HE80 = 18,
2754         MODE_11AX_HE80_80 = 19,
2755         MODE_11AX_HE160 = 20,
2756         MODE_11AX_HE20_2G = 21,
2757         MODE_11AX_HE40_2G = 22,
2758         MODE_11AX_HE80_2G = 23,
2759         MODE_UNKNOWN = 24,
2760         MODE_MAX = 24
2761 };
2762
2763 static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
2764 {
2765         switch (mode) {
2766         case MODE_11A:
2767                 return "11a";
2768         case MODE_11G:
2769                 return "11g";
2770         case MODE_11B:
2771                 return "11b";
2772         case MODE_11GONLY:
2773                 return "11gonly";
2774         case MODE_11NA_HT20:
2775                 return "11na-ht20";
2776         case MODE_11NG_HT20:
2777                 return "11ng-ht20";
2778         case MODE_11NA_HT40:
2779                 return "11na-ht40";
2780         case MODE_11NG_HT40:
2781                 return "11ng-ht40";
2782         case MODE_11AC_VHT20:
2783                 return "11ac-vht20";
2784         case MODE_11AC_VHT40:
2785                 return "11ac-vht40";
2786         case MODE_11AC_VHT80:
2787                 return "11ac-vht80";
2788         case MODE_11AC_VHT160:
2789                 return "11ac-vht160";
2790         case MODE_11AC_VHT80_80:
2791                 return "11ac-vht80+80";
2792         case MODE_11AC_VHT20_2G:
2793                 return "11ac-vht20-2g";
2794         case MODE_11AC_VHT40_2G:
2795                 return "11ac-vht40-2g";
2796         case MODE_11AC_VHT80_2G:
2797                 return "11ac-vht80-2g";
2798         case MODE_11AX_HE20:
2799                 return "11ax-he20";
2800         case MODE_11AX_HE40:
2801                 return "11ax-he40";
2802         case MODE_11AX_HE80:
2803                 return "11ax-he80";
2804         case MODE_11AX_HE80_80:
2805                 return "11ax-he80+80";
2806         case MODE_11AX_HE160:
2807                 return "11ax-he160";
2808         case MODE_11AX_HE20_2G:
2809                 return "11ax-he20-2g";
2810         case MODE_11AX_HE40_2G:
2811                 return "11ax-he40-2g";
2812         case MODE_11AX_HE80_2G:
2813                 return "11ax-he80-2g";
2814         case MODE_UNKNOWN:
2815                 /* skip */
2816                 break;
2817
2818                 /* no default handler to allow compiler to check that the
2819                  * enum is fully handled
2820                  */
2821         }
2822
2823         return "<unknown>";
2824 }
2825
2826 struct wmi_channel_arg {
2827         u32 freq;
2828         u32 band_center_freq1;
2829         u32 band_center_freq2;
2830         bool passive;
2831         bool allow_ibss;
2832         bool allow_ht;
2833         bool allow_vht;
2834         bool ht40plus;
2835         bool chan_radar;
2836         bool freq2_radar;
2837         bool allow_he;
2838         u32 min_power;
2839         u32 max_power;
2840         u32 max_reg_power;
2841         u32 max_antenna_gain;
2842         enum wmi_phy_mode mode;
2843 };
2844
2845 struct wmi_vdev_start_req_arg {
2846         u32 vdev_id;
2847         struct wmi_channel_arg channel;
2848         u32 bcn_intval;
2849         u32 dtim_period;
2850         u8 *ssid;
2851         u32 ssid_len;
2852         u32 bcn_tx_rate;
2853         u32 bcn_tx_power;
2854         bool disable_hw_ack;
2855         bool hidden_ssid;
2856         bool pmf_enabled;
2857         u32 he_ops;
2858         u32 cac_duration_ms;
2859         u32 regdomain;
2860         u32 pref_rx_streams;
2861         u32 pref_tx_streams;
2862         u32 num_noa_descriptors;
2863         u32 min_data_rate;
2864         u32 mbssid_flags;
2865         u32 mbssid_tx_vdev_id;
2866 };
2867
2868 struct peer_create_params {
2869         const u8 *peer_addr;
2870         u32 peer_type;
2871         u32 vdev_id;
2872 };
2873
2874 struct peer_delete_params {
2875         u8 vdev_id;
2876 };
2877
2878 struct peer_flush_params {
2879         u32 peer_tid_bitmap;
2880         u8 vdev_id;
2881 };
2882
2883 struct pdev_set_regdomain_params {
2884         u16 current_rd_in_use;
2885         u16 current_rd_2g;
2886         u16 current_rd_5g;
2887         u32 ctl_2g;
2888         u32 ctl_5g;
2889         u8 dfs_domain;
2890         u32 pdev_id;
2891 };
2892
2893 struct rx_reorder_queue_remove_params {
2894         u8 *peer_macaddr;
2895         u16 vdev_id;
2896         u32 peer_tid_bitmap;
2897 };
2898
2899 #define WMI_HOST_PDEV_ID_SOC 0xFF
2900 #define WMI_HOST_PDEV_ID_0   0
2901 #define WMI_HOST_PDEV_ID_1   1
2902 #define WMI_HOST_PDEV_ID_2   2
2903
2904 #define WMI_PDEV_ID_SOC         0
2905 #define WMI_PDEV_ID_1ST         1
2906 #define WMI_PDEV_ID_2ND         2
2907 #define WMI_PDEV_ID_3RD         3
2908
2909 /* Freq units in MHz */
2910 #define REG_RULE_START_FREQ                     0x0000ffff
2911 #define REG_RULE_END_FREQ                       0xffff0000
2912 #define REG_RULE_FLAGS                          0x0000ffff
2913 #define REG_RULE_MAX_BW                         0x0000ffff
2914 #define REG_RULE_REG_PWR                        0x00ff0000
2915 #define REG_RULE_ANT_GAIN                       0xff000000
2916 #define REG_RULE_PSD_INFO                       BIT(0)
2917 #define REG_RULE_PSD_EIRP                       0xff0000
2918
2919 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
2920 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
2921 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
2922 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
2923
2924 #define HE_PHYCAP_BYTE_0        0
2925 #define HE_PHYCAP_BYTE_1        1
2926 #define HE_PHYCAP_BYTE_2        2
2927 #define HE_PHYCAP_BYTE_3        3
2928 #define HE_PHYCAP_BYTE_4        4
2929
2930 #define HECAP_PHY_SU_BFER               BIT(7)
2931 #define HECAP_PHY_SU_BFEE               BIT(0)
2932 #define HECAP_PHY_MU_BFER               BIT(1)
2933 #define HECAP_PHY_UL_MUMIMO             BIT(6)
2934 #define HECAP_PHY_UL_MUOFDMA            BIT(7)
2935
2936 #define HECAP_PHY_SUBFMR_GET(hecap_phy) \
2937         FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HE_PHYCAP_BYTE_3])
2938
2939 #define HECAP_PHY_SUBFME_GET(hecap_phy) \
2940         FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HE_PHYCAP_BYTE_4])
2941
2942 #define HECAP_PHY_MUBFMR_GET(hecap_phy) \
2943         FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HE_PHYCAP_BYTE_4])
2944
2945 #define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
2946         FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HE_PHYCAP_BYTE_2])
2947
2948 #define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
2949         FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HE_PHYCAP_BYTE_2])
2950
2951 #define HE_MODE_SU_TX_BFEE      BIT(0)
2952 #define HE_MODE_SU_TX_BFER      BIT(1)
2953 #define HE_MODE_MU_TX_BFEE      BIT(2)
2954 #define HE_MODE_MU_TX_BFER      BIT(3)
2955 #define HE_MODE_DL_OFDMA        BIT(4)
2956 #define HE_MODE_UL_OFDMA        BIT(5)
2957 #define HE_MODE_UL_MUMIMO       BIT(6)
2958
2959 #define HE_DL_MUOFDMA_ENABLE    1
2960 #define HE_UL_MUOFDMA_ENABLE    1
2961 #define HE_DL_MUMIMO_ENABLE     1
2962 #define HE_UL_MUMIMO_ENABLE     1
2963 #define HE_MU_BFEE_ENABLE       1
2964 #define HE_SU_BFEE_ENABLE       1
2965 #define HE_MU_BFER_ENABLE       1
2966 #define HE_SU_BFER_ENABLE       1
2967
2968 #define HE_VHT_SOUNDING_MODE_ENABLE             1
2969 #define HE_SU_MU_SOUNDING_MODE_ENABLE           1
2970 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE    1
2971
2972 /* HE or VHT Sounding */
2973 #define HE_VHT_SOUNDING_MODE            BIT(0)
2974 /* SU or MU Sounding */
2975 #define HE_SU_MU_SOUNDING_MODE          BIT(2)
2976 /* Trig or Non-Trig Sounding */
2977 #define HE_TRIG_NONTRIG_SOUNDING_MODE   BIT(3)
2978
2979 #define WMI_TXBF_STS_CAP_OFFSET_LSB     4
2980 #define WMI_TXBF_STS_CAP_OFFSET_MASK    0x70
2981 #define WMI_BF_SOUND_DIM_OFFSET_LSB     8
2982 #define WMI_BF_SOUND_DIM_OFFSET_MASK    0x700
2983
2984 struct pdev_params {
2985         u32 param_id;
2986         u32 param_value;
2987 };
2988
2989 enum wmi_peer_type {
2990         WMI_PEER_TYPE_DEFAULT = 0,
2991         WMI_PEER_TYPE_BSS = 1,
2992         WMI_PEER_TYPE_TDLS = 2,
2993 };
2994
2995 struct wmi_peer_create_cmd {
2996         u32 tlv_header;
2997         u32 vdev_id;
2998         struct wmi_mac_addr peer_macaddr;
2999         u32 peer_type;
3000 } __packed;
3001
3002 struct wmi_peer_delete_cmd {
3003         u32 tlv_header;
3004         u32 vdev_id;
3005         struct wmi_mac_addr peer_macaddr;
3006 } __packed;
3007
3008 struct wmi_peer_reorder_queue_setup_cmd {
3009         u32 tlv_header;
3010         u32 vdev_id;
3011         struct wmi_mac_addr peer_macaddr;
3012         u32 tid;
3013         u32 queue_ptr_lo;
3014         u32 queue_ptr_hi;
3015         u32 queue_no;
3016         u32 ba_window_size_valid;
3017         u32 ba_window_size;
3018 } __packed;
3019
3020 struct wmi_peer_reorder_queue_remove_cmd {
3021         u32 tlv_header;
3022         u32 vdev_id;
3023         struct wmi_mac_addr peer_macaddr;
3024         u32 tid_mask;
3025 } __packed;
3026
3027 struct gpio_config_params {
3028         u32 gpio_num;
3029         u32 input;
3030         u32 pull_type;
3031         u32 intr_mode;
3032 };
3033
3034 enum wmi_gpio_type {
3035         WMI_GPIO_PULL_NONE,
3036         WMI_GPIO_PULL_UP,
3037         WMI_GPIO_PULL_DOWN
3038 };
3039
3040 enum wmi_gpio_intr_type {
3041         WMI_GPIO_INTTYPE_DISABLE,
3042         WMI_GPIO_INTTYPE_RISING_EDGE,
3043         WMI_GPIO_INTTYPE_FALLING_EDGE,
3044         WMI_GPIO_INTTYPE_BOTH_EDGE,
3045         WMI_GPIO_INTTYPE_LEVEL_LOW,
3046         WMI_GPIO_INTTYPE_LEVEL_HIGH
3047 };
3048
3049 enum wmi_bss_chan_info_req_type {
3050         WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
3051         WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
3052 };
3053
3054 struct wmi_gpio_config_cmd_param {
3055         u32 tlv_header;
3056         u32 gpio_num;
3057         u32 input;
3058         u32 pull_type;
3059         u32 intr_mode;
3060 };
3061
3062 struct gpio_output_params {
3063         u32 gpio_num;
3064         u32 set;
3065 };
3066
3067 struct wmi_gpio_output_cmd_param {
3068         u32 tlv_header;
3069         u32 gpio_num;
3070         u32 set;
3071 };
3072
3073 struct set_fwtest_params {
3074         u32 arg;
3075         u32 value;
3076 };
3077
3078 struct wmi_fwtest_set_param_cmd_param {
3079         u32 tlv_header;
3080         u32 param_id;
3081         u32 param_value;
3082 };
3083
3084 struct wmi_pdev_set_param_cmd {
3085         u32 tlv_header;
3086         u32 pdev_id;
3087         u32 param_id;
3088         u32 param_value;
3089 } __packed;
3090
3091 struct wmi_pdev_set_ps_mode_cmd {
3092         u32 tlv_header;
3093         u32 vdev_id;
3094         u32 sta_ps_mode;
3095 } __packed;
3096
3097 struct wmi_pdev_suspend_cmd {
3098         u32 tlv_header;
3099         u32 pdev_id;
3100         u32 suspend_opt;
3101 } __packed;
3102
3103 struct wmi_pdev_resume_cmd {
3104         u32 tlv_header;
3105         u32 pdev_id;
3106 } __packed;
3107
3108 struct wmi_pdev_bss_chan_info_req_cmd {
3109         u32 tlv_header;
3110         /* ref wmi_bss_chan_info_req_type */
3111         u32 req_type;
3112         u32 pdev_id;
3113 } __packed;
3114
3115 struct wmi_ap_ps_peer_cmd {
3116         u32 tlv_header;
3117         u32 vdev_id;
3118         struct wmi_mac_addr peer_macaddr;
3119         u32 param;
3120         u32 value;
3121 } __packed;
3122
3123 struct wmi_sta_powersave_param_cmd {
3124         u32 tlv_header;
3125         u32 vdev_id;
3126         u32 param;
3127         u32 value;
3128 } __packed;
3129
3130 struct wmi_pdev_set_regdomain_cmd {
3131         u32 tlv_header;
3132         u32 pdev_id;
3133         u32 reg_domain;
3134         u32 reg_domain_2g;
3135         u32 reg_domain_5g;
3136         u32 conformance_test_limit_2g;
3137         u32 conformance_test_limit_5g;
3138         u32 dfs_domain;
3139 } __packed;
3140
3141 struct wmi_peer_set_param_cmd {
3142         u32 tlv_header;
3143         u32 vdev_id;
3144         struct wmi_mac_addr peer_macaddr;
3145         u32 param_id;
3146         u32 param_value;
3147 } __packed;
3148
3149 struct wmi_peer_flush_tids_cmd {
3150         u32 tlv_header;
3151         u32 vdev_id;
3152         struct wmi_mac_addr peer_macaddr;
3153         u32 peer_tid_bitmap;
3154 } __packed;
3155
3156 struct wmi_dfs_phyerr_offload_cmd {
3157         u32 tlv_header;
3158         u32 pdev_id;
3159 } __packed;
3160
3161 struct wmi_bcn_offload_ctrl_cmd {
3162         u32 tlv_header;
3163         u32 vdev_id;
3164         u32 bcn_ctrl_op;
3165 } __packed;
3166
3167 enum scan_dwelltime_adaptive_mode {
3168         SCAN_DWELL_MODE_DEFAULT = 0,
3169         SCAN_DWELL_MODE_CONSERVATIVE = 1,
3170         SCAN_DWELL_MODE_MODERATE = 2,
3171         SCAN_DWELL_MODE_AGGRESSIVE = 3,
3172         SCAN_DWELL_MODE_STATIC = 4
3173 };
3174
3175 #define WLAN_SSID_MAX_LEN 32
3176
3177 struct element_info {
3178         u32 len;
3179         u8 *ptr;
3180 };
3181
3182 struct wlan_ssid {
3183         u8 length;
3184         u8 ssid[WLAN_SSID_MAX_LEN];
3185 };
3186
3187 struct wmi_vdev_ch_power_info {
3188         u32 tlv_header;
3189
3190         /* Channel center frequency (MHz) */
3191         u32 chan_cfreq;
3192
3193         /* Unit: dBm, either PSD/EIRP power for this frequency or
3194          * incremental for non-PSD BW
3195          */
3196         u32 tx_power;
3197 } __packed;
3198
3199 struct wmi_vdev_set_tpc_power_cmd {
3200         u32 tlv_header;
3201         u32 vdev_id;
3202
3203         /* Value: 0 or 1, is PSD power or not */
3204         u32 psd_power;
3205
3206          /* Maximum EIRP power (dBm units), valid only if power is PSD */
3207         u32 eirp_power;
3208
3209         /* Type: WMI_6GHZ_REG_TYPE, used for halphy CTL lookup */
3210         u32 power_type_6ghz;
3211
3212         /* This fixed_param TLV is followed by the below TLVs:
3213          * num_pwr_levels of wmi_vdev_ch_power_info
3214          * For PSD power, it is the PSD/EIRP power of the frequency (20 MHz chunks).
3215          * For non-PSD power, the power values are for 20, 40, and till
3216          * BSS BW power levels.
3217          * The num_pwr_levels will be checked by sw how many elements present
3218          * in the variable-length array.
3219          */
3220 } __packed;
3221
3222 #define WMI_IE_BITMAP_SIZE             8
3223
3224 /* prefix used by scan requestor ids on the host */
3225 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3226
3227 /* prefix used by scan request ids generated on the host */
3228 /* host cycles through the lower 12 bits to generate ids */
3229 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3230
3231 /* Values lower than this may be refused by some firmware revisions with a scan
3232  * completion with a timedout reason.
3233  */
3234 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3235
3236 /* Scan priority numbers must be sequential, starting with 0 */
3237 enum wmi_scan_priority {
3238         WMI_SCAN_PRIORITY_VERY_LOW = 0,
3239         WMI_SCAN_PRIORITY_LOW,
3240         WMI_SCAN_PRIORITY_MEDIUM,
3241         WMI_SCAN_PRIORITY_HIGH,
3242         WMI_SCAN_PRIORITY_VERY_HIGH,
3243         WMI_SCAN_PRIORITY_COUNT   /* number of priorities supported */
3244 };
3245
3246 enum wmi_scan_event_type {
3247         WMI_SCAN_EVENT_STARTED              = BIT(0),
3248         WMI_SCAN_EVENT_COMPLETED            = BIT(1),
3249         WMI_SCAN_EVENT_BSS_CHANNEL          = BIT(2),
3250         WMI_SCAN_EVENT_FOREIGN_CHAN         = BIT(3),
3251         WMI_SCAN_EVENT_DEQUEUED             = BIT(4),
3252         /* possibly by high-prio scan */
3253         WMI_SCAN_EVENT_PREEMPTED            = BIT(5),
3254         WMI_SCAN_EVENT_START_FAILED         = BIT(6),
3255         WMI_SCAN_EVENT_RESTARTED            = BIT(7),
3256         WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT    = BIT(8),
3257         WMI_SCAN_EVENT_SUSPENDED            = BIT(9),
3258         WMI_SCAN_EVENT_RESUMED              = BIT(10),
3259         WMI_SCAN_EVENT_MAX                  = BIT(15),
3260 };
3261
3262 enum wmi_scan_completion_reason {
3263         WMI_SCAN_REASON_COMPLETED,
3264         WMI_SCAN_REASON_CANCELLED,
3265         WMI_SCAN_REASON_PREEMPTED,
3266         WMI_SCAN_REASON_TIMEDOUT,
3267         WMI_SCAN_REASON_INTERNAL_FAILURE,
3268         WMI_SCAN_REASON_MAX,
3269 };
3270
3271 struct  wmi_start_scan_cmd {
3272         u32 tlv_header;
3273         u32 scan_id;
3274         u32 scan_req_id;
3275         u32 vdev_id;
3276         u32 scan_priority;
3277         u32 notify_scan_events;
3278         u32 dwell_time_active;
3279         u32 dwell_time_passive;
3280         u32 min_rest_time;
3281         u32 max_rest_time;
3282         u32 repeat_probe_time;
3283         u32 probe_spacing_time;
3284         u32 idle_time;
3285         u32 max_scan_time;
3286         u32 probe_delay;
3287         u32 scan_ctrl_flags;
3288         u32 burst_duration;
3289         u32 num_chan;
3290         u32 num_bssid;
3291         u32 num_ssids;
3292         u32 ie_len;
3293         u32 n_probes;
3294         struct wmi_mac_addr mac_addr;
3295         struct wmi_mac_addr mac_mask;
3296         u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
3297         u32 num_vendor_oui;
3298         u32 scan_ctrl_flags_ext;
3299         u32 dwell_time_active_2g;
3300         u32 dwell_time_active_6g;
3301         u32 dwell_time_passive_6g;
3302         u32 scan_start_offset;
3303 } __packed;
3304
3305 #define WMI_SCAN_FLAG_PASSIVE        0x1
3306 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3307 #define WMI_SCAN_ADD_CCK_RATES       0x4
3308 #define WMI_SCAN_ADD_OFDM_RATES      0x8
3309 #define WMI_SCAN_CHAN_STAT_EVENT     0x10
3310 #define WMI_SCAN_FILTER_PROBE_REQ    0x20
3311 #define WMI_SCAN_BYPASS_DFS_CHN      0x40
3312 #define WMI_SCAN_CONTINUE_ON_ERROR   0x80
3313 #define WMI_SCAN_FILTER_PROMISCUOS   0x100
3314 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
3315 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ  0x400
3316 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ   0x800
3317 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ   0x1000
3318 #define WMI_SCAN_OFFCHAN_MGMT_TX    0x2000
3319 #define WMI_SCAN_OFFCHAN_DATA_TX    0x4000
3320 #define WMI_SCAN_CAPTURE_PHY_ERROR  0x8000
3321 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
3322 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT      0x20000
3323 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT   0x40000
3324 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
3325 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
3326
3327 #define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
3328 #define WMI_SCAN_DWELL_MODE_SHIFT        21
3329 #define WMI_SCAN_FLAG_EXT_PASSIVE_SCAN_START_TIME_ENHANCE   0x00000800
3330
3331 #define WMI_SCAN_CONFIG_PER_CHANNEL_MASK        GENMASK(19, 0)
3332 #define WMI_SCAN_CH_FLAG_SCAN_ONLY_IF_RNR_FOUND BIT(20)
3333
3334 enum {
3335         WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
3336         WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
3337         WMI_SCAN_DWELL_MODE_MODERATE     = 2,
3338         WMI_SCAN_DWELL_MODE_AGGRESSIVE   = 3,
3339         WMI_SCAN_DWELL_MODE_STATIC       = 4,
3340 };
3341
3342 #define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
3343         ((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
3344                     WMI_SCAN_DWELL_MODE_MASK))
3345
3346 struct hint_short_ssid {
3347         u32 freq_flags;
3348         u32 short_ssid;
3349 };
3350
3351 struct hint_bssid {
3352         u32 freq_flags;
3353         struct wmi_mac_addr bssid;
3354 };
3355
3356 struct scan_req_params {
3357         u32 scan_id;
3358         u32 scan_req_id;
3359         u32 vdev_id;
3360         u32 pdev_id;
3361         enum wmi_scan_priority scan_priority;
3362         u32 scan_ev_started:1,
3363             scan_ev_completed:1,
3364             scan_ev_bss_chan:1,
3365             scan_ev_foreign_chan:1,
3366             scan_ev_dequeued:1,
3367             scan_ev_preempted:1,
3368             scan_ev_start_failed:1,
3369             scan_ev_restarted:1,
3370             scan_ev_foreign_chn_exit:1,
3371             scan_ev_invalid:1,
3372             scan_ev_gpio_timeout:1,
3373             scan_ev_suspended:1,
3374             scan_ev_resumed:1;
3375         u32 scan_ctrl_flags_ext;
3376         u32 dwell_time_active;
3377         u32 dwell_time_active_2g;
3378         u32 dwell_time_passive;
3379         u32 dwell_time_active_6g;
3380         u32 dwell_time_passive_6g;
3381         u32 min_rest_time;
3382         u32 max_rest_time;
3383         u32 repeat_probe_time;
3384         u32 probe_spacing_time;
3385         u32 idle_time;
3386         u32 max_scan_time;
3387         u32 probe_delay;
3388         u32 scan_f_passive:1,
3389             scan_f_bcast_probe:1,
3390             scan_f_cck_rates:1,
3391             scan_f_ofdm_rates:1,
3392             scan_f_chan_stat_evnt:1,
3393             scan_f_filter_prb_req:1,
3394             scan_f_bypass_dfs_chn:1,
3395             scan_f_continue_on_err:1,
3396             scan_f_offchan_mgmt_tx:1,
3397             scan_f_offchan_data_tx:1,
3398             scan_f_promisc_mode:1,
3399             scan_f_capture_phy_err:1,
3400             scan_f_strict_passive_pch:1,
3401             scan_f_half_rate:1,
3402             scan_f_quarter_rate:1,
3403             scan_f_force_active_dfs_chn:1,
3404             scan_f_add_tpc_ie_in_probe:1,
3405             scan_f_add_ds_ie_in_probe:1,
3406             scan_f_add_spoofed_mac_in_probe:1,
3407             scan_f_add_rand_seq_in_probe:1,
3408             scan_f_en_ie_whitelist_in_probe:1,
3409             scan_f_forced:1,
3410             scan_f_2ghz:1,
3411             scan_f_5ghz:1,
3412             scan_f_80mhz:1;
3413         enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
3414         u32 burst_duration;
3415         u32 num_chan;
3416         u32 num_bssid;
3417         u32 num_ssids;
3418         u32 n_probes;
3419         u32 *chan_list;
3420         u32 notify_scan_events;
3421         struct wlan_ssid ssid[WLAN_SCAN_PARAMS_MAX_SSID];
3422         struct wmi_mac_addr bssid_list[WLAN_SCAN_PARAMS_MAX_BSSID];
3423         struct element_info extraie;
3424         struct element_info htcap;
3425         struct element_info vhtcap;
3426         u32 num_hint_s_ssid;
3427         u32 num_hint_bssid;
3428         struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
3429         struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
3430         struct wmi_mac_addr mac_addr;
3431         struct wmi_mac_addr mac_mask;
3432 };
3433
3434 struct wmi_ssid_arg {
3435         int len;
3436         const u8 *ssid;
3437 };
3438
3439 struct wmi_bssid_arg {
3440         const u8 *bssid;
3441 };
3442
3443 #define WMI_SCAN_STOP_ONE       0x00000000
3444 #define WMI_SCN_STOP_VAP_ALL    0x01000000
3445 #define WMI_SCAN_STOP_ALL       0x04000000
3446
3447 /* Prefix 0xA000 indicates that the scan request
3448  * is trigger by HOST
3449  */
3450 #define ATH11K_SCAN_ID          0xA000
3451
3452 enum scan_cancel_req_type {
3453         WLAN_SCAN_CANCEL_SINGLE = 1,
3454         WLAN_SCAN_CANCEL_VDEV_ALL,
3455         WLAN_SCAN_CANCEL_PDEV_ALL,
3456 };
3457
3458 struct scan_cancel_param {
3459         u32 requester;
3460         u32 scan_id;
3461         enum scan_cancel_req_type req_type;
3462         u32 vdev_id;
3463         u32 pdev_id;
3464 };
3465
3466 struct  wmi_bcn_send_from_host_cmd {
3467         u32 tlv_header;
3468         u32 vdev_id;
3469         u32 data_len;
3470         union {
3471                 u32 frag_ptr;
3472                 u32 frag_ptr_lo;
3473         };
3474         u32 frame_ctrl;
3475         u32 dtim_flag;
3476         u32 bcn_antenna;
3477         u32 frag_ptr_hi;
3478 };
3479
3480 #define WMI_CHAN_INFO_MODE              GENMASK(5, 0)
3481 #define WMI_CHAN_INFO_HT40_PLUS         BIT(6)
3482 #define WMI_CHAN_INFO_PASSIVE           BIT(7)
3483 #define WMI_CHAN_INFO_ADHOC_ALLOWED     BIT(8)
3484 #define WMI_CHAN_INFO_AP_DISABLED       BIT(9)
3485 #define WMI_CHAN_INFO_DFS               BIT(10)
3486 #define WMI_CHAN_INFO_ALLOW_HT          BIT(11)
3487 #define WMI_CHAN_INFO_ALLOW_VHT         BIT(12)
3488 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA     BIT(13)
3489 #define WMI_CHAN_INFO_HALF_RATE         BIT(14)
3490 #define WMI_CHAN_INFO_QUARTER_RATE      BIT(15)
3491 #define WMI_CHAN_INFO_DFS_FREQ2         BIT(16)
3492 #define WMI_CHAN_INFO_ALLOW_HE          BIT(17)
3493 #define WMI_CHAN_INFO_PSC               BIT(18)
3494
3495 #define WMI_CHAN_REG_INFO1_MIN_PWR      GENMASK(7, 0)
3496 #define WMI_CHAN_REG_INFO1_MAX_PWR      GENMASK(15, 8)
3497 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR  GENMASK(23, 16)
3498 #define WMI_CHAN_REG_INFO1_REG_CLS      GENMASK(31, 24)
3499
3500 #define WMI_CHAN_REG_INFO2_ANT_MAX      GENMASK(7, 0)
3501 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR   GENMASK(15, 8)
3502
3503 struct wmi_channel {
3504         u32 tlv_header;
3505         u32 mhz;
3506         u32 band_center_freq1;
3507         u32 band_center_freq2;
3508         u32 info;
3509         u32 reg_info_1;
3510         u32 reg_info_2;
3511 } __packed;
3512
3513 struct wmi_mgmt_params {
3514         void *tx_frame;
3515         u16 frm_len;
3516         u8 vdev_id;
3517         u16 chanfreq;
3518         void *pdata;
3519         u16 desc_id;
3520         u8 *macaddr;
3521 };
3522
3523 enum wmi_sta_ps_mode {
3524         WMI_STA_PS_MODE_DISABLED = 0,
3525         WMI_STA_PS_MODE_ENABLED = 1,
3526 };
3527
3528 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF
3529 #define WMI_SMPS_MASK_UPPER_3BITS 0x7
3530 #define WMI_SMPS_PARAM_VALUE_SHIFT 29
3531
3532 #define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
3533 #define ATH11K_WMI_FW_HANG_DELAY 0
3534
3535 /* type, 0:unused 1: ASSERT 2: not respond detect command
3536  * delay_time_ms, the simulate will delay time
3537  */
3538
3539 struct wmi_force_fw_hang_cmd {
3540         u32 tlv_header;
3541         u32 type;
3542         u32 delay_time_ms;
3543 };
3544
3545 struct wmi_vdev_set_param_cmd {
3546         u32 tlv_header;
3547         u32 vdev_id;
3548         u32 param_id;
3549         u32 param_value;
3550 } __packed;
3551
3552 enum wmi_stats_id {
3553         WMI_REQUEST_PEER_STAT                   = BIT(0),
3554         WMI_REQUEST_AP_STAT                     = BIT(1),
3555         WMI_REQUEST_PDEV_STAT                   = BIT(2),
3556         WMI_REQUEST_VDEV_STAT                   = BIT(3),
3557         WMI_REQUEST_BCNFLT_STAT                 = BIT(4),
3558         WMI_REQUEST_VDEV_RATE_STAT              = BIT(5),
3559         WMI_REQUEST_INST_STAT                   = BIT(6),
3560         WMI_REQUEST_MIB_STAT                    = BIT(7),
3561         WMI_REQUEST_RSSI_PER_CHAIN_STAT         = BIT(8),
3562         WMI_REQUEST_CONGESTION_STAT             = BIT(9),
3563         WMI_REQUEST_PEER_EXTD_STAT              = BIT(10),
3564         WMI_REQUEST_BCN_STAT                    = BIT(11),
3565         WMI_REQUEST_BCN_STAT_RESET              = BIT(12),
3566         WMI_REQUEST_PEER_EXTD2_STAT             = BIT(13),
3567 };
3568
3569 struct wmi_request_stats_cmd {
3570         u32 tlv_header;
3571         enum wmi_stats_id stats_id;
3572         u32 vdev_id;
3573         struct wmi_mac_addr peer_macaddr;
3574         u32 pdev_id;
3575 } __packed;
3576
3577 struct wmi_get_pdev_temperature_cmd {
3578         u32 tlv_header;
3579         u32 param;
3580         u32 pdev_id;
3581 } __packed;
3582
3583 struct wmi_ftm_seg_hdr {
3584         u32 len;
3585         u32 msgref;
3586         u32 segmentinfo;
3587         u32 pdev_id;
3588 } __packed;
3589
3590 struct wmi_ftm_cmd {
3591         u32 tlv_header;
3592         struct wmi_ftm_seg_hdr seg_hdr;
3593         u8 data[];
3594 } __packed;
3595
3596 struct wmi_ftm_event_msg {
3597         struct wmi_ftm_seg_hdr seg_hdr;
3598         u8 data[];
3599 } __packed;
3600
3601 #define WMI_P2P_MAX_NOA_DESCRIPTORS             4
3602
3603 struct wmi_p2p_noa_event {
3604         u32 vdev_id;
3605 } __packed;
3606
3607 struct ath11k_wmi_p2p_noa_descriptor {
3608         u32 type_count; /* 255: continuous schedule, 0: reserved */
3609         u32 duration;  /* Absent period duration in micro seconds */
3610         u32 interval;   /* Absent period interval in micro seconds */
3611         u32 start_time; /* 32 bit tsf time when in starts */
3612 } __packed;
3613
3614 #define WMI_P2P_NOA_INFO_CHANGED_FLAG           BIT(0)
3615 #define WMI_P2P_NOA_INFO_INDEX                  GENMASK(15, 8)
3616 #define WMI_P2P_NOA_INFO_OPP_PS                 BIT(16)
3617 #define WMI_P2P_NOA_INFO_CTWIN_TU               GENMASK(23, 17)
3618 #define WMI_P2P_NOA_INFO_DESC_NUM               GENMASK(31, 24)
3619
3620 struct ath11k_wmi_p2p_noa_info {
3621         /* Bit 0 - Flag to indicate an update in NOA schedule
3622          * Bits 7-1 - Reserved
3623          * Bits 15-8 - Index (identifies the instance of NOA sub element)
3624          * Bit  16 - Opp PS state of the AP
3625          * Bits 23-17 -  Ctwindow in TUs
3626          * Bits 31-24 -  Number of NOA descriptors
3627          */
3628         u32 noa_attr;
3629         struct ath11k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
3630 } __packed;
3631
3632 #define WMI_BEACON_TX_BUFFER_SIZE       512
3633
3634 #define WMI_EMA_TMPL_IDX_SHIFT            8
3635 #define WMI_EMA_FIRST_TMPL_SHIFT          16
3636 #define WMI_EMA_LAST_TMPL_SHIFT           24
3637
3638 struct wmi_bcn_tmpl_cmd {
3639         u32 tlv_header;
3640         u32 vdev_id;
3641         u32 tim_ie_offset;
3642         u32 buf_len;
3643         u32 csa_switch_count_offset;
3644         u32 ext_csa_switch_count_offset;
3645         u32 csa_event_bitmap;
3646         u32 mbssid_ie_offset;
3647         u32 esp_ie_offset;
3648         u32 csc_switch_count_offset;
3649         u32 csc_event_bitmap;
3650         u32 mu_edca_ie_offset;
3651         u32 feature_enable_bitmap;
3652         u32 ema_params;
3653 } __packed;
3654
3655 struct wmi_p2p_go_set_beacon_ie_cmd {
3656         u32 tlv_header;
3657         u32 vdev_id;
3658         u32 ie_buf_len;
3659         u8 tlv[];
3660 } __packed;
3661
3662 struct wmi_key_seq_counter {
3663         u32 key_seq_counter_l;
3664         u32 key_seq_counter_h;
3665 } __packed;
3666
3667 struct wmi_vdev_install_key_cmd {
3668         u32 tlv_header;
3669         u32 vdev_id;
3670         struct wmi_mac_addr peer_macaddr;
3671         u32 key_idx;
3672         u32 key_flags;
3673         u32 key_cipher;
3674         struct wmi_key_seq_counter key_rsc_counter;
3675         struct wmi_key_seq_counter key_global_rsc_counter;
3676         struct wmi_key_seq_counter key_tsc_counter;
3677         u8 wpi_key_rsc_counter[16];
3678         u8 wpi_key_tsc_counter[16];
3679         u32 key_len;
3680         u32 key_txmic_len;
3681         u32 key_rxmic_len;
3682         u32 is_group_key_id_valid;
3683         u32 group_key_id;
3684
3685         /* Followed by key_data containing key followed by
3686          * tx mic and then rx mic
3687          */
3688 } __packed;
3689
3690 struct wmi_vdev_install_key_arg {
3691         u32 vdev_id;
3692         const u8 *macaddr;
3693         u32 key_idx;
3694         u32 key_flags;
3695         u32 key_cipher;
3696         u32 key_len;
3697         u32 key_txmic_len;
3698         u32 key_rxmic_len;
3699         u64 key_rsc_counter;
3700         const void *key_data;
3701 };
3702
3703 #define WMI_MAX_SUPPORTED_RATES                 128
3704 #define WMI_HOST_MAX_HECAP_PHY_SIZE             3
3705 #define WMI_HOST_MAX_HE_RATE_SET                3
3706 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80           0
3707 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160          1
3708 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80        2
3709
3710 struct wmi_rate_set_arg {
3711         u32 num_rates;
3712         u8 rates[WMI_MAX_SUPPORTED_RATES];
3713 };
3714
3715 struct peer_assoc_params {
3716         struct wmi_mac_addr peer_macaddr;
3717         u32 vdev_id;
3718         u32 peer_new_assoc;
3719         u32 peer_associd;
3720         u32 peer_flags;
3721         u32 peer_caps;
3722         u32 peer_listen_intval;
3723         u32 peer_ht_caps;
3724         u32 peer_max_mpdu;
3725         u32 peer_mpdu_density;
3726         u32 peer_rate_caps;
3727         u32 peer_nss;
3728         u32 peer_vht_caps;
3729         u32 peer_phymode;
3730         u32 peer_ht_info[2];
3731         struct wmi_rate_set_arg peer_legacy_rates;
3732         struct wmi_rate_set_arg peer_ht_rates;
3733         u32 rx_max_rate;
3734         u32 rx_mcs_set;
3735         u32 tx_max_rate;
3736         u32 tx_mcs_set;
3737         u8 vht_capable;
3738         u8 min_data_rate;
3739         u32 tx_max_mcs_nss;
3740         u32 peer_bw_rxnss_override;
3741         bool is_pmf_enabled;
3742         bool is_wme_set;
3743         bool qos_flag;
3744         bool apsd_flag;
3745         bool ht_flag;
3746         bool bw_40;
3747         bool bw_80;
3748         bool bw_160;
3749         bool stbc_flag;
3750         bool ldpc_flag;
3751         bool static_mimops_flag;
3752         bool dynamic_mimops_flag;
3753         bool spatial_mux_flag;
3754         bool vht_flag;
3755         bool vht_ng_flag;
3756         bool need_ptk_4_way;
3757         bool need_gtk_2_way;
3758         bool auth_flag;
3759         bool safe_mode_enabled;
3760         bool amsdu_disable;
3761         /* Use common structure */
3762         u8 peer_mac[ETH_ALEN];
3763
3764         bool he_flag;
3765         u32 peer_he_cap_macinfo[2];
3766         u32 peer_he_cap_macinfo_internal;
3767         u32 peer_he_caps_6ghz;
3768         u32 peer_he_ops;
3769         u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
3770         u32 peer_he_mcs_count;
3771         u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3772         u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
3773         bool twt_responder;
3774         bool twt_requester;
3775         bool is_assoc;
3776         struct ath11k_ppe_threshold peer_ppet;
3777 };
3778
3779 struct  wmi_peer_assoc_complete_cmd {
3780         u32 tlv_header;
3781         struct wmi_mac_addr peer_macaddr;
3782         u32 vdev_id;
3783         u32 peer_new_assoc;
3784         u32 peer_associd;
3785         u32 peer_flags;
3786         u32 peer_caps;
3787         u32 peer_listen_intval;
3788         u32 peer_ht_caps;
3789         u32 peer_max_mpdu;
3790         u32 peer_mpdu_density;
3791         u32 peer_rate_caps;
3792         u32 peer_nss;
3793         u32 peer_vht_caps;
3794         u32 peer_phymode;
3795         u32 peer_ht_info[2];
3796         u32 num_peer_legacy_rates;
3797         u32 num_peer_ht_rates;
3798         u32 peer_bw_rxnss_override;
3799         struct  wmi_ppe_threshold peer_ppet;
3800         u32 peer_he_cap_info;
3801         u32 peer_he_ops;
3802         u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
3803         u32 peer_he_mcs;
3804         u32 peer_he_cap_info_ext;
3805         u32 peer_he_cap_info_internal;
3806         u32 min_data_rate;
3807         u32 peer_he_caps_6ghz;
3808 } __packed;
3809
3810 struct wmi_stop_scan_cmd {
3811         u32 tlv_header;
3812         u32 requestor;
3813         u32 scan_id;
3814         u32 req_type;
3815         u32 vdev_id;
3816         u32 pdev_id;
3817 };
3818
3819 struct scan_chan_list_params {
3820         u32 pdev_id;
3821         u16 nallchans;
3822         struct channel_param ch_param[];
3823 };
3824
3825 struct wmi_scan_chan_list_cmd {
3826         u32 tlv_header;
3827         u32 num_scan_chans;
3828         u32 flags;
3829         u32 pdev_id;
3830 } __packed;
3831
3832 struct wmi_scan_prob_req_oui_cmd {
3833         u32 tlv_header;
3834         u32 prob_req_oui;
3835 }  __packed;
3836
3837 #define WMI_MGMT_SEND_DOWNLD_LEN        64
3838
3839 #define WMI_TX_PARAMS_DWORD0_POWER              GENMASK(7, 0)
3840 #define WMI_TX_PARAMS_DWORD0_MCS_MASK           GENMASK(19, 8)
3841 #define WMI_TX_PARAMS_DWORD0_NSS_MASK           GENMASK(27, 20)
3842 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT        GENMASK(31, 28)
3843
3844 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK         GENMASK(7, 0)
3845 #define WMI_TX_PARAMS_DWORD1_BW_MASK            GENMASK(14, 8)
3846 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE      GENMASK(19, 15)
3847 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE         BIT(20)
3848 #define WMI_TX_PARAMS_DWORD1_RSVD               GENMASK(31, 21)
3849
3850 struct wmi_mgmt_send_params {
3851         u32 tlv_header;
3852         u32 tx_params_dword0;
3853         u32 tx_params_dword1;
3854 };
3855
3856 struct wmi_mgmt_send_cmd {
3857         u32 tlv_header;
3858         u32 vdev_id;
3859         u32 desc_id;
3860         u32 chanfreq;
3861         u32 paddr_lo;
3862         u32 paddr_hi;
3863         u32 frame_len;
3864         u32 buf_len;
3865         u32 tx_params_valid;
3866
3867         /* This TLV is followed by struct wmi_mgmt_frame */
3868
3869         /* Followed by struct wmi_mgmt_send_params */
3870 } __packed;
3871
3872 struct wmi_sta_powersave_mode_cmd {
3873         u32 tlv_header;
3874         u32 vdev_id;
3875         u32 sta_ps_mode;
3876 };
3877
3878 struct wmi_sta_smps_force_mode_cmd {
3879         u32 tlv_header;
3880         u32 vdev_id;
3881         u32 forced_mode;
3882 };
3883
3884 struct wmi_sta_smps_param_cmd {
3885         u32 tlv_header;
3886         u32 vdev_id;
3887         u32 param;
3888         u32 value;
3889 };
3890
3891 struct wmi_bcn_prb_info {
3892         u32 tlv_header;
3893         u32 caps;
3894         u32 erp;
3895 } __packed;
3896
3897 enum {
3898         WMI_PDEV_SUSPEND,
3899         WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3900 };
3901
3902 struct green_ap_ps_params {
3903         u32 value;
3904 };
3905
3906 struct wmi_pdev_green_ap_ps_enable_cmd_param {
3907         u32 tlv_header;
3908         u32 pdev_id;
3909         u32 enable;
3910 };
3911
3912 struct ap_ps_params {
3913         u32 vdev_id;
3914         u32 param;
3915         u32 value;
3916 };
3917
3918 struct vdev_set_params {
3919         u32 if_id;
3920         u32 param_id;
3921         u32 param_value;
3922 };
3923
3924 struct stats_request_params {
3925         u32 stats_id;
3926         u32 vdev_id;
3927         u32 pdev_id;
3928 };
3929
3930 struct wmi_set_current_country_params {
3931         u8 alpha2[3];
3932 };
3933
3934 struct wmi_set_current_country_cmd {
3935         u32 tlv_header;
3936         u32 pdev_id;
3937         u32 new_alpha2;
3938 } __packed;
3939
3940 enum set_init_cc_type {
3941         WMI_COUNTRY_INFO_TYPE_ALPHA,
3942         WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
3943         WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
3944 };
3945
3946 enum set_init_cc_flags {
3947         INVALID_CC,
3948         CC_IS_SET,
3949         REGDMN_IS_SET,
3950         ALPHA_IS_SET,
3951 };
3952
3953 struct wmi_init_country_params {
3954         union {
3955                 u16 country_code;
3956                 u16 regdom_id;
3957                 u8 alpha2[3];
3958         } cc_info;
3959         enum set_init_cc_flags flags;
3960 };
3961
3962 struct wmi_init_country_cmd {
3963         u32 tlv_header;
3964         u32 pdev_id;
3965         u32 init_cc_type;
3966         union {
3967                 u32 country_code;
3968                 u32 regdom_id;
3969                 u32 alpha2;
3970         } cc_info;
3971 } __packed;
3972
3973 struct wmi_11d_scan_start_params {
3974         u32 vdev_id;
3975         u32 scan_period_msec;
3976         u32 start_interval_msec;
3977 };
3978
3979 struct wmi_11d_scan_start_cmd {
3980         u32 tlv_header;
3981         u32 vdev_id;
3982         u32 scan_period_msec;
3983         u32 start_interval_msec;
3984 } __packed;
3985
3986 struct wmi_11d_scan_stop_cmd {
3987         u32 tlv_header;
3988         u32 vdev_id;
3989 } __packed;
3990
3991 struct wmi_11d_new_cc_ev {
3992         u32 new_alpha2;
3993 } __packed;
3994
3995 #define THERMAL_LEVELS  1
3996 struct tt_level_config {
3997         u32 tmplwm;
3998         u32 tmphwm;
3999         u32 dcoffpercent;
4000         u32 priority;
4001 };
4002
4003 struct thermal_mitigation_params {
4004         u32 pdev_id;
4005         u32 enable;
4006         u32 dc;
4007         u32 dc_per_event;
4008         struct tt_level_config levelconf[THERMAL_LEVELS];
4009 };
4010
4011 struct wmi_therm_throt_config_request_cmd {
4012         u32 tlv_header;
4013         u32 pdev_id;
4014         u32 enable;
4015         u32 dc;
4016         u32 dc_per_event;
4017         u32 therm_throt_levels;
4018 } __packed;
4019
4020 struct wmi_therm_throt_level_config_info {
4021         u32 tlv_header;
4022         u32 temp_lwm;
4023         u32 temp_hwm;
4024         u32 dc_off_percent;
4025         u32 prio;
4026 } __packed;
4027
4028 struct wmi_delba_send_cmd {
4029         u32 tlv_header;
4030         u32 vdev_id;
4031         struct wmi_mac_addr peer_macaddr;
4032         u32 tid;
4033         u32 initiator;
4034         u32 reasoncode;
4035 } __packed;
4036
4037 struct wmi_addba_setresponse_cmd {
4038         u32 tlv_header;
4039         u32 vdev_id;
4040         struct wmi_mac_addr peer_macaddr;
4041         u32 tid;
4042         u32 statuscode;
4043 } __packed;
4044
4045 struct wmi_addba_send_cmd {
4046         u32 tlv_header;
4047         u32 vdev_id;
4048         struct wmi_mac_addr peer_macaddr;
4049         u32 tid;
4050         u32 buffersize;
4051 } __packed;
4052
4053 struct wmi_addba_clear_resp_cmd {
4054         u32 tlv_header;
4055         u32 vdev_id;
4056         struct wmi_mac_addr peer_macaddr;
4057 } __packed;
4058
4059 struct wmi_pdev_pktlog_filter_info {
4060         u32 tlv_header;
4061         struct wmi_mac_addr peer_macaddr;
4062 } __packed;
4063
4064 struct wmi_pdev_pktlog_filter_cmd {
4065         u32 tlv_header;
4066         u32 pdev_id;
4067         u32 enable;
4068         u32 filter_type;
4069         u32 num_mac;
4070 } __packed;
4071
4072 enum ath11k_wmi_pktlog_enable {
4073         ATH11K_WMI_PKTLOG_ENABLE_AUTO  = 0,
4074         ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
4075 };
4076
4077 struct wmi_pktlog_enable_cmd {
4078         u32 tlv_header;
4079         u32 pdev_id;
4080         u32 evlist; /* WMI_PKTLOG_EVENT */
4081         u32 enable;
4082 } __packed;
4083
4084 struct wmi_pktlog_disable_cmd {
4085         u32 tlv_header;
4086         u32 pdev_id;
4087 } __packed;
4088
4089 #define DFS_PHYERR_UNIT_TEST_CMD 0
4090 #define DFS_UNIT_TEST_MODULE    0x2b
4091 #define DFS_UNIT_TEST_TOKEN     0xAA
4092
4093 enum dfs_test_args_idx {
4094         DFS_TEST_CMDID = 0,
4095         DFS_TEST_PDEV_ID,
4096         DFS_TEST_RADAR_PARAM,
4097         DFS_MAX_TEST_ARGS,
4098 };
4099
4100 struct wmi_dfs_unit_test_arg {
4101         u32 cmd_id;
4102         u32 pdev_id;
4103         u32 radar_param;
4104 };
4105
4106 struct wmi_unit_test_cmd {
4107         u32 tlv_header;
4108         u32 vdev_id;
4109         u32 module_id;
4110         u32 num_args;
4111         u32 diag_token;
4112         /* Followed by test args*/
4113 } __packed;
4114
4115 #define MAX_SUPPORTED_RATES 128
4116
4117 struct beacon_tmpl_params {
4118         u8 vdev_id;
4119         u32 tim_ie_offset;
4120         u32 tmpl_len;
4121         u32 tmpl_len_aligned;
4122         u32 csa_switch_count_offset;
4123         u32 ext_csa_switch_count_offset;
4124         u8 *frm;
4125 };
4126
4127 struct wmi_rate_set {
4128         u32 num_rates;
4129         u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
4130 };
4131
4132 struct wmi_vht_rate_set {
4133         u32 tlv_header;
4134         u32 rx_max_rate;
4135         u32 rx_mcs_set;
4136         u32 tx_max_rate;
4137         u32 tx_mcs_set;
4138         u32 tx_max_mcs_nss;
4139 } __packed;
4140
4141 struct wmi_he_rate_set {
4142         u32 tlv_header;
4143
4144         /* MCS at which the peer can receive */
4145         u32 rx_mcs_set;
4146
4147         /* MCS at which the peer can transmit */
4148         u32 tx_mcs_set;
4149 } __packed;
4150
4151 #define MAX_REG_RULES 10
4152 #define REG_ALPHA2_LEN 2
4153 #define MAX_6GHZ_REG_RULES 5
4154
4155 enum wmi_start_event_param {
4156         WMI_VDEV_START_RESP_EVENT = 0,
4157         WMI_VDEV_RESTART_RESP_EVENT,
4158 };
4159
4160 struct wmi_vdev_start_resp_event {
4161         u32 vdev_id;
4162         u32 requestor_id;
4163         enum wmi_start_event_param resp_type;
4164         u32 status;
4165         u32 chain_mask;
4166         u32 smps_mode;
4167         union {
4168                 u32 mac_id;
4169                 u32 pdev_id;
4170         };
4171         u32 cfgd_tx_streams;
4172         u32 cfgd_rx_streams;
4173         s32 max_allowed_tx_power;
4174 } __packed;
4175
4176 /* VDEV start response status codes */
4177 enum wmi_vdev_start_resp_status_code {
4178         WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
4179         WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
4180         WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
4181         WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
4182         WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
4183 };
4184
4185 /* Regaulatory Rule Flags Passed by FW */
4186 #define REGULATORY_CHAN_DISABLED     BIT(0)
4187 #define REGULATORY_CHAN_NO_IR        BIT(1)
4188 #define REGULATORY_CHAN_RADAR        BIT(3)
4189 #define REGULATORY_CHAN_NO_OFDM      BIT(6)
4190 #define REGULATORY_CHAN_INDOOR_ONLY  BIT(9)
4191
4192 #define REGULATORY_CHAN_NO_HT40      BIT(4)
4193 #define REGULATORY_CHAN_NO_80MHZ     BIT(7)
4194 #define REGULATORY_CHAN_NO_160MHZ    BIT(8)
4195 #define REGULATORY_CHAN_NO_20MHZ     BIT(11)
4196 #define REGULATORY_CHAN_NO_10MHZ     BIT(12)
4197
4198 enum wmi_reg_chan_list_cmd_type {
4199         WMI_REG_CHAN_LIST_CC_ID = 0,
4200         WMI_REG_CHAN_LIST_CC_EXT_ID = 1,
4201 };
4202
4203 enum wmi_reg_cc_setting_code {
4204         WMI_REG_SET_CC_STATUS_PASS = 0,
4205         WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
4206         WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
4207         WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
4208         WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
4209         WMI_REG_SET_CC_STATUS_FAIL = 5,
4210
4211         /* add new setting code above, update in
4212          * @enum cc_setting_code as well.
4213          * Also handle it in ath11k_wmi_cc_setting_code_to_reg()
4214          */
4215 };
4216
4217 enum cc_setting_code {
4218         REG_SET_CC_STATUS_PASS = 0,
4219         REG_CURRENT_ALPHA2_NOT_FOUND = 1,
4220         REG_INIT_ALPHA2_NOT_FOUND = 2,
4221         REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
4222         REG_SET_CC_STATUS_NO_MEMORY = 4,
4223         REG_SET_CC_STATUS_FAIL = 5,
4224
4225         /* add new setting code above, update in
4226          * @enum wmi_reg_cc_setting_code as well.
4227          * Also handle it in ath11k_cc_status_to_str()
4228          */
4229 };
4230
4231 static inline enum cc_setting_code
4232 ath11k_wmi_cc_setting_code_to_reg(enum wmi_reg_cc_setting_code status_code)
4233 {
4234         switch (status_code) {
4235         case WMI_REG_SET_CC_STATUS_PASS:
4236                 return REG_SET_CC_STATUS_PASS;
4237         case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
4238                 return REG_CURRENT_ALPHA2_NOT_FOUND;
4239         case WMI_REG_INIT_ALPHA2_NOT_FOUND:
4240                 return REG_INIT_ALPHA2_NOT_FOUND;
4241         case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
4242                 return REG_SET_CC_CHANGE_NOT_ALLOWED;
4243         case WMI_REG_SET_CC_STATUS_NO_MEMORY:
4244                 return REG_SET_CC_STATUS_NO_MEMORY;
4245         case WMI_REG_SET_CC_STATUS_FAIL:
4246                 return REG_SET_CC_STATUS_FAIL;
4247         }
4248
4249         return REG_SET_CC_STATUS_FAIL;
4250 }
4251
4252 static inline const char *ath11k_cc_status_to_str(enum cc_setting_code code)
4253 {
4254         switch (code) {
4255         case REG_SET_CC_STATUS_PASS:
4256                 return "REG_SET_CC_STATUS_PASS";
4257         case REG_CURRENT_ALPHA2_NOT_FOUND:
4258                 return "REG_CURRENT_ALPHA2_NOT_FOUND";
4259         case REG_INIT_ALPHA2_NOT_FOUND:
4260                 return "REG_INIT_ALPHA2_NOT_FOUND";
4261         case REG_SET_CC_CHANGE_NOT_ALLOWED:
4262                 return "REG_SET_CC_CHANGE_NOT_ALLOWED";
4263         case REG_SET_CC_STATUS_NO_MEMORY:
4264                 return "REG_SET_CC_STATUS_NO_MEMORY";
4265         case REG_SET_CC_STATUS_FAIL:
4266                 return "REG_SET_CC_STATUS_FAIL";
4267         }
4268
4269         return "Unknown CC status";
4270 }
4271
4272 enum wmi_reg_6ghz_ap_type {
4273         WMI_REG_INDOOR_AP = 0,
4274         WMI_REG_STANDARD_POWER_AP = 1,
4275         WMI_REG_VERY_LOW_POWER_AP = 2,
4276
4277         /* add AP type above, handle in ath11k_6ghz_ap_type_to_str()
4278          */
4279         WMI_REG_CURRENT_MAX_AP_TYPE,
4280         WMI_REG_MAX_AP_TYPE = 7,
4281 };
4282
4283 static inline const char *
4284 ath11k_6ghz_ap_type_to_str(enum wmi_reg_6ghz_ap_type type)
4285 {
4286         switch (type) {
4287         case WMI_REG_INDOOR_AP:
4288                 return "INDOOR AP";
4289         case WMI_REG_STANDARD_POWER_AP:
4290                 return "STANDARD POWER AP";
4291         case WMI_REG_VERY_LOW_POWER_AP:
4292                 return "VERY LOW POWER AP";
4293         case WMI_REG_CURRENT_MAX_AP_TYPE:
4294                 return "CURRENT_MAX_AP_TYPE";
4295         case WMI_REG_MAX_AP_TYPE:
4296                 return "MAX_AP_TYPE";
4297         }
4298
4299         return "unknown 6 GHz AP type";
4300 }
4301
4302 enum wmi_reg_6ghz_client_type {
4303         WMI_REG_DEFAULT_CLIENT = 0,
4304         WMI_REG_SUBORDINATE_CLIENT = 1,
4305         WMI_REG_MAX_CLIENT_TYPE = 2,
4306
4307         /* add client type above, handle it in
4308          * ath11k_6ghz_client_type_to_str()
4309          */
4310 };
4311
4312 static inline const char *
4313 ath11k_6ghz_client_type_to_str(enum wmi_reg_6ghz_client_type type)
4314 {
4315         switch (type) {
4316         case WMI_REG_DEFAULT_CLIENT:
4317                 return "DEFAULT CLIENT";
4318         case WMI_REG_SUBORDINATE_CLIENT:
4319                 return "SUBORDINATE CLIENT";
4320         case WMI_REG_MAX_CLIENT_TYPE:
4321                 return "MAX_CLIENT_TYPE";
4322         }
4323
4324         return "unknown 6 GHz client type";
4325 }
4326
4327 enum reg_subdomains_6ghz {
4328         EMPTY_6GHZ = 0x0,
4329         FCC1_CLIENT_LPI_REGULAR_6GHZ = 0x01,
4330         FCC1_CLIENT_SP_6GHZ = 0x02,
4331         FCC1_AP_LPI_6GHZ = 0x03,
4332         FCC1_CLIENT_LPI_SUBORDINATE = FCC1_AP_LPI_6GHZ,
4333         FCC1_AP_SP_6GHZ = 0x04,
4334         ETSI1_LPI_6GHZ = 0x10,
4335         ETSI1_VLP_6GHZ = 0x11,
4336         ETSI2_LPI_6GHZ = 0x12,
4337         ETSI2_VLP_6GHZ = 0x13,
4338         APL1_LPI_6GHZ = 0x20,
4339         APL1_VLP_6GHZ = 0x21,
4340
4341         /* add sub-domain above, handle it in
4342          * ath11k_sub_reg_6ghz_to_str()
4343          */
4344 };
4345
4346 static inline const char *
4347 ath11k_sub_reg_6ghz_to_str(enum reg_subdomains_6ghz sub_id)
4348 {
4349         switch (sub_id) {
4350         case EMPTY_6GHZ:
4351                 return "N/A";
4352         case FCC1_CLIENT_LPI_REGULAR_6GHZ:
4353                 return "FCC1_CLIENT_LPI_REGULAR_6GHZ";
4354         case FCC1_CLIENT_SP_6GHZ:
4355                 return "FCC1_CLIENT_SP_6GHZ";
4356         case FCC1_AP_LPI_6GHZ:
4357                 return "FCC1_AP_LPI_6GHZ/FCC1_CLIENT_LPI_SUBORDINATE";
4358         case FCC1_AP_SP_6GHZ:
4359                 return "FCC1_AP_SP_6GHZ";
4360         case ETSI1_LPI_6GHZ:
4361                 return "ETSI1_LPI_6GHZ";
4362         case ETSI1_VLP_6GHZ:
4363                 return "ETSI1_VLP_6GHZ";
4364         case ETSI2_LPI_6GHZ:
4365                 return "ETSI2_LPI_6GHZ";
4366         case ETSI2_VLP_6GHZ:
4367                 return "ETSI2_VLP_6GHZ";
4368         case APL1_LPI_6GHZ:
4369                 return "APL1_LPI_6GHZ";
4370         case APL1_VLP_6GHZ:
4371                 return "APL1_VLP_6GHZ";
4372         }
4373
4374         return "unknown sub reg id";
4375 }
4376
4377 enum reg_super_domain_6ghz {
4378         FCC1_6GHZ = 0x01,
4379         ETSI1_6GHZ = 0x02,
4380         ETSI2_6GHZ = 0x03,
4381         APL1_6GHZ = 0x04,
4382         FCC1_6GHZ_CL = 0x05,
4383
4384         /* add super domain above, handle it in
4385          * ath11k_super_reg_6ghz_to_str()
4386          */
4387 };
4388
4389 static inline const char *
4390 ath11k_super_reg_6ghz_to_str(enum reg_super_domain_6ghz domain_id)
4391 {
4392         switch (domain_id) {
4393         case FCC1_6GHZ:
4394                 return "FCC1_6GHZ";
4395         case ETSI1_6GHZ:
4396                 return "ETSI1_6GHZ";
4397         case ETSI2_6GHZ:
4398                 return "ETSI2_6GHZ";
4399         case APL1_6GHZ:
4400                 return "APL1_6GHZ";
4401         case FCC1_6GHZ_CL:
4402                 return "FCC1_6GHZ_CL";
4403         }
4404
4405         return "unknown domain id";
4406 }
4407
4408 struct cur_reg_rule {
4409         u16 start_freq;
4410         u16 end_freq;
4411         u16 max_bw;
4412         u8 reg_power;
4413         u8 ant_gain;
4414         u16 flags;
4415         bool psd_flag;
4416         s8 psd_eirp;
4417 };
4418
4419 struct cur_regulatory_info {
4420         enum cc_setting_code status_code;
4421         u8 num_phy;
4422         u8 phy_id;
4423         u16 reg_dmn_pair;
4424         u16 ctry_code;
4425         u8 alpha2[REG_ALPHA2_LEN + 1];
4426         u32 dfs_region;
4427         u32 phybitmap;
4428         u32 min_bw_2ghz;
4429         u32 max_bw_2ghz;
4430         u32 min_bw_5ghz;
4431         u32 max_bw_5ghz;
4432         u32 num_2ghz_reg_rules;
4433         u32 num_5ghz_reg_rules;
4434         struct cur_reg_rule *reg_rules_2ghz_ptr;
4435         struct cur_reg_rule *reg_rules_5ghz_ptr;
4436         bool is_ext_reg_event;
4437         enum wmi_reg_6ghz_client_type client_type;
4438         bool rnr_tpe_usable;
4439         bool unspecified_ap_usable;
4440         u8 domain_code_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4441         u8 domain_code_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4442         u32 domain_code_6ghz_super_id;
4443         u32 min_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4444         u32 max_bw_6ghz_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4445         u32 min_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4446         u32 max_bw_6ghz_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4447         u32 num_6ghz_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
4448         u32 num_6ghz_rules_client[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4449         struct cur_reg_rule *reg_rules_6ghz_ap_ptr[WMI_REG_CURRENT_MAX_AP_TYPE];
4450         struct cur_reg_rule *reg_rules_6ghz_client_ptr
4451                 [WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
4452 };
4453
4454 struct wmi_reg_chan_list_cc_event {
4455         u32 status_code;
4456         u32 phy_id;
4457         u32 alpha2;
4458         u32 num_phy;
4459         u32 country_id;
4460         u32 domain_code;
4461         u32 dfs_region;
4462         u32 phybitmap;
4463         u32 min_bw_2ghz;
4464         u32 max_bw_2ghz;
4465         u32 min_bw_5ghz;
4466         u32 max_bw_5ghz;
4467         u32 num_2ghz_reg_rules;
4468         u32 num_5ghz_reg_rules;
4469 } __packed;
4470
4471 struct wmi_regulatory_rule_struct {
4472         u32  tlv_header;
4473         u32  freq_info;
4474         u32  bw_pwr_info;
4475         u32  flag_info;
4476 };
4477
4478 #define WMI_REG_CLIENT_MAX 4
4479
4480 struct wmi_reg_chan_list_cc_ext_event {
4481         u32 status_code;
4482         u32 phy_id;
4483         u32 alpha2;
4484         u32 num_phy;
4485         u32 country_id;
4486         u32 domain_code;
4487         u32 dfs_region;
4488         u32 phybitmap;
4489         u32 min_bw_2ghz;
4490         u32 max_bw_2ghz;
4491         u32 min_bw_5ghz;
4492         u32 max_bw_5ghz;
4493         u32 num_2ghz_reg_rules;
4494         u32 num_5ghz_reg_rules;
4495         u32 client_type;
4496         u32 rnr_tpe_usable;
4497         u32 unspecified_ap_usable;
4498         u32 domain_code_6ghz_ap_lpi;
4499         u32 domain_code_6ghz_ap_sp;
4500         u32 domain_code_6ghz_ap_vlp;
4501         u32 domain_code_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4502         u32 domain_code_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4503         u32 domain_code_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4504         u32 domain_code_6ghz_super_id;
4505         u32 min_bw_6ghz_ap_sp;
4506         u32 max_bw_6ghz_ap_sp;
4507         u32 min_bw_6ghz_ap_lpi;
4508         u32 max_bw_6ghz_ap_lpi;
4509         u32 min_bw_6ghz_ap_vlp;
4510         u32 max_bw_6ghz_ap_vlp;
4511         u32 min_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4512         u32 max_bw_6ghz_client_sp[WMI_REG_CLIENT_MAX];
4513         u32 min_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4514         u32 max_bw_6ghz_client_lpi[WMI_REG_CLIENT_MAX];
4515         u32 min_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4516         u32 max_bw_6ghz_client_vlp[WMI_REG_CLIENT_MAX];
4517         u32 num_6ghz_reg_rules_ap_sp;
4518         u32 num_6ghz_reg_rules_ap_lpi;
4519         u32 num_6ghz_reg_rules_ap_vlp;
4520         u32 num_6ghz_reg_rules_client_sp[WMI_REG_CLIENT_MAX];
4521         u32 num_6ghz_reg_rules_client_lpi[WMI_REG_CLIENT_MAX];
4522         u32 num_6ghz_reg_rules_client_vlp[WMI_REG_CLIENT_MAX];
4523 } __packed;
4524
4525 struct wmi_regulatory_ext_rule {
4526         u32 tlv_header;
4527         u32 freq_info;
4528         u32 bw_pwr_info;
4529         u32 flag_info;
4530         u32 psd_power_info;
4531 } __packed;
4532
4533 struct wmi_vdev_delete_resp_event {
4534         u32 vdev_id;
4535 } __packed;
4536
4537 struct wmi_peer_delete_resp_event {
4538         u32 vdev_id;
4539         struct wmi_mac_addr peer_macaddr;
4540 } __packed;
4541
4542 struct wmi_bcn_tx_status_event {
4543         u32 vdev_id;
4544         u32 tx_status;
4545 } __packed;
4546
4547 struct wmi_vdev_stopped_event {
4548         u32 vdev_id;
4549 } __packed;
4550
4551 struct wmi_pdev_bss_chan_info_event {
4552         u32 freq;       /* Units in MHz */
4553         u32 noise_floor;        /* units are dBm */
4554         /* rx clear - how often the channel was unused */
4555         u32 rx_clear_count_low;
4556         u32 rx_clear_count_high;
4557         /* cycle count - elapsed time during measured period, in clock ticks */
4558         u32 cycle_count_low;
4559         u32 cycle_count_high;
4560         /* tx cycle count - elapsed time spent in tx, in clock ticks */
4561         u32 tx_cycle_count_low;
4562         u32 tx_cycle_count_high;
4563         /* rx cycle count - elapsed time spent in rx, in clock ticks */
4564         u32 rx_cycle_count_low;
4565         u32 rx_cycle_count_high;
4566         /*rx_cycle cnt for my bss in 64bits format */
4567         u32 rx_bss_cycle_count_low;
4568         u32 rx_bss_cycle_count_high;
4569         u32 pdev_id;
4570 } __packed;
4571
4572 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
4573
4574 struct wmi_vdev_install_key_compl_event {
4575         u32 vdev_id;
4576         struct wmi_mac_addr peer_macaddr;
4577         u32 key_idx;
4578         u32 key_flags;
4579         u32 status;
4580 } __packed;
4581
4582 struct wmi_vdev_install_key_complete_arg {
4583         u32 vdev_id;
4584         const u8 *macaddr;
4585         u32 key_idx;
4586         u32 key_flags;
4587         u32 status;
4588 };
4589
4590 struct wmi_peer_assoc_conf_event {
4591         u32 vdev_id;
4592         struct wmi_mac_addr peer_macaddr;
4593 } __packed;
4594
4595 struct wmi_peer_assoc_conf_arg {
4596         u32 vdev_id;
4597         const u8 *macaddr;
4598 };
4599
4600 struct wmi_fils_discovery_event {
4601         u32 vdev_id;
4602         u32 fils_tt;
4603         u32 tbtt;
4604 } __packed;
4605
4606 struct wmi_probe_resp_tx_status_event {
4607         u32 vdev_id;
4608         u32 tx_status;
4609 } __packed;
4610
4611 /*
4612  * PDEV statistics
4613  */
4614 struct wmi_pdev_stats_base {
4615         s32 chan_nf;
4616         u32 tx_frame_count; /* Cycles spent transmitting frames */
4617         u32 rx_frame_count; /* Cycles spent receiving frames */
4618         u32 rx_clear_count; /* Total channel busy time, evidently */
4619         u32 cycle_count; /* Total on-channel time */
4620         u32 phy_err_count;
4621         u32 chan_tx_pwr;
4622 } __packed;
4623
4624 struct wmi_pdev_stats_extra {
4625         u32 ack_rx_bad;
4626         u32 rts_bad;
4627         u32 rts_good;
4628         u32 fcs_bad;
4629         u32 no_beacons;
4630         u32 mib_int_count;
4631 } __packed;
4632
4633 struct wmi_pdev_stats_tx {
4634         /* Num HTT cookies queued to dispatch list */
4635         s32 comp_queued;
4636
4637         /* Num HTT cookies dispatched */
4638         s32 comp_delivered;
4639
4640         /* Num MSDU queued to WAL */
4641         s32 msdu_enqued;
4642
4643         /* Num MPDU queue to WAL */
4644         s32 mpdu_enqued;
4645
4646         /* Num MSDUs dropped by WMM limit */
4647         s32 wmm_drop;
4648
4649         /* Num Local frames queued */
4650         s32 local_enqued;
4651
4652         /* Num Local frames done */
4653         s32 local_freed;
4654
4655         /* Num queued to HW */
4656         s32 hw_queued;
4657
4658         /* Num PPDU reaped from HW */
4659         s32 hw_reaped;
4660
4661         /* Num underruns */
4662         s32 underrun;
4663
4664         /* Num hw paused */
4665         u32 hw_paused;
4666
4667         /* Num PPDUs cleaned up in TX abort */
4668         s32 tx_abort;
4669
4670         /* Num MPDUs requeued by SW */
4671         s32 mpdus_requeued;
4672
4673         /* excessive retries */
4674         u32 tx_ko;
4675
4676         u32 tx_xretry;
4677
4678         /* data hw rate code */
4679         u32 data_rc;
4680
4681         /* Scheduler self triggers */
4682         u32 self_triggers;
4683
4684         /* frames dropped due to excessive sw retries */
4685         u32 sw_retry_failure;
4686
4687         /* illegal rate phy errors  */
4688         u32 illgl_rate_phy_err;
4689
4690         /* wal pdev continuous xretry */
4691         u32 pdev_cont_xretry;
4692
4693         /* wal pdev tx timeouts */
4694         u32 pdev_tx_timeout;
4695
4696         /* wal pdev resets  */
4697         u32 pdev_resets;
4698
4699         /* frames dropped due to non-availability of stateless TIDs */
4700         u32 stateless_tid_alloc_failure;
4701
4702         /* PhY/BB underrun */
4703         u32 phy_underrun;
4704
4705         /* MPDU is more than txop limit */
4706         u32 txop_ovf;
4707
4708         /* Num sequences posted */
4709         u32 seq_posted;
4710
4711         /* Num sequences failed in queueing */
4712         u32 seq_failed_queueing;
4713
4714         /* Num sequences completed */
4715         u32 seq_completed;
4716
4717         /* Num sequences restarted */
4718         u32 seq_restarted;
4719
4720         /* Num of MU sequences posted */
4721         u32 mu_seq_posted;
4722
4723         /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
4724          * (Reset,channel change)
4725          */
4726         s32 mpdus_sw_flush;
4727
4728         /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
4729         s32 mpdus_hw_filter;
4730
4731         /* Num MPDUs truncated by PDG (TXOP, TBTT,
4732          * PPDU_duration based on rate, dyn_bw)
4733          */
4734         s32 mpdus_truncated;
4735
4736         /* Num MPDUs that was tried but didn't receive ACK or BA */
4737         s32 mpdus_ack_failed;
4738
4739         /* Num MPDUs that was dropped du to expiry. */
4740         s32 mpdus_expired;
4741 } __packed;
4742
4743 struct wmi_pdev_stats_rx {
4744         /* Cnts any change in ring routing mid-ppdu */
4745         s32 mid_ppdu_route_change;
4746
4747         /* Total number of statuses processed */
4748         s32 status_rcvd;
4749
4750         /* Extra frags on rings 0-3 */
4751         s32 r0_frags;
4752         s32 r1_frags;
4753         s32 r2_frags;
4754         s32 r3_frags;
4755
4756         /* MSDUs / MPDUs delivered to HTT */
4757         s32 htt_msdus;
4758         s32 htt_mpdus;
4759
4760         /* MSDUs / MPDUs delivered to local stack */
4761         s32 loc_msdus;
4762         s32 loc_mpdus;
4763
4764         /* AMSDUs that have more MSDUs than the status ring size */
4765         s32 oversize_amsdu;
4766
4767         /* Number of PHY errors */
4768         s32 phy_errs;
4769
4770         /* Number of PHY errors drops */
4771         s32 phy_err_drop;
4772
4773         /* Number of mpdu errors - FCS, MIC, ENC etc. */
4774         s32 mpdu_errs;
4775
4776         /* Num overflow errors */
4777         s32 rx_ovfl_errs;
4778 } __packed;
4779
4780 struct wmi_pdev_stats {
4781         struct wmi_pdev_stats_base base;
4782         struct wmi_pdev_stats_tx tx;
4783         struct wmi_pdev_stats_rx rx;
4784 } __packed;
4785
4786 #define WLAN_MAX_AC 4
4787 #define MAX_TX_RATE_VALUES 10
4788 #define MAX_TX_RATE_VALUES 10
4789
4790 struct wmi_vdev_stats {
4791         u32 vdev_id;
4792         u32 beacon_snr;
4793         u32 data_snr;
4794         u32 num_tx_frames[WLAN_MAX_AC];
4795         u32 num_rx_frames;
4796         u32 num_tx_frames_retries[WLAN_MAX_AC];
4797         u32 num_tx_frames_failures[WLAN_MAX_AC];
4798         u32 num_rts_fail;
4799         u32 num_rts_success;
4800         u32 num_rx_err;
4801         u32 num_rx_discard;
4802         u32 num_tx_not_acked;
4803         u32 tx_rate_history[MAX_TX_RATE_VALUES];
4804         u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
4805 } __packed;
4806
4807 struct wmi_bcn_stats {
4808         u32 vdev_id;
4809         u32 tx_bcn_succ_cnt;
4810         u32 tx_bcn_outage_cnt;
4811 } __packed;
4812
4813 struct wmi_stats_event {
4814         u32 stats_id;
4815         u32 num_pdev_stats;
4816         u32 num_vdev_stats;
4817         u32 num_peer_stats;
4818         u32 num_bcnflt_stats;
4819         u32 num_chan_stats;
4820         u32 num_mib_stats;
4821         u32 pdev_id;
4822         u32 num_bcn_stats;
4823         u32 num_peer_extd_stats;
4824         u32 num_peer_extd2_stats;
4825 } __packed;
4826
4827 struct wmi_rssi_stats {
4828         u32 vdev_id;
4829         u32 rssi_avg_beacon[WMI_MAX_CHAINS];
4830         u32 rssi_avg_data[WMI_MAX_CHAINS];
4831         struct wmi_mac_addr peer_macaddr;
4832 } __packed;
4833
4834 struct wmi_per_chain_rssi_stats {
4835         u32 num_per_chain_rssi_stats;
4836 } __packed;
4837
4838 struct wmi_pdev_ctl_failsafe_chk_event {
4839         u32 pdev_id;
4840         u32 ctl_failsafe_status;
4841 } __packed;
4842
4843 struct wmi_pdev_csa_switch_ev {
4844         u32 pdev_id;
4845         u32 current_switch_count;
4846         u32 num_vdevs;
4847 } __packed;
4848
4849 struct wmi_pdev_radar_ev {
4850         u32 pdev_id;
4851         u32 detection_mode;
4852         u32 chan_freq;
4853         u32 chan_width;
4854         u32 detector_id;
4855         u32 segment_id;
4856         u32 timestamp;
4857         u32 is_chirp;
4858         s32 freq_offset;
4859         s32 sidx;
4860 } __packed;
4861
4862 struct wmi_pdev_temperature_event {
4863         /* temperature value in Celsius degree */
4864         s32 temp;
4865         u32 pdev_id;
4866 } __packed;
4867
4868 #define WMI_RX_STATUS_OK                        0x00
4869 #define WMI_RX_STATUS_ERR_CRC                   0x01
4870 #define WMI_RX_STATUS_ERR_DECRYPT               0x08
4871 #define WMI_RX_STATUS_ERR_MIC                   0x10
4872 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS        0x20
4873
4874 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
4875
4876 struct mgmt_rx_event_params {
4877         u32 chan_freq;
4878         u32 channel;
4879         u32 snr;
4880         u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
4881         u32 rate;
4882         enum wmi_phy_mode phy_mode;
4883         u32 buf_len;
4884         int status;
4885         u32 flags;
4886         int rssi;
4887         u32 tsf_delta;
4888         u8 pdev_id;
4889 };
4890
4891 #define ATH_MAX_ANTENNA 4
4892
4893 struct wmi_mgmt_rx_hdr {
4894         u32 channel;
4895         u32 snr;
4896         u32 rate;
4897         u32 phy_mode;
4898         u32 buf_len;
4899         u32 status;
4900         u32 rssi_ctl[ATH_MAX_ANTENNA];
4901         u32 flags;
4902         int rssi;
4903         u32 tsf_delta;
4904         u32 rx_tsf_l32;
4905         u32 rx_tsf_u32;
4906         u32 pdev_id;
4907         u32 chan_freq;
4908 } __packed;
4909
4910 #define MAX_ANTENNA_EIGHT 8
4911
4912 struct wmi_rssi_ctl_ext {
4913         u32 tlv_header;
4914         u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
4915 };
4916
4917 struct wmi_mgmt_tx_compl_event {
4918         u32 desc_id;
4919         u32 status;
4920         u32 pdev_id;
4921         u32 ppdu_id;
4922         u32 ack_rssi;
4923 } __packed;
4924
4925 struct wmi_scan_event {
4926         u32 event_type; /* %WMI_SCAN_EVENT_ */
4927         u32 reason; /* %WMI_SCAN_REASON_ */
4928         u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
4929         u32 scan_req_id;
4930         u32 scan_id;
4931         u32 vdev_id;
4932         /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
4933          * In case of AP it is TSF of the AP vdev
4934          * In case of STA connected state, this is the TSF of the AP
4935          * In case of STA not connected, it will be the free running HW timer
4936          */
4937         u32 tsf_timestamp;
4938 } __packed;
4939
4940 struct wmi_peer_sta_kickout_arg {
4941         const u8 *mac_addr;
4942 };
4943
4944 struct wmi_peer_sta_kickout_event {
4945         struct wmi_mac_addr peer_macaddr;
4946 } __packed;
4947
4948 enum wmi_roam_reason {
4949         WMI_ROAM_REASON_BETTER_AP = 1,
4950         WMI_ROAM_REASON_BEACON_MISS = 2,
4951         WMI_ROAM_REASON_LOW_RSSI = 3,
4952         WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
4953         WMI_ROAM_REASON_HO_FAILED = 5,
4954
4955         /* keep last */
4956         WMI_ROAM_REASON_MAX,
4957 };
4958
4959 struct wmi_roam_event {
4960         u32 vdev_id;
4961         u32 reason;
4962         u32 rssi;
4963 } __packed;
4964
4965 #define WMI_CHAN_INFO_START_RESP 0
4966 #define WMI_CHAN_INFO_END_RESP 1
4967
4968 struct wmi_chan_info_event {
4969         u32 err_code;
4970         u32 freq;
4971         u32 cmd_flags;
4972         u32 noise_floor;
4973         u32 rx_clear_count;
4974         u32 cycle_count;
4975         u32 chan_tx_pwr_range;
4976         u32 chan_tx_pwr_tp;
4977         u32 rx_frame_count;
4978         u32 my_bss_rx_cycle_count;
4979         u32 rx_11b_mode_data_duration;
4980         u32 tx_frame_cnt;
4981         u32 mac_clk_mhz;
4982         u32 vdev_id;
4983 } __packed;
4984
4985 struct ath11k_targ_cap {
4986         u32 phy_capability;
4987         u32 max_frag_entry;
4988         u32 num_rf_chains;
4989         u32 ht_cap_info;
4990         u32 vht_cap_info;
4991         u32 vht_supp_mcs;
4992         u32 hw_min_tx_power;
4993         u32 hw_max_tx_power;
4994         u32 sys_cap_info;
4995         u32 min_pkt_size_enable;
4996         u32 max_bcn_ie_size;
4997         u32 max_num_scan_channels;
4998         u32 max_supported_macs;
4999         u32 wmi_fw_sub_feat_caps;
5000         u32 txrx_chainmask;
5001         u32 default_dbs_hw_mode_index;
5002         u32 num_msdu_desc;
5003 };
5004
5005 enum wmi_vdev_type {
5006         WMI_VDEV_TYPE_UNSPEC =  0,
5007         WMI_VDEV_TYPE_AP      = 1,
5008         WMI_VDEV_TYPE_STA     = 2,
5009         WMI_VDEV_TYPE_IBSS    = 3,
5010         WMI_VDEV_TYPE_MONITOR = 4,
5011 };
5012
5013 enum wmi_vdev_subtype {
5014         WMI_VDEV_SUBTYPE_NONE,
5015         WMI_VDEV_SUBTYPE_P2P_DEVICE,
5016         WMI_VDEV_SUBTYPE_P2P_CLIENT,
5017         WMI_VDEV_SUBTYPE_P2P_GO,
5018         WMI_VDEV_SUBTYPE_PROXY_STA,
5019         WMI_VDEV_SUBTYPE_MESH_NON_11S,
5020         WMI_VDEV_SUBTYPE_MESH_11S,
5021 };
5022
5023 enum wmi_sta_powersave_param {
5024         WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5025         WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5026         WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5027         WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5028         WMI_STA_PS_PARAM_UAPSD = 4,
5029 };
5030
5031 #define WMI_UAPSD_AC_TYPE_DELI 0
5032 #define WMI_UAPSD_AC_TYPE_TRIG 1
5033
5034 #define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5035         ((type ==  WMI_UAPSD_AC_TYPE_DELI) ? \
5036          (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
5037
5038 enum wmi_sta_ps_param_uapsd {
5039         WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5040         WMI_STA_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
5041         WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5042         WMI_STA_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
5043         WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5044         WMI_STA_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
5045         WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5046         WMI_STA_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
5047 };
5048
5049 #define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5050
5051 struct wmi_sta_uapsd_auto_trig_param {
5052         u32 wmm_ac;
5053         u32 user_priority;
5054         u32 service_interval;
5055         u32 suspend_interval;
5056         u32 delay_interval;
5057 };
5058
5059 struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5060         u32 vdev_id;
5061         struct wmi_mac_addr peer_macaddr;
5062         u32 num_ac;
5063 };
5064
5065 struct wmi_sta_uapsd_auto_trig_arg {
5066         u32 wmm_ac;
5067         u32 user_priority;
5068         u32 service_interval;
5069         u32 suspend_interval;
5070         u32 delay_interval;
5071 };
5072
5073 enum wmi_sta_ps_param_tx_wake_threshold {
5074         WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5075         WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5076
5077         /* Values greater than one indicate that many TX attempts per beacon
5078          * interval before the STA will wake up
5079          */
5080 };
5081
5082 /* The maximum number of PS-Poll frames the FW will send in response to
5083  * traffic advertised in TIM before waking up (by sending a null frame with PS
5084  * = 0). Value 0 has a special meaning: there is no maximum count and the FW
5085  * will send as many PS-Poll as are necessary to retrieve buffered BU. This
5086  * parameter is used when the RX wake policy is
5087  * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
5088  * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
5089  */
5090 enum wmi_sta_ps_param_pspoll_count {
5091         WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5092         /* Values greater than 0 indicate the maximum number of PS-Poll frames
5093          * FW will send before waking up.
5094          */
5095 };
5096
5097 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */
5098 enum wmi_ap_ps_param_uapsd {
5099         WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5100         WMI_AP_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
5101         WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5102         WMI_AP_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
5103         WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5104         WMI_AP_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
5105         WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5106         WMI_AP_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
5107 };
5108
5109 /* U-APSD maximum service period of peer station */
5110 enum wmi_ap_ps_peer_param_max_sp {
5111         WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5112         WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5113         WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5114         WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5115         MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5116 };
5117
5118 enum wmi_ap_ps_peer_param {
5119         /** Set uapsd configuration for a given peer.
5120          *
5121          * This include the delivery and trigger enabled state for each AC.
5122          * The host MLME needs to set this based on AP capability and stations
5123          * request Set in the association request  received from the station.
5124          *
5125          * Lower 8 bits of the value specify the UAPSD configuration.
5126          *
5127          * (see enum wmi_ap_ps_param_uapsd)
5128          * The default value is 0.
5129          */
5130         WMI_AP_PS_PEER_PARAM_UAPSD = 0,
5131
5132         /**
5133          * Set the service period for a UAPSD capable station
5134          *
5135          * The service period from wme ie in the (re)assoc request frame.
5136          *
5137          * (see enum wmi_ap_ps_peer_param_max_sp)
5138          */
5139         WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
5140
5141         /** Time in seconds for aging out buffered frames
5142          * for STA in power save
5143          */
5144         WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
5145
5146         /** Specify frame types that are considered SIFS
5147          * RESP trigger frame
5148          */
5149         WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
5150
5151         /** Specifies the trigger state of TID.
5152          * Valid only for UAPSD frame type
5153          */
5154         WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
5155
5156         /* Specifies the WNM sleep state of a STA */
5157         WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
5158 };
5159
5160 #define DISABLE_SIFS_RESPONSE_TRIGGER 0
5161
5162 #define WMI_MAX_KEY_INDEX   3
5163 #define WMI_MAX_KEY_LEN     32
5164
5165 #define WMI_KEY_PAIRWISE 0x00
5166 #define WMI_KEY_GROUP    0x01
5167
5168 #define WMI_CIPHER_NONE     0x0 /* clear key */
5169 #define WMI_CIPHER_WEP      0x1
5170 #define WMI_CIPHER_TKIP     0x2
5171 #define WMI_CIPHER_AES_OCB  0x3
5172 #define WMI_CIPHER_AES_CCM  0x4
5173 #define WMI_CIPHER_WAPI     0x5
5174 #define WMI_CIPHER_CKIP     0x6
5175 #define WMI_CIPHER_AES_CMAC 0x7
5176 #define WMI_CIPHER_ANY      0x8
5177 #define WMI_CIPHER_AES_GCM  0x9
5178 #define WMI_CIPHER_AES_GMAC 0xa
5179
5180 /* Value to disable fixed rate setting */
5181 #define WMI_FIXED_RATE_NONE     (0xffff)
5182
5183 #define ATH11K_RC_VERSION_OFFSET        28
5184 #define ATH11K_RC_PREAMBLE_OFFSET       8
5185 #define ATH11K_RC_NSS_OFFSET            5
5186
5187 #define ATH11K_HW_RATE_CODE(rate, nss, preamble)        \
5188         ((1 << ATH11K_RC_VERSION_OFFSET) |              \
5189          ((nss) << ATH11K_RC_NSS_OFFSET) |              \
5190          ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) |    \
5191          (rate))
5192
5193 /* Preamble types to be used with VDEV fixed rate configuration */
5194 enum wmi_rate_preamble {
5195         WMI_RATE_PREAMBLE_OFDM,
5196         WMI_RATE_PREAMBLE_CCK,
5197         WMI_RATE_PREAMBLE_HT,
5198         WMI_RATE_PREAMBLE_VHT,
5199         WMI_RATE_PREAMBLE_HE,
5200 };
5201
5202 /**
5203  * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
5204  * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled.
5205  * @WMI_USE_RTS_CTS: RTS/CTS Enabled.
5206  * @WMI_USE_CTS2SELF: CTS to self protection Enabled.
5207  */
5208 enum wmi_rtscts_prot_mode {
5209         WMI_RTS_CTS_DISABLED = 0,
5210         WMI_USE_RTS_CTS = 1,
5211         WMI_USE_CTS2SELF = 2,
5212 };
5213
5214 /**
5215  * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
5216  *                           protection mode.
5217  * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS
5218  * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS
5219  * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS,
5220  *                                but if there's a sw retry, both the rate
5221  *                                series will use RTS-CTS.
5222  * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU.
5223  * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series.
5224  */
5225 enum wmi_rtscts_profile {
5226         WMI_RTSCTS_FOR_NO_RATESERIES = 0,
5227         WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
5228         WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
5229         WMI_RTSCTS_ERP = 3,
5230         WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
5231 };
5232
5233 struct ath11k_hal_reg_cap {
5234         u32 eeprom_rd;
5235         u32 eeprom_rd_ext;
5236         u32 regcap1;
5237         u32 regcap2;
5238         u32 wireless_modes;
5239         u32 low_2ghz_chan;
5240         u32 high_2ghz_chan;
5241         u32 low_5ghz_chan;
5242         u32 high_5ghz_chan;
5243 };
5244
5245 struct ath11k_mem_chunk {
5246         void *vaddr;
5247         dma_addr_t paddr;
5248         u32 len;
5249         u32 req_id;
5250 };
5251
5252 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
5253
5254 enum wmi_sta_ps_param_rx_wake_policy {
5255         WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5256         WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5257 };
5258
5259 /* Do not change existing values! Used by ath11k_frame_mode parameter
5260  * module parameter.
5261  */
5262 enum ath11k_hw_txrx_mode {
5263         ATH11K_HW_TXRX_RAW = 0,
5264         ATH11K_HW_TXRX_NATIVE_WIFI = 1,
5265         ATH11K_HW_TXRX_ETHERNET = 2,
5266 };
5267
5268 struct wmi_wmm_params {
5269         u32 tlv_header;
5270         u32 cwmin;
5271         u32 cwmax;
5272         u32 aifs;
5273         u32 txoplimit;
5274         u32 acm;
5275         u32 no_ack;
5276 } __packed;
5277
5278 struct wmi_wmm_params_arg {
5279         u8 acm;
5280         u8 aifs;
5281         u16 cwmin;
5282         u16 cwmax;
5283         u16 txop;
5284         u8 no_ack;
5285 };
5286
5287 struct wmi_vdev_set_wmm_params_cmd {
5288         u32 tlv_header;
5289         u32 vdev_id;
5290         struct wmi_wmm_params wmm_params[4];
5291         u32 wmm_param_type;
5292 } __packed;
5293
5294 struct wmi_wmm_params_all_arg {
5295         struct wmi_wmm_params_arg ac_be;
5296         struct wmi_wmm_params_arg ac_bk;
5297         struct wmi_wmm_params_arg ac_vi;
5298         struct wmi_wmm_params_arg ac_vo;
5299 };
5300
5301 #define ATH11K_TWT_DEF_STA_CONG_TIMER_MS                5000
5302 #define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE                10
5303 #define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP          50
5304 #define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN       20
5305 #define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL       100
5306 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN     80
5307 #define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP        50
5308 #define ATH11K_TWT_DEF_MIN_NO_STA_SETUP                 10
5309 #define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN              2
5310 #define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS          2
5311 #define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS                 2
5312 #define ATH11K_TWT_DEF_MAX_NO_STA_TWT                   500
5313 #define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL              10000
5314 #define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL            1000
5315 #define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL         5000
5316
5317 struct wmi_twt_enable_params {
5318         u32 sta_cong_timer_ms;
5319         u32 mbss_support;
5320         u32 default_slot_size;
5321         u32 congestion_thresh_setup;
5322         u32 congestion_thresh_teardown;
5323         u32 congestion_thresh_critical;
5324         u32 interference_thresh_teardown;
5325         u32 interference_thresh_setup;
5326         u32 min_no_sta_setup;
5327         u32 min_no_sta_teardown;
5328         u32 no_of_bcast_mcast_slots;
5329         u32 min_no_twt_slots;
5330         u32 max_no_sta_twt;
5331         u32 mode_check_interval;
5332         u32 add_sta_slot_interval;
5333         u32 remove_sta_slot_interval;
5334 };
5335
5336 struct wmi_twt_enable_params_cmd {
5337         u32 tlv_header;
5338         u32 pdev_id;
5339         u32 sta_cong_timer_ms;
5340         u32 mbss_support;
5341         u32 default_slot_size;
5342         u32 congestion_thresh_setup;
5343         u32 congestion_thresh_teardown;
5344         u32 congestion_thresh_critical;
5345         u32 interference_thresh_teardown;
5346         u32 interference_thresh_setup;
5347         u32 min_no_sta_setup;
5348         u32 min_no_sta_teardown;
5349         u32 no_of_bcast_mcast_slots;
5350         u32 min_no_twt_slots;
5351         u32 max_no_sta_twt;
5352         u32 mode_check_interval;
5353         u32 add_sta_slot_interval;
5354         u32 remove_sta_slot_interval;
5355 } __packed;
5356
5357 struct wmi_twt_disable_params_cmd {
5358         u32 tlv_header;
5359         u32 pdev_id;
5360 } __packed;
5361
5362 enum WMI_HOST_TWT_COMMAND {
5363         WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0,
5364         WMI_HOST_TWT_COMMAND_SUGGEST_TWT,
5365         WMI_HOST_TWT_COMMAND_DEMAND_TWT,
5366         WMI_HOST_TWT_COMMAND_TWT_GROUPING,
5367         WMI_HOST_TWT_COMMAND_ACCEPT_TWT,
5368         WMI_HOST_TWT_COMMAND_ALTERNATE_TWT,
5369         WMI_HOST_TWT_COMMAND_DICTATE_TWT,
5370         WMI_HOST_TWT_COMMAND_REJECT_TWT,
5371 };
5372
5373 #define WMI_TWT_ADD_DIALOG_FLAG_BCAST           BIT(8)
5374 #define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER         BIT(9)
5375 #define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE       BIT(10)
5376 #define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION      BIT(11)
5377
5378 struct wmi_twt_add_dialog_params_cmd {
5379         u32 tlv_header;
5380         u32 vdev_id;
5381         struct wmi_mac_addr peer_macaddr;
5382         u32 dialog_id;
5383         u32 wake_intvl_us;
5384         u32 wake_intvl_mantis;
5385         u32 wake_dura_us;
5386         u32 sp_offset_us;
5387         u32 flags;
5388 } __packed;
5389
5390 struct wmi_twt_add_dialog_params {
5391         u32 vdev_id;
5392         u8 peer_macaddr[ETH_ALEN];
5393         u32 dialog_id;
5394         u32 wake_intvl_us;
5395         u32 wake_intvl_mantis;
5396         u32 wake_dura_us;
5397         u32 sp_offset_us;
5398         u8 twt_cmd;
5399         u8 flag_bcast;
5400         u8 flag_trigger;
5401         u8 flag_flow_type;
5402         u8 flag_protection;
5403 } __packed;
5404
5405 enum  wmi_twt_add_dialog_status {
5406         WMI_ADD_TWT_STATUS_OK,
5407         WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED,
5408         WMI_ADD_TWT_STATUS_USED_DIALOG_ID,
5409         WMI_ADD_TWT_STATUS_INVALID_PARAM,
5410         WMI_ADD_TWT_STATUS_NOT_READY,
5411         WMI_ADD_TWT_STATUS_NO_RESOURCE,
5412         WMI_ADD_TWT_STATUS_NO_ACK,
5413         WMI_ADD_TWT_STATUS_NO_RESPONSE,
5414         WMI_ADD_TWT_STATUS_DENIED,
5415         WMI_ADD_TWT_STATUS_UNKNOWN_ERROR,
5416 };
5417
5418 struct wmi_twt_add_dialog_event {
5419         u32 vdev_id;
5420         struct wmi_mac_addr peer_macaddr;
5421         u32 dialog_id;
5422         u32 status;
5423 } __packed;
5424
5425 struct wmi_twt_del_dialog_params {
5426         u32 vdev_id;
5427         u8 peer_macaddr[ETH_ALEN];
5428         u32 dialog_id;
5429 } __packed;
5430
5431 struct wmi_twt_del_dialog_params_cmd {
5432         u32 tlv_header;
5433         u32 vdev_id;
5434         struct wmi_mac_addr peer_macaddr;
5435         u32 dialog_id;
5436 } __packed;
5437
5438 struct wmi_twt_pause_dialog_params {
5439         u32 vdev_id;
5440         u8 peer_macaddr[ETH_ALEN];
5441         u32 dialog_id;
5442 } __packed;
5443
5444 struct wmi_twt_pause_dialog_params_cmd {
5445         u32 tlv_header;
5446         u32 vdev_id;
5447         struct wmi_mac_addr peer_macaddr;
5448         u32 dialog_id;
5449 } __packed;
5450
5451 struct wmi_twt_resume_dialog_params {
5452         u32 vdev_id;
5453         u8 peer_macaddr[ETH_ALEN];
5454         u32 dialog_id;
5455         u32 sp_offset_us;
5456         u32 next_twt_size;
5457 } __packed;
5458
5459 struct wmi_twt_resume_dialog_params_cmd {
5460         u32 tlv_header;
5461         u32 vdev_id;
5462         struct wmi_mac_addr peer_macaddr;
5463         u32 dialog_id;
5464         u32 sp_offset_us;
5465         u32 next_twt_size;
5466 } __packed;
5467
5468 struct wmi_obss_spatial_reuse_params_cmd {
5469         u32 tlv_header;
5470         u32 pdev_id;
5471         u32 enable;
5472         s32 obss_min;
5473         s32 obss_max;
5474         u32 vdev_id;
5475 } __packed;
5476
5477 struct wmi_pdev_obss_pd_bitmap_cmd {
5478         u32 tlv_header;
5479         u32 pdev_id;
5480         u32 bitmap[2];
5481 } __packed;
5482
5483 #define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS               200
5484 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE           0
5485 #define ATH11K_OBSS_COLOR_COLLISION_DETECTION                   1
5486
5487 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS      10000
5488 #define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS       5000
5489
5490 enum wmi_bss_color_collision {
5491         WMI_BSS_COLOR_COLLISION_DISABLE = 0,
5492         WMI_BSS_COLOR_COLLISION_DETECTION,
5493         WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY,
5494         WMI_BSS_COLOR_FREE_SLOT_AVAILABLE,
5495 };
5496
5497 struct wmi_obss_color_collision_cfg_params_cmd {
5498         u32 tlv_header;
5499         u32 vdev_id;
5500         u32 flags;
5501         u32 evt_type;
5502         u32 current_bss_color;
5503         u32 detection_period_ms;
5504         u32 scan_period_ms;
5505         u32 free_slot_expiry_time_ms;
5506 } __packed;
5507
5508 struct wmi_bss_color_change_enable_params_cmd {
5509         u32 tlv_header;
5510         u32 vdev_id;
5511         u32 enable;
5512 } __packed;
5513
5514 struct wmi_obss_color_collision_event {
5515         u32 vdev_id;
5516         u32 evt_type;
5517         u64 obss_color_bitmap;
5518 } __packed;
5519
5520 #define ATH11K_IPV4_TH_SEED_SIZE 5
5521 #define ATH11K_IPV6_TH_SEED_SIZE 11
5522
5523 struct ath11k_wmi_pdev_lro_config_cmd {
5524         u32 tlv_header;
5525         u32 lro_enable;
5526         u32 res;
5527         u32 th_4[ATH11K_IPV4_TH_SEED_SIZE];
5528         u32 th_6[ATH11K_IPV6_TH_SEED_SIZE];
5529         u32 pdev_id;
5530 } __packed;
5531
5532 #define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT                 0
5533 #define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT              224
5534 #define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT              1
5535 #define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT              7
5536 #define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT                1
5537 #define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT           0
5538 #define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT     -96
5539 #define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT           80
5540 #define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT          12
5541 #define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT           8
5542 #define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT           0
5543 #define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT         0
5544 #define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT           0xf0
5545 #define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT            0
5546 #define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT              2
5547 #define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT             1
5548 #define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT               1
5549 #define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT              1
5550
5551 struct ath11k_wmi_vdev_spectral_conf_param {
5552         u32 vdev_id;
5553         u32 scan_count;
5554         u32 scan_period;
5555         u32 scan_priority;
5556         u32 scan_fft_size;
5557         u32 scan_gc_ena;
5558         u32 scan_restart_ena;
5559         u32 scan_noise_floor_ref;
5560         u32 scan_init_delay;
5561         u32 scan_nb_tone_thr;
5562         u32 scan_str_bin_thr;
5563         u32 scan_wb_rpt_mode;
5564         u32 scan_rssi_rpt_mode;
5565         u32 scan_rssi_thr;
5566         u32 scan_pwr_format;
5567         u32 scan_rpt_mode;
5568         u32 scan_bin_scale;
5569         u32 scan_dbm_adj;
5570         u32 scan_chn_mask;
5571 } __packed;
5572
5573 struct ath11k_wmi_vdev_spectral_conf_cmd {
5574         u32 tlv_header;
5575         struct ath11k_wmi_vdev_spectral_conf_param param;
5576 } __packed;
5577
5578 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER  1
5579 #define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR    2
5580 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE    1
5581 #define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE   2
5582
5583 struct ath11k_wmi_vdev_spectral_enable_cmd {
5584         u32 tlv_header;
5585         u32 vdev_id;
5586         u32 trigger_cmd;
5587         u32 enable_cmd;
5588 } __packed;
5589
5590 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd {
5591         u32 tlv_header;
5592         u32 pdev_id;
5593         u32 module_id;          /* see enum wmi_direct_buffer_module */
5594         u32 base_paddr_lo;
5595         u32 base_paddr_hi;
5596         u32 head_idx_paddr_lo;
5597         u32 head_idx_paddr_hi;
5598         u32 tail_idx_paddr_lo;
5599         u32 tail_idx_paddr_hi;
5600         u32 num_elems;          /* Number of elems in the ring */
5601         u32 buf_size;           /* size of allocated buffer in bytes */
5602
5603         /* Number of wmi_dma_buf_release_entry packed together */
5604         u32 num_resp_per_event;
5605
5606         /* Target should timeout and send whatever resp
5607          * it has if this time expires, units in milliseconds
5608          */
5609         u32 event_timeout_ms;
5610 } __packed;
5611
5612 struct ath11k_wmi_dma_buf_release_fixed_param {
5613         u32 pdev_id;
5614         u32 module_id;
5615         u32 num_buf_release_entry;
5616         u32 num_meta_data_entry;
5617 } __packed;
5618
5619 struct wmi_dma_buf_release_entry {
5620         u32 tlv_header;
5621         u32 paddr_lo;
5622
5623         /* Bits 11:0:   address of data
5624          * Bits 31:12:  host context data
5625          */
5626         u32 paddr_hi;
5627 } __packed;
5628
5629 #define WMI_SPECTRAL_META_INFO1_FREQ1           GENMASK(15, 0)
5630 #define WMI_SPECTRAL_META_INFO1_FREQ2           GENMASK(31, 16)
5631
5632 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH       GENMASK(7, 0)
5633
5634 struct wmi_dma_buf_release_meta_data {
5635         u32 tlv_header;
5636         s32 noise_floor[WMI_MAX_CHAINS];
5637         u32 reset_delay;
5638         u32 freq1;
5639         u32 freq2;
5640         u32 ch_width;
5641 } __packed;
5642
5643 enum wmi_fils_discovery_cmd_type {
5644         WMI_FILS_DISCOVERY_CMD,
5645         WMI_UNSOL_BCAST_PROBE_RESP,
5646 };
5647
5648 struct wmi_fils_discovery_cmd {
5649         u32 tlv_header;
5650         u32 vdev_id;
5651         u32 interval;
5652         u32 config; /* enum wmi_fils_discovery_cmd_type */
5653 } __packed;
5654
5655 struct wmi_fils_discovery_tmpl_cmd {
5656         u32 tlv_header;
5657         u32 vdev_id;
5658         u32 buf_len;
5659 } __packed;
5660
5661 struct wmi_probe_tmpl_cmd {
5662         u32 tlv_header;
5663         u32 vdev_id;
5664         u32 buf_len;
5665 } __packed;
5666
5667 struct target_resource_config {
5668         u32 num_vdevs;
5669         u32 num_peers;
5670         u32 num_active_peers;
5671         u32 num_offload_peers;
5672         u32 num_offload_reorder_buffs;
5673         u32 num_peer_keys;
5674         u32 num_tids;
5675         u32 ast_skid_limit;
5676         u32 tx_chain_mask;
5677         u32 rx_chain_mask;
5678         u32 rx_timeout_pri[4];
5679         u32 rx_decap_mode;
5680         u32 scan_max_pending_req;
5681         u32 bmiss_offload_max_vdev;
5682         u32 roam_offload_max_vdev;
5683         u32 roam_offload_max_ap_profiles;
5684         u32 num_mcast_groups;
5685         u32 num_mcast_table_elems;
5686         u32 mcast2ucast_mode;
5687         u32 tx_dbg_log_size;
5688         u32 num_wds_entries;
5689         u32 dma_burst_size;
5690         u32 mac_aggr_delim;
5691         u32 rx_skip_defrag_timeout_dup_detection_check;
5692         u32 vow_config;
5693         u32 gtk_offload_max_vdev;
5694         u32 num_msdu_desc;
5695         u32 max_frag_entries;
5696         u32 max_peer_ext_stats;
5697         u32 smart_ant_cap;
5698         u32 bk_minfree;
5699         u32 be_minfree;
5700         u32 vi_minfree;
5701         u32 vo_minfree;
5702         u32 rx_batchmode;
5703         u32 tt_support;
5704         u32 flag1;
5705         u32 iphdr_pad_config;
5706         u32 qwrap_config:16,
5707             alloc_frag_desc_for_data_pkt:16;
5708         u32 num_tdls_vdevs;
5709         u32 num_tdls_conn_table_entries;
5710         u32 beacon_tx_offload_max_vdev;
5711         u32 num_multicast_filter_entries;
5712         u32 num_wow_filters;
5713         u32 num_keep_alive_pattern;
5714         u32 keep_alive_pattern_size;
5715         u32 max_tdls_concurrent_sleep_sta;
5716         u32 max_tdls_concurrent_buffer_sta;
5717         u32 wmi_send_separate;
5718         u32 num_ocb_vdevs;
5719         u32 num_ocb_channels;
5720         u32 num_ocb_schedules;
5721         u32 num_ns_ext_tuples_cfg;
5722         u32 bpf_instruction_size;
5723         u32 max_bssid_rx_filters;
5724         u32 use_pdev_id;
5725         u32 peer_map_unmap_v2_support;
5726         u32 sched_params;
5727         u32 twt_ap_pdev_count;
5728         u32 twt_ap_sta_count;
5729         u8 is_reg_cc_ext_event_supported;
5730         u32 ema_max_vap_cnt;
5731         u32 ema_max_profile_period;
5732 };
5733
5734 enum wmi_debug_log_param {
5735         WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1,
5736         WMI_DEBUG_LOG_PARAM_VDEV_ENABLE,
5737         WMI_DEBUG_LOG_PARAM_VDEV_DISABLE,
5738         WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP,
5739         WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP,
5740         WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP,
5741 };
5742
5743 struct wmi_debug_log_config_cmd_fixed_param {
5744         u32 tlv_header;
5745         u32 dbg_log_param;
5746         u32 value;
5747 } __packed;
5748
5749 #define MAX_RADIOS 3
5750
5751 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
5752 #define WMI_SEND_TIMEOUT_HZ (3 * HZ)
5753
5754 enum ath11k_wmi_peer_ps_state {
5755         WMI_PEER_PS_STATE_OFF,
5756         WMI_PEER_PS_STATE_ON,
5757         WMI_PEER_PS_STATE_DISABLED,
5758 };
5759
5760 enum wmi_peer_ps_supported_bitmap {
5761         /* Used to indicate that power save state change is valid */
5762         WMI_PEER_PS_VALID = 0x1,
5763         WMI_PEER_PS_STATE_TIMESTAMP = 0x2,
5764 };
5765
5766 struct wmi_peer_sta_ps_state_chg_event {
5767         struct wmi_mac_addr peer_macaddr;
5768         u32 peer_ps_state;
5769         u32 ps_supported_bitmap;
5770         u32 peer_ps_valid;
5771         u32 peer_ps_timestamp;
5772 } __packed;
5773
5774 struct ath11k_wmi_base {
5775         struct ath11k_base *ab;
5776         struct ath11k_pdev_wmi wmi[MAX_RADIOS];
5777         enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
5778         u32 max_msg_len[MAX_RADIOS];
5779
5780         struct completion service_ready;
5781         struct completion unified_ready;
5782         DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE);
5783         wait_queue_head_t tx_credits_wq;
5784         u32 num_mem_chunks;
5785         u32 rx_decap_mode;
5786         struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
5787
5788         enum wmi_host_hw_mode_config_type preferred_hw_mode;
5789         struct target_resource_config  wlan_resource_config;
5790
5791         struct ath11k_targ_cap *targ_cap;
5792 };
5793
5794 /* Definition of HW data filtering */
5795 enum hw_data_filter_type {
5796         WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0),
5797         WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1),
5798 };
5799
5800 struct wmi_hw_data_filter_cmd {
5801         u32 tlv_header;
5802         u32 vdev_id;
5803         u32 enable;
5804         u32 hw_filter_bitmap;
5805 } __packed;
5806
5807 /* WOW structures */
5808 enum wmi_wow_wakeup_event {
5809         WOW_BMISS_EVENT = 0,
5810         WOW_BETTER_AP_EVENT,
5811         WOW_DEAUTH_RECVD_EVENT,
5812         WOW_MAGIC_PKT_RECVD_EVENT,
5813         WOW_GTK_ERR_EVENT,
5814         WOW_FOURWAY_HSHAKE_EVENT,
5815         WOW_EAPOL_RECVD_EVENT,
5816         WOW_NLO_DETECTED_EVENT,
5817         WOW_DISASSOC_RECVD_EVENT,
5818         WOW_PATTERN_MATCH_EVENT,
5819         WOW_CSA_IE_EVENT,
5820         WOW_PROBE_REQ_WPS_IE_EVENT,
5821         WOW_AUTH_REQ_EVENT,
5822         WOW_ASSOC_REQ_EVENT,
5823         WOW_HTT_EVENT,
5824         WOW_RA_MATCH_EVENT,
5825         WOW_HOST_AUTO_SHUTDOWN_EVENT,
5826         WOW_IOAC_MAGIC_EVENT,
5827         WOW_IOAC_SHORT_EVENT,
5828         WOW_IOAC_EXTEND_EVENT,
5829         WOW_IOAC_TIMER_EVENT,
5830         WOW_DFS_PHYERR_RADAR_EVENT,
5831         WOW_BEACON_EVENT,
5832         WOW_CLIENT_KICKOUT_EVENT,
5833         WOW_EVENT_MAX,
5834 };
5835
5836 enum wmi_wow_interface_cfg {
5837         WOW_IFACE_PAUSE_ENABLED,
5838         WOW_IFACE_PAUSE_DISABLED
5839 };
5840
5841 #define C2S(x) case x: return #x
5842
5843 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
5844 {
5845         switch (ev) {
5846         C2S(WOW_BMISS_EVENT);
5847         C2S(WOW_BETTER_AP_EVENT);
5848         C2S(WOW_DEAUTH_RECVD_EVENT);
5849         C2S(WOW_MAGIC_PKT_RECVD_EVENT);
5850         C2S(WOW_GTK_ERR_EVENT);
5851         C2S(WOW_FOURWAY_HSHAKE_EVENT);
5852         C2S(WOW_EAPOL_RECVD_EVENT);
5853         C2S(WOW_NLO_DETECTED_EVENT);
5854         C2S(WOW_DISASSOC_RECVD_EVENT);
5855         C2S(WOW_PATTERN_MATCH_EVENT);
5856         C2S(WOW_CSA_IE_EVENT);
5857         C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
5858         C2S(WOW_AUTH_REQ_EVENT);
5859         C2S(WOW_ASSOC_REQ_EVENT);
5860         C2S(WOW_HTT_EVENT);
5861         C2S(WOW_RA_MATCH_EVENT);
5862         C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
5863         C2S(WOW_IOAC_MAGIC_EVENT);
5864         C2S(WOW_IOAC_SHORT_EVENT);
5865         C2S(WOW_IOAC_EXTEND_EVENT);
5866         C2S(WOW_IOAC_TIMER_EVENT);
5867         C2S(WOW_DFS_PHYERR_RADAR_EVENT);
5868         C2S(WOW_BEACON_EVENT);
5869         C2S(WOW_CLIENT_KICKOUT_EVENT);
5870         C2S(WOW_EVENT_MAX);
5871         default:
5872                 return NULL;
5873         }
5874 }
5875
5876 enum wmi_wow_wake_reason {
5877         WOW_REASON_UNSPECIFIED = -1,
5878         WOW_REASON_NLOD = 0,
5879         WOW_REASON_AP_ASSOC_LOST,
5880         WOW_REASON_LOW_RSSI,
5881         WOW_REASON_DEAUTH_RECVD,
5882         WOW_REASON_DISASSOC_RECVD,
5883         WOW_REASON_GTK_HS_ERR,
5884         WOW_REASON_EAP_REQ,
5885         WOW_REASON_FOURWAY_HS_RECV,
5886         WOW_REASON_TIMER_INTR_RECV,
5887         WOW_REASON_PATTERN_MATCH_FOUND,
5888         WOW_REASON_RECV_MAGIC_PATTERN,
5889         WOW_REASON_P2P_DISC,
5890         WOW_REASON_WLAN_HB,
5891         WOW_REASON_CSA_EVENT,
5892         WOW_REASON_PROBE_REQ_WPS_IE_RECV,
5893         WOW_REASON_AUTH_REQ_RECV,
5894         WOW_REASON_ASSOC_REQ_RECV,
5895         WOW_REASON_HTT_EVENT,
5896         WOW_REASON_RA_MATCH,
5897         WOW_REASON_HOST_AUTO_SHUTDOWN,
5898         WOW_REASON_IOAC_MAGIC_EVENT,
5899         WOW_REASON_IOAC_SHORT_EVENT,
5900         WOW_REASON_IOAC_EXTEND_EVENT,
5901         WOW_REASON_IOAC_TIMER_EVENT,
5902         WOW_REASON_ROAM_HO,
5903         WOW_REASON_DFS_PHYERR_RADADR_EVENT,
5904         WOW_REASON_BEACON_RECV,
5905         WOW_REASON_CLIENT_KICKOUT_EVENT,
5906         WOW_REASON_PAGE_FAULT = 0x3a,
5907         WOW_REASON_DEBUG_TEST = 0xFF,
5908 };
5909
5910 static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
5911 {
5912         switch (reason) {
5913         C2S(WOW_REASON_UNSPECIFIED);
5914         C2S(WOW_REASON_NLOD);
5915         C2S(WOW_REASON_AP_ASSOC_LOST);
5916         C2S(WOW_REASON_LOW_RSSI);
5917         C2S(WOW_REASON_DEAUTH_RECVD);
5918         C2S(WOW_REASON_DISASSOC_RECVD);
5919         C2S(WOW_REASON_GTK_HS_ERR);
5920         C2S(WOW_REASON_EAP_REQ);
5921         C2S(WOW_REASON_FOURWAY_HS_RECV);
5922         C2S(WOW_REASON_TIMER_INTR_RECV);
5923         C2S(WOW_REASON_PATTERN_MATCH_FOUND);
5924         C2S(WOW_REASON_RECV_MAGIC_PATTERN);
5925         C2S(WOW_REASON_P2P_DISC);
5926         C2S(WOW_REASON_WLAN_HB);
5927         C2S(WOW_REASON_CSA_EVENT);
5928         C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
5929         C2S(WOW_REASON_AUTH_REQ_RECV);
5930         C2S(WOW_REASON_ASSOC_REQ_RECV);
5931         C2S(WOW_REASON_HTT_EVENT);
5932         C2S(WOW_REASON_RA_MATCH);
5933         C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
5934         C2S(WOW_REASON_IOAC_MAGIC_EVENT);
5935         C2S(WOW_REASON_IOAC_SHORT_EVENT);
5936         C2S(WOW_REASON_IOAC_EXTEND_EVENT);
5937         C2S(WOW_REASON_IOAC_TIMER_EVENT);
5938         C2S(WOW_REASON_ROAM_HO);
5939         C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
5940         C2S(WOW_REASON_BEACON_RECV);
5941         C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
5942         C2S(WOW_REASON_PAGE_FAULT);
5943         C2S(WOW_REASON_DEBUG_TEST);
5944         default:
5945                 return NULL;
5946         }
5947 }
5948
5949 #undef C2S
5950
5951 struct wmi_wow_ev_arg {
5952         u32 vdev_id;
5953         u32 flag;
5954         enum wmi_wow_wake_reason wake_reason;
5955         u32 data_len;
5956 };
5957
5958 enum wmi_tlv_pattern_type {
5959         WOW_PATTERN_MIN = 0,
5960         WOW_BITMAP_PATTERN = WOW_PATTERN_MIN,
5961         WOW_IPV4_SYNC_PATTERN,
5962         WOW_IPV6_SYNC_PATTERN,
5963         WOW_WILD_CARD_PATTERN,
5964         WOW_TIMER_PATTERN,
5965         WOW_MAGIC_PATTERN,
5966         WOW_IPV6_RA_PATTERN,
5967         WOW_IOAC_PKT_PATTERN,
5968         WOW_IOAC_TMR_PATTERN,
5969         WOW_PATTERN_MAX
5970 };
5971
5972 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE         148
5973 #define WOW_DEFAULT_BITMASK_SIZE                148
5974
5975 #define WOW_MIN_PATTERN_SIZE    1
5976 #define WOW_MAX_PATTERN_SIZE    148
5977 #define WOW_MAX_PKT_OFFSET      128
5978 #define WOW_HDR_LEN     (sizeof(struct ieee80211_hdr_3addr) + \
5979         sizeof(struct rfc1042_hdr))
5980 #define WOW_MAX_REDUCE  (WOW_HDR_LEN - sizeof(struct ethhdr) - \
5981         offsetof(struct ieee80211_hdr_3addr, addr1))
5982
5983 struct wmi_wow_add_del_event_cmd {
5984         u32 tlv_header;
5985         u32 vdev_id;
5986         u32 is_add;
5987         u32 event_bitmap;
5988 } __packed;
5989
5990 struct wmi_wow_enable_cmd {
5991         u32 tlv_header;
5992         u32 enable;
5993         u32 pause_iface_config;
5994         u32 flags;
5995 }  __packed;
5996
5997 struct wmi_wow_host_wakeup_ind {
5998         u32 tlv_header;
5999         u32 reserved;
6000 } __packed;
6001
6002 struct wmi_tlv_wow_event_info {
6003         u32 vdev_id;
6004         u32 flag;
6005         u32 wake_reason;
6006         u32 data_len;
6007 } __packed;
6008
6009 struct wmi_wow_bitmap_pattern {
6010         u32 tlv_header;
6011         u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE];
6012         u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE];
6013         u32 pattern_offset;
6014         u32 pattern_len;
6015         u32 bitmask_len;
6016         u32 pattern_id;
6017 } __packed;
6018
6019 struct wmi_wow_add_pattern_cmd {
6020         u32 tlv_header;
6021         u32 vdev_id;
6022         u32 pattern_id;
6023         u32 pattern_type;
6024 } __packed;
6025
6026 struct wmi_wow_del_pattern_cmd {
6027         u32 tlv_header;
6028         u32 vdev_id;
6029         u32 pattern_id;
6030         u32 pattern_type;
6031 } __packed;
6032
6033 #define WMI_PNO_MAX_SCHED_SCAN_PLANS      2
6034 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT   7200
6035 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
6036 #define WMI_PNO_MAX_NETW_CHANNELS         26
6037 #define WMI_PNO_MAX_NETW_CHANNELS_EX      60
6038 #define WMI_PNO_MAX_SUPP_NETWORKS         WLAN_SCAN_PARAMS_MAX_SSID
6039 #define WMI_PNO_MAX_IE_LENGTH             WLAN_SCAN_PARAMS_MAX_IE_LEN
6040
6041 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */
6042 #define WMI_PNO_MAX_PB_REQ_SIZE    450
6043
6044 #define WMI_PNO_24G_DEFAULT_CH     1
6045 #define WMI_PNO_5G_DEFAULT_CH      36
6046
6047 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40
6048 #define WMI_PASSIVE_MAX_CHANNEL_TIME   110
6049
6050 /* SSID broadcast type */
6051 enum wmi_ssid_bcast_type {
6052         BCAST_UNKNOWN      = 0,
6053         BCAST_NORMAL       = 1,
6054         BCAST_HIDDEN       = 2,
6055 };
6056
6057 #define WMI_NLO_MAX_SSIDS    16
6058 #define WMI_NLO_MAX_CHAN     48
6059
6060 #define WMI_NLO_CONFIG_STOP                             BIT(0)
6061 #define WMI_NLO_CONFIG_START                            BIT(1)
6062 #define WMI_NLO_CONFIG_RESET                            BIT(2)
6063 #define WMI_NLO_CONFIG_SLOW_SCAN                        BIT(4)
6064 #define WMI_NLO_CONFIG_FAST_SCAN                        BIT(5)
6065 #define WMI_NLO_CONFIG_SSID_HIDE_EN                     BIT(6)
6066
6067 /* This bit is used to indicate if EPNO or supplicant PNO is enabled.
6068  * Only one of them can be enabled at a given time
6069  */
6070 #define WMI_NLO_CONFIG_ENLO                             BIT(7)
6071 #define WMI_NLO_CONFIG_SCAN_PASSIVE                     BIT(8)
6072 #define WMI_NLO_CONFIG_ENLO_RESET                       BIT(9)
6073 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ         BIT(10)
6074 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ       BIT(11)
6075 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12)
6076 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG          BIT(13)
6077
6078 struct wmi_nlo_ssid_param {
6079         u32 valid;
6080         struct wmi_ssid ssid;
6081 } __packed;
6082
6083 struct wmi_nlo_enc_param {
6084         u32 valid;
6085         u32 enc_type;
6086 } __packed;
6087
6088 struct wmi_nlo_auth_param {
6089         u32 valid;
6090         u32 auth_type;
6091 } __packed;
6092
6093 struct wmi_nlo_bcast_nw_param {
6094         u32 valid;
6095         u32 bcast_nw_type;
6096 } __packed;
6097
6098 struct wmi_nlo_rssi_param {
6099         u32 valid;
6100         s32 rssi;
6101 } __packed;
6102
6103 struct nlo_configured_parameters {
6104         /* TLV tag and len;*/
6105         u32 tlv_header;
6106         struct wmi_nlo_ssid_param ssid;
6107         struct wmi_nlo_enc_param enc_type;
6108         struct wmi_nlo_auth_param auth_type;
6109         struct wmi_nlo_rssi_param rssi_cond;
6110
6111         /* indicates if the SSID is hidden or not */
6112         struct wmi_nlo_bcast_nw_param bcast_nw_type;
6113 } __packed;
6114
6115 struct wmi_network_type {
6116         struct wmi_ssid ssid;
6117         u32 authentication;
6118         u32 encryption;
6119         u32 bcast_nw_type;
6120         u8 channel_count;
6121         u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
6122         s32 rssi_threshold;
6123 };
6124
6125 struct wmi_pno_scan_req {
6126         u8 enable;
6127         u8 vdev_id;
6128         u8 uc_networks_count;
6129         struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
6130         u32 fast_scan_period;
6131         u32 slow_scan_period;
6132         u8 fast_scan_max_cycles;
6133
6134         bool do_passive_scan;
6135
6136         u32 delay_start_time;
6137         u32 active_min_time;
6138         u32 active_max_time;
6139         u32 passive_min_time;
6140         u32 passive_max_time;
6141
6142         /* mac address randomization attributes */
6143         u32 enable_pno_scan_randomization;
6144         u8 mac_addr[ETH_ALEN];
6145         u8 mac_addr_mask[ETH_ALEN];
6146 };
6147
6148 struct wmi_wow_nlo_config_cmd {
6149         u32 tlv_header;
6150         u32 flags;
6151         u32 vdev_id;
6152         u32 fast_scan_max_cycles;
6153         u32 active_dwell_time;
6154         u32 passive_dwell_time;
6155         u32 probe_bundle_size;
6156
6157         /* ART = IRT */
6158         u32 rest_time;
6159
6160         /* Max value that can be reached after SBM */
6161         u32 max_rest_time;
6162
6163         /* SBM */
6164         u32 scan_backoff_multiplier;
6165
6166         /* SCBM */
6167         u32 fast_scan_period;
6168
6169         /* specific to windows */
6170         u32 slow_scan_period;
6171
6172         u32 no_of_ssids;
6173
6174         u32 num_of_channels;
6175
6176         /* NLO scan start delay time in milliseconds */
6177         u32 delay_start_time;
6178
6179         /* MAC Address to use in Probe Req as SA */
6180         struct wmi_mac_addr mac_addr;
6181
6182         /* Mask on which MAC has to be randomized */
6183         struct wmi_mac_addr mac_mask;
6184
6185         /* IE bitmap to use in Probe Req */
6186         u32 ie_bitmap[8];
6187
6188         /* Number of vendor OUIs. In the TLV vendor_oui[] */
6189         u32 num_vendor_oui;
6190
6191         /* Number of connected NLO band preferences */
6192         u32 num_cnlo_band_pref;
6193
6194         /* The TLVs will follow.
6195          * nlo_configured_parameters nlo_list[];
6196          * u32 channel_list[num_of_channels];
6197          */
6198 } __packed;
6199
6200 #define WMI_MAX_NS_OFFLOADS           2
6201 #define WMI_MAX_ARP_OFFLOADS          2
6202
6203 #define WMI_ARPOL_FLAGS_VALID              BIT(0)
6204 #define WMI_ARPOL_FLAGS_MAC_VALID          BIT(1)
6205 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID    BIT(2)
6206
6207 struct wmi_arp_offload_tuple {
6208         u32 tlv_header;
6209         u32 flags;
6210         u8 target_ipaddr[4];
6211         u8 remote_ipaddr[4];
6212         struct wmi_mac_addr target_mac;
6213 } __packed;
6214
6215 #define WMI_NSOL_FLAGS_VALID               BIT(0)
6216 #define WMI_NSOL_FLAGS_MAC_VALID           BIT(1)
6217 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID     BIT(2)
6218 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST     BIT(3)
6219
6220 #define WMI_NSOL_MAX_TARGET_IPS    2
6221
6222 struct wmi_ns_offload_tuple {
6223         u32 tlv_header;
6224         u32 flags;
6225         u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16];
6226         u8 solicitation_ipaddr[16];
6227         u8 remote_ipaddr[16];
6228         struct wmi_mac_addr target_mac;
6229 } __packed;
6230
6231 struct wmi_set_arp_ns_offload_cmd {
6232         u32 tlv_header;
6233         u32 flags;
6234         u32 vdev_id;
6235         u32 num_ns_ext_tuples;
6236         /* The TLVs follow:
6237          * wmi_ns_offload_tuple  ns_tuples[WMI_MAX_NS_OFFLOADS];
6238          * wmi_arp_offload_tuple arp_tuples[WMI_MAX_ARP_OFFLOADS];
6239          * wmi_ns_offload_tuple  ns_ext_tuples[num_ns_ext_tuples];
6240          */
6241 } __packed;
6242
6243 #define GTK_OFFLOAD_OPCODE_MASK             0xFF000000
6244 #define GTK_OFFLOAD_ENABLE_OPCODE           0x01000000
6245 #define GTK_OFFLOAD_DISABLE_OPCODE          0x02000000
6246 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE   0x04000000
6247
6248 #define GTK_OFFLOAD_KEK_BYTES       16
6249 #define GTK_OFFLOAD_KCK_BYTES       16
6250 #define GTK_REPLAY_COUNTER_BYTES    8
6251 #define WMI_MAX_KEY_LEN             32
6252 #define IGTK_PN_SIZE                6
6253
6254 struct wmi_replayc_cnt {
6255         union {
6256                 u8 counter[GTK_REPLAY_COUNTER_BYTES];
6257                 struct {
6258                         u32 word0;
6259                         u32 word1;
6260                 } __packed;
6261         } __packed;
6262 } __packed;
6263
6264 struct wmi_gtk_offload_status_event {
6265         u32 vdev_id;
6266         u32 flags;
6267         u32 refresh_cnt;
6268         struct wmi_replayc_cnt replay_ctr;
6269         u8 igtk_key_index;
6270         u8 igtk_key_length;
6271         u8 igtk_key_rsc[IGTK_PN_SIZE];
6272         u8 igtk_key[WMI_MAX_KEY_LEN];
6273         u8 gtk_key_index;
6274         u8 gtk_key_length;
6275         u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES];
6276         u8 gtk_key[WMI_MAX_KEY_LEN];
6277 } __packed;
6278
6279 struct wmi_gtk_rekey_offload_cmd {
6280         u32 tlv_header;
6281         u32 vdev_id;
6282         u32 flags;
6283         u8 kek[GTK_OFFLOAD_KEK_BYTES];
6284         u8 kck[GTK_OFFLOAD_KCK_BYTES];
6285         u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES];
6286 } __packed;
6287
6288 #define BIOS_SAR_TABLE_LEN      (22)
6289 #define BIOS_SAR_RSVD1_LEN      (6)
6290 #define BIOS_SAR_RSVD2_LEN      (18)
6291
6292 struct wmi_pdev_set_sar_table_cmd {
6293         u32 tlv_header;
6294         u32 pdev_id;
6295         u32 sar_len;
6296         u32 rsvd_len;
6297 } __packed;
6298
6299 struct wmi_pdev_set_geo_table_cmd {
6300         u32 tlv_header;
6301         u32 pdev_id;
6302         u32 rsvd_len;
6303 } __packed;
6304
6305 struct wmi_sta_keepalive_cmd {
6306         u32 tlv_header;
6307         u32 vdev_id;
6308         u32 enabled;
6309
6310         /* WMI_STA_KEEPALIVE_METHOD_ */
6311         u32 method;
6312
6313         /* in seconds */
6314         u32 interval;
6315
6316         /* following this structure is the TLV for struct
6317          * wmi_sta_keepalive_arp_resp
6318          */
6319 } __packed;
6320
6321 struct wmi_sta_keepalive_arp_resp {
6322         u32 tlv_header;
6323         u32 src_ip4_addr;
6324         u32 dest_ip4_addr;
6325         struct wmi_mac_addr dest_mac_addr;
6326 } __packed;
6327
6328 struct wmi_sta_keepalive_arg {
6329         u32 vdev_id;
6330         u32 enabled;
6331         u32 method;
6332         u32 interval;
6333         u32 src_ip4_addr;
6334         u32 dest_ip4_addr;
6335         const u8 dest_mac_addr[ETH_ALEN];
6336 };
6337
6338 enum wmi_sta_keepalive_method {
6339         WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6340         WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2,
6341         WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3,
6342         WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4,
6343         WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5,
6344 };
6345
6346 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT      30
6347 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE      0
6348
6349 const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab,
6350                                         struct sk_buff *skb, gfp_t gfp);
6351 int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
6352                         u32 cmd_id);
6353 struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
6354 int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
6355                          struct sk_buff *frame);
6356 int ath11k_wmi_p2p_go_bcn_ie(struct ath11k *ar, u32 vdev_id,
6357                              const u8 *p2p_ie);
6358 int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
6359                         struct ieee80211_mutable_offsets *offs,
6360                         struct sk_buff *bcn, u32 ema_param);
6361 int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
6362 int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
6363                        const u8 *bssid, u8 *tx_bssid, u32 nontx_profile_idx,
6364                        u32 nontx_profile_cnt);
6365 int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
6366 int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
6367                           bool restart);
6368 int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
6369                               u32 vdev_id, u32 param_id, u32 param_val);
6370 int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
6371                               u32 param_value, u8 pdev_id);
6372 int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id,
6373                                 enum wmi_sta_ps_mode psmode);
6374 int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
6375 int ath11k_wmi_cmd_init(struct ath11k_base *ab);
6376 int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
6377 int ath11k_wmi_connect(struct ath11k_base *ab);
6378 int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
6379                            u8 pdev_id);
6380 int ath11k_wmi_attach(struct ath11k_base *ab);
6381 void ath11k_wmi_detach(struct ath11k_base *ab);
6382 int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
6383                            struct vdev_create_params *param);
6384 int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
6385                                            const u8 *addr, dma_addr_t paddr,
6386                                            u8 tid, u8 ba_window_size_valid,
6387                                            u32 ba_window_size);
6388 int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
6389                                     struct peer_create_params *param);
6390 int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
6391                                   u32 param_id, u32 param_value);
6392
6393 int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
6394                                 u32 param, u32 param_value);
6395 int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
6396 int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
6397                                     const u8 *peer_addr, u8 vdev_id);
6398 int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
6399 void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
6400 int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
6401                                    struct scan_req_params *params);
6402 int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
6403                                   struct scan_cancel_param *param);
6404 int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
6405                                        struct wmi_wmm_params_all_arg *param);
6406 int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
6407                             u32 pdev_id);
6408 int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
6409
6410 int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
6411                                    struct peer_assoc_params *param);
6412 int ath11k_wmi_vdev_install_key(struct ath11k *ar,
6413                                 struct wmi_vdev_install_key_arg *arg);
6414 int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
6415                                           enum wmi_bss_chan_info_req_type type);
6416 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
6417                                       struct stats_request_params *param);
6418 int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
6419 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
6420                                         u8 peer_addr[ETH_ALEN],
6421                                         struct peer_flush_params *param);
6422 int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
6423                                         struct ap_ps_params *param);
6424 int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
6425                                        struct scan_chan_list_params *chan_list);
6426 int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
6427                                                   u32 pdev_id);
6428 int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac);
6429 int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6430                           u32 tid, u32 buf_size);
6431 int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6432                               u32 tid, u32 status);
6433 int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
6434                           u32 tid, u32 initiator, u32 reason);
6435 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
6436                                             u32 vdev_id, u32 bcn_ctrl_op);
6437 int ath11k_wmi_send_set_current_country_cmd(struct ath11k *ar,
6438                                             struct wmi_set_current_country_params *param);
6439 int
6440 ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
6441                                  struct wmi_init_country_params init_cc_param);
6442
6443 int ath11k_wmi_send_11d_scan_start_cmd(struct ath11k *ar,
6444                                        struct wmi_11d_scan_start_params *param);
6445 int ath11k_wmi_send_11d_scan_stop_cmd(struct ath11k *ar, u32 vdev_id);
6446
6447 int
6448 ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
6449                                              struct thermal_mitigation_params *param);
6450 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
6451 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
6452 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
6453 int
6454 ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
6455                                  struct rx_reorder_queue_remove_params *param);
6456 int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
6457                                        struct pdev_set_regdomain_params *param);
6458 int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
6459                              struct ath11k_fw_stats *stats);
6460 void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
6461                               struct ath11k_fw_stats *fw_stats, u32 stats_id,
6462                               char *buf);
6463 int ath11k_wmi_simulate_radar(struct ath11k *ar);
6464 void ath11k_wmi_fill_default_twt_params(struct wmi_twt_enable_params *twt_params);
6465 int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id,
6466                                    struct wmi_twt_enable_params *params);
6467 int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
6468 int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar,
6469                                        struct wmi_twt_add_dialog_params *params);
6470 int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar,
6471                                        struct wmi_twt_del_dialog_params *params);
6472 int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar,
6473                                          struct wmi_twt_pause_dialog_params *params);
6474 int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar,
6475                                           struct wmi_twt_resume_dialog_params *params);
6476 int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
6477                                  struct ieee80211_he_obss_pd *he_obss_pd);
6478 int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap);
6479 int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap);
6480 int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar,
6481                                                  u32 *bitmap);
6482 int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
6483                                                  u32 *bitmap);
6484 int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar,
6485                                                      u32 *bitmap);
6486 int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
6487                                                      u32 *bitmap);
6488 int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
6489                                                  u8 bss_color, u32 period,
6490                                                  bool enable);
6491 int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
6492                                                 bool enable);
6493 int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
6494 int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar,
6495                                  struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param);
6496 int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id,
6497                                     u32 trigger, u32 enable);
6498 int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar,
6499                                   struct ath11k_wmi_vdev_spectral_conf_param *param);
6500 int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id,
6501                                    struct sk_buff *tmpl);
6502 int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval,
6503                               bool unsol_bcast_probe_resp_enabled);
6504 int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id,
6505                                struct sk_buff *tmpl);
6506 int ath11k_wmi_set_hw_mode(struct ath11k_base *ab,
6507                            enum wmi_host_hw_mode_config_type mode);
6508 int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar);
6509 int ath11k_wmi_wow_enable(struct ath11k *ar);
6510 int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar,
6511                                  const u8 mac_addr[ETH_ALEN]);
6512 int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap,
6513                              struct ath11k_fw_dbglog *dbglog);
6514 int ath11k_wmi_wow_config_pno(struct ath11k *ar, u32 vdev_id,
6515                               struct wmi_pno_scan_req  *pno_scan);
6516 int ath11k_wmi_wow_del_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id);
6517 int ath11k_wmi_wow_add_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id,
6518                                const u8 *pattern, const u8 *mask,
6519                                int pattern_len, int pattern_offset);
6520 int ath11k_wmi_wow_add_wakeup_event(struct ath11k *ar, u32 vdev_id,
6521                                     enum wmi_wow_wakeup_event event,
6522                                     u32 enable);
6523 int ath11k_wmi_hw_data_filter_cmd(struct ath11k *ar, u32 vdev_id,
6524                                   u32 filter_bitmap, bool enable);
6525 int ath11k_wmi_arp_ns_offload(struct ath11k *ar,
6526                               struct ath11k_vif *arvif, bool enable);
6527 int ath11k_wmi_gtk_rekey_offload(struct ath11k *ar,
6528                                  struct ath11k_vif *arvif, bool enable);
6529 int ath11k_wmi_gtk_rekey_getinfo(struct ath11k *ar,
6530                                  struct ath11k_vif *arvif);
6531 int ath11k_wmi_pdev_set_bios_sar_table_param(struct ath11k *ar, const u8 *sar_val);
6532 int ath11k_wmi_pdev_set_bios_geo_table_param(struct ath11k *ar);
6533 int ath11k_wmi_sta_keepalive(struct ath11k *ar,
6534                              const struct wmi_sta_keepalive_arg *arg);
6535 bool ath11k_wmi_supports_6ghz_cc_ext(struct ath11k *ar);
6536 int ath11k_wmi_send_vdev_set_tpc_power(struct ath11k *ar,
6537                                        u32 vdev_id,
6538                                        struct ath11k_reg_tpc_power_info *param);
6539
6540 #endif
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