1 // SPDX-License-Identifier: GPL-2.0-only
2 /* drivers/net/ethernet/micrel/ks8851.c
4 * Copyright 2009 Simtec Electronics
5 * http://www.simtec.co.uk/
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/netdevice.h>
15 #include <linux/etherdevice.h>
16 #include <linux/ethtool.h>
17 #include <linux/iopoll.h>
18 #include <linux/mii.h>
20 #include <linux/platform_device.h>
21 #include <linux/of_net.h>
25 static int msg_enable;
27 #define BE3 0x8000 /* Byte Enable 3 */
28 #define BE2 0x4000 /* Byte Enable 2 */
29 #define BE1 0x2000 /* Byte Enable 1 */
30 #define BE0 0x1000 /* Byte Enable 0 */
33 * struct ks8851_net_par - KS8851 Parallel driver private data
34 * @ks8851: KS8851 driver common private data
35 * @lock: Lock to ensure that the device is not accessed when busy.
36 * @hw_addr : start address of data register.
37 * @hw_addr_cmd : start address of command register.
38 * @cmd_reg_cache : command register cached.
40 * The @lock ensures that the chip is protected when certain operations are
41 * in progress. When the read or write packet transfer is in progress, most
42 * of the chip registers are not accessible until the transfer is finished
43 * and the DMA has been de-asserted.
45 struct ks8851_net_par {
46 struct ks8851_net ks8851;
48 void __iomem *hw_addr;
49 void __iomem *hw_addr_cmd;
53 #define to_ks8851_par(ks) container_of((ks), struct ks8851_net_par, ks8851)
56 * ks8851_lock_par - register access lock
58 * @flags: Spinlock flags
60 * Claim chip register access lock
62 static void ks8851_lock_par(struct ks8851_net *ks, unsigned long *flags)
64 struct ks8851_net_par *ksp = to_ks8851_par(ks);
66 spin_lock_irqsave(&ksp->lock, *flags);
70 * ks8851_unlock_par - register access unlock
72 * @flags: Spinlock flags
74 * Release chip register access lock
76 static void ks8851_unlock_par(struct ks8851_net *ks, unsigned long *flags)
78 struct ks8851_net_par *ksp = to_ks8851_par(ks);
80 spin_unlock_irqrestore(&ksp->lock, *flags);
84 * ks_check_endian - Check whether endianness of the bus is correct
85 * @ks : The chip information
87 * The KS8851-16MLL EESK pin allows selecting the endianness of the 16bit
88 * bus. To maintain optimum performance, the bus endianness should be set
89 * such that it matches the endianness of the CPU.
91 static int ks_check_endian(struct ks8851_net *ks)
93 struct ks8851_net_par *ksp = to_ks8851_par(ks);
97 * Read CIDER register first, however read it the "wrong" way around.
98 * If the endian strap on the KS8851-16MLL in incorrect and the chip
99 * is operating in different endianness than the CPU, then the meaning
100 * of BE[3:0] byte-enable bits is also swapped such that:
101 * BE[3,2,1,0] becomes BE[1,0,3,2]
103 * Luckily for us, the byte-enable bits are the top four MSbits of
104 * the address register and the CIDER register is at offset 0xc0.
105 * Hence, by reading address 0xc0c0, which is not impacted by endian
106 * swapping, we assert either BE[3:2] or BE[1:0] while reading the
109 * If the bus configuration is correct, reading 0xc0c0 asserts
110 * BE[3:2] and this read returns 0x0000, because to read register
111 * with bottom two LSbits of address set to 0, BE[1:0] must be
114 * If the bus configuration is NOT correct, reading 0xc0c0 asserts
115 * BE[1:0] and this read returns non-zero 0x8872 value.
117 iowrite16(BE3 | BE2 | KS_CIDER, ksp->hw_addr_cmd);
118 cider = ioread16(ksp->hw_addr);
122 netdev_err(ks->netdev, "incorrect EESK endian strap setting\n");
128 * ks8851_wrreg16_par - write 16bit register value to chip
129 * @ks: The chip state
130 * @reg: The register address
131 * @val: The value to write
133 * Issue a write to put the value @val into the register specified in @reg.
135 static void ks8851_wrreg16_par(struct ks8851_net *ks, unsigned int reg,
138 struct ks8851_net_par *ksp = to_ks8851_par(ks);
140 ksp->cmd_reg_cache = (u16)reg | ((BE1 | BE0) << (reg & 0x02));
141 iowrite16(ksp->cmd_reg_cache, ksp->hw_addr_cmd);
142 iowrite16(val, ksp->hw_addr);
146 * ks8851_rdreg16_par - read 16 bit register from chip
147 * @ks: The chip information
148 * @reg: The register address
150 * Read a 16bit register from the chip, returning the result
152 static unsigned int ks8851_rdreg16_par(struct ks8851_net *ks, unsigned int reg)
154 struct ks8851_net_par *ksp = to_ks8851_par(ks);
156 ksp->cmd_reg_cache = (u16)reg | ((BE1 | BE0) << (reg & 0x02));
157 iowrite16(ksp->cmd_reg_cache, ksp->hw_addr_cmd);
158 return ioread16(ksp->hw_addr);
162 * ks8851_rdfifo_par - read data from the receive fifo
163 * @ks: The device state.
164 * @buff: The buffer address
165 * @len: The length of the data to read
167 * Issue an RXQ FIFO read command and read the @len amount of data from
168 * the FIFO into the buffer specified by @buff.
170 static void ks8851_rdfifo_par(struct ks8851_net *ks, u8 *buff, unsigned int len)
172 struct ks8851_net_par *ksp = to_ks8851_par(ks);
174 netif_dbg(ks, rx_status, ks->netdev,
175 "%s: %d@%p\n", __func__, len, buff);
177 ioread16_rep(ksp->hw_addr, (u16 *)buff + 1, len / 2);
181 * ks8851_wrfifo_par - write packet to TX FIFO
182 * @ks: The device state.
183 * @txp: The sk_buff to transmit.
184 * @irq: IRQ on completion of the packet.
186 * Send the @txp to the chip. This means creating the relevant packet header
187 * specifying the length of the packet and the other information the chip
188 * needs, such as IRQ on completion. Send the header and the packet data to
191 static void ks8851_wrfifo_par(struct ks8851_net *ks, struct sk_buff *txp,
194 struct ks8851_net_par *ksp = to_ks8851_par(ks);
195 unsigned int len = ALIGN(txp->len, 4);
196 unsigned int fid = 0;
198 netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",
199 __func__, txp, txp->len, txp->data, irq);
202 fid &= TXFR_TXFID_MASK;
205 fid |= TXFR_TXIC; /* irq on completion */
207 iowrite16(fid, ksp->hw_addr);
208 iowrite16(txp->len, ksp->hw_addr);
210 iowrite16_rep(ksp->hw_addr, txp->data, len / 2);
213 static unsigned int ks8851_rdreg16_par_txqcr(struct ks8851_net *ks)
215 return ks8851_rdreg16_par(ks, KS_TXQCR);
219 * ks8851_start_xmit_par - transmit packet
220 * @skb: The buffer to transmit
221 * @dev: The device used to transmit the packet.
223 * Called by the network layer to transmit the @skb. Queue the packet for
224 * the device and schedule the necessary work to transmit the packet when
227 * We do this to firstly avoid sleeping with the network device locked,
228 * and secondly so we can round up more than one packet to transmit which
229 * means we can try and avoid generating too many transmit done interrupts.
231 static netdev_tx_t ks8851_start_xmit_par(struct sk_buff *skb,
232 struct net_device *dev)
234 struct ks8851_net *ks = netdev_priv(dev);
235 netdev_tx_t ret = NETDEV_TX_OK;
241 netif_dbg(ks, tx_queued, ks->netdev,
242 "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data);
244 ks8851_lock_par(ks, &flags);
246 txmir = ks8851_rdreg16_par(ks, KS_TXMIR) & 0x1fff;
248 if (likely(txmir >= skb->len + 12)) {
249 ks8851_wrreg16_par(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
250 ks8851_wrfifo_par(ks, skb, false);
251 ks8851_wrreg16_par(ks, KS_RXQCR, ks->rc_rxqcr);
252 ks8851_wrreg16_par(ks, KS_TXQCR, TXQCR_METFE);
254 err = readx_poll_timeout_atomic(ks8851_rdreg16_par_txqcr, ks,
255 txqcr, !(txqcr & TXQCR_METFE),
258 ret = NETDEV_TX_BUSY;
260 ks8851_done_tx(ks, skb);
262 ret = NETDEV_TX_BUSY;
265 ks8851_unlock_par(ks, &flags);
270 static int ks8851_probe_par(struct platform_device *pdev)
272 struct device *dev = &pdev->dev;
273 struct ks8851_net_par *ksp;
274 struct net_device *netdev;
275 struct ks8851_net *ks;
278 netdev = devm_alloc_etherdev(dev, sizeof(struct ks8851_net_par));
282 ks = netdev_priv(netdev);
284 ks->lock = ks8851_lock_par;
285 ks->unlock = ks8851_unlock_par;
286 ks->rdreg16 = ks8851_rdreg16_par;
287 ks->wrreg16 = ks8851_wrreg16_par;
288 ks->rdfifo = ks8851_rdfifo_par;
289 ks->wrfifo = ks8851_wrfifo_par;
290 ks->start_xmit = ks8851_start_xmit_par;
292 #define STD_IRQ (IRQ_LCI | /* Link Change */ \
293 IRQ_RXI | /* RX done */ \
294 IRQ_RXPSI) /* RX process stop */
295 ks->rc_ier = STD_IRQ;
297 ksp = to_ks8851_par(ks);
298 spin_lock_init(&ksp->lock);
300 ksp->hw_addr = devm_platform_ioremap_resource(pdev, 0);
301 if (IS_ERR(ksp->hw_addr))
302 return PTR_ERR(ksp->hw_addr);
304 ksp->hw_addr_cmd = devm_platform_ioremap_resource(pdev, 1);
305 if (IS_ERR(ksp->hw_addr_cmd))
306 return PTR_ERR(ksp->hw_addr_cmd);
308 ret = ks_check_endian(ks);
312 netdev->irq = platform_get_irq(pdev, 0);
316 return ks8851_probe_common(netdev, dev, msg_enable);
319 static void ks8851_remove_par(struct platform_device *pdev)
321 ks8851_remove_common(&pdev->dev);
324 static const struct of_device_id ks8851_match_table[] = {
325 { .compatible = "micrel,ks8851-mll" },
328 MODULE_DEVICE_TABLE(of, ks8851_match_table);
330 static struct platform_driver ks8851_driver = {
333 .of_match_table = ks8851_match_table,
334 .pm = &ks8851_pm_ops,
336 .probe = ks8851_probe_par,
337 .remove = ks8851_remove_par,
339 module_platform_driver(ks8851_driver);
341 MODULE_DESCRIPTION("KS8851 Network driver");
343 MODULE_LICENSE("GPL");
345 module_param_named(message, msg_enable, int, 0);
346 MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");