1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2005 Sascha Hauer, Pengutronix
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/interrupt.h>
10 #include <linux/netdevice.h>
11 #include <linux/delay.h>
12 #include <linux/pci.h>
13 #include <linux/platform_device.h>
14 #include <linux/irq.h>
15 #include <linux/can/dev.h>
16 #include <linux/can/platform/sja1000.h>
17 #include <linux/clk.h>
23 #define DRV_NAME "sja1000_platform"
24 #define SP_CAN_CLOCK (16000000 / 2)
28 MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus");
29 MODULE_ALIAS("platform:" DRV_NAME);
30 MODULE_LICENSE("GPL v2");
32 struct sja1000_of_data {
34 void (*init)(struct sja1000_priv *priv, struct device_node *of);
37 struct technologic_priv {
41 static u8 sp_read_reg8(const struct sja1000_priv *priv, int reg)
43 return ioread8(priv->reg_base + reg);
46 static void sp_write_reg8(const struct sja1000_priv *priv, int reg, u8 val)
48 iowrite8(val, priv->reg_base + reg);
51 static u8 sp_read_reg16(const struct sja1000_priv *priv, int reg)
53 return ioread8(priv->reg_base + reg * 2);
56 static void sp_write_reg16(const struct sja1000_priv *priv, int reg, u8 val)
58 iowrite8(val, priv->reg_base + reg * 2);
61 static u8 sp_read_reg32(const struct sja1000_priv *priv, int reg)
63 return ioread8(priv->reg_base + reg * 4);
66 static void sp_write_reg32(const struct sja1000_priv *priv, int reg, u8 val)
68 iowrite8(val, priv->reg_base + reg * 4);
71 static u8 sp_technologic_read_reg16(const struct sja1000_priv *priv, int reg)
73 struct technologic_priv *tp = priv->priv;
77 spin_lock_irqsave(&tp->io_lock, flags);
78 iowrite16(reg, priv->reg_base + 0);
79 val = ioread16(priv->reg_base + 2);
80 spin_unlock_irqrestore(&tp->io_lock, flags);
85 static void sp_technologic_write_reg16(const struct sja1000_priv *priv,
88 struct technologic_priv *tp = priv->priv;
91 spin_lock_irqsave(&tp->io_lock, flags);
92 iowrite16(reg, priv->reg_base + 0);
93 iowrite16(val, priv->reg_base + 2);
94 spin_unlock_irqrestore(&tp->io_lock, flags);
97 static void sp_technologic_init(struct sja1000_priv *priv, struct device_node *of)
99 struct technologic_priv *tp = priv->priv;
101 priv->read_reg = sp_technologic_read_reg16;
102 priv->write_reg = sp_technologic_write_reg16;
103 spin_lock_init(&tp->io_lock);
106 static void sp_rzn1_init(struct sja1000_priv *priv, struct device_node *of)
108 priv->flags = SJA1000_QUIRK_NO_CDR_REG | SJA1000_QUIRK_RESET_ON_OVERRUN;
111 static void sp_populate(struct sja1000_priv *priv,
112 struct sja1000_platform_data *pdata,
113 unsigned long resource_mem_flags)
115 /* The CAN clock frequency is half the oscillator clock frequency */
116 priv->can.clock.freq = pdata->osc_freq / 2;
117 priv->ocr = pdata->ocr;
118 priv->cdr = pdata->cdr;
120 switch (resource_mem_flags & IORESOURCE_MEM_TYPE_MASK) {
121 case IORESOURCE_MEM_32BIT:
122 priv->read_reg = sp_read_reg32;
123 priv->write_reg = sp_write_reg32;
125 case IORESOURCE_MEM_16BIT:
126 priv->read_reg = sp_read_reg16;
127 priv->write_reg = sp_write_reg16;
129 case IORESOURCE_MEM_8BIT:
131 priv->read_reg = sp_read_reg8;
132 priv->write_reg = sp_write_reg8;
137 static void sp_populate_of(struct sja1000_priv *priv, struct device_node *of)
142 err = of_property_read_u32(of, "reg-io-width", &prop);
144 prop = 1; /* 8 bit is default */
148 priv->read_reg = sp_read_reg32;
149 priv->write_reg = sp_write_reg32;
152 priv->read_reg = sp_read_reg16;
153 priv->write_reg = sp_write_reg16;
157 priv->read_reg = sp_read_reg8;
158 priv->write_reg = sp_write_reg8;
161 if (!priv->can.clock.freq) {
162 err = of_property_read_u32(of, "nxp,external-clock-frequency", &prop);
164 priv->can.clock.freq = prop / 2;
166 priv->can.clock.freq = SP_CAN_CLOCK; /* default */
169 err = of_property_read_u32(of, "nxp,tx-output-mode", &prop);
171 priv->ocr |= prop & OCR_MODE_MASK;
173 priv->ocr |= OCR_MODE_NORMAL; /* default */
175 err = of_property_read_u32(of, "nxp,tx-output-config", &prop);
177 priv->ocr |= (prop << OCR_TX_SHIFT) & OCR_TX_MASK;
179 priv->ocr |= OCR_TX0_PULLDOWN; /* default */
181 err = of_property_read_u32(of, "nxp,clock-out-frequency", &prop);
183 u32 divider = priv->can.clock.freq * 2 / prop;
186 priv->cdr |= divider / 2 - 1;
188 priv->cdr |= CDR_CLKOUT_MASK;
190 priv->cdr |= CDR_CLK_OFF; /* default */
193 if (!of_property_read_bool(of, "nxp,no-comparator-bypass"))
194 priv->cdr |= CDR_CBP; /* default */
197 static struct sja1000_of_data technologic_data = {
198 .priv_sz = sizeof(struct technologic_priv),
199 .init = sp_technologic_init,
202 static struct sja1000_of_data renesas_data = {
203 .init = sp_rzn1_init,
206 static const struct of_device_id sp_of_table[] = {
207 { .compatible = "nxp,sja1000", .data = NULL, },
208 { .compatible = "renesas,rzn1-sja1000", .data = &renesas_data, },
209 { .compatible = "technologic,sja1000", .data = &technologic_data, },
212 MODULE_DEVICE_TABLE(of, sp_of_table);
214 static int sp_probe(struct platform_device *pdev)
218 struct net_device *dev;
219 struct sja1000_priv *priv;
220 struct resource *res_mem, *res_irq = NULL;
221 struct sja1000_platform_data *pdata;
222 struct device_node *of = pdev->dev.of_node;
223 const struct sja1000_of_data *of_data = NULL;
227 pdata = dev_get_platdata(&pdev->dev);
229 dev_err(&pdev->dev, "No platform data provided!\n");
233 addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res_mem);
235 return PTR_ERR(addr);
238 irq = platform_get_irq(pdev, 0);
242 clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
244 return dev_err_probe(&pdev->dev, PTR_ERR(clk),
245 "CAN clk operation failed");
247 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
252 of_data = device_get_match_data(&pdev->dev);
254 priv_sz = of_data->priv_sz;
256 dev = alloc_sja1000dev(priv_sz);
259 priv = netdev_priv(dev);
262 irq = res_irq->start;
263 priv->irq_flags = res_irq->flags & IRQF_TRIGGER_MASK;
264 if (res_irq->flags & IORESOURCE_IRQ_SHAREABLE)
265 priv->irq_flags |= IRQF_SHARED;
267 priv->irq_flags = IRQF_SHARED;
270 if (priv->flags & SJA1000_QUIRK_RESET_ON_OVERRUN)
271 priv->irq_flags |= IRQF_ONESHOT;
274 priv->reg_base = addr;
278 priv->can.clock.freq = clk_get_rate(clk) / 2;
279 if (!priv->can.clock.freq) {
281 dev_err(&pdev->dev, "Zero CAN clk rate");
286 sp_populate_of(priv, of);
288 if (of_data && of_data->init)
289 of_data->init(priv, of);
291 sp_populate(priv, pdata, res_mem->flags);
294 platform_set_drvdata(pdev, dev);
295 SET_NETDEV_DEV(dev, &pdev->dev);
297 err = register_sja1000dev(dev);
299 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
304 dev_info(&pdev->dev, "%s device registered (reg_base=%p, irq=%d)\n",
305 DRV_NAME, priv->reg_base, dev->irq);
309 free_sja1000dev(dev);
313 static void sp_remove(struct platform_device *pdev)
315 struct net_device *dev = platform_get_drvdata(pdev);
317 unregister_sja1000dev(dev);
318 free_sja1000dev(dev);
321 static struct platform_driver sp_driver = {
326 .of_match_table = sp_of_table,
330 module_platform_driver(sp_driver);