1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Main module for NetUP Universal Dual DVB-CI
7 * Copyright (C) 2014 NetUP Inc.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/kmod.h>
16 #include <linux/kernel.h>
17 #include <linux/slab.h>
18 #include <linux/interrupt.h>
19 #include <linux/delay.h>
20 #include <linux/list.h>
21 #include <media/videobuf2-v4l2.h>
22 #include <media/videobuf2-vmalloc.h>
24 #include "netup_unidvb.h"
25 #include "cxd2841er.h"
31 static int spi_enable;
32 module_param(spi_enable, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
34 MODULE_DESCRIPTION("Driver for NetUP Dual Universal DVB CI PCIe card");
36 MODULE_VERSION(NETUP_UNIDVB_VERSION);
37 MODULE_LICENSE("GPL");
39 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
41 /* Avalon-MM PCI-E registers */
42 #define AVL_PCIE_IENR 0x50
43 #define AVL_PCIE_ISR 0x40
44 #define AVL_IRQ_ENABLE 0x80
45 #define AVL_IRQ_ASSERTED 0x80
47 #define GPIO_REG_IO 0x4880
48 #define GPIO_REG_IO_TOGGLE 0x4882
49 #define GPIO_REG_IO_SET 0x4884
50 #define GPIO_REG_IO_CLEAR 0x4886
52 #define GPIO_FEA_RESET (1 << 0)
53 #define GPIO_FEB_RESET (1 << 1)
54 #define GPIO_RFA_CTL (1 << 2)
55 #define GPIO_RFB_CTL (1 << 3)
56 #define GPIO_FEA_TU_RESET (1 << 4)
57 #define GPIO_FEB_TU_RESET (1 << 5)
58 /* DMA base address */
59 #define NETUP_DMA0_ADDR 0x4900
60 #define NETUP_DMA1_ADDR 0x4940
61 /* 8 DMA blocks * 128 packets * 188 bytes*/
62 #define NETUP_DMA_BLOCKS_COUNT 8
63 #define NETUP_DMA_PACKETS_COUNT 128
66 #define BIT_DMA_ERROR 2
67 #define BIT_DMA_IRQ 0x200
70 * struct netup_dma_regs - the map of DMA module registers
71 * @ctrlstat_set: Control register, write to set control bits
72 * @ctrlstat_clear: Control register, write to clear control bits
73 * @start_addr_lo: DMA ring buffer start address, lower part
74 * @start_addr_hi: DMA ring buffer start address, higher part
75 * @size: DMA ring buffer size register
76 * * Bits [0-7]: DMA packet size, 188 bytes
77 * * Bits [16-23]: packets count in block, 128 packets
78 * * Bits [24-31]: blocks count, 8 blocks
79 * @timeout: DMA timeout in units of 8ns
80 * For example, value of 375000000 equals to 3 sec
81 * @curr_addr_lo: Current ring buffer head address, lower part
82 * @curr_addr_hi: Current ring buffer head address, higher part
83 * @stat_pkt_received: Statistic register, not tested
84 * @stat_pkt_accepted: Statistic register, not tested
85 * @stat_pkt_overruns: Statistic register, not tested
86 * @stat_pkt_underruns: Statistic register, not tested
87 * @stat_fifo_overruns: Statistic register, not tested
89 struct netup_dma_regs {
91 __le32 ctrlstat_clear;
98 __le32 stat_pkt_received;
99 __le32 stat_pkt_accepted;
100 __le32 stat_pkt_overruns;
101 __le32 stat_pkt_underruns;
102 __le32 stat_fifo_overruns;
103 } __packed __aligned(1);
105 struct netup_unidvb_buffer {
106 struct vb2_v4l2_buffer vb;
107 struct list_head list;
111 static int netup_unidvb_tuner_ctrl(void *priv, int is_dvb_tc);
112 static void netup_unidvb_queue_cleanup(struct netup_dma *dma);
114 static struct cxd2841er_config demod_config = {
116 .xtal = SONY_XTAL_24000,
117 .flags = CXD2841ER_USE_GATECTRL | CXD2841ER_ASCOT
120 static struct horus3a_config horus3a_conf = {
123 .set_tuner_callback = netup_unidvb_tuner_ctrl
126 static struct ascot2e_config ascot2e_conf = {
128 .set_tuner_callback = netup_unidvb_tuner_ctrl
131 static struct helene_config helene_conf = {
133 .xtal = SONY_HELENE_XTAL_24000,
134 .set_tuner_callback = netup_unidvb_tuner_ctrl
137 static struct lnbh25_config lnbh25_conf = {
139 .data2_config = LNBH25_TEN | LNBH25_EXTM
142 static int netup_unidvb_tuner_ctrl(void *priv, int is_dvb_tc)
145 struct netup_dma *dma = priv;
146 struct netup_unidvb_dev *ndev;
151 dev_dbg(&ndev->pci_dev->dev, "%s(): num %d is_dvb_tc %d\n",
152 __func__, dma->num, is_dvb_tc);
153 reg = readb(ndev->bmmio0 + GPIO_REG_IO);
154 mask = (dma->num == 0) ? GPIO_RFA_CTL : GPIO_RFB_CTL;
156 /* inverted tuner control in hw rev. 1.4 */
157 if (ndev->rev == NETUP_HW_REV_1_4)
158 is_dvb_tc = !is_dvb_tc;
164 writeb(reg, ndev->bmmio0 + GPIO_REG_IO);
168 static void netup_unidvb_dev_enable(struct netup_unidvb_dev *ndev)
172 /* enable PCI-E interrupts */
173 writel(AVL_IRQ_ENABLE, ndev->bmmio0 + AVL_PCIE_IENR);
174 /* unreset frontends bits[0:1] */
175 writeb(0x00, ndev->bmmio0 + GPIO_REG_IO);
178 GPIO_FEA_RESET | GPIO_FEB_RESET |
179 GPIO_FEA_TU_RESET | GPIO_FEB_TU_RESET |
180 GPIO_RFA_CTL | GPIO_RFB_CTL;
181 writeb(gpio_reg, ndev->bmmio0 + GPIO_REG_IO);
182 dev_dbg(&ndev->pci_dev->dev,
183 "%s(): AVL_PCIE_IENR 0x%x GPIO_REG_IO 0x%x\n",
184 __func__, readl(ndev->bmmio0 + AVL_PCIE_IENR),
185 (int)readb(ndev->bmmio0 + GPIO_REG_IO));
189 static void netup_unidvb_dma_enable(struct netup_dma *dma, int enable)
191 u32 irq_mask = (dma->num == 0 ?
192 NETUP_UNIDVB_IRQ_DMA1 : NETUP_UNIDVB_IRQ_DMA2);
194 dev_dbg(&dma->ndev->pci_dev->dev,
195 "%s(): DMA%d enable %d\n", __func__, dma->num, enable);
197 writel(BIT_DMA_RUN, &dma->regs->ctrlstat_set);
198 writew(irq_mask, dma->ndev->bmmio0 + REG_IMASK_SET);
200 writel(BIT_DMA_RUN, &dma->regs->ctrlstat_clear);
201 writew(irq_mask, dma->ndev->bmmio0 + REG_IMASK_CLEAR);
205 static irqreturn_t netup_dma_interrupt(struct netup_dma *dma)
210 struct device *dev = &dma->ndev->pci_dev->dev;
212 spin_lock_irqsave(&dma->lock, flags);
213 addr_curr = ((u64)readl(&dma->regs->curr_addr_hi) << 32) |
214 (u64)readl(&dma->regs->curr_addr_lo) | dma->high_addr;
216 writel(BIT_DMA_IRQ, &dma->regs->ctrlstat_clear);
218 if (addr_curr < dma->addr_phys ||
219 addr_curr > dma->addr_phys + dma->ring_buffer_size) {
220 if (addr_curr != 0) {
222 "%s(): addr 0x%llx not from 0x%llx:0x%llx\n",
223 __func__, addr_curr, (u64)dma->addr_phys,
224 (u64)(dma->addr_phys + dma->ring_buffer_size));
228 size = (addr_curr >= dma->addr_last) ?
229 (u32)(addr_curr - dma->addr_last) :
230 (u32)(dma->ring_buffer_size - (dma->addr_last - addr_curr));
231 if (dma->data_size != 0) {
232 printk_ratelimited("%s(): lost interrupt, data size %d\n",
233 __func__, dma->data_size);
234 dma->data_size += size;
236 if (dma->data_size == 0 || dma->data_size > dma->ring_buffer_size) {
237 dma->data_size = size;
238 dma->data_offset = (u32)(dma->addr_last - dma->addr_phys);
240 dma->addr_last = addr_curr;
241 queue_work(dma->ndev->wq, &dma->work);
243 spin_unlock_irqrestore(&dma->lock, flags);
247 static irqreturn_t netup_unidvb_isr(int irq, void *dev_id)
249 struct pci_dev *pci_dev = (struct pci_dev *)dev_id;
250 struct netup_unidvb_dev *ndev = pci_get_drvdata(pci_dev);
252 irqreturn_t iret = IRQ_NONE;
254 /* disable interrupts */
255 writel(0, ndev->bmmio0 + AVL_PCIE_IENR);
256 /* check IRQ source */
257 reg40 = readl(ndev->bmmio0 + AVL_PCIE_ISR);
258 if ((reg40 & AVL_IRQ_ASSERTED) != 0) {
259 /* IRQ is being signaled */
260 reg_isr = readw(ndev->bmmio0 + REG_ISR);
261 if (reg_isr & NETUP_UNIDVB_IRQ_SPI)
262 iret = netup_spi_interrupt(ndev->spi);
263 else if (!ndev->old_fw) {
264 if (reg_isr & NETUP_UNIDVB_IRQ_I2C0) {
265 iret = netup_i2c_interrupt(&ndev->i2c[0]);
266 } else if (reg_isr & NETUP_UNIDVB_IRQ_I2C1) {
267 iret = netup_i2c_interrupt(&ndev->i2c[1]);
268 } else if (reg_isr & NETUP_UNIDVB_IRQ_DMA1) {
269 iret = netup_dma_interrupt(&ndev->dma[0]);
270 } else if (reg_isr & NETUP_UNIDVB_IRQ_DMA2) {
271 iret = netup_dma_interrupt(&ndev->dma[1]);
272 } else if (reg_isr & NETUP_UNIDVB_IRQ_CI) {
273 iret = netup_ci_interrupt(ndev);
279 dev_err(&pci_dev->dev,
280 "%s(): unknown interrupt 0x%x\n",
284 /* re-enable interrupts */
285 writel(AVL_IRQ_ENABLE, ndev->bmmio0 + AVL_PCIE_IENR);
289 static int netup_unidvb_queue_setup(struct vb2_queue *vq,
290 unsigned int *nbuffers,
291 unsigned int *nplanes,
292 unsigned int sizes[],
293 struct device *alloc_devs[])
295 struct netup_dma *dma = vb2_get_drv_priv(vq);
296 unsigned int q_num_bufs = vb2_get_num_buffers(vq);
298 dev_dbg(&dma->ndev->pci_dev->dev, "%s()\n", __func__);
301 if (q_num_bufs + *nbuffers < VIDEO_MAX_FRAME)
302 *nbuffers = VIDEO_MAX_FRAME - q_num_bufs;
303 sizes[0] = PAGE_ALIGN(NETUP_DMA_PACKETS_COUNT * 188);
304 dev_dbg(&dma->ndev->pci_dev->dev, "%s() nbuffers=%d sizes[0]=%d\n",
305 __func__, *nbuffers, sizes[0]);
309 static int netup_unidvb_buf_prepare(struct vb2_buffer *vb)
311 struct netup_dma *dma = vb2_get_drv_priv(vb->vb2_queue);
312 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
313 struct netup_unidvb_buffer *buf = container_of(vbuf,
314 struct netup_unidvb_buffer, vb);
316 dev_dbg(&dma->ndev->pci_dev->dev, "%s(): buf 0x%p\n", __func__, buf);
321 static void netup_unidvb_buf_queue(struct vb2_buffer *vb)
324 struct netup_dma *dma = vb2_get_drv_priv(vb->vb2_queue);
325 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
326 struct netup_unidvb_buffer *buf = container_of(vbuf,
327 struct netup_unidvb_buffer, vb);
329 dev_dbg(&dma->ndev->pci_dev->dev, "%s(): %p\n", __func__, buf);
330 spin_lock_irqsave(&dma->lock, flags);
331 list_add_tail(&buf->list, &dma->free_buffers);
332 spin_unlock_irqrestore(&dma->lock, flags);
333 mod_timer(&dma->timeout, jiffies + msecs_to_jiffies(1000));
336 static int netup_unidvb_start_streaming(struct vb2_queue *q, unsigned int count)
338 struct netup_dma *dma = vb2_get_drv_priv(q);
340 dev_dbg(&dma->ndev->pci_dev->dev, "%s()\n", __func__);
341 netup_unidvb_dma_enable(dma, 1);
345 static void netup_unidvb_stop_streaming(struct vb2_queue *q)
347 struct netup_dma *dma = vb2_get_drv_priv(q);
349 dev_dbg(&dma->ndev->pci_dev->dev, "%s()\n", __func__);
350 netup_unidvb_dma_enable(dma, 0);
351 netup_unidvb_queue_cleanup(dma);
354 static const struct vb2_ops dvb_qops = {
355 .queue_setup = netup_unidvb_queue_setup,
356 .buf_prepare = netup_unidvb_buf_prepare,
357 .buf_queue = netup_unidvb_buf_queue,
358 .start_streaming = netup_unidvb_start_streaming,
359 .stop_streaming = netup_unidvb_stop_streaming,
362 static int netup_unidvb_queue_init(struct netup_dma *dma,
363 struct vb2_queue *vb_queue)
367 /* Init videobuf2 queue structure */
368 vb_queue->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
369 vb_queue->io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ;
370 vb_queue->drv_priv = dma;
371 vb_queue->buf_struct_size = sizeof(struct netup_unidvb_buffer);
372 vb_queue->ops = &dvb_qops;
373 vb_queue->mem_ops = &vb2_vmalloc_memops;
374 vb_queue->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
375 res = vb2_queue_init(vb_queue);
377 dev_err(&dma->ndev->pci_dev->dev,
378 "%s(): vb2_queue_init failed (%d)\n", __func__, res);
383 static int netup_unidvb_dvb_init(struct netup_unidvb_dev *ndev,
388 struct vb2_dvb_frontend *fes[2];
391 if (ndev->rev == NETUP_HW_REV_1_3)
392 demod_config.xtal = SONY_XTAL_20500;
394 demod_config.xtal = SONY_XTAL_24000;
396 if (num < 0 || num > 1) {
397 dev_dbg(&ndev->pci_dev->dev,
398 "%s(): unable to init DVB bus %d\n", __func__, num);
401 mutex_init(&ndev->frontends[num].lock);
402 INIT_LIST_HEAD(&ndev->frontends[num].felist);
404 for (i = 0; i < fe_count; i++) {
405 if (vb2_dvb_alloc_frontend(&ndev->frontends[num], i+1)
407 dev_err(&ndev->pci_dev->dev,
408 "%s(): unable to allocate vb2_dvb_frontend\n",
414 for (i = 0; i < fe_count; i++) {
415 fes[i] = vb2_dvb_get_frontend(&ndev->frontends[num], i+1);
416 if (fes[i] == NULL) {
417 dev_err(&ndev->pci_dev->dev,
418 "%s(): frontends has not been allocated\n",
424 for (i = 0; i < fe_count; i++) {
425 netup_unidvb_queue_init(&ndev->dma[num], &fes[i]->dvb.dvbq);
426 snprintf(fe_name, sizeof(fe_name), "netup_fe%d", i);
427 fes[i]->dvb.name = fe_name;
430 fes[0]->dvb.frontend = dvb_attach(cxd2841er_attach_s,
431 &demod_config, &ndev->i2c[num].adap);
432 if (fes[0]->dvb.frontend == NULL) {
433 dev_dbg(&ndev->pci_dev->dev,
434 "%s(): unable to attach DVB-S/S2 frontend\n",
436 goto frontend_detach;
439 if (ndev->rev == NETUP_HW_REV_1_3) {
440 horus3a_conf.set_tuner_priv = &ndev->dma[num];
441 if (!dvb_attach(horus3a_attach, fes[0]->dvb.frontend,
442 &horus3a_conf, &ndev->i2c[num].adap)) {
443 dev_dbg(&ndev->pci_dev->dev,
444 "%s(): unable to attach HORUS3A DVB-S/S2 tuner frontend\n",
446 goto frontend_detach;
449 helene_conf.set_tuner_priv = &ndev->dma[num];
450 if (!dvb_attach(helene_attach_s, fes[0]->dvb.frontend,
451 &helene_conf, &ndev->i2c[num].adap)) {
452 dev_err(&ndev->pci_dev->dev,
453 "%s(): unable to attach HELENE DVB-S/S2 tuner frontend\n",
455 goto frontend_detach;
459 if (!dvb_attach(lnbh25_attach, fes[0]->dvb.frontend,
460 &lnbh25_conf, &ndev->i2c[num].adap)) {
461 dev_dbg(&ndev->pci_dev->dev,
462 "%s(): unable to attach SEC frontend\n", __func__);
463 goto frontend_detach;
466 /* DVB-T/T2 frontend */
467 fes[1]->dvb.frontend = dvb_attach(cxd2841er_attach_t_c,
468 &demod_config, &ndev->i2c[num].adap);
469 if (fes[1]->dvb.frontend == NULL) {
470 dev_dbg(&ndev->pci_dev->dev,
471 "%s(): unable to attach Ter frontend\n", __func__);
472 goto frontend_detach;
474 fes[1]->dvb.frontend->id = 1;
475 if (ndev->rev == NETUP_HW_REV_1_3) {
476 ascot2e_conf.set_tuner_priv = &ndev->dma[num];
477 if (!dvb_attach(ascot2e_attach, fes[1]->dvb.frontend,
478 &ascot2e_conf, &ndev->i2c[num].adap)) {
479 dev_dbg(&ndev->pci_dev->dev,
480 "%s(): unable to attach Ter tuner frontend\n",
482 goto frontend_detach;
485 helene_conf.set_tuner_priv = &ndev->dma[num];
486 if (!dvb_attach(helene_attach, fes[1]->dvb.frontend,
487 &helene_conf, &ndev->i2c[num].adap)) {
488 dev_err(&ndev->pci_dev->dev,
489 "%s(): unable to attach HELENE Ter tuner frontend\n",
491 goto frontend_detach;
495 if (vb2_dvb_register_bus(&ndev->frontends[num],
497 &ndev->pci_dev->dev, NULL, adapter_nr, 1)) {
498 dev_dbg(&ndev->pci_dev->dev,
499 "%s(): unable to register DVB bus %d\n",
501 goto frontend_detach;
503 dev_info(&ndev->pci_dev->dev, "DVB init done, num=%d\n", num);
506 vb2_dvb_dealloc_frontends(&ndev->frontends[num]);
510 static void netup_unidvb_dvb_fini(struct netup_unidvb_dev *ndev, int num)
512 if (num < 0 || num > 1) {
513 dev_err(&ndev->pci_dev->dev,
514 "%s(): unable to unregister DVB bus %d\n",
518 vb2_dvb_unregister_bus(&ndev->frontends[num]);
519 dev_info(&ndev->pci_dev->dev,
520 "%s(): DVB bus %d unregistered\n", __func__, num);
523 static int netup_unidvb_dvb_setup(struct netup_unidvb_dev *ndev)
527 res = netup_unidvb_dvb_init(ndev, 0);
530 res = netup_unidvb_dvb_init(ndev, 1);
532 netup_unidvb_dvb_fini(ndev, 0);
538 static int netup_unidvb_ring_copy(struct netup_dma *dma,
539 struct netup_unidvb_buffer *buf)
541 u32 copy_bytes, ring_bytes;
542 u32 buff_bytes = NETUP_DMA_PACKETS_COUNT * 188 - buf->size;
543 u8 *p = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
544 struct netup_unidvb_dev *ndev = dma->ndev;
547 dev_err(&ndev->pci_dev->dev,
548 "%s(): buffer is NULL\n", __func__);
552 if (dma->data_offset + dma->data_size > dma->ring_buffer_size) {
553 ring_bytes = dma->ring_buffer_size - dma->data_offset;
554 copy_bytes = (ring_bytes > buff_bytes) ?
555 buff_bytes : ring_bytes;
556 memcpy_fromio(p, (u8 __iomem *)(dma->addr_virt + dma->data_offset), copy_bytes);
558 buf->size += copy_bytes;
559 buff_bytes -= copy_bytes;
560 dma->data_size -= copy_bytes;
561 dma->data_offset += copy_bytes;
562 if (dma->data_offset == dma->ring_buffer_size)
563 dma->data_offset = 0;
565 if (buff_bytes > 0) {
566 ring_bytes = dma->data_size;
567 copy_bytes = (ring_bytes > buff_bytes) ?
568 buff_bytes : ring_bytes;
569 memcpy_fromio(p, (u8 __iomem *)(dma->addr_virt + dma->data_offset), copy_bytes);
570 buf->size += copy_bytes;
571 dma->data_size -= copy_bytes;
572 dma->data_offset += copy_bytes;
573 if (dma->data_offset == dma->ring_buffer_size)
574 dma->data_offset = 0;
579 static void netup_unidvb_dma_worker(struct work_struct *work)
581 struct netup_dma *dma = container_of(work, struct netup_dma, work);
582 struct netup_unidvb_dev *ndev = dma->ndev;
583 struct netup_unidvb_buffer *buf;
586 spin_lock_irqsave(&dma->lock, flags);
587 if (dma->data_size == 0) {
588 dev_dbg(&ndev->pci_dev->dev,
589 "%s(): data_size == 0\n", __func__);
592 while (dma->data_size > 0) {
593 if (list_empty(&dma->free_buffers)) {
594 dev_dbg(&ndev->pci_dev->dev,
595 "%s(): no free buffers\n", __func__);
598 buf = list_first_entry(&dma->free_buffers,
599 struct netup_unidvb_buffer, list);
600 if (buf->size >= NETUP_DMA_PACKETS_COUNT * 188) {
601 dev_dbg(&ndev->pci_dev->dev,
602 "%s(): buffer overflow, size %d\n",
603 __func__, buf->size);
606 if (netup_unidvb_ring_copy(dma, buf))
608 if (buf->size == NETUP_DMA_PACKETS_COUNT * 188) {
609 list_del(&buf->list);
610 dev_dbg(&ndev->pci_dev->dev,
611 "%s(): buffer %p done, size %d\n",
612 __func__, buf, buf->size);
613 buf->vb.vb2_buf.timestamp = ktime_get_ns();
614 vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
615 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
620 spin_unlock_irqrestore(&dma->lock, flags);
623 static void netup_unidvb_queue_cleanup(struct netup_dma *dma)
625 struct netup_unidvb_buffer *buf;
628 spin_lock_irqsave(&dma->lock, flags);
629 while (!list_empty(&dma->free_buffers)) {
630 buf = list_first_entry(&dma->free_buffers,
631 struct netup_unidvb_buffer, list);
632 list_del(&buf->list);
633 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
635 spin_unlock_irqrestore(&dma->lock, flags);
638 static void netup_unidvb_dma_timeout(struct timer_list *t)
640 struct netup_dma *dma = from_timer(dma, t, timeout);
641 struct netup_unidvb_dev *ndev = dma->ndev;
643 dev_dbg(&ndev->pci_dev->dev, "%s()\n", __func__);
644 netup_unidvb_queue_cleanup(dma);
647 static int netup_unidvb_dma_init(struct netup_unidvb_dev *ndev, int num)
649 struct netup_dma *dma;
650 struct device *dev = &ndev->pci_dev->dev;
652 if (num < 0 || num > 1) {
653 dev_err(dev, "%s(): unable to register DMA%d\n",
657 dma = &ndev->dma[num];
658 dev_info(dev, "%s(): starting DMA%d\n", __func__, num);
661 spin_lock_init(&dma->lock);
662 INIT_WORK(&dma->work, netup_unidvb_dma_worker);
663 INIT_LIST_HEAD(&dma->free_buffers);
664 timer_setup(&dma->timeout, netup_unidvb_dma_timeout, 0);
665 dma->ring_buffer_size = ndev->dma_size / 2;
666 dma->addr_virt = ndev->dma_virt + dma->ring_buffer_size * num;
667 dma->addr_phys = (dma_addr_t)((u64)ndev->dma_phys +
668 dma->ring_buffer_size * num);
669 dev_info(dev, "%s(): DMA%d buffer virt/phys 0x%p/0x%llx size %d\n",
670 __func__, num, dma->addr_virt,
671 (unsigned long long)dma->addr_phys,
672 dma->ring_buffer_size);
673 memset_io((u8 __iomem *)dma->addr_virt, 0, dma->ring_buffer_size);
674 dma->addr_last = dma->addr_phys;
675 dma->high_addr = (u32)(dma->addr_phys & 0xC0000000);
676 dma->regs = (struct netup_dma_regs __iomem *)(num == 0 ?
677 ndev->bmmio0 + NETUP_DMA0_ADDR :
678 ndev->bmmio0 + NETUP_DMA1_ADDR);
679 writel((NETUP_DMA_BLOCKS_COUNT << 24) |
680 (NETUP_DMA_PACKETS_COUNT << 8) | 188, &dma->regs->size);
681 writel((u32)(dma->addr_phys & 0x3FFFFFFF), &dma->regs->start_addr_lo);
682 writel(0, &dma->regs->start_addr_hi);
683 writel(dma->high_addr, ndev->bmmio0 + 0x1000);
684 writel(375000000, &dma->regs->timeout);
686 writel(BIT_DMA_IRQ, &dma->regs->ctrlstat_clear);
690 static void netup_unidvb_dma_fini(struct netup_unidvb_dev *ndev, int num)
692 struct netup_dma *dma;
694 if (num < 0 || num > 1)
696 dev_dbg(&ndev->pci_dev->dev, "%s(): num %d\n", __func__, num);
697 dma = &ndev->dma[num];
698 netup_unidvb_dma_enable(dma, 0);
700 cancel_work_sync(&dma->work);
701 del_timer_sync(&dma->timeout);
704 static int netup_unidvb_dma_setup(struct netup_unidvb_dev *ndev)
708 res = netup_unidvb_dma_init(ndev, 0);
711 res = netup_unidvb_dma_init(ndev, 1);
713 netup_unidvb_dma_fini(ndev, 0);
716 netup_unidvb_dma_enable(&ndev->dma[0], 0);
717 netup_unidvb_dma_enable(&ndev->dma[1], 0);
721 static int netup_unidvb_ci_setup(struct netup_unidvb_dev *ndev,
722 struct pci_dev *pci_dev)
726 writew(NETUP_UNIDVB_IRQ_CI, ndev->bmmio0 + REG_IMASK_SET);
727 res = netup_unidvb_ci_register(ndev, 0, pci_dev);
730 res = netup_unidvb_ci_register(ndev, 1, pci_dev);
732 netup_unidvb_ci_unregister(ndev, 0);
736 static int netup_unidvb_request_mmio(struct pci_dev *pci_dev)
738 if (!request_mem_region(pci_resource_start(pci_dev, 0),
739 pci_resource_len(pci_dev, 0), NETUP_UNIDVB_NAME)) {
740 dev_err(&pci_dev->dev,
741 "%s(): unable to request MMIO bar 0 at 0x%llx\n",
743 (unsigned long long)pci_resource_start(pci_dev, 0));
746 if (!request_mem_region(pci_resource_start(pci_dev, 1),
747 pci_resource_len(pci_dev, 1), NETUP_UNIDVB_NAME)) {
748 dev_err(&pci_dev->dev,
749 "%s(): unable to request MMIO bar 1 at 0x%llx\n",
751 (unsigned long long)pci_resource_start(pci_dev, 1));
752 release_mem_region(pci_resource_start(pci_dev, 0),
753 pci_resource_len(pci_dev, 0));
759 static int netup_unidvb_request_modules(struct device *dev)
761 static const char * const modules[] = {
762 "lnbh25", "ascot2e", "horus3a", "cxd2841er", "helene", NULL
764 const char * const *curr_mod = modules;
767 while (*curr_mod != NULL) {
768 err = request_module(*curr_mod);
770 dev_warn(dev, "request_module(%s) failed: %d\n",
778 static int netup_unidvb_initdev(struct pci_dev *pci_dev,
779 const struct pci_device_id *pci_id)
783 struct netup_unidvb_dev *ndev;
784 int old_firmware = 0;
786 netup_unidvb_request_modules(&pci_dev->dev);
788 /* Check card revision */
789 if (pci_dev->revision != NETUP_PCI_DEV_REVISION) {
790 dev_err(&pci_dev->dev,
791 "netup_unidvb: expected card revision %d, got %d\n",
792 NETUP_PCI_DEV_REVISION, pci_dev->revision);
793 dev_err(&pci_dev->dev,
794 "Please upgrade firmware!\n");
795 dev_err(&pci_dev->dev,
796 "Instructions on http://www.netup.tv\n");
801 /* allocate device context */
802 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
806 /* detect hardware revision */
807 if (pci_dev->device == NETUP_HW_REV_1_3)
808 ndev->rev = NETUP_HW_REV_1_3;
810 ndev->rev = NETUP_HW_REV_1_4;
812 dev_info(&pci_dev->dev,
813 "%s(): board (0x%x) hardware revision 0x%x\n",
814 __func__, pci_dev->device, ndev->rev);
816 ndev->old_fw = old_firmware;
817 ndev->wq = create_singlethread_workqueue(NETUP_UNIDVB_NAME);
819 dev_err(&pci_dev->dev,
820 "%s(): unable to create workqueue\n", __func__);
823 ndev->pci_dev = pci_dev;
824 ndev->pci_bus = pci_dev->bus->number;
825 ndev->pci_slot = PCI_SLOT(pci_dev->devfn);
826 ndev->pci_func = PCI_FUNC(pci_dev->devfn);
827 ndev->board_num = ndev->pci_bus*10 + ndev->pci_slot;
828 pci_set_drvdata(pci_dev, ndev);
830 dev_info(&pci_dev->dev, "%s(): PCI device (%d). Bus:0x%x Slot:0x%x\n",
831 __func__, ndev->board_num, ndev->pci_bus, ndev->pci_slot);
833 if (pci_enable_device(pci_dev)) {
834 dev_err(&pci_dev->dev, "%s(): pci_enable_device failed\n",
839 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &board_revision);
840 pci_read_config_word(pci_dev, PCI_VENDOR_ID, &board_vendor);
841 if (board_vendor != NETUP_VENDOR_ID) {
842 dev_err(&pci_dev->dev, "%s(): unknown board vendor 0x%x",
843 __func__, board_vendor);
846 dev_info(&pci_dev->dev,
847 "%s(): board vendor 0x%x, revision 0x%x\n",
848 __func__, board_vendor, board_revision);
849 pci_set_master(pci_dev);
850 if (dma_set_mask(&pci_dev->dev, 0xffffffff) < 0) {
851 dev_err(&pci_dev->dev,
852 "%s(): 32bit PCI DMA is not supported\n", __func__);
855 dev_info(&pci_dev->dev, "%s(): using 32bit PCI DMA\n", __func__);
856 /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */
857 pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL,
858 PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
859 PCI_EXP_DEVCTL_NOSNOOP_EN, 0);
860 /* Adjust PCIe completion timeout. */
861 pcie_capability_clear_and_set_word(pci_dev,
862 PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_COMP_TIMEOUT, 0x2);
864 if (netup_unidvb_request_mmio(pci_dev)) {
865 dev_err(&pci_dev->dev,
866 "%s(): unable to request MMIO regions\n", __func__);
869 ndev->lmmio0 = ioremap(pci_resource_start(pci_dev, 0),
870 pci_resource_len(pci_dev, 0));
872 dev_err(&pci_dev->dev,
873 "%s(): unable to remap MMIO bar 0\n", __func__);
876 ndev->lmmio1 = ioremap(pci_resource_start(pci_dev, 1),
877 pci_resource_len(pci_dev, 1));
879 dev_err(&pci_dev->dev,
880 "%s(): unable to remap MMIO bar 1\n", __func__);
883 ndev->bmmio0 = (u8 __iomem *)ndev->lmmio0;
884 ndev->bmmio1 = (u8 __iomem *)ndev->lmmio1;
885 dev_info(&pci_dev->dev,
886 "%s(): PCI MMIO at 0x%p (%d); 0x%p (%d); IRQ %d",
888 ndev->lmmio0, (u32)pci_resource_len(pci_dev, 0),
889 ndev->lmmio1, (u32)pci_resource_len(pci_dev, 1),
892 ndev->dma_size = 2 * 188 *
893 NETUP_DMA_BLOCKS_COUNT * NETUP_DMA_PACKETS_COUNT;
894 ndev->dma_virt = dma_alloc_coherent(&pci_dev->dev,
895 ndev->dma_size, &ndev->dma_phys, GFP_KERNEL);
896 if (!ndev->dma_virt) {
897 dev_err(&pci_dev->dev, "%s(): unable to allocate DMA buffer\n",
901 netup_unidvb_dev_enable(ndev);
902 if (spi_enable && netup_spi_init(ndev)) {
903 dev_warn(&pci_dev->dev,
904 "netup_unidvb: SPI flash setup failed\n");
908 dev_err(&pci_dev->dev,
909 "netup_unidvb: card initialization was incomplete\n");
912 if (netup_i2c_register(ndev)) {
913 dev_err(&pci_dev->dev, "netup_unidvb: I2C setup failed\n");
916 /* enable I2C IRQs */
917 writew(NETUP_UNIDVB_IRQ_I2C0 | NETUP_UNIDVB_IRQ_I2C1,
918 ndev->bmmio0 + REG_IMASK_SET);
919 usleep_range(5000, 10000);
920 if (netup_unidvb_dvb_setup(ndev)) {
921 dev_err(&pci_dev->dev, "netup_unidvb: DVB setup failed\n");
924 if (netup_unidvb_ci_setup(ndev, pci_dev)) {
925 dev_err(&pci_dev->dev, "netup_unidvb: CI setup failed\n");
928 if (netup_unidvb_dma_setup(ndev)) {
929 dev_err(&pci_dev->dev, "netup_unidvb: DMA setup failed\n");
933 if (request_irq(pci_dev->irq, netup_unidvb_isr, IRQF_SHARED,
934 "netup_unidvb", pci_dev) < 0) {
935 dev_err(&pci_dev->dev,
936 "%s(): can't get IRQ %d\n", __func__, pci_dev->irq);
940 dev_info(&pci_dev->dev,
941 "netup_unidvb: device has been initialized\n");
944 netup_unidvb_ci_unregister(ndev, 0);
945 netup_unidvb_ci_unregister(ndev, 1);
947 netup_unidvb_dvb_fini(ndev, 0);
948 netup_unidvb_dvb_fini(ndev, 1);
950 netup_i2c_unregister(ndev);
953 netup_spi_release(ndev);
955 dma_free_coherent(&pci_dev->dev, ndev->dma_size,
956 ndev->dma_virt, ndev->dma_phys);
958 iounmap(ndev->lmmio1);
960 iounmap(ndev->lmmio0);
962 release_mem_region(pci_resource_start(pci_dev, 0),
963 pci_resource_len(pci_dev, 0));
964 release_mem_region(pci_resource_start(pci_dev, 1),
965 pci_resource_len(pci_dev, 1));
967 pci_disable_device(pci_dev);
969 pci_set_drvdata(pci_dev, NULL);
970 destroy_workqueue(ndev->wq);
974 dev_err(&pci_dev->dev,
975 "%s(): failed to initialize device\n", __func__);
979 static void netup_unidvb_finidev(struct pci_dev *pci_dev)
981 struct netup_unidvb_dev *ndev = pci_get_drvdata(pci_dev);
983 dev_info(&pci_dev->dev, "%s(): trying to stop device\n", __func__);
985 netup_unidvb_dma_fini(ndev, 0);
986 netup_unidvb_dma_fini(ndev, 1);
987 netup_unidvb_ci_unregister(ndev, 0);
988 netup_unidvb_ci_unregister(ndev, 1);
989 netup_unidvb_dvb_fini(ndev, 0);
990 netup_unidvb_dvb_fini(ndev, 1);
991 netup_i2c_unregister(ndev);
994 netup_spi_release(ndev);
995 writew(0xffff, ndev->bmmio0 + REG_IMASK_CLEAR);
996 dma_free_coherent(&ndev->pci_dev->dev, ndev->dma_size,
997 ndev->dma_virt, ndev->dma_phys);
998 free_irq(pci_dev->irq, pci_dev);
999 iounmap(ndev->lmmio0);
1000 iounmap(ndev->lmmio1);
1001 release_mem_region(pci_resource_start(pci_dev, 0),
1002 pci_resource_len(pci_dev, 0));
1003 release_mem_region(pci_resource_start(pci_dev, 1),
1004 pci_resource_len(pci_dev, 1));
1005 pci_disable_device(pci_dev);
1006 pci_set_drvdata(pci_dev, NULL);
1007 destroy_workqueue(ndev->wq);
1009 dev_info(&pci_dev->dev,
1010 "%s(): device has been successfully stopped\n", __func__);
1014 static const struct pci_device_id netup_unidvb_pci_tbl[] = {
1015 { PCI_DEVICE(0x1b55, 0x18f6) }, /* hw rev. 1.3 */
1016 { PCI_DEVICE(0x1b55, 0x18f7) }, /* hw rev. 1.4 */
1019 MODULE_DEVICE_TABLE(pci, netup_unidvb_pci_tbl);
1021 static struct pci_driver netup_unidvb_pci_driver = {
1022 .name = "netup_unidvb",
1023 .id_table = netup_unidvb_pci_tbl,
1024 .probe = netup_unidvb_initdev,
1025 .remove = netup_unidvb_finidev,
1028 module_pci_driver(netup_unidvb_pci_driver);