drivers/media/dvb-frontends/mb86a16.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3         Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
   4
   5         Copyright (C) Manu Abraham ([email protected])
   6
   7 */
   8
   9 #include <linux/init.h>
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/moduleparam.h>
  13 #include <linux/slab.h>
  14
  15 #include <media/dvb_frontend.h>
  16 #include "mb86a16.h"
  17 #include "mb86a16_priv.h"
  18
  19 static unsigned int verbose = 5;
  20 module_param(verbose, int, 0644);
  21
  22 struct mb86a16_state {
  23         struct i2c_adapter              *i2c_adap;
  24         const struct mb86a16_config     *config;
  25         struct dvb_frontend             frontend;
  26
  27         /* tuning parameters */
  28         int                             frequency;
  29         int                             srate;
  30
  31         /* Internal stuff */
  32         int                             master_clk;
  33         int                             deci;
  34         int                             csel;
  35         int                             rsel;
  36 };
  37
  38 #define MB86A16_ERROR           0
  39 #define MB86A16_NOTICE          1
  40 #define MB86A16_INFO            2
  41 #define MB86A16_DEBUG           3
  42
  43 #define dprintk(x, y, z, format, arg...) do {                                           \
  44         if (z) {                                                                        \
  45                 if      ((x > MB86A16_ERROR) && (x > y))                                \
  46                         printk(KERN_ERR "%s: " format "\n", __func__, ##arg);           \
  47                 else if ((x > MB86A16_NOTICE) && (x > y))                               \
  48                         printk(KERN_NOTICE "%s: " format "\n", __func__, ##arg);        \
  49                 else if ((x > MB86A16_INFO) && (x > y))                                 \
  50                         printk(KERN_INFO "%s: " format "\n", __func__, ##arg);          \
  51                 else if ((x > MB86A16_DEBUG) && (x > y))                                \
  52                         printk(KERN_DEBUG "%s: " format "\n", __func__, ##arg);         \
  53         } else {                                                                        \
  54                 if (x > y)                                                              \
  55                         printk(format, ##arg);                                          \
  56         }                                                                               \
  57 } while (0)
  58
  59 #define TRACE_IN        dprintk(verbose, MB86A16_DEBUG, 1, "-->()")
  60 #define TRACE_OUT       dprintk(verbose, MB86A16_DEBUG, 1, "()-->")
  61
  62 static int mb86a16_write(struct mb86a16_state *state, u8 reg, u8 val)
  63 {
  64         int ret;
  65         u8 buf[] = { reg, val };
  66
  67         struct i2c_msg msg = {
  68                 .addr = state->config->demod_address,
  69                 .flags = 0,
  70                 .buf = buf,
  71                 .len = 2
  72         };
  73
  74         dprintk(verbose, MB86A16_DEBUG, 1,
  75                 "writing to [0x%02x],Reg[0x%02x],Data[0x%02x]",
  76                 state->config->demod_address, buf[0], buf[1]);
  77
  78         ret = i2c_transfer(state->i2c_adap, &msg, 1);
  79
  80         return (ret != 1) ? -EREMOTEIO : 0;
  81 }
  82
  83 static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val)
  84 {
  85         int ret;
  86         u8 b0[] = { reg };
  87         u8 b1[] = { 0 };
  88
  89         struct i2c_msg msg[] = {
  90                 {
  91                         .addr = state->config->demod_address,
  92                         .flags = 0,
  93                         .buf = b0,
  94                         .len = 1
  95                 }, {
  96                         .addr = state->config->demod_address,
  97                         .flags = I2C_M_RD,
  98                         .buf = b1,
  99                         .len = 1
 100                 }
 101         };
 102         ret = i2c_transfer(state->i2c_adap, msg, 2);
 103         if (ret != 2) {
 104                 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=%i)",
 105                         reg, ret);
 106
 107                 if (ret < 0)
 108                         return ret;
 109                 return -EREMOTEIO;
 110         }
 111         *val = b1[0];
 112
 113         return ret;
 114 }
 115
 116 static int CNTM_set(struct mb86a16_state *state,
 117                     unsigned char timint1,
 118                     unsigned char timint2,
 119                     unsigned char cnext)
 120 {
 121         unsigned char val;
 122
 123         val = (timint1 << 4) | (timint2 << 2) | cnext;
 124         if (mb86a16_write(state, MB86A16_CNTMR, val) < 0)
 125                 goto err;
 126
 127         return 0;
 128
 129 err:
 130         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 131         return -EREMOTEIO;
 132 }
 133
 134 static int smrt_set(struct mb86a16_state *state, int rate)
 135 {
 136         int tmp ;
 137         int m ;
 138         unsigned char STOFS0, STOFS1;
 139
 140         m = 1 << state->deci;
 141         tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk;
 142
 143         STOFS0 = tmp & 0x0ff;
 144         STOFS1 = (tmp & 0xf00) >> 8;
 145
 146         if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) |
 147                                        (state->csel << 1) |
 148                                         state->rsel) < 0)
 149                 goto err;
 150         if (mb86a16_write(state, MB86A16_SRATE2, STOFS0) < 0)
 151                 goto err;
 152         if (mb86a16_write(state, MB86A16_SRATE3, STOFS1) < 0)
 153                 goto err;
 154
 155         return 0;
 156 err:
 157         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 158         return -1;
 159 }
 160
 161 static int srst(struct mb86a16_state *state)
 162 {
 163         if (mb86a16_write(state, MB86A16_RESET, 0x04) < 0)
 164                 goto err;
 165
 166         return 0;
 167 err:
 168         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 169         return -EREMOTEIO;
 170
 171 }
 172
 173 static int afcex_data_set(struct mb86a16_state *state,
 174                           unsigned char AFCEX_L,
 175                           unsigned char AFCEX_H)
 176 {
 177         if (mb86a16_write(state, MB86A16_AFCEXL, AFCEX_L) < 0)
 178                 goto err;
 179         if (mb86a16_write(state, MB86A16_AFCEXH, AFCEX_H) < 0)
 180                 goto err;
 181
 182         return 0;
 183 err:
 184         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 185
 186         return -1;
 187 }
 188
 189 static int afcofs_data_set(struct mb86a16_state *state,
 190                            unsigned char AFCEX_L,
 191                            unsigned char AFCEX_H)
 192 {
 193         if (mb86a16_write(state, 0x58, AFCEX_L) < 0)
 194                 goto err;
 195         if (mb86a16_write(state, 0x59, AFCEX_H) < 0)
 196                 goto err;
 197
 198         return 0;
 199 err:
 200         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 201         return -EREMOTEIO;
 202 }
 203
 204 static int stlp_set(struct mb86a16_state *state,
 205                     unsigned char STRAS,
 206                     unsigned char STRBS)
 207 {
 208         if (mb86a16_write(state, MB86A16_STRFILTCOEF1, (STRBS << 3) | (STRAS)) < 0)
 209                 goto err;
 210
 211         return 0;
 212 err:
 213         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 214         return -EREMOTEIO;
 215 }
 216
 217 static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA)
 218 {
 219         if (mb86a16_write(state, MB86A16_VISET2, 0x04) < 0)
 220                 goto err;
 221         if (mb86a16_write(state, MB86A16_VISET3, 0xf5) < 0)
 222                 goto err;
 223
 224         return 0;
 225 err:
 226         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 227         return -EREMOTEIO;
 228 }
 229
 230 static int initial_set(struct mb86a16_state *state)
 231 {
 232         if (stlp_set(state, 5, 7))
 233                 goto err;
 234
 235         udelay(100);
 236         if (afcex_data_set(state, 0, 0))
 237                 goto err;
 238
 239         udelay(100);
 240         if (afcofs_data_set(state, 0, 0))
 241                 goto err;
 242
 243         udelay(100);
 244         if (mb86a16_write(state, MB86A16_CRLFILTCOEF1, 0x16) < 0)
 245                 goto err;
 246         if (mb86a16_write(state, 0x2f, 0x21) < 0)
 247                 goto err;
 248         if (mb86a16_write(state, MB86A16_VIMAG, 0x38) < 0)
 249                 goto err;
 250         if (mb86a16_write(state, MB86A16_FAGCS1, 0x00) < 0)
 251                 goto err;
 252         if (mb86a16_write(state, MB86A16_FAGCS2, 0x1c) < 0)
 253                 goto err;
 254         if (mb86a16_write(state, MB86A16_FAGCS3, 0x20) < 0)
 255                 goto err;
 256         if (mb86a16_write(state, MB86A16_FAGCS4, 0x1e) < 0)
 257                 goto err;
 258         if (mb86a16_write(state, MB86A16_FAGCS5, 0x23) < 0)
 259                 goto err;
 260         if (mb86a16_write(state, 0x54, 0xff) < 0)
 261                 goto err;
 262         if (mb86a16_write(state, MB86A16_TSOUT, 0x00) < 0)
 263                 goto err;
 264
 265         return 0;
 266
 267 err:
 268         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 269         return -EREMOTEIO;
 270 }
 271
 272 static int S01T_set(struct mb86a16_state *state,
 273                     unsigned char s1t,
 274                     unsigned s0t)
 275 {
 276         if (mb86a16_write(state, 0x33, (s1t << 3) | s0t) < 0)
 277                 goto err;
 278
 279         return 0;
 280 err:
 281         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 282         return -EREMOTEIO;
 283 }
 284
 285
 286 static int EN_set(struct mb86a16_state *state,
 287                   int cren,
 288                   int afcen)
 289 {
 290         unsigned char val;
 291
 292         val = 0x7a | (cren << 7) | (afcen << 2);
 293         if (mb86a16_write(state, 0x49, val) < 0)
 294                 goto err;
 295
 296         return 0;
 297 err:
 298         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 299         return -EREMOTEIO;
 300 }
 301
 302 static int AFCEXEN_set(struct mb86a16_state *state,
 303                        int afcexen,
 304                        int smrt)
 305 {
 306         unsigned char AFCA ;
 307
 308         if (smrt > 18875)
 309                 AFCA = 4;
 310         else if (smrt > 9375)
 311                 AFCA = 3;
 312         else if (smrt > 2250)
 313                 AFCA = 2;
 314         else
 315                 AFCA = 1;
 316
 317         if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0)
 318                 goto err;
 319
 320         return 0;
 321
 322 err:
 323         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 324         return -EREMOTEIO;
 325 }
 326
 327 static int DAGC_data_set(struct mb86a16_state *state,
 328                          unsigned char DAGCA,
 329                          unsigned char DAGCW)
 330 {
 331         if (mb86a16_write(state, 0x2d, (DAGCA << 3) | DAGCW) < 0)
 332                 goto err;
 333
 334         return 0;
 335
 336 err:
 337         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 338         return -EREMOTEIO;
 339 }
 340
 341 static void smrt_info_get(struct mb86a16_state *state, int rate)
 342 {
 343         if (rate >= 37501) {
 344                 state->deci = 0; state->csel = 0; state->rsel = 0;
 345         } else if (rate >= 30001) {
 346                 state->deci = 0; state->csel = 0; state->rsel = 1;
 347         } else if (rate >= 26251) {
 348                 state->deci = 0; state->csel = 1; state->rsel = 0;
 349         } else if (rate >= 22501) {
 350                 state->deci = 0; state->csel = 1; state->rsel = 1;
 351         } else if (rate >= 18751) {
 352                 state->deci = 1; state->csel = 0; state->rsel = 0;
 353         } else if (rate >= 15001) {
 354                 state->deci = 1; state->csel = 0; state->rsel = 1;
 355         } else if (rate >= 13126) {
 356                 state->deci = 1; state->csel = 1; state->rsel = 0;
 357         } else if (rate >= 11251) {
 358                 state->deci = 1; state->csel = 1; state->rsel = 1;
 359         } else if (rate >= 9376) {
 360                 state->deci = 2; state->csel = 0; state->rsel = 0;
 361         } else if (rate >= 7501) {
 362                 state->deci = 2; state->csel = 0; state->rsel = 1;
 363         } else if (rate >= 6563) {
 364                 state->deci = 2; state->csel = 1; state->rsel = 0;
 365         } else if (rate >= 5626) {
 366                 state->deci = 2; state->csel = 1; state->rsel = 1;
 367         } else if (rate >= 4688) {
 368                 state->deci = 3; state->csel = 0; state->rsel = 0;
 369         } else if (rate >= 3751) {
 370                 state->deci = 3; state->csel = 0; state->rsel = 1;
 371         } else if (rate >= 3282) {
 372                 state->deci = 3; state->csel = 1; state->rsel = 0;
 373         } else if (rate >= 2814) {
 374                 state->deci = 3; state->csel = 1; state->rsel = 1;
 375         } else if (rate >= 2344) {
 376                 state->deci = 4; state->csel = 0; state->rsel = 0;
 377         } else if (rate >= 1876) {
 378                 state->deci = 4; state->csel = 0; state->rsel = 1;
 379         } else if (rate >= 1641) {
 380                 state->deci = 4; state->csel = 1; state->rsel = 0;
 381         } else if (rate >= 1407) {
 382                 state->deci = 4; state->csel = 1; state->rsel = 1;
 383         } else if (rate >= 1172) {
 384                 state->deci = 5; state->csel = 0; state->rsel = 0;
 385         } else if (rate >=  939) {
 386                 state->deci = 5; state->csel = 0; state->rsel = 1;
 387         } else if (rate >=  821) {
 388                 state->deci = 5; state->csel = 1; state->rsel = 0;
 389         } else {
 390                 state->deci = 5; state->csel = 1; state->rsel = 1;
 391         }
 392
 393         if (state->csel == 0)
 394                 state->master_clk = 92000;
 395         else
 396                 state->master_clk = 61333;
 397
 398 }
 399
 400 static int signal_det(struct mb86a16_state *state,
 401                       int smrt,
 402                       unsigned char *SIG)
 403 {
 404         int ret;
 405         int smrtd;
 406         unsigned char S[3];
 407         int i;
 408
 409         if (*SIG > 45) {
 410                 if (CNTM_set(state, 2, 1, 2) < 0) {
 411                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 412                         return -1;
 413                 }
 414         } else {
 415                 if (CNTM_set(state, 3, 1, 2) < 0) {
 416                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 417                         return -1;
 418                 }
 419         }
 420         for (i = 0; i < 3; i++) {
 421                 if (i == 0)
 422                         smrtd = smrt * 98 / 100;
 423                 else if (i == 1)
 424                         smrtd = smrt;
 425                 else
 426                         smrtd = smrt * 102 / 100;
 427                 smrt_info_get(state, smrtd);
 428                 smrt_set(state, smrtd);
 429                 srst(state);
 430                 msleep_interruptible(10);
 431                 if (mb86a16_read(state, 0x37, &(S[i])) != 2) {
 432                         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 433                         return -EREMOTEIO;
 434                 }
 435         }
 436         if ((S[1] > S[0] * 112 / 100) && (S[1] > S[2] * 112 / 100))
 437                 ret = 1;
 438         else
 439                 ret = 0;
 440
 441         *SIG = S[1];
 442
 443         if (CNTM_set(state, 0, 1, 2) < 0) {
 444                 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 445                 return -1;
 446         }
 447
 448         return ret;
 449 }
 450
 451 static int rf_val_set(struct mb86a16_state *state,
 452                       int f,
 453                       int smrt,
 454                       unsigned char R)
 455 {
 456         unsigned char C, F, B;
 457         int M;
 458         unsigned char rf_val[5];
 459         int ack = -1;
 460
 461         if (smrt > 37750)
 462                 C = 1;
 463         else if (smrt > 18875)
 464                 C = 2;
 465         else if (smrt > 5500)
 466                 C = 3;
 467         else
 468                 C = 4;
 469
 470         if (smrt > 30500)
 471                 F = 3;
 472         else if (smrt > 9375)
 473                 F = 1;
 474         else if (smrt > 4625)
 475                 F = 0;
 476         else
 477                 F = 2;
 478
 479         if (f < 1060)
 480                 B = 0;
 481         else if (f < 1175)
 482                 B = 1;
 483         else if (f < 1305)
 484                 B = 2;
 485         else if (f < 1435)
 486                 B = 3;
 487         else if (f < 1570)
 488                 B = 4;
 489         else if (f < 1715)
 490                 B = 5;
 491         else if (f < 1845)
 492                 B = 6;
 493         else if (f < 1980)
 494                 B = 7;
 495         else if (f < 2080)
 496                 B = 8;
 497         else
 498                 B = 9;
 499
 500         M = f * (1 << R) / 2;
 501
 502         rf_val[0] = 0x01 | (C << 3) | (F << 1);
 503         rf_val[1] = (R << 5) | ((M & 0x1f000) >> 12);
 504         rf_val[2] = (M & 0x00ff0) >> 4;
 505         rf_val[3] = ((M & 0x0000f) << 4) | B;
 506
 507         /* Frequency Set */
 508         if (mb86a16_write(state, 0x21, rf_val[0]) < 0)
 509                 ack = 0;
 510         if (mb86a16_write(state, 0x22, rf_val[1]) < 0)
 511                 ack = 0;
 512         if (mb86a16_write(state, 0x23, rf_val[2]) < 0)
 513                 ack = 0;
 514         if (mb86a16_write(state, 0x24, rf_val[3]) < 0)
 515                 ack = 0;
 516         if (mb86a16_write(state, 0x25, 0x01) < 0)
 517                 ack = 0;
 518         if (ack == 0) {
 519                 dprintk(verbose, MB86A16_ERROR, 1, "RF Setup - I2C transfer error");
 520                 return -EREMOTEIO;
 521         }
 522
 523         return 0;
 524 }
 525
 526 static int afcerr_chk(struct mb86a16_state *state)
 527 {
 528         unsigned char AFCM_L, AFCM_H ;
 529         int AFCM ;
 530         int afcm, afcerr ;
 531
 532         if (mb86a16_read(state, 0x0e, &AFCM_L) != 2)
 533                 goto err;
 534         if (mb86a16_read(state, 0x0f, &AFCM_H) != 2)
 535                 goto err;
 536
 537         AFCM = (AFCM_H << 8) + AFCM_L;
 538
 539         if (AFCM > 2048)
 540                 afcm = AFCM - 4096;
 541         else
 542                 afcm = AFCM;
 543         afcerr = afcm * state->master_clk / 8192;
 544
 545         return afcerr;
 546
 547 err:
 548         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 549         return -EREMOTEIO;
 550 }
 551
 552 static int dagcm_val_get(struct mb86a16_state *state)
 553 {
 554         int DAGCM;
 555         unsigned char DAGCM_H, DAGCM_L;
 556
 557         if (mb86a16_read(state, 0x45, &DAGCM_L) != 2)
 558                 goto err;
 559         if (mb86a16_read(state, 0x46, &DAGCM_H) != 2)
 560                 goto err;
 561
 562         DAGCM = (DAGCM_H << 8) + DAGCM_L;
 563
 564         return DAGCM;
 565
 566 err:
 567         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 568         return -EREMOTEIO;
 569 }
 570
 571 static int mb86a16_read_status(struct dvb_frontend *fe, enum fe_status *status)
 572 {
 573         u8 stat, stat2;
 574         struct mb86a16_state *state = fe->demodulator_priv;
 575
 576         *status = 0;
 577
 578         if (mb86a16_read(state, MB86A16_SIG1, &stat) != 2)
 579                 goto err;
 580         if (mb86a16_read(state, MB86A16_SIG2, &stat2) != 2)
 581                 goto err;
 582         if ((stat > 25) && (stat2 > 25))
 583                 *status |= FE_HAS_SIGNAL;
 584         if ((stat > 45) && (stat2 > 45))
 585                 *status |= FE_HAS_CARRIER;
 586
 587         if (mb86a16_read(state, MB86A16_STATUS, &stat) != 2)
 588                 goto err;
 589
 590         if (stat & 0x01)
 591                 *status |= FE_HAS_SYNC;
 592         if (stat & 0x01)
 593                 *status |= FE_HAS_VITERBI;
 594
 595         if (mb86a16_read(state, MB86A16_FRAMESYNC, &stat) != 2)
 596                 goto err;
 597
 598         if ((stat & 0x0f) && (*status & FE_HAS_VITERBI))
 599                 *status |= FE_HAS_LOCK;
 600
 601         return 0;
 602
 603 err:
 604         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 605         return -EREMOTEIO;
 606 }
 607
 608 static int sync_chk(struct mb86a16_state *state,
 609                     unsigned char *VIRM)
 610 {
 611         unsigned char val;
 612         int sync;
 613
 614         if (mb86a16_read(state, 0x0d, &val) != 2)
 615                 goto err;
 616
 617         dprintk(verbose, MB86A16_INFO, 1, "Status = %02x,", val);
 618         sync = val & 0x01;
 619         *VIRM = (val & 0x1c) >> 2;
 620
 621         return sync;
 622 err:
 623         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 624         *VIRM = 0;
 625         return -EREMOTEIO;
 626
 627 }
 628
 629 static int freqerr_chk(struct mb86a16_state *state,
 630                        int fTP,
 631                        int smrt,
 632                        int unit)
 633 {
 634         unsigned char CRM, AFCML, AFCMH;
 635         unsigned char temp1, temp2, temp3;
 636         int crm, afcm, AFCM;
 637         int crrerr, afcerr;             /* kHz */
 638         int frqerr;                     /* MHz */
 639         int afcen, afcexen = 0;
 640         int R, M, fOSC, fOSC_OFS;
 641
 642         if (mb86a16_read(state, 0x43, &CRM) != 2)
 643                 goto err;
 644
 645         if (CRM > 127)
 646                 crm = CRM - 256;
 647         else
 648                 crm = CRM;
 649
 650         crrerr = smrt * crm / 256;
 651         if (mb86a16_read(state, 0x49, &temp1) != 2)
 652                 goto err;
 653
 654         afcen = (temp1 & 0x04) >> 2;
 655         if (afcen == 0) {
 656                 if (mb86a16_read(state, 0x2a, &temp1) != 2)
 657                         goto err;
 658                 afcexen = (temp1 & 0x20) >> 5;
 659         }
 660
 661         if (afcen == 1) {
 662                 if (mb86a16_read(state, 0x0e, &AFCML) != 2)
 663                         goto err;
 664                 if (mb86a16_read(state, 0x0f, &AFCMH) != 2)
 665                         goto err;
 666         } else if (afcexen == 1) {
 667                 if (mb86a16_read(state, 0x2b, &AFCML) != 2)
 668                         goto err;
 669                 if (mb86a16_read(state, 0x2c, &AFCMH) != 2)
 670                         goto err;
 671         }
 672         if ((afcen == 1) || (afcexen == 1)) {
 673                 smrt_info_get(state, smrt);
 674                 AFCM = ((AFCMH & 0x01) << 8) + AFCML;
 675                 if (AFCM > 255)
 676                         afcm = AFCM - 512;
 677                 else
 678                         afcm = AFCM;
 679
 680                 afcerr = afcm * state->master_clk / 8192;
 681         } else
 682                 afcerr = 0;
 683
 684         if (mb86a16_read(state, 0x22, &temp1) != 2)
 685                 goto err;
 686         if (mb86a16_read(state, 0x23, &temp2) != 2)
 687                 goto err;
 688         if (mb86a16_read(state, 0x24, &temp3) != 2)
 689                 goto err;
 690
 691         R = (temp1 & 0xe0) >> 5;
 692         M = ((temp1 & 0x1f) << 12) + (temp2 << 4) + (temp3 >> 4);
 693         if (R == 0)
 694                 fOSC = 2 * M;
 695         else
 696                 fOSC = M;
 697
 698         fOSC_OFS = fOSC - fTP;
 699
 700         if (unit == 0) {        /* MHz */
 701                 if (crrerr + afcerr + fOSC_OFS * 1000 >= 0)
 702                         frqerr = (crrerr + afcerr + fOSC_OFS * 1000 + 500) / 1000;
 703                 else
 704                         frqerr = (crrerr + afcerr + fOSC_OFS * 1000 - 500) / 1000;
 705         } else {        /* kHz */
 706                 frqerr = crrerr + afcerr + fOSC_OFS * 1000;
 707         }
 708
 709         return frqerr;
 710 err:
 711         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 712         return -EREMOTEIO;
 713 }
 714
 715 static unsigned char vco_dev_get(struct mb86a16_state *state, int smrt)
 716 {
 717         unsigned char R;
 718
 719         if (smrt > 9375)
 720                 R = 0;
 721         else
 722                 R = 1;
 723
 724         return R;
 725 }
 726
 727 static void swp_info_get(struct mb86a16_state *state,
 728                          int fOSC_start,
 729                          int smrt,
 730                          int v, int R,
 731                          int swp_ofs,
 732                          int *fOSC,
 733                          int *afcex_freq,
 734                          unsigned char *AFCEX_L,
 735                          unsigned char *AFCEX_H)
 736 {
 737         int AFCEX ;
 738         int crnt_swp_freq ;
 739
 740         crnt_swp_freq = fOSC_start * 1000 + v * swp_ofs;
 741
 742         if (R == 0)
 743                 *fOSC = (crnt_swp_freq + 1000) / 2000 * 2;
 744         else
 745                 *fOSC = (crnt_swp_freq + 500) / 1000;
 746
 747         if (*fOSC >= crnt_swp_freq)
 748                 *afcex_freq = *fOSC * 1000 - crnt_swp_freq;
 749         else
 750                 *afcex_freq = crnt_swp_freq - *fOSC * 1000;
 751
 752         AFCEX = *afcex_freq * 8192 / state->master_clk;
 753         *AFCEX_L =  AFCEX & 0x00ff;
 754         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 755 }
 756
 757
 758 static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V,  int vmax, int vmin,
 759                                int SIGMIN, int fOSC, int afcex_freq, int swp_ofs, unsigned char *SIG1)
 760 {
 761         int swp_freq ;
 762
 763         if ((i % 2 == 1) && (v <= vmax)) {
 764                 /* positive v (case 1) */
 765                 if ((v - 1 == vmin)                             &&
 766                     (*(V + 30 + v) >= 0)                        &&
 767                     (*(V + 30 + v - 1) >= 0)                    &&
 768                     (*(V + 30 + v - 1) > *(V + 30 + v))         &&
 769                     (*(V + 30 + v - 1) > SIGMIN)) {
 770
 771                         swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 772                         *SIG1 = *(V + 30 + v - 1);
 773                 } else if ((v == vmax)                          &&
 774                            (*(V + 30 + v) >= 0)                 &&
 775                            (*(V + 30 + v - 1) >= 0)             &&
 776                            (*(V + 30 + v) > *(V + 30 + v - 1))  &&
 777                            (*(V + 30 + v) > SIGMIN)) {
 778                         /* (case 2) */
 779                         swp_freq = fOSC * 1000 + afcex_freq;
 780                         *SIG1 = *(V + 30 + v);
 781                 } else if ((*(V + 30 + v) > 0)                  &&
 782                            (*(V + 30 + v - 1) > 0)              &&
 783                            (*(V + 30 + v - 2) > 0)              &&
 784                            (*(V + 30 + v - 3) > 0)              &&
 785                            (*(V + 30 + v - 1) > *(V + 30 + v))  &&
 786                            (*(V + 30 + v - 2) > *(V + 30 + v - 3)) &&
 787                            ((*(V + 30 + v - 1) > SIGMIN)        ||
 788                            (*(V + 30 + v - 2) > SIGMIN))) {
 789                         /* (case 3) */
 790                         if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) {
 791                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 792                                 *SIG1 = *(V + 30 + v - 1);
 793                         } else {
 794                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs * 2;
 795                                 *SIG1 = *(V + 30 + v - 2);
 796                         }
 797                 } else if ((v == vmax)                          &&
 798                            (*(V + 30 + v) >= 0)                 &&
 799                            (*(V + 30 + v - 1) >= 0)             &&
 800                            (*(V + 30 + v - 2) >= 0)             &&
 801                            (*(V + 30 + v) > *(V + 30 + v - 2))  &&
 802                            (*(V + 30 + v - 1) > *(V + 30 + v - 2)) &&
 803                            ((*(V + 30 + v) > SIGMIN)            ||
 804                            (*(V + 30 + v - 1) > SIGMIN))) {
 805                         /* (case 4) */
 806                         if (*(V + 30 + v) >= *(V + 30 + v - 1)) {
 807                                 swp_freq = fOSC * 1000 + afcex_freq;
 808                                 *SIG1 = *(V + 30 + v);
 809                         } else {
 810                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 811                                 *SIG1 = *(V + 30 + v - 1);
 812                         }
 813                 } else  {
 814                         swp_freq = -1 ;
 815                 }
 816         } else if ((i % 2 == 0) && (v >= vmin)) {
 817                 /* Negative v (case 1) */
 818                 if ((*(V + 30 + v) > 0)                         &&
 819                     (*(V + 30 + v + 1) > 0)                     &&
 820                     (*(V + 30 + v + 2) > 0)                     &&
 821                     (*(V + 30 + v + 1) > *(V + 30 + v))         &&
 822                     (*(V + 30 + v + 1) > *(V + 30 + v + 2))     &&
 823                     (*(V + 30 + v + 1) > SIGMIN)) {
 824
 825                         swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 826                         *SIG1 = *(V + 30 + v + 1);
 827                 } else if ((v + 1 == vmax)                      &&
 828                            (*(V + 30 + v) >= 0)                 &&
 829                            (*(V + 30 + v + 1) >= 0)             &&
 830                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 831                            (*(V + 30 + v + 1) > SIGMIN)) {
 832                         /* (case 2) */
 833                         swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 834                         *SIG1 = *(V + 30 + v);
 835                 } else if ((v == vmin)                          &&
 836                            (*(V + 30 + v) > 0)                  &&
 837                            (*(V + 30 + v + 1) > 0)              &&
 838                            (*(V + 30 + v + 2) > 0)              &&
 839                            (*(V + 30 + v) > *(V + 30 + v + 1))  &&
 840                            (*(V + 30 + v) > *(V + 30 + v + 2))  &&
 841                            (*(V + 30 + v) > SIGMIN)) {
 842                         /* (case 3) */
 843                         swp_freq = fOSC * 1000 + afcex_freq;
 844                         *SIG1 = *(V + 30 + v);
 845                 } else if ((*(V + 30 + v) >= 0)                 &&
 846                            (*(V + 30 + v + 1) >= 0)             &&
 847                            (*(V + 30 + v + 2) >= 0)             &&
 848                            (*(V + 30 + v + 3) >= 0)             &&
 849                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 850                            (*(V + 30 + v + 2) > *(V + 30 + v + 3)) &&
 851                            ((*(V + 30 + v + 1) > SIGMIN)        ||
 852                             (*(V + 30 + v + 2) > SIGMIN))) {
 853                         /* (case 4) */
 854                         if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
 855                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 856                                 *SIG1 = *(V + 30 + v + 1);
 857                         } else {
 858                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
 859                                 *SIG1 = *(V + 30 + v + 2);
 860                         }
 861                 } else if ((*(V + 30 + v) >= 0)                 &&
 862                            (*(V + 30 + v + 1) >= 0)             &&
 863                            (*(V + 30 + v + 2) >= 0)             &&
 864                            (*(V + 30 + v + 3) >= 0)             &&
 865                            (*(V + 30 + v) > *(V + 30 + v + 2))  &&
 866                            (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
 867                            (*(V + 30 + v) > *(V + 30 + v + 3))  &&
 868                            (*(V + 30 + v + 1) > *(V + 30 + v + 3)) &&
 869                            ((*(V + 30 + v) > SIGMIN)            ||
 870                             (*(V + 30 + v + 1) > SIGMIN))) {
 871                         /* (case 5) */
 872                         if (*(V + 30 + v) >= *(V + 30 + v + 1)) {
 873                                 swp_freq = fOSC * 1000 + afcex_freq;
 874                                 *SIG1 = *(V + 30 + v);
 875                         } else {
 876                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 877                                 *SIG1 = *(V + 30 + v + 1);
 878                         }
 879                 } else if ((v + 2 == vmin)                      &&
 880                            (*(V + 30 + v) >= 0)                 &&
 881                            (*(V + 30 + v + 1) >= 0)             &&
 882                            (*(V + 30 + v + 2) >= 0)             &&
 883                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 884                            (*(V + 30 + v + 2) > *(V + 30 + v))  &&
 885                            ((*(V + 30 + v + 1) > SIGMIN)        ||
 886                             (*(V + 30 + v + 2) > SIGMIN))) {
 887                         /* (case 6) */
 888                         if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
 889                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 890                                 *SIG1 = *(V + 30 + v + 1);
 891                         } else {
 892                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
 893                                 *SIG1 = *(V + 30 + v + 2);
 894                         }
 895                 } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) {
 896                         swp_freq = fOSC * 1000;
 897                         *SIG1 = *(V + 30 + v);
 898                 } else
 899                         swp_freq = -1;
 900         } else
 901                 swp_freq = -1;
 902
 903         return swp_freq;
 904 }
 905
 906 static void swp_info_get2(struct mb86a16_state *state,
 907                           int smrt,
 908                           int R,
 909                           int swp_freq,
 910                           int *afcex_freq,
 911                           int *fOSC,
 912                           unsigned char *AFCEX_L,
 913                           unsigned char *AFCEX_H)
 914 {
 915         int AFCEX ;
 916
 917         if (R == 0)
 918                 *fOSC = (swp_freq + 1000) / 2000 * 2;
 919         else
 920                 *fOSC = (swp_freq + 500) / 1000;
 921
 922         if (*fOSC >= swp_freq)
 923                 *afcex_freq = *fOSC * 1000 - swp_freq;
 924         else
 925                 *afcex_freq = swp_freq - *fOSC * 1000;
 926
 927         AFCEX = *afcex_freq * 8192 / state->master_clk;
 928         *AFCEX_L =  AFCEX & 0x00ff;
 929         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 930 }
 931
 932 static void afcex_info_get(struct mb86a16_state *state,
 933                            int afcex_freq,
 934                            unsigned char *AFCEX_L,
 935                            unsigned char *AFCEX_H)
 936 {
 937         int AFCEX ;
 938
 939         AFCEX = afcex_freq * 8192 / state->master_clk;
 940         *AFCEX_L =  AFCEX & 0x00ff;
 941         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 942 }
 943
 944 static int SEQ_set(struct mb86a16_state *state, unsigned char loop)
 945 {
 946         /* SLOCK0 = 0 */
 947         if (mb86a16_write(state, 0x32, 0x02 | (loop << 2)) < 0) {
 948                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 949                 return -EREMOTEIO;
 950         }
 951
 952         return 0;
 953 }
 954
 955 static int iq_vt_set(struct mb86a16_state *state, unsigned char IQINV)
 956 {
 957         /* Viterbi Rate, IQ Settings */
 958         if (mb86a16_write(state, 0x06, 0xdf | (IQINV << 5)) < 0) {
 959                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 960                 return -EREMOTEIO;
 961         }
 962
 963         return 0;
 964 }
 965
 966 static int FEC_srst(struct mb86a16_state *state)
 967 {
 968         if (mb86a16_write(state, MB86A16_RESET, 0x02) < 0) {
 969                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 970                 return -EREMOTEIO;
 971         }
 972
 973         return 0;
 974 }
 975
 976 static int S2T_set(struct mb86a16_state *state, unsigned char S2T)
 977 {
 978         if (mb86a16_write(state, 0x34, 0x70 | S2T) < 0) {
 979                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 980                 return -EREMOTEIO;
 981         }
 982
 983         return 0;
 984 }
 985
 986 static int S45T_set(struct mb86a16_state *state, unsigned char S4T, unsigned char S5T)
 987 {
 988         if (mb86a16_write(state, 0x35, 0x00 | (S5T << 4) | S4T) < 0) {
 989                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 990                 return -EREMOTEIO;
 991         }
 992
 993         return 0;
 994 }
 995
 996
 997 static int mb86a16_set_fe(struct mb86a16_state *state)
 998 {
 999         u8 agcval, cnmval;
1000
1001         int i, j;
1002         int fOSC = 0;
1003         int fOSC_start = 0;
1004         int wait_t;
1005         int fcp;
1006         int swp_ofs;
1007         int V[60];
1008         u8 SIG1MIN;
1009
1010         unsigned char CREN, AFCEN, AFCEXEN;
1011         unsigned char SIG1;
1012         unsigned char TIMINT1, TIMINT2, TIMEXT;
1013         unsigned char S0T, S1T;
1014         unsigned char S2T;
1015 /*      unsigned char S2T, S3T; */
1016         unsigned char S4T, S5T;
1017         unsigned char AFCEX_L, AFCEX_H;
1018         unsigned char R;
1019         unsigned char VIRM;
1020         unsigned char ETH, VIA;
1021         unsigned char junk;
1022
1023         int loop;
1024         int ftemp;
1025         int v, vmax, vmin;
1026         int vmax_his, vmin_his;
1027         int swp_freq, prev_swp_freq[20];
1028         int prev_freq_num;
1029         int signal_dupl;
1030         int afcex_freq;
1031         int signal;
1032         int afcerr;
1033         int temp_freq, delta_freq;
1034         int dagcm[4];
1035         int smrt_d;
1036 /*      int freq_err; */
1037         int n;
1038         int ret = -1;
1039         int sync;
1040
1041         dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate);
1042
1043         fcp = 3000;
1044         swp_ofs = state->srate / 4;
1045
1046         for (i = 0; i < 60; i++)
1047                 V[i] = -1;
1048
1049         for (i = 0; i < 20; i++)
1050                 prev_swp_freq[i] = 0;
1051
1052         SIG1MIN = 25;
1053
1054         for (n = 0; ((n < 3) && (ret == -1)); n++) {
1055                 SEQ_set(state, 0);
1056                 iq_vt_set(state, 0);
1057
1058                 CREN = 0;
1059                 AFCEN = 0;
1060                 AFCEXEN = 1;
1061                 TIMINT1 = 0;
1062                 TIMINT2 = 1;
1063                 TIMEXT = 2;
1064                 S1T = 0;
1065                 S0T = 0;
1066
1067                 if (initial_set(state) < 0) {
1068                         dprintk(verbose, MB86A16_ERROR, 1, "initial set failed");
1069                         return -1;
1070                 }
1071                 if (DAGC_data_set(state, 3, 2) < 0) {
1072                         dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1073                         return -1;
1074                 }
1075                 if (EN_set(state, CREN, AFCEN) < 0) {
1076                         dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1077                         return -1; /* (0, 0) */
1078                 }
1079                 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1080                         dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1081                         return -1; /* (1, smrt) = (1, symbolrate) */
1082                 }
1083                 if (CNTM_set(state, TIMINT1, TIMINT2, TIMEXT) < 0) {
1084                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set error");
1085                         return -1; /* (0, 1, 2) */
1086                 }
1087                 if (S01T_set(state, S1T, S0T) < 0) {
1088                         dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1089                         return -1; /* (0, 0) */
1090                 }
1091                 smrt_info_get(state, state->srate);
1092                 if (smrt_set(state, state->srate) < 0) {
1093                         dprintk(verbose, MB86A16_ERROR, 1, "smrt info get error");
1094                         return -1;
1095                 }
1096
1097                 R = vco_dev_get(state, state->srate);
1098                 if (R == 1)
1099                         fOSC_start = state->frequency;
1100
1101                 else if (R == 0) {
1102                         if (state->frequency % 2 == 0) {
1103                                 fOSC_start = state->frequency;
1104                         } else {
1105                                 fOSC_start = state->frequency + 1;
1106                                 if (fOSC_start > 2150)
1107                                         fOSC_start = state->frequency - 1;
1108                         }
1109                 }
1110                 loop = 1;
1111                 ftemp = fOSC_start * 1000;
1112                 vmax = 0 ;
1113                 while (loop == 1) {
1114                         ftemp = ftemp + swp_ofs;
1115                         vmax++;
1116
1117                         /* Upper bound */
1118                         if (ftemp > 2150000) {
1119                                 loop = 0;
1120                                 vmax--;
1121                         } else {
1122                                 if ((ftemp == 2150000) ||
1123                                     (ftemp - state->frequency * 1000 >= fcp + state->srate / 4))
1124                                         loop = 0;
1125                         }
1126                 }
1127
1128                 loop = 1;
1129                 ftemp = fOSC_start * 1000;
1130                 vmin = 0 ;
1131                 while (loop == 1) {
1132                         ftemp = ftemp - swp_ofs;
1133                         vmin--;
1134
1135                         /* Lower bound */
1136                         if (ftemp < 950000) {
1137                                 loop = 0;
1138                                 vmin++;
1139                         } else {
1140                                 if ((ftemp == 950000) ||
1141                                     (state->frequency * 1000 - ftemp >= fcp + state->srate / 4))
1142                                         loop = 0;
1143                         }
1144                 }
1145
1146                 wait_t = (8000 + state->srate / 2) / state->srate;
1147                 if (wait_t == 0)
1148                         wait_t = 1;
1149
1150                 i = 0;
1151                 j = 0;
1152                 prev_freq_num = 0;
1153                 loop = 1;
1154                 signal = 0;
1155                 vmax_his = 0;
1156                 vmin_his = 0;
1157                 v = 0;
1158
1159                 while (loop == 1) {
1160                         swp_info_get(state, fOSC_start, state->srate,
1161                                      v, R, swp_ofs, &fOSC,
1162                                      &afcex_freq, &AFCEX_L, &AFCEX_H);
1163
1164                         udelay(100);
1165                         if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1166                                 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1167                                 return -1;
1168                         }
1169                         udelay(100);
1170                         if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1171                                 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1172                                 return -1;
1173                         }
1174                         if (srst(state) < 0) {
1175                                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1176                                 return -1;
1177                         }
1178                         msleep_interruptible(wait_t);
1179
1180                         if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1181                                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1182                                 return -1;
1183                         }
1184                         V[30 + v] = SIG1 ;
1185                         swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin,
1186                                                       SIG1MIN, fOSC, afcex_freq,
1187                                                       swp_ofs, &SIG1);  /* changed */
1188
1189                         signal_dupl = 0;
1190                         for (j = 0; j < prev_freq_num; j++) {
1191                                 if ((abs(prev_swp_freq[j] - swp_freq)) < (swp_ofs * 3 / 2)) {
1192                                         signal_dupl = 1;
1193                                         dprintk(verbose, MB86A16_INFO, 1, "Probably Duplicate Signal, j = %d", j);
1194                                 }
1195                         }
1196                         if ((signal_dupl == 0) && (swp_freq > 0) && (abs(swp_freq - state->frequency * 1000) < fcp + state->srate / 6)) {
1197                                 dprintk(verbose, MB86A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate);
1198                                 prev_swp_freq[prev_freq_num] = swp_freq;
1199                                 prev_freq_num++;
1200                                 swp_info_get2(state, state->srate, R, swp_freq,
1201                                               &afcex_freq, &fOSC,
1202                                               &AFCEX_L, &AFCEX_H);
1203
1204                                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1205                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1206                                         return -1;
1207                                 }
1208                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1209                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1210                                         return -1;
1211                                 }
1212                                 signal = signal_det(state, state->srate, &SIG1);
1213                                 if (signal == 1) {
1214                                         dprintk(verbose, MB86A16_ERROR, 1, "***** Signal Found *****");
1215                                         loop = 0;
1216                                 } else {
1217                                         dprintk(verbose, MB86A16_ERROR, 1, "!!!!! No signal !!!!!, try again...");
1218                                         smrt_info_get(state, state->srate);
1219                                         if (smrt_set(state, state->srate) < 0) {
1220                                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1221                                                 return -1;
1222                                         }
1223                                 }
1224                         }
1225                         if (v > vmax)
1226                                 vmax_his = 1 ;
1227                         if (v < vmin)
1228                                 vmin_his = 1 ;
1229                         i++;
1230
1231                         if ((i % 2 == 1) && (vmax_his == 1))
1232                                 i++;
1233                         if ((i % 2 == 0) && (vmin_his == 1))
1234                                 i++;
1235
1236                         if (i % 2 == 1)
1237                                 v = (i + 1) / 2;
1238                         else
1239                                 v = -i / 2;
1240
1241                         if ((vmax_his == 1) && (vmin_his == 1))
1242                                 loop = 0 ;
1243                 }
1244
1245                 if (signal == 1) {
1246                         dprintk(verbose, MB86A16_INFO, 1, " Start Freq Error Check");
1247                         S1T = 7 ;
1248                         S0T = 1 ;
1249                         CREN = 0 ;
1250                         AFCEN = 1 ;
1251                         AFCEXEN = 0 ;
1252
1253                         if (S01T_set(state, S1T, S0T) < 0) {
1254                                 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1255                                 return -1;
1256                         }
1257                         smrt_info_get(state, state->srate);
1258                         if (smrt_set(state, state->srate) < 0) {
1259                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1260                                 return -1;
1261                         }
1262                         if (EN_set(state, CREN, AFCEN) < 0) {
1263                                 dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1264                                 return -1;
1265                         }
1266                         if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1267                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1268                                 return -1;
1269                         }
1270                         afcex_info_get(state, afcex_freq, &AFCEX_L, &AFCEX_H);
1271                         if (afcofs_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1272                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCOFS data set error");
1273                                 return -1;
1274                         }
1275                         if (srst(state) < 0) {
1276                                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1277                                 return -1;
1278                         }
1279                         /* delay 4~200 */
1280                         wait_t = 200000 / state->master_clk + 200000 / state->srate;
1281                         msleep(wait_t);
1282                         afcerr = afcerr_chk(state);
1283                         if (afcerr == -1)
1284                                 return -1;
1285
1286                         swp_freq = fOSC * 1000 + afcerr ;
1287                         AFCEXEN = 1 ;
1288                         if (state->srate >= 1500)
1289                                 smrt_d = state->srate / 3;
1290                         else
1291                                 smrt_d = state->srate / 2;
1292                         smrt_info_get(state, smrt_d);
1293                         if (smrt_set(state, smrt_d) < 0) {
1294                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1295                                 return -1;
1296                         }
1297                         if (AFCEXEN_set(state, AFCEXEN, smrt_d) < 0) {
1298                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1299                                 return -1;
1300                         }
1301                         R = vco_dev_get(state, smrt_d);
1302                         if (DAGC_data_set(state, 2, 0) < 0) {
1303                                 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1304                                 return -1;
1305                         }
1306                         for (i = 0; i < 3; i++) {
1307                                 temp_freq = swp_freq + (i - 1) * state->srate / 8;
1308                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1309                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1310                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1311                                         return -1;
1312                                 }
1313                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1314                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1315                                         return -1;
1316                                 }
1317                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1318                                 msleep(wait_t);
1319                                 dagcm[i] = dagcm_val_get(state);
1320                         }
1321                         if ((dagcm[0] > dagcm[1]) &&
1322                             (dagcm[0] > dagcm[2]) &&
1323                             (dagcm[0] - dagcm[1] > 2 * (dagcm[2] - dagcm[1]))) {
1324
1325                                 temp_freq = swp_freq - 2 * state->srate / 8;
1326                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1327                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1328                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1329                                         return -1;
1330                                 }
1331                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1332                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1333                                         return -1;
1334                                 }
1335                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1336                                 msleep(wait_t);
1337                                 dagcm[3] = dagcm_val_get(state);
1338                                 if (dagcm[3] > dagcm[1])
1339                                         delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300;
1340                                 else
1341                                         delta_freq = 0;
1342                         } else if ((dagcm[2] > dagcm[1]) &&
1343                                    (dagcm[2] > dagcm[0]) &&
1344                                    (dagcm[2] - dagcm[1] > 2 * (dagcm[0] - dagcm[1]))) {
1345
1346                                 temp_freq = swp_freq + 2 * state->srate / 8;
1347                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1348                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1349                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set");
1350                                         return -1;
1351                                 }
1352                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1353                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1354                                         return -1;
1355                                 }
1356                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1357                                 msleep(wait_t);
1358                                 dagcm[3] = dagcm_val_get(state);
1359                                 if (dagcm[3] > dagcm[1])
1360                                         delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300;
1361                                 else
1362                                         delta_freq = 0 ;
1363
1364                         } else {
1365                                 delta_freq = 0 ;
1366                         }
1367                         dprintk(verbose, MB86A16_INFO, 1, "SWEEP Frequency = %d", swp_freq);
1368                         swp_freq += delta_freq;
1369                         dprintk(verbose, MB86A16_INFO, 1, "Adjusting .., DELTA Freq = %d, SWEEP Freq=%d", delta_freq, swp_freq);
1370                         if (abs(state->frequency * 1000 - swp_freq) > 3800) {
1371                                 dprintk(verbose, MB86A16_INFO, 1, "NO  --  SIGNAL !");
1372                         } else {
1373
1374                                 S1T = 0;
1375                                 S0T = 3;
1376                                 CREN = 1;
1377                                 AFCEN = 0;
1378                                 AFCEXEN = 1;
1379
1380                                 if (S01T_set(state, S1T, S0T) < 0) {
1381                                         dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1382                                         return -1;
1383                                 }
1384                                 if (DAGC_data_set(state, 0, 0) < 0) {
1385                                         dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1386                                         return -1;
1387                                 }
1388                                 R = vco_dev_get(state, state->srate);
1389                                 smrt_info_get(state, state->srate);
1390                                 if (smrt_set(state, state->srate) < 0) {
1391                                         dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1392                                         return -1;
1393                                 }
1394                                 if (EN_set(state, CREN, AFCEN) < 0) {
1395                                         dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1396                                         return -1;
1397                                 }
1398                                 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1399                                         dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1400                                         return -1;
1401                                 }
1402                                 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1403                                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1404                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1405                                         return -1;
1406                                 }
1407                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1408                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1409                                         return -1;
1410                                 }
1411                                 if (srst(state) < 0) {
1412                                         dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1413                                         return -1;
1414                                 }
1415                                 wait_t = 7 + (10000 + state->srate / 2) / state->srate;
1416                                 if (wait_t == 0)
1417                                         wait_t = 1;
1418                                 msleep_interruptible(wait_t);
1419                                 if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1420                                         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1421                                         return -EREMOTEIO;
1422                                 }
1423
1424                                 if (SIG1 > 110) {
1425                                         S2T = 4; S4T = 1; S5T = 6; ETH = 4; VIA = 6;
1426                                         wait_t = 7 + (917504 + state->srate / 2) / state->srate;
1427                                 } else if (SIG1 > 105) {
1428                                         S2T = 4; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1429                                         wait_t = 7 + (1048576 + state->srate / 2) / state->srate;
1430                                 } else if (SIG1 > 85) {
1431                                         S2T = 5; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1432                                         wait_t = 7 + (1310720 + state->srate / 2) / state->srate;
1433                                 } else if (SIG1 > 65) {
1434                                         S2T = 6; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1435                                         wait_t = 7 + (1572864 + state->srate / 2) / state->srate;
1436                                 } else {
1437                                         S2T = 7; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1438                                         wait_t = 7 + (2097152 + state->srate / 2) / state->srate;
1439                                 }
1440                                 wait_t *= 2; /* FOS */
1441                                 S2T_set(state, S2T);
1442                                 S45T_set(state, S4T, S5T);
1443                                 Vi_set(state, ETH, VIA);
1444                                 srst(state);
1445                                 msleep_interruptible(wait_t);
1446                                 sync = sync_chk(state, &VIRM);
1447                                 dprintk(verbose, MB86A16_INFO, 1, "-------- Viterbi=[%d] SYNC=[%d] ---------", VIRM, sync);
1448                                 if (VIRM) {
1449                                         if (VIRM == 4) {
1450                                                 /* 5/6 */
1451                                                 if (SIG1 > 110)
1452                                                         wait_t = (786432 + state->srate / 2) / state->srate;
1453                                                 else
1454                                                         wait_t = (1572864 + state->srate / 2) / state->srate;
1455
1456                                                 msleep_interruptible(wait_t);
1457
1458                                                 if (sync_chk(state, &junk) == 0) {
1459                                                         iq_vt_set(state, 1);
1460                                                         FEC_srst(state);
1461                                                 }
1462                                         }
1463                                         /* 1/2, 2/3, 3/4, 7/8 */
1464                                         if (SIG1 > 110)
1465                                                 wait_t = (786432 + state->srate / 2) / state->srate;
1466                                         else
1467                                                 wait_t = (1572864 + state->srate / 2) / state->srate;
1468                                         msleep_interruptible(wait_t);
1469                                         SEQ_set(state, 1);
1470                                 } else {
1471                                         dprintk(verbose, MB86A16_INFO, 1, "NO  -- SYNC");
1472                                         SEQ_set(state, 1);
1473                                         ret = -1;
1474                                 }
1475                         }
1476                 } else {
1477                         dprintk(verbose, MB86A16_INFO, 1, "NO  -- SIGNAL");
1478                         ret = -1;
1479                 }
1480
1481                 sync = sync_chk(state, &junk);
1482                 if (sync) {
1483                         dprintk(verbose, MB86A16_INFO, 1, "******* SYNC *******");
1484                         freqerr_chk(state, state->frequency, state->srate, 1);
1485                         ret = 0;
1486                         break;
1487                 }
1488         }
1489
1490         if (mb86a16_read(state, 0x15, &agcval) != 2 ||  mb86a16_read(state, 0x26, &cnmval) != 2) {
1491                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1492                 ret = -EREMOTEIO;
1493         } else {
1494                 dprintk(verbose, MB86A16_INFO, 1, "AGC = %02x CNM = %02x", agcval, cnmval);
1495         }
1496         return ret;
1497 }
1498
1499 static int mb86a16_send_diseqc_msg(struct dvb_frontend *fe,
1500                                    struct dvb_diseqc_master_cmd *cmd)
1501 {
1502         struct mb86a16_state *state = fe->demodulator_priv;
1503         int ret = -EREMOTEIO;
1504         int i;
1505         u8 regs;
1506
1507         if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1508                 goto err;
1509         if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1510                 goto err;
1511         if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1512                 goto err;
1513
1514         regs = 0x18;
1515
1516         if (cmd->msg_len > 5 || cmd->msg_len < 4) {
1517                 ret = -EINVAL;
1518                 goto err;
1519         }
1520
1521         for (i = 0; i < cmd->msg_len; i++) {
1522                 if (mb86a16_write(state, regs, cmd->msg[i]) < 0)
1523                         goto err;
1524
1525                 regs++;
1526         }
1527         i += 0x90;
1528
1529         msleep_interruptible(10);
1530
1531         if (mb86a16_write(state, MB86A16_DCC1, i) < 0)
1532                 goto err;
1533         if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1534                 goto err;
1535
1536         return 0;
1537
1538 err:
1539         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1540         return ret;
1541 }
1542
1543 static int mb86a16_send_diseqc_burst(struct dvb_frontend *fe,
1544                                      enum fe_sec_mini_cmd burst)
1545 {
1546         struct mb86a16_state *state = fe->demodulator_priv;
1547
1548         switch (burst) {
1549         case SEC_MINI_A:
1550                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1551                                                        MB86A16_DCC1_TBEN  |
1552                                                        MB86A16_DCC1_TBO) < 0)
1553                         goto err;
1554                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1555                         goto err;
1556                 break;
1557         case SEC_MINI_B:
1558                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1559                                                        MB86A16_DCC1_TBEN) < 0)
1560                         goto err;
1561                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1562                         goto err;
1563                 break;
1564         }
1565
1566         return 0;
1567 err:
1568         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1569         return -EREMOTEIO;
1570 }
1571
1572 static int mb86a16_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
1573 {
1574         struct mb86a16_state *state = fe->demodulator_priv;
1575
1576         switch (tone) {
1577         case SEC_TONE_ON:
1578                 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x00) < 0)
1579                         goto err;
1580                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1581                                                        MB86A16_DCC1_CTOE) < 0)
1582
1583                         goto err;
1584                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1585                         goto err;
1586                 break;
1587         case SEC_TONE_OFF:
1588                 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1589                         goto err;
1590                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1591                         goto err;
1592                 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1593                         goto err;
1594                 break;
1595         default:
1596                 return -EINVAL;
1597         }
1598         return 0;
1599
1600 err:
1601         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1602         return -EREMOTEIO;
1603 }
1604
1605 static enum dvbfe_search mb86a16_search(struct dvb_frontend *fe)
1606 {
1607         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1608         struct mb86a16_state *state = fe->demodulator_priv;
1609
1610         state->frequency = p->frequency / 1000;
1611         state->srate = p->symbol_rate / 1000;
1612
1613         if (!mb86a16_set_fe(state)) {
1614                 dprintk(verbose, MB86A16_ERROR, 1, "Successfully acquired LOCK");
1615                 return DVBFE_ALGO_SEARCH_SUCCESS;
1616         }
1617
1618         dprintk(verbose, MB86A16_ERROR, 1, "Lock acquisition failed!");
1619         return DVBFE_ALGO_SEARCH_FAILED;
1620 }
1621
1622 static void mb86a16_release(struct dvb_frontend *fe)
1623 {
1624         struct mb86a16_state *state = fe->demodulator_priv;
1625         kfree(state);
1626 }
1627
1628 static int mb86a16_init(struct dvb_frontend *fe)
1629 {
1630         return 0;
1631 }
1632
1633 static int mb86a16_sleep(struct dvb_frontend *fe)
1634 {
1635         return 0;
1636 }
1637
1638 static int mb86a16_read_ber(struct dvb_frontend *fe, u32 *ber)
1639 {
1640         u8 ber_mon, ber_tab, ber_lsb, ber_mid, ber_msb, ber_tim, ber_rst;
1641         u32 timer;
1642
1643         struct mb86a16_state *state = fe->demodulator_priv;
1644
1645         *ber = 0;
1646         if (mb86a16_read(state, MB86A16_BERMON, &ber_mon) != 2)
1647                 goto err;
1648         if (mb86a16_read(state, MB86A16_BERTAB, &ber_tab) != 2)
1649                 goto err;
1650         if (mb86a16_read(state, MB86A16_BERLSB, &ber_lsb) != 2)
1651                 goto err;
1652         if (mb86a16_read(state, MB86A16_BERMID, &ber_mid) != 2)
1653                 goto err;
1654         if (mb86a16_read(state, MB86A16_BERMSB, &ber_msb) != 2)
1655                 goto err;
1656         /* BER monitor invalid when BER_EN = 0  */
1657         if (ber_mon & 0x04) {
1658                 /* coarse, fast calculation     */
1659                 *ber = ber_tab & 0x1f;
1660                 dprintk(verbose, MB86A16_DEBUG, 1, "BER coarse=[0x%02x]", *ber);
1661                 if (ber_mon & 0x01) {
1662                         /*
1663                          * BER_SEL = 1, The monitored BER is the estimated
1664                          * value with a Reed-Solomon decoder error amount at
1665                          * the deinterleaver output.
1666                          * monitored BER is expressed as a 20 bit output in total
1667                          */
1668                         ber_rst = (ber_mon >> 3) & 0x03;
1669                         *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1670                         if (ber_rst == 0)
1671                                 timer =  12500000;
1672                         else if (ber_rst == 1)
1673                                 timer =  25000000;
1674                         else if (ber_rst == 2)
1675                                 timer =  50000000;
1676                         else /* ber_rst == 3 */
1677                                 timer = 100000000;
1678
1679                         *ber /= timer;
1680                         dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1681                 } else {
1682                         /*
1683                          * BER_SEL = 0, The monitored BER is the estimated
1684                          * value with a Viterbi decoder error amount at the
1685                          * QPSK demodulator output.
1686                          * monitored BER is expressed as a 24 bit output in total
1687                          */
1688                         ber_tim = (ber_mon >> 1) & 0x01;
1689                         *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1690                         if (ber_tim == 0)
1691                                 timer = 16;
1692                         else /* ber_tim == 1 */
1693                                 timer = 24;
1694
1695                         *ber /= 2 ^ timer;
1696                         dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1697                 }
1698         }
1699         return 0;
1700 err:
1701         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1702         return -EREMOTEIO;
1703 }
1704
1705 static int mb86a16_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1706 {
1707         u8 agcm = 0;
1708         struct mb86a16_state *state = fe->demodulator_priv;
1709
1710         *strength = 0;
1711         if (mb86a16_read(state, MB86A16_AGCM, &agcm) != 2) {
1712                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1713                 return -EREMOTEIO;
1714         }
1715
1716         *strength = ((0xff - agcm) * 100) / 256;
1717         dprintk(verbose, MB86A16_DEBUG, 1, "Signal strength=[%d %%]", (u8) *strength);
1718         *strength = (0xffff - 0xff) + agcm;
1719
1720         return 0;
1721 }
1722
1723 struct cnr {
1724         u8 cn_reg;
1725         u8 cn_val;
1726 };
1727
1728 static const struct cnr cnr_tab[] = {
1729         {  35,  2 },
1730         {  40,  3 },
1731         {  50,  4 },
1732         {  60,  5 },
1733         {  70,  6 },
1734         {  80,  7 },
1735         {  92,  8 },
1736         { 103,  9 },
1737         { 115, 10 },
1738         { 138, 12 },
1739         { 162, 15 },
1740         { 180, 18 },
1741         { 185, 19 },
1742         { 189, 20 },
1743         { 195, 22 },
1744         { 199, 24 },
1745         { 201, 25 },
1746         { 202, 26 },
1747         { 203, 27 },
1748         { 205, 28 },
1749         { 208, 30 }
1750 };
1751
1752 static int mb86a16_read_snr(struct dvb_frontend *fe, u16 *snr)
1753 {
1754         struct mb86a16_state *state = fe->demodulator_priv;
1755         int i = 0;
1756         int low_tide = 2, high_tide = 30, q_level;
1757         u8  cn;
1758
1759         *snr = 0;
1760         if (mb86a16_read(state, 0x26, &cn) != 2) {
1761                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1762                 return -EREMOTEIO;
1763         }
1764
1765         for (i = 0; i < ARRAY_SIZE(cnr_tab); i++) {
1766                 if (cn < cnr_tab[i].cn_reg) {
1767                         *snr = cnr_tab[i].cn_val;
1768                         break;
1769                 }
1770         }
1771         q_level = (*snr * 100) / (high_tide - low_tide);
1772         dprintk(verbose, MB86A16_ERROR, 1, "SNR (Quality) = [%d dB], Level=%d %%", *snr, q_level);
1773         *snr = (0xffff - 0xff) + *snr;
1774
1775         return 0;
1776 }
1777
1778 static int mb86a16_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1779 {
1780         u8 dist;
1781         struct mb86a16_state *state = fe->demodulator_priv;
1782
1783         if (mb86a16_read(state, MB86A16_DISTMON, &dist) != 2) {
1784                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1785                 return -EREMOTEIO;
1786         }
1787         *ucblocks = dist;
1788
1789         return 0;
1790 }
1791
1792 static enum dvbfe_algo mb86a16_frontend_algo(struct dvb_frontend *fe)
1793 {
1794         return DVBFE_ALGO_CUSTOM;
1795 }
1796
1797 static const struct dvb_frontend_ops mb86a16_ops = {
1798         .delsys = { SYS_DVBS },
1799         .info = {
1800                 .name                   = "Fujitsu MB86A16 DVB-S",
1801                 .frequency_min_hz       =  950 * MHz,
1802                 .frequency_max_hz       = 2150 * MHz,
1803                 .frequency_stepsize_hz  =    3 * MHz,
1804                 .symbol_rate_min        = 1000000,
1805                 .symbol_rate_max        = 45000000,
1806                 .symbol_rate_tolerance  = 500,
1807                 .caps                   = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
1808                                           FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
1809                                           FE_CAN_FEC_7_8 | FE_CAN_QPSK    |
1810                                           FE_CAN_FEC_AUTO
1811         },
1812         .release                        = mb86a16_release,
1813
1814         .get_frontend_algo              = mb86a16_frontend_algo,
1815         .search                         = mb86a16_search,
1816         .init                           = mb86a16_init,
1817         .sleep                          = mb86a16_sleep,
1818         .read_status                    = mb86a16_read_status,
1819
1820         .read_ber                       = mb86a16_read_ber,
1821         .read_signal_strength           = mb86a16_read_signal_strength,
1822         .read_snr                       = mb86a16_read_snr,
1823         .read_ucblocks                  = mb86a16_read_ucblocks,
1824
1825         .diseqc_send_master_cmd         = mb86a16_send_diseqc_msg,
1826         .diseqc_send_burst              = mb86a16_send_diseqc_burst,
1827         .set_tone                       = mb86a16_set_tone,
1828 };
1829
1830 struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
1831                                     struct i2c_adapter *i2c_adap)
1832 {
1833         u8 dev_id = 0;
1834         struct mb86a16_state *state = NULL;
1835
1836         state = kmalloc(sizeof(struct mb86a16_state), GFP_KERNEL);
1837         if (state == NULL)
1838                 goto error;
1839
1840         state->config = config;
1841         state->i2c_adap = i2c_adap;
1842
1843         mb86a16_read(state, 0x7f, &dev_id);
1844         if (dev_id != 0xfe)
1845                 goto error;
1846
1847         memcpy(&state->frontend.ops, &mb86a16_ops, sizeof(struct dvb_frontend_ops));
1848         state->frontend.demodulator_priv = state;
1849         state->frontend.ops.set_voltage = state->config->set_voltage;
1850
1851         return &state->frontend;
1852 error:
1853         kfree(state);
1854         return NULL;
1855 }
1856 EXPORT_SYMBOL_GPL(mb86a16_attach);
1857 MODULE_DESCRIPTION("Fujitsu MB86A16 DVB-S/DSS DC Receiver driver");
1858 MODULE_LICENSE("GPL");
1859 MODULE_AUTHOR("Manu Abraham");