1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2017 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
6 #include <linux/delay.h>
7 #include <linux/sched/types.h>
8 #include <linux/seq_file.h>
9 #include <linux/slab.h>
11 #include <media/cec-pin.h>
12 #include "cec-pin-priv.h"
14 /* All timings are in microseconds */
16 /* start bit timings */
17 #define CEC_TIM_START_BIT_LOW 3700
18 #define CEC_TIM_START_BIT_LOW_MIN 3500
19 #define CEC_TIM_START_BIT_LOW_MAX 3900
20 #define CEC_TIM_START_BIT_TOTAL 4500
21 #define CEC_TIM_START_BIT_TOTAL_MIN 4300
22 #define CEC_TIM_START_BIT_TOTAL_MAX 4700
24 /* data bit timings */
25 #define CEC_TIM_DATA_BIT_0_LOW 1500
26 #define CEC_TIM_DATA_BIT_0_LOW_MIN 1300
27 #define CEC_TIM_DATA_BIT_0_LOW_MAX 1700
28 #define CEC_TIM_DATA_BIT_1_LOW 600
29 #define CEC_TIM_DATA_BIT_1_LOW_MIN 400
30 #define CEC_TIM_DATA_BIT_1_LOW_MAX 800
31 #define CEC_TIM_DATA_BIT_TOTAL 2400
32 #define CEC_TIM_DATA_BIT_TOTAL_MIN 2050
33 #define CEC_TIM_DATA_BIT_TOTAL_MAX 2750
34 /* earliest safe time to sample the bit state */
35 #define CEC_TIM_DATA_BIT_SAMPLE 850
36 /* earliest time the bit is back to 1 (T7 + 50) */
37 #define CEC_TIM_DATA_BIT_HIGH 1750
39 /* when idle, sample once per millisecond */
40 #define CEC_TIM_IDLE_SAMPLE 1000
41 /* when processing the start bit, sample twice per millisecond */
42 #define CEC_TIM_START_BIT_SAMPLE 500
43 /* when polling for a state change, sample once every 50 microseconds */
44 #define CEC_TIM_SAMPLE 50
46 #define CEC_TIM_LOW_DRIVE_ERROR (1.5 * CEC_TIM_DATA_BIT_TOTAL)
49 * Total data bit time that is too short/long for a valid bit,
50 * used for error injection.
52 #define CEC_TIM_DATA_BIT_TOTAL_SHORT 1800
53 #define CEC_TIM_DATA_BIT_TOTAL_LONG 2900
56 * Total start bit time that is too short/long for a valid bit,
57 * used for error injection.
59 #define CEC_TIM_START_BIT_TOTAL_SHORT 4100
60 #define CEC_TIM_START_BIT_TOTAL_LONG 5000
62 /* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */
67 const char * const name;
71 static const struct cec_state states[CEC_PIN_STATES] = {
73 { "Idle", CEC_TIM_IDLE_SAMPLE },
74 { "Tx Wait", CEC_TIM_SAMPLE },
75 { "Tx Wait for High", CEC_TIM_IDLE_SAMPLE },
76 { "Tx Start Bit Low", CEC_TIM_START_BIT_LOW },
77 { "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
78 { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW },
79 { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW },
80 { "Tx Start Bit Low Custom", 0 },
81 { "Tx Start Bit High Custom", 0 },
82 { "Tx Data 0 Low", CEC_TIM_DATA_BIT_0_LOW },
83 { "Tx Data 0 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
84 { "Tx Data 0 High Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_0_LOW },
85 { "Tx Data 0 High Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_0_LOW },
86 { "Tx Data 1 Low", CEC_TIM_DATA_BIT_1_LOW },
87 { "Tx Data 1 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_1_LOW },
88 { "Tx Data 1 High Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_1_LOW },
89 { "Tx Data 1 High Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_1_LOW },
90 { "Tx Data 1 High Pre Sample", CEC_TIM_DATA_BIT_SAMPLE - CEC_TIM_DATA_BIT_1_LOW },
91 { "Tx Data 1 High Post Sample", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_SAMPLE },
92 { "Tx Data 1 High Post Sample Short", CEC_TIM_DATA_BIT_TOTAL_SHORT - CEC_TIM_DATA_BIT_SAMPLE },
93 { "Tx Data 1 High Post Sample Long", CEC_TIM_DATA_BIT_TOTAL_LONG - CEC_TIM_DATA_BIT_SAMPLE },
94 { "Tx Data Bit Low Custom", 0 },
95 { "Tx Data Bit High Custom", 0 },
96 { "Tx Pulse Low Custom", 0 },
97 { "Tx Pulse High Custom", 0 },
98 { "Tx Low Drive", CEC_TIM_LOW_DRIVE_ERROR },
99 { "Rx Start Bit Low", CEC_TIM_SAMPLE },
100 { "Rx Start Bit High", CEC_TIM_SAMPLE },
101 { "Rx Data Sample", CEC_TIM_DATA_BIT_SAMPLE },
102 { "Rx Data Post Sample", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_SAMPLE },
103 { "Rx Data Wait for Low", CEC_TIM_SAMPLE },
104 { "Rx Ack Low", CEC_TIM_DATA_BIT_0_LOW },
105 { "Rx Ack Low Post", CEC_TIM_DATA_BIT_HIGH - CEC_TIM_DATA_BIT_0_LOW },
106 { "Rx Ack High Post", CEC_TIM_DATA_BIT_HIGH },
107 { "Rx Ack Finish", CEC_TIM_DATA_BIT_TOTAL_MIN - CEC_TIM_DATA_BIT_HIGH },
108 { "Rx Low Drive", CEC_TIM_LOW_DRIVE_ERROR },
112 static void cec_pin_update(struct cec_pin *pin, bool v, bool force)
114 if (!force && v == pin->adap->cec_pin_is_high)
117 pin->adap->cec_pin_is_high = v;
118 if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) {
121 if (pin->work_pin_events_dropped) {
122 pin->work_pin_events_dropped = false;
123 ev |= CEC_PIN_EVENT_FL_DROPPED;
125 pin->work_pin_events[pin->work_pin_events_wr] = ev;
126 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get();
127 pin->work_pin_events_wr =
128 (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS;
129 atomic_inc(&pin->work_pin_num_events);
131 pin->work_pin_events_dropped = true;
132 pin->work_pin_events_dropped_cnt++;
134 wake_up_interruptible(&pin->kthread_waitq);
137 static bool cec_pin_read(struct cec_pin *pin)
139 bool v = call_pin_op(pin, read);
141 cec_pin_update(pin, v, false);
145 static void cec_pin_low(struct cec_pin *pin)
147 call_void_pin_op(pin, low);
148 cec_pin_update(pin, false, false);
151 static bool cec_pin_high(struct cec_pin *pin)
153 call_void_pin_op(pin, high);
154 return cec_pin_read(pin);
157 static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
158 int arg_idx, u8 *arg)
160 #ifdef CONFIG_CEC_PIN_ERROR_INJ
161 u16 cmd = cec_pin_rx_error_inj(pin);
162 u64 e = pin->error_inj[cmd];
163 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
166 u8 pos = pin->error_inj_args[cmd][arg_idx];
170 else if (pos != pin->rx_bit)
175 case CEC_ERROR_INJ_MODE_ONCE:
176 pin->error_inj[cmd] &=
177 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
179 case CEC_ERROR_INJ_MODE_ALWAYS:
181 case CEC_ERROR_INJ_MODE_TOGGLE:
182 return pin->rx_toggle;
191 static bool rx_nack(struct cec_pin *pin)
193 return rx_error_inj(pin, CEC_ERROR_INJ_RX_NACK_OFFSET, -1, NULL);
196 static bool rx_low_drive(struct cec_pin *pin)
198 return rx_error_inj(pin, CEC_ERROR_INJ_RX_LOW_DRIVE_OFFSET,
199 CEC_ERROR_INJ_RX_LOW_DRIVE_ARG_IDX, NULL);
202 static bool rx_add_byte(struct cec_pin *pin)
204 return rx_error_inj(pin, CEC_ERROR_INJ_RX_ADD_BYTE_OFFSET, -1, NULL);
207 static bool rx_remove_byte(struct cec_pin *pin)
209 return rx_error_inj(pin, CEC_ERROR_INJ_RX_REMOVE_BYTE_OFFSET, -1, NULL);
212 static bool rx_arb_lost(struct cec_pin *pin, u8 *poll)
214 return pin->tx_msg.len == 0 &&
215 rx_error_inj(pin, CEC_ERROR_INJ_RX_ARB_LOST_OFFSET,
216 CEC_ERROR_INJ_RX_ARB_LOST_ARG_IDX, poll);
219 static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset,
220 int arg_idx, u8 *arg)
222 #ifdef CONFIG_CEC_PIN_ERROR_INJ
223 u16 cmd = cec_pin_tx_error_inj(pin);
224 u64 e = pin->error_inj[cmd];
225 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK;
228 u8 pos = pin->error_inj_args[cmd][arg_idx];
232 else if (pos != pin->tx_bit)
237 case CEC_ERROR_INJ_MODE_ONCE:
238 pin->error_inj[cmd] &=
239 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset);
241 case CEC_ERROR_INJ_MODE_ALWAYS:
243 case CEC_ERROR_INJ_MODE_TOGGLE:
244 return pin->tx_toggle;
253 static bool tx_no_eom(struct cec_pin *pin)
255 return tx_error_inj(pin, CEC_ERROR_INJ_TX_NO_EOM_OFFSET, -1, NULL);
258 static bool tx_early_eom(struct cec_pin *pin)
260 return tx_error_inj(pin, CEC_ERROR_INJ_TX_EARLY_EOM_OFFSET, -1, NULL);
263 static bool tx_short_bit(struct cec_pin *pin)
265 return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_BIT_OFFSET,
266 CEC_ERROR_INJ_TX_SHORT_BIT_ARG_IDX, NULL);
269 static bool tx_long_bit(struct cec_pin *pin)
271 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_BIT_OFFSET,
272 CEC_ERROR_INJ_TX_LONG_BIT_ARG_IDX, NULL);
275 static bool tx_custom_bit(struct cec_pin *pin)
277 return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_BIT_OFFSET,
278 CEC_ERROR_INJ_TX_CUSTOM_BIT_ARG_IDX, NULL);
281 static bool tx_short_start(struct cec_pin *pin)
283 return tx_error_inj(pin, CEC_ERROR_INJ_TX_SHORT_START_OFFSET, -1, NULL);
286 static bool tx_long_start(struct cec_pin *pin)
288 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LONG_START_OFFSET, -1, NULL);
291 static bool tx_custom_start(struct cec_pin *pin)
293 return tx_error_inj(pin, CEC_ERROR_INJ_TX_CUSTOM_START_OFFSET,
297 static bool tx_last_bit(struct cec_pin *pin)
299 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LAST_BIT_OFFSET,
300 CEC_ERROR_INJ_TX_LAST_BIT_ARG_IDX, NULL);
303 static u8 tx_add_bytes(struct cec_pin *pin)
307 if (tx_error_inj(pin, CEC_ERROR_INJ_TX_ADD_BYTES_OFFSET,
308 CEC_ERROR_INJ_TX_ADD_BYTES_ARG_IDX, &bytes))
313 static bool tx_remove_byte(struct cec_pin *pin)
315 return tx_error_inj(pin, CEC_ERROR_INJ_TX_REMOVE_BYTE_OFFSET, -1, NULL);
318 static bool tx_low_drive(struct cec_pin *pin)
320 return tx_error_inj(pin, CEC_ERROR_INJ_TX_LOW_DRIVE_OFFSET,
321 CEC_ERROR_INJ_TX_LOW_DRIVE_ARG_IDX, NULL);
324 static void cec_pin_to_idle(struct cec_pin *pin)
327 * Reset all status fields, release the bus and
330 pin->rx_bit = pin->tx_bit = 0;
332 memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
333 pin->ts = ns_to_ktime(0);
334 pin->tx_generated_poll = false;
335 pin->tx_post_eom = false;
336 if (pin->state >= CEC_ST_TX_WAIT &&
337 pin->state <= CEC_ST_TX_LOW_DRIVE)
339 if (pin->state >= CEC_ST_RX_START_BIT_LOW &&
340 pin->state <= CEC_ST_RX_LOW_DRIVE)
342 pin->state = CEC_ST_IDLE;
346 * Handle Transmit-related states
348 * Basic state changes when transmitting:
350 * Idle -> Tx Wait (waiting for the end of signal free time) ->
351 * Tx Start Bit Low -> Tx Start Bit High ->
353 * Regular data bits + EOM:
354 * Tx Data 0 Low -> Tx Data 0 High ->
356 * Tx Data 1 Low -> Tx Data 1 High ->
358 * First 4 data bits or Ack bit:
359 * Tx Data 0 Low -> Tx Data 0 High ->
361 * Tx Data 1 Low -> Tx Data 1 High -> Tx Data 1 Pre Sample ->
362 * Tx Data 1 Post Sample ->
364 * After the last Ack go to Idle.
366 * If it detects a Low Drive condition then:
367 * Tx Wait For High -> Idle
369 * If it loses arbitration, then it switches to state Rx Data Post Sample.
371 static void cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
374 bool is_ack_bit, ack;
376 switch (pin->state) {
377 case CEC_ST_TX_WAIT_FOR_HIGH:
378 if (cec_pin_read(pin))
379 cec_pin_to_idle(pin);
382 case CEC_ST_TX_START_BIT_LOW:
383 if (tx_short_start(pin)) {
385 * Error Injection: send an invalid (too short)
388 pin->state = CEC_ST_TX_START_BIT_HIGH_SHORT;
389 } else if (tx_long_start(pin)) {
391 * Error Injection: send an invalid (too long)
394 pin->state = CEC_ST_TX_START_BIT_HIGH_LONG;
396 pin->state = CEC_ST_TX_START_BIT_HIGH;
398 /* Generate start bit */
402 case CEC_ST_TX_START_BIT_LOW_CUSTOM:
403 pin->state = CEC_ST_TX_START_BIT_HIGH_CUSTOM;
404 /* Generate start bit */
408 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
409 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
410 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
411 if (pin->tx_nacked) {
412 cec_pin_to_idle(pin);
414 if (pin->tx_generated_poll)
416 pin->work_tx_ts = ts;
417 pin->work_tx_status = CEC_TX_STATUS_NACK;
418 wake_up_interruptible(&pin->kthread_waitq);
422 case CEC_ST_TX_DATA_BIT_0_HIGH:
423 case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
424 case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
425 case CEC_ST_TX_DATA_BIT_1_HIGH:
426 case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
427 case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
429 * If the read value is 1, then all is OK, otherwise we have a
430 * low drive condition.
432 * Special case: when we generate a poll message due to an
433 * Arbitration Lost error injection, then ignore this since
434 * the pin can actually be low in that case.
436 if (!cec_pin_read(pin) && !pin->tx_generated_poll) {
438 * It's 0, so someone detected an error and pulled the
439 * line low for 1.5 times the nominal bit period.
442 pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
443 pin->work_tx_ts = ts;
444 pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
445 pin->tx_low_drive_cnt++;
446 wake_up_interruptible(&pin->kthread_waitq);
450 case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
451 if (tx_last_bit(pin)) {
452 /* Error Injection: just stop sending after this bit */
453 cec_pin_to_idle(pin);
455 if (pin->tx_generated_poll)
457 pin->work_tx_ts = ts;
458 pin->work_tx_status = CEC_TX_STATUS_OK;
459 wake_up_interruptible(&pin->kthread_waitq);
464 case CEC_ST_TX_START_BIT_HIGH:
465 case CEC_ST_TX_START_BIT_HIGH_SHORT:
466 case CEC_ST_TX_START_BIT_HIGH_LONG:
467 case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
468 if (tx_low_drive(pin)) {
469 /* Error injection: go to low drive */
471 pin->state = CEC_ST_TX_LOW_DRIVE;
473 if (pin->tx_generated_poll)
475 pin->work_tx_ts = ts;
476 pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
477 pin->tx_low_drive_cnt++;
478 wake_up_interruptible(&pin->kthread_waitq);
481 if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) {
482 cec_pin_to_idle(pin);
484 if (pin->tx_generated_poll)
486 pin->work_tx_ts = ts;
487 pin->work_tx_status = CEC_TX_STATUS_OK;
488 wake_up_interruptible(&pin->kthread_waitq);
492 switch (pin->tx_bit % 10) {
495 * In the CEC_ERROR_INJ_TX_ADD_BYTES case we transmit
496 * extra bytes, so pin->tx_bit / 10 can become >= 16.
497 * Generate bit values for those extra bytes instead
498 * of reading them from the transmit buffer.
500 unsigned int idx = (pin->tx_bit / 10);
503 if (idx < pin->tx_msg.len)
504 val = pin->tx_msg.msg[idx];
505 v = val & (1 << (7 - (pin->tx_bit % 10)));
507 pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
508 CEC_ST_TX_DATA_BIT_0_LOW;
512 unsigned int tot_len = pin->tx_msg.len +
514 unsigned int tx_byte_idx = pin->tx_bit / 10;
516 v = !pin->tx_post_eom && tx_byte_idx == tot_len - 1;
517 if (tot_len > 1 && tx_byte_idx == tot_len - 2 &&
519 /* Error injection: set EOM one byte early */
521 pin->tx_post_eom = true;
522 } else if (v && tx_no_eom(pin)) {
523 /* Error injection: no EOM */
526 pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
527 CEC_ST_TX_DATA_BIT_0_LOW;
531 pin->state = CEC_ST_TX_DATA_BIT_1_LOW;
534 if (tx_custom_bit(pin))
535 pin->state = CEC_ST_TX_DATA_BIT_LOW_CUSTOM;
539 case CEC_ST_TX_DATA_BIT_0_LOW:
540 case CEC_ST_TX_DATA_BIT_1_LOW:
541 v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
542 is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
543 if (v && (pin->tx_bit < 4 || is_ack_bit)) {
544 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
545 } else if (!is_ack_bit && tx_short_bit(pin)) {
546 /* Error Injection: send an invalid (too short) bit */
547 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_SHORT :
548 CEC_ST_TX_DATA_BIT_0_HIGH_SHORT;
549 } else if (!is_ack_bit && tx_long_bit(pin)) {
550 /* Error Injection: send an invalid (too long) bit */
551 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_LONG :
552 CEC_ST_TX_DATA_BIT_0_HIGH_LONG;
554 pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
555 CEC_ST_TX_DATA_BIT_0_HIGH;
560 case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
561 pin->state = CEC_ST_TX_DATA_BIT_HIGH_CUSTOM;
565 case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
566 /* Read the CEC value at the sample time */
567 v = cec_pin_read(pin);
568 is_ack_bit = pin->tx_bit % 10 == ACK_BIT;
570 * If v == 0 and we're within the first 4 bits
571 * of the initiator, then someone else started
572 * transmitting and we lost the arbitration
573 * (i.e. the logical address of the other
574 * transmitter has more leading 0 bits in the
577 if (!v && !is_ack_bit && !pin->tx_generated_poll) {
579 pin->work_tx_ts = ts;
580 pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
581 wake_up_interruptible(&pin->kthread_waitq);
582 pin->rx_bit = pin->tx_bit;
584 memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
585 pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
586 pin->rx_msg.msg[0] &= (0xff << (8 - pin->rx_bit));
588 pin->ts = ktime_sub_us(ts, CEC_TIM_DATA_BIT_SAMPLE);
589 pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
593 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE;
594 if (!is_ack_bit && tx_short_bit(pin)) {
595 /* Error Injection: send an invalid (too short) bit */
596 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT;
597 } else if (!is_ack_bit && tx_long_bit(pin)) {
598 /* Error Injection: send an invalid (too long) bit */
599 pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG;
603 /* Was the message ACKed? */
604 ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v;
605 if (!ack && (!pin->tx_ignore_nack_until_eom ||
606 pin->tx_bit / 10 == pin->tx_msg.len - 1) &&
609 * Note: the CEC spec is ambiguous regarding
610 * what action to take when a NACK appears
611 * before the last byte of the payload was
612 * transmitted: either stop transmitting
613 * immediately, or wait until the last byte
616 * Most CEC implementations appear to stop
617 * immediately, and that's what we do here
620 pin->tx_nacked = true;
624 case CEC_ST_TX_PULSE_LOW_CUSTOM:
626 pin->state = CEC_ST_TX_PULSE_HIGH_CUSTOM;
629 case CEC_ST_TX_PULSE_HIGH_CUSTOM:
630 cec_pin_to_idle(pin);
639 * Handle Receive-related states
641 * Basic state changes when receiving:
643 * Rx Start Bit Low -> Rx Start Bit High ->
644 * Regular data bits + EOM:
645 * Rx Data Sample -> Rx Data Post Sample -> Rx Data High ->
647 * Rx Ack Low -> Rx Ack Low Post -> Rx Data High ->
649 * Rx Ack High Post -> Rx Data High ->
651 * Rx Ack Low -> Rx Ack Low Post -> Rx Ack Finish -> Idle
653 static void cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
662 switch (pin->state) {
664 case CEC_ST_RX_START_BIT_LOW:
665 v = cec_pin_read(pin);
668 pin->state = CEC_ST_RX_START_BIT_HIGH;
669 delta = ktime_us_delta(ts, pin->ts);
670 /* Start bit low is too short, go back to idle */
671 if (delta < CEC_TIM_START_BIT_LOW_MIN - CEC_TIM_IDLE_SAMPLE) {
672 if (!pin->rx_start_bit_low_too_short_cnt++) {
673 pin->rx_start_bit_low_too_short_ts = ktime_to_ns(pin->ts);
674 pin->rx_start_bit_low_too_short_delta = delta;
676 cec_pin_to_idle(pin);
679 if (rx_arb_lost(pin, &poll)) {
680 cec_msg_init(&pin->tx_msg, poll >> 4, poll & 0xf);
681 pin->tx_generated_poll = true;
682 pin->tx_extra_bytes = 0;
683 pin->state = CEC_ST_TX_START_BIT_HIGH;
688 case CEC_ST_RX_START_BIT_HIGH:
689 v = cec_pin_read(pin);
690 delta = ktime_us_delta(ts, pin->ts);
692 * Unfortunately the spec does not specify when to give up
693 * and go to idle. We just pick TOTAL_LONG.
695 if (v && delta > CEC_TIM_START_BIT_TOTAL_LONG) {
696 pin->rx_start_bit_too_long_cnt++;
697 cec_pin_to_idle(pin);
702 /* Start bit is too short, go back to idle */
703 if (delta < CEC_TIM_START_BIT_TOTAL_MIN - CEC_TIM_IDLE_SAMPLE) {
704 if (!pin->rx_start_bit_too_short_cnt++) {
705 pin->rx_start_bit_too_short_ts = ktime_to_ns(pin->ts);
706 pin->rx_start_bit_too_short_delta = delta;
708 cec_pin_to_idle(pin);
711 if (rx_low_drive(pin)) {
712 /* Error injection: go to low drive */
714 pin->state = CEC_ST_RX_LOW_DRIVE;
715 pin->rx_low_drive_cnt++;
718 pin->state = CEC_ST_RX_DATA_SAMPLE;
723 case CEC_ST_RX_DATA_SAMPLE:
724 v = cec_pin_read(pin);
725 pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
726 switch (pin->rx_bit % 10) {
728 if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
729 pin->rx_msg.msg[pin->rx_bit / 10] |=
730 v << (7 - (pin->rx_bit % 10));
734 pin->rx_msg.len = pin->rx_bit / 10 + 1;
742 case CEC_ST_RX_DATA_POST_SAMPLE:
743 pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
746 case CEC_ST_RX_DATA_WAIT_FOR_LOW:
747 v = cec_pin_read(pin);
748 delta = ktime_us_delta(ts, pin->ts);
750 * Unfortunately the spec does not specify when to give up
751 * and go to idle. We just pick TOTAL_LONG.
753 if (v && delta > CEC_TIM_DATA_BIT_TOTAL_LONG) {
754 pin->rx_data_bit_too_long_cnt++;
755 cec_pin_to_idle(pin);
761 if (rx_low_drive(pin)) {
762 /* Error injection: go to low drive */
764 pin->state = CEC_ST_RX_LOW_DRIVE;
765 pin->rx_low_drive_cnt++;
770 * Go to low drive state when the total bit time is
773 if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN) {
774 if (!pin->rx_data_bit_too_short_cnt++) {
775 pin->rx_data_bit_too_short_ts = ktime_to_ns(pin->ts);
776 pin->rx_data_bit_too_short_delta = delta;
779 pin->state = CEC_ST_RX_LOW_DRIVE;
780 pin->rx_low_drive_cnt++;
784 if (pin->rx_bit % 10 != 9) {
785 pin->state = CEC_ST_RX_DATA_SAMPLE;
789 dest = cec_msg_destination(&pin->rx_msg);
790 bcast = dest == CEC_LOG_ADDR_BROADCAST;
791 /* for_us == broadcast or directed to us */
792 for_us = bcast || (pin->la_mask & (1 << dest));
794 ack = bcast ? 1 : !for_us;
796 if (for_us && rx_nack(pin)) {
797 /* Error injection: toggle the ACK bit */
802 /* No need to write to the bus, just wait */
803 pin->state = CEC_ST_RX_ACK_HIGH_POST;
807 pin->state = CEC_ST_RX_ACK_LOW;
810 case CEC_ST_RX_ACK_LOW:
812 pin->state = CEC_ST_RX_ACK_LOW_POST;
815 case CEC_ST_RX_ACK_LOW_POST:
816 case CEC_ST_RX_ACK_HIGH_POST:
817 v = cec_pin_read(pin);
818 if (v && pin->rx_eom) {
819 pin->work_rx_msg = pin->rx_msg;
820 pin->work_rx_msg.rx_ts = ktime_to_ns(ts);
821 wake_up_interruptible(&pin->kthread_waitq);
823 pin->state = CEC_ST_RX_ACK_FINISH;
827 pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW;
830 case CEC_ST_RX_ACK_FINISH:
831 cec_pin_to_idle(pin);
840 * Main timer function
843 static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
845 struct cec_pin *pin = container_of(timer, struct cec_pin, timer);
846 struct cec_adapter *adap = pin->adap;
852 if (ktime_to_ns(pin->timer_ts)) {
853 delta = ktime_us_delta(ts, pin->timer_ts);
855 if (delta > 100 && pin->state != CEC_ST_IDLE) {
856 /* Keep track of timer overruns */
857 pin->timer_sum_overrun += delta;
858 pin->timer_100us_overruns++;
860 pin->timer_300us_overruns++;
861 if (delta > pin->timer_max_overrun)
862 pin->timer_max_overrun = delta;
865 if (adap->monitor_pin_cnt)
868 if (pin->wait_usecs) {
870 * If we are monitoring the pin, then we have to
871 * sample at regular intervals.
873 if (pin->wait_usecs > 150) {
874 pin->wait_usecs -= 100;
875 pin->timer_ts = ktime_add_us(ts, 100);
876 hrtimer_forward_now(timer, ns_to_ktime(100000));
877 return HRTIMER_RESTART;
879 if (pin->wait_usecs > 100) {
880 pin->wait_usecs /= 2;
881 pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
882 hrtimer_forward_now(timer,
883 ns_to_ktime(pin->wait_usecs * 1000));
884 return HRTIMER_RESTART;
886 pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
887 hrtimer_forward_now(timer,
888 ns_to_ktime(pin->wait_usecs * 1000));
890 return HRTIMER_RESTART;
893 switch (pin->state) {
894 /* Transmit states */
895 case CEC_ST_TX_WAIT_FOR_HIGH:
896 case CEC_ST_TX_START_BIT_LOW:
897 case CEC_ST_TX_START_BIT_HIGH:
898 case CEC_ST_TX_START_BIT_HIGH_SHORT:
899 case CEC_ST_TX_START_BIT_HIGH_LONG:
900 case CEC_ST_TX_START_BIT_LOW_CUSTOM:
901 case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
902 case CEC_ST_TX_DATA_BIT_0_LOW:
903 case CEC_ST_TX_DATA_BIT_0_HIGH:
904 case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT:
905 case CEC_ST_TX_DATA_BIT_0_HIGH_LONG:
906 case CEC_ST_TX_DATA_BIT_1_LOW:
907 case CEC_ST_TX_DATA_BIT_1_HIGH:
908 case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT:
909 case CEC_ST_TX_DATA_BIT_1_HIGH_LONG:
910 case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE:
911 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE:
912 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT:
913 case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG:
914 case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
915 case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
916 case CEC_ST_TX_PULSE_LOW_CUSTOM:
917 case CEC_ST_TX_PULSE_HIGH_CUSTOM:
918 cec_pin_tx_states(pin, ts);
922 case CEC_ST_RX_START_BIT_LOW:
923 case CEC_ST_RX_START_BIT_HIGH:
924 case CEC_ST_RX_DATA_SAMPLE:
925 case CEC_ST_RX_DATA_POST_SAMPLE:
926 case CEC_ST_RX_DATA_WAIT_FOR_LOW:
927 case CEC_ST_RX_ACK_LOW:
928 case CEC_ST_RX_ACK_LOW_POST:
929 case CEC_ST_RX_ACK_HIGH_POST:
930 case CEC_ST_RX_ACK_FINISH:
931 cec_pin_rx_states(pin, ts);
936 if (!cec_pin_high(pin)) {
937 /* Start bit, switch to receive state */
939 pin->state = CEC_ST_RX_START_BIT_LOW;
941 * If a transmit is pending, then that transmit should
942 * use a signal free time of no more than
943 * CEC_SIGNAL_FREE_TIME_NEW_INITIATOR since it will
944 * have a new initiator due to the receive that is now
947 if (pin->tx_msg.len && pin->tx_signal_free_time >
948 CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
949 pin->tx_signal_free_time =
950 CEC_SIGNAL_FREE_TIME_NEW_INITIATOR;
953 if (ktime_to_ns(pin->ts) == 0)
955 if (pin->tx_msg.len) {
957 * Check if the bus has been free for long enough
958 * so we can kick off the pending transmit.
960 delta = ktime_us_delta(ts, pin->ts);
961 if (delta / CEC_TIM_DATA_BIT_TOTAL >=
962 pin->tx_signal_free_time) {
963 pin->tx_nacked = false;
964 if (tx_custom_start(pin))
965 pin->state = CEC_ST_TX_START_BIT_LOW_CUSTOM;
967 pin->state = CEC_ST_TX_START_BIT_LOW;
968 /* Generate start bit */
972 if (delta / CEC_TIM_DATA_BIT_TOTAL >=
973 pin->tx_signal_free_time - 1)
974 pin->state = CEC_ST_TX_WAIT;
977 if (pin->tx_custom_pulse && pin->state == CEC_ST_IDLE) {
978 pin->tx_custom_pulse = false;
979 /* Generate custom pulse */
981 pin->state = CEC_ST_TX_PULSE_LOW_CUSTOM;
984 if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
985 pin->enable_irq_failed || adap->is_configuring ||
986 adap->is_configured || adap->monitor_all_cnt || !adap->monitor_pin_cnt)
988 /* Switch to interrupt mode */
989 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
990 pin->state = CEC_ST_RX_IRQ;
991 wake_up_interruptible(&pin->kthread_waitq);
992 return HRTIMER_NORESTART;
994 case CEC_ST_TX_LOW_DRIVE:
995 case CEC_ST_RX_LOW_DRIVE:
997 cec_pin_to_idle(pin);
1004 switch (pin->state) {
1005 case CEC_ST_TX_START_BIT_LOW_CUSTOM:
1006 case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
1007 case CEC_ST_TX_PULSE_LOW_CUSTOM:
1008 usecs = pin->tx_custom_low_usecs;
1010 case CEC_ST_TX_START_BIT_HIGH_CUSTOM:
1011 case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM:
1012 case CEC_ST_TX_PULSE_HIGH_CUSTOM:
1013 usecs = pin->tx_custom_high_usecs;
1016 usecs = states[pin->state].usecs;
1020 if (!adap->monitor_pin_cnt || usecs <= 150) {
1021 pin->wait_usecs = 0;
1022 pin->timer_ts = ktime_add_us(ts, usecs);
1023 hrtimer_forward_now(timer,
1024 ns_to_ktime(usecs * 1000));
1025 return HRTIMER_RESTART;
1027 pin->wait_usecs = usecs - 100;
1028 pin->timer_ts = ktime_add_us(ts, 100);
1029 hrtimer_forward_now(timer, ns_to_ktime(100000));
1030 return HRTIMER_RESTART;
1033 static int cec_pin_thread_func(void *_adap)
1035 struct cec_adapter *adap = _adap;
1036 struct cec_pin *pin = adap->pin;
1038 pin->enabled_irq = false;
1039 pin->enable_irq_failed = false;
1041 wait_event_interruptible(pin->kthread_waitq,
1042 kthread_should_stop() ||
1043 pin->work_rx_msg.len ||
1044 pin->work_tx_status ||
1045 atomic_read(&pin->work_irq_change) ||
1046 atomic_read(&pin->work_pin_num_events));
1048 if (kthread_should_stop())
1051 if (pin->work_rx_msg.len) {
1052 struct cec_msg *msg = &pin->work_rx_msg;
1054 if (msg->len > 1 && msg->len < CEC_MAX_MSG_SIZE &&
1056 /* Error injection: add byte to the message */
1057 msg->msg[msg->len++] = 0x55;
1059 if (msg->len > 2 && rx_remove_byte(pin)) {
1060 /* Error injection: remove byte from message */
1063 if (msg->len > CEC_MAX_MSG_SIZE)
1064 msg->len = CEC_MAX_MSG_SIZE;
1065 cec_received_msg_ts(adap, msg,
1066 ns_to_ktime(pin->work_rx_msg.rx_ts));
1070 if (pin->work_tx_status) {
1071 unsigned int tx_status = pin->work_tx_status;
1073 pin->work_tx_status = 0;
1074 cec_transmit_attempt_done_ts(adap, tx_status,
1078 while (atomic_read(&pin->work_pin_num_events)) {
1079 unsigned int idx = pin->work_pin_events_rd;
1080 u8 v = pin->work_pin_events[idx];
1082 cec_queue_pin_cec_event(adap,
1083 v & CEC_PIN_EVENT_FL_IS_HIGH,
1084 v & CEC_PIN_EVENT_FL_DROPPED,
1085 pin->work_pin_ts[idx]);
1086 pin->work_pin_events_rd = (idx + 1) % CEC_NUM_PIN_EVENTS;
1087 atomic_dec(&pin->work_pin_num_events);
1090 switch (atomic_xchg(&pin->work_irq_change,
1091 CEC_PIN_IRQ_UNCHANGED)) {
1092 case CEC_PIN_IRQ_DISABLE:
1093 if (pin->enabled_irq) {
1094 pin->ops->disable_irq(adap);
1095 pin->enabled_irq = false;
1096 pin->enable_irq_failed = false;
1099 if (pin->state == CEC_ST_OFF)
1101 cec_pin_to_idle(pin);
1102 hrtimer_start(&pin->timer, ns_to_ktime(0),
1105 case CEC_PIN_IRQ_ENABLE:
1106 if (pin->enabled_irq || !pin->ops->enable_irq ||
1107 pin->adap->devnode.unregistered)
1109 pin->enable_irq_failed = !pin->ops->enable_irq(adap);
1110 if (pin->enable_irq_failed) {
1111 cec_pin_to_idle(pin);
1112 hrtimer_start(&pin->timer, ns_to_ktime(0),
1115 pin->enabled_irq = true;
1123 if (pin->enabled_irq) {
1124 pin->ops->disable_irq(pin->adap);
1125 pin->enabled_irq = false;
1126 pin->enable_irq_failed = false;
1132 static int cec_pin_adap_enable(struct cec_adapter *adap, bool enable)
1134 struct cec_pin *pin = adap->pin;
1138 cec_pin_to_idle(pin);
1139 pin->tx_msg.len = 0;
1140 pin->timer_ts = ns_to_ktime(0);
1141 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_UNCHANGED);
1142 if (!pin->kthread) {
1143 pin->kthread = kthread_run(cec_pin_thread_func, adap,
1145 if (IS_ERR(pin->kthread)) {
1146 int err = PTR_ERR(pin->kthread);
1148 pr_err("cec-pin: kernel_thread() failed\n");
1149 pin->kthread = NULL;
1153 hrtimer_start(&pin->timer, ns_to_ktime(0),
1155 } else if (pin->kthread) {
1156 hrtimer_cancel(&pin->timer);
1158 cec_pin_to_idle(pin);
1159 pin->state = CEC_ST_OFF;
1160 pin->work_tx_status = 0;
1161 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
1162 wake_up_interruptible(&pin->kthread_waitq);
1167 static int cec_pin_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
1169 struct cec_pin *pin = adap->pin;
1171 if (log_addr == CEC_LOG_ADDR_INVALID)
1174 pin->la_mask |= (1 << log_addr);
1178 void cec_pin_start_timer(struct cec_pin *pin)
1180 if (pin->state != CEC_ST_RX_IRQ)
1183 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
1184 wake_up_interruptible(&pin->kthread_waitq);
1187 static int cec_pin_adap_transmit(struct cec_adapter *adap, u8 attempts,
1188 u32 signal_free_time, struct cec_msg *msg)
1190 struct cec_pin *pin = adap->pin;
1193 * If a receive is in progress, then this transmit should use
1194 * a signal free time of max CEC_SIGNAL_FREE_TIME_NEW_INITIATOR
1195 * since when it starts transmitting it will have a new initiator.
1197 if (pin->state != CEC_ST_IDLE &&
1198 signal_free_time > CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
1199 signal_free_time = CEC_SIGNAL_FREE_TIME_NEW_INITIATOR;
1201 pin->tx_signal_free_time = signal_free_time;
1202 pin->tx_extra_bytes = 0;
1205 /* Error injection: add byte to the message */
1206 pin->tx_extra_bytes = tx_add_bytes(pin);
1208 if (msg->len > 2 && tx_remove_byte(pin)) {
1209 /* Error injection: remove byte from the message */
1212 pin->work_tx_status = 0;
1214 cec_pin_start_timer(pin);
1218 static void cec_pin_adap_status(struct cec_adapter *adap,
1219 struct seq_file *file)
1221 struct cec_pin *pin = adap->pin;
1223 seq_printf(file, "state: %s\n", states[pin->state].name);
1224 seq_printf(file, "tx_bit: %d\n", pin->tx_bit);
1225 seq_printf(file, "rx_bit: %d\n", pin->rx_bit);
1226 seq_printf(file, "cec pin: %d\n", call_pin_op(pin, read));
1227 seq_printf(file, "cec pin events dropped: %u\n",
1228 pin->work_pin_events_dropped_cnt);
1229 if (pin->ops->enable_irq)
1230 seq_printf(file, "irq %s\n", pin->enabled_irq ? "enabled" :
1231 (pin->enable_irq_failed ? "failed" : "disabled"));
1232 if (pin->timer_100us_overruns) {
1233 seq_printf(file, "timer overruns > 100us: %u of %u\n",
1234 pin->timer_100us_overruns, pin->timer_cnt);
1235 seq_printf(file, "timer overruns > 300us: %u of %u\n",
1236 pin->timer_300us_overruns, pin->timer_cnt);
1237 seq_printf(file, "max timer overrun: %u usecs\n",
1238 pin->timer_max_overrun);
1239 seq_printf(file, "avg timer overrun: %u usecs\n",
1240 pin->timer_sum_overrun / pin->timer_100us_overruns);
1242 if (pin->rx_start_bit_low_too_short_cnt)
1244 "rx start bit low too short: %u (delta %u, ts %llu)\n",
1245 pin->rx_start_bit_low_too_short_cnt,
1246 pin->rx_start_bit_low_too_short_delta,
1247 pin->rx_start_bit_low_too_short_ts);
1248 if (pin->rx_start_bit_too_short_cnt)
1250 "rx start bit too short: %u (delta %u, ts %llu)\n",
1251 pin->rx_start_bit_too_short_cnt,
1252 pin->rx_start_bit_too_short_delta,
1253 pin->rx_start_bit_too_short_ts);
1254 if (pin->rx_start_bit_too_long_cnt)
1255 seq_printf(file, "rx start bit too long: %u\n",
1256 pin->rx_start_bit_too_long_cnt);
1257 if (pin->rx_data_bit_too_short_cnt)
1259 "rx data bit too short: %u (delta %u, ts %llu)\n",
1260 pin->rx_data_bit_too_short_cnt,
1261 pin->rx_data_bit_too_short_delta,
1262 pin->rx_data_bit_too_short_ts);
1263 if (pin->rx_data_bit_too_long_cnt)
1264 seq_printf(file, "rx data bit too long: %u\n",
1265 pin->rx_data_bit_too_long_cnt);
1266 seq_printf(file, "rx initiated low drive: %u\n", pin->rx_low_drive_cnt);
1267 seq_printf(file, "tx detected low drive: %u\n", pin->tx_low_drive_cnt);
1268 pin->work_pin_events_dropped_cnt = 0;
1270 pin->timer_100us_overruns = 0;
1271 pin->timer_300us_overruns = 0;
1272 pin->timer_max_overrun = 0;
1273 pin->timer_sum_overrun = 0;
1274 pin->rx_start_bit_low_too_short_cnt = 0;
1275 pin->rx_start_bit_too_short_cnt = 0;
1276 pin->rx_start_bit_too_long_cnt = 0;
1277 pin->rx_data_bit_too_short_cnt = 0;
1278 pin->rx_data_bit_too_long_cnt = 0;
1279 pin->rx_low_drive_cnt = 0;
1280 pin->tx_low_drive_cnt = 0;
1281 call_void_pin_op(pin, status, file);
1284 static int cec_pin_adap_monitor_all_enable(struct cec_adapter *adap,
1287 struct cec_pin *pin = adap->pin;
1289 pin->monitor_all = enable;
1293 static void cec_pin_adap_free(struct cec_adapter *adap)
1295 struct cec_pin *pin = adap->pin;
1298 kthread_stop(pin->kthread);
1299 pin->kthread = NULL;
1301 pin->ops->free(adap);
1306 static int cec_pin_received(struct cec_adapter *adap, struct cec_msg *msg)
1308 struct cec_pin *pin = adap->pin;
1310 if (pin->ops->received && !adap->devnode.unregistered)
1311 return pin->ops->received(adap, msg);
1315 void cec_pin_changed(struct cec_adapter *adap, bool value)
1317 struct cec_pin *pin = adap->pin;
1319 cec_pin_update(pin, value, false);
1320 if (!value && (adap->is_configuring || adap->is_configured ||
1321 adap->monitor_all_cnt || !adap->monitor_pin_cnt))
1322 atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_DISABLE);
1324 EXPORT_SYMBOL_GPL(cec_pin_changed);
1326 static const struct cec_adap_ops cec_pin_adap_ops = {
1327 .adap_enable = cec_pin_adap_enable,
1328 .adap_monitor_all_enable = cec_pin_adap_monitor_all_enable,
1329 .adap_log_addr = cec_pin_adap_log_addr,
1330 .adap_transmit = cec_pin_adap_transmit,
1331 .adap_status = cec_pin_adap_status,
1332 .adap_free = cec_pin_adap_free,
1333 #ifdef CONFIG_CEC_PIN_ERROR_INJ
1334 .error_inj_parse_line = cec_pin_error_inj_parse_line,
1335 .error_inj_show = cec_pin_error_inj_show,
1337 .received = cec_pin_received,
1340 struct cec_adapter *cec_pin_allocate_adapter(const struct cec_pin_ops *pin_ops,
1341 void *priv, const char *name, u32 caps)
1343 struct cec_adapter *adap;
1344 struct cec_pin *pin = kzalloc(sizeof(*pin), GFP_KERNEL);
1347 return ERR_PTR(-ENOMEM);
1349 hrtimer_init(&pin->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
1350 atomic_set(&pin->work_pin_num_events, 0);
1351 pin->timer.function = cec_pin_timer;
1352 init_waitqueue_head(&pin->kthread_waitq);
1353 pin->tx_custom_low_usecs = CEC_TIM_CUSTOM_DEFAULT;
1354 pin->tx_custom_high_usecs = CEC_TIM_CUSTOM_DEFAULT;
1356 adap = cec_allocate_adapter(&cec_pin_adap_ops, priv, name,
1357 caps | CEC_CAP_MONITOR_ALL | CEC_CAP_MONITOR_PIN,
1367 cec_pin_update(pin, cec_pin_high(pin), true);
1370 EXPORT_SYMBOL_GPL(cec_pin_allocate_adapter);