drivers/i2c/busses/i2c-keba.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) KEBA Industrial Automation Gmbh 2024
   4  *
   5  * Driver for KEBA I2C controller FPGA IP core
   6  */
   7
   8 #include <linux/i2c.h>
   9 #include <linux/io.h>
  10 #include <linux/iopoll.h>
  11 #include <linux/module.h>
  12 #include <linux/misc/keba.h>
  13
  14 #define KI2C "i2c-keba"
  15
  16 #define KI2C_CAPABILITY_REG             0x02
  17 #define   KI2C_CAPABILITY_CRYPTO        0x01
  18 #define   KI2C_CAPABILITY_DC            0x02
  19
  20 #define KI2C_CONTROL_REG        0x04
  21 #define   KI2C_CONTROL_MEN      0x01
  22 #define   KI2C_CONTROL_MSTA     0x02
  23 #define   KI2C_CONTROL_RSTA     0x04
  24 #define   KI2C_CONTROL_MTX      0x08
  25 #define   KI2C_CONTROL_TXAK     0x10
  26 #define   KI2C_CONTROL_DISABLE  0x00
  27
  28 #define KI2C_CONTROL_DC_REG     0x05
  29 #define   KI2C_CONTROL_DC_SDA   0x01
  30 #define   KI2C_CONTROL_DC_SCL   0x02
  31
  32 #define KI2C_STATUS_REG         0x08
  33 #define   KI2C_STATUS_IN_USE    0x01
  34 #define   KI2C_STATUS_ACK_CYC   0x02
  35 #define   KI2C_STATUS_RXAK      0x04
  36 #define   KI2C_STATUS_MCF       0x08
  37
  38 #define KI2C_STATUS_DC_REG      0x09
  39 #define   KI2C_STATUS_DC_SDA    0x01
  40 #define   KI2C_STATUS_DC_SCL    0x02
  41
  42 #define KI2C_DATA_REG           0x0c
  43
  44 #define KI2C_INUSE_SLEEP_US     (2 * USEC_PER_MSEC)
  45 #define KI2C_INUSE_TIMEOUT_US   (10 * USEC_PER_SEC)
  46
  47 #define KI2C_POLL_DELAY_US      5
  48
  49 struct ki2c {
  50         struct keba_i2c_auxdev *auxdev;
  51         void __iomem *base;
  52         struct i2c_adapter adapter;
  53
  54         struct i2c_client **client;
  55         int client_size;
  56 };
  57
  58 static int ki2c_inuse_lock(struct ki2c *ki2c)
  59 {
  60         u8 sts;
  61         int ret;
  62
  63         /*
  64          * The I2C controller has an IN_USE bit for locking access to the
  65          * controller. This enables the use of I2C controller by other none
  66          * Linux processors.
  67          *
  68          * If the I2C controller is free, then the first read returns
  69          * IN_USE == 0. After that the I2C controller is locked and further
  70          * reads of IN_USE return 1.
  71          *
  72          * The I2C controller is unlocked by writing 1 into IN_USE.
  73          *
  74          * The IN_USE bit acts as a hardware semaphore for the I2C controller.
  75          * Poll for semaphore, but sleep while polling to free the CPU.
  76          */
  77         ret = readb_poll_timeout(ki2c->base + KI2C_STATUS_REG,
  78                                  sts, (sts & KI2C_STATUS_IN_USE) == 0,
  79                                  KI2C_INUSE_SLEEP_US, KI2C_INUSE_TIMEOUT_US);
  80         if (ret)
  81                 dev_err(&ki2c->auxdev->auxdev.dev, "%s err!\n", __func__);
  82
  83         return ret;
  84 }
  85
  86 static void ki2c_inuse_unlock(struct ki2c *ki2c)
  87 {
  88         /* unlock the controller by writing 1 into IN_USE */
  89         iowrite8(KI2C_STATUS_IN_USE, ki2c->base + KI2C_STATUS_REG);
  90 }
  91
  92 static int ki2c_wait_for_bit(void __iomem *addr, u8 mask, unsigned long timeout)
  93 {
  94         u8 val;
  95
  96         return readb_poll_timeout(addr, val, (val & mask), KI2C_POLL_DELAY_US,
  97                                   jiffies_to_usecs(timeout));
  98 }
  99
 100 static int ki2c_wait_for_mcf(struct ki2c *ki2c)
 101 {
 102         return ki2c_wait_for_bit(ki2c->base + KI2C_STATUS_REG, KI2C_STATUS_MCF,
 103                                  ki2c->adapter.timeout);
 104 }
 105
 106 static int ki2c_wait_for_data(struct ki2c *ki2c)
 107 {
 108         int ret;
 109
 110         ret = ki2c_wait_for_mcf(ki2c);
 111         if (ret < 0)
 112                 return ret;
 113
 114         return ki2c_wait_for_bit(ki2c->base + KI2C_STATUS_REG,
 115                                  KI2C_STATUS_ACK_CYC,
 116                                  ki2c->adapter.timeout);
 117 }
 118
 119 static int ki2c_wait_for_data_ack(struct ki2c *ki2c)
 120 {
 121         unsigned int reg;
 122         int ret;
 123
 124         ret = ki2c_wait_for_data(ki2c);
 125         if (ret < 0)
 126                 return ret;
 127
 128         /* RXAK == 0 means ACK reveived */
 129         reg = ioread8(ki2c->base + KI2C_STATUS_REG);
 130         if (reg & KI2C_STATUS_RXAK)
 131                 return -EIO;
 132
 133         return 0;
 134 }
 135
 136 static int ki2c_has_capability(struct ki2c *ki2c, unsigned int cap)
 137 {
 138         unsigned int reg = ioread8(ki2c->base + KI2C_CAPABILITY_REG);
 139
 140         return (reg & cap) != 0;
 141 }
 142
 143 static int ki2c_get_scl(struct ki2c *ki2c)
 144 {
 145         unsigned int reg = ioread8(ki2c->base + KI2C_STATUS_DC_REG);
 146
 147         /* capability KI2C_CAPABILITY_DC required */
 148         return (reg & KI2C_STATUS_DC_SCL) != 0;
 149 }
 150
 151 static int ki2c_get_sda(struct ki2c *ki2c)
 152 {
 153         unsigned int reg = ioread8(ki2c->base + KI2C_STATUS_DC_REG);
 154
 155         /* capability KI2C_CAPABILITY_DC required */
 156         return (reg & KI2C_STATUS_DC_SDA) != 0;
 157 }
 158
 159 static void ki2c_set_scl(struct ki2c *ki2c, int val)
 160 {
 161         u8 control_dc;
 162
 163         /* capability KI2C_CAPABILITY_DC and KI2C_CONTROL_MEN = 0 reqired */
 164         control_dc = ioread8(ki2c->base + KI2C_CONTROL_DC_REG);
 165         if (val)
 166                 control_dc |= KI2C_CONTROL_DC_SCL;
 167         else
 168                 control_dc &= ~KI2C_CONTROL_DC_SCL;
 169         iowrite8(control_dc, ki2c->base + KI2C_CONTROL_DC_REG);
 170 }
 171
 172 /*
 173  * Resetting bus bitwise is done by checking SDA and applying clock cycles as
 174  * long as SDA is low. 9 clock cycles are applied at most.
 175  *
 176  * Clock cycles are generated and udelay() determines the duration of clock
 177  * cycles. Generated clock rate is 100 KHz and so duration of both clock levels
 178  * is: delay in ns = (10^6 / 100) / 2
 179  */
 180 #define KI2C_RECOVERY_CLK_CNT   (9 * 2)
 181 #define KI2C_RECOVERY_UDELAY    5
 182 static int ki2c_reset_bus_bitwise(struct ki2c *ki2c)
 183 {
 184         int val = 1;
 185         int ret = 0;
 186         int i;
 187
 188         /* disable I2C controller (MEN = 0) to get direct access to SCL/SDA */
 189         iowrite8(0, ki2c->base + KI2C_CONTROL_REG);
 190
 191         /* generate clock cycles */
 192         ki2c_set_scl(ki2c, val);
 193         udelay(KI2C_RECOVERY_UDELAY);
 194         for (i = 0; i < KI2C_RECOVERY_CLK_CNT; i++) {
 195                 if (val) {
 196                         /* SCL shouldn't be low here */
 197                         if (!ki2c_get_scl(ki2c)) {
 198                                 dev_err(&ki2c->auxdev->auxdev.dev,
 199                                         "SCL is stuck low!\n");
 200                                 ret = -EBUSY;
 201                                 break;
 202                         }
 203
 204                         /* break if SDA is high */
 205                         if (ki2c_get_sda(ki2c))
 206                                 break;
 207                 }
 208
 209                 val = !val;
 210                 ki2c_set_scl(ki2c, val);
 211                 udelay(KI2C_RECOVERY_UDELAY);
 212         }
 213
 214         if (!ki2c_get_sda(ki2c)) {
 215                 dev_err(&ki2c->auxdev->auxdev.dev, "SDA is still low!\n");
 216                 ret = -EBUSY;
 217         }
 218
 219         /* reenable controller */
 220         iowrite8(KI2C_CONTROL_MEN, ki2c->base + KI2C_CONTROL_REG);
 221
 222         return ret;
 223 }
 224
 225 /*
 226  * Resetting bus bytewise is done by writing start bit, 9 data bits and stop
 227  * bit.
 228  *
 229  * This is not 100% safe. If target is an EEPROM and a write access was
 230  * interrupted during the ACK cycle, this approach might not be able to recover
 231  * the bus. The reason is, that after the 9 clock cycles the EEPROM will be in
 232  * ACK cycle again and will hold SDA low like it did before the start of the
 233  * routine. Furthermore the EEPROM might get written one additional byte with
 234  * 0xff into it. Thus, use bitwise approach whenever possible, especially when
 235  * EEPROMs are on the bus.
 236  */
 237 static int ki2c_reset_bus_bytewise(struct ki2c *ki2c)
 238 {
 239         int ret;
 240
 241         /* hold data line high for 9 clock cycles */
 242         iowrite8(0xFF, ki2c->base + KI2C_DATA_REG);
 243
 244         /* create start condition */
 245         iowrite8(KI2C_CONTROL_MEN | KI2C_CONTROL_MTX | KI2C_CONTROL_MSTA | KI2C_CONTROL_TXAK,
 246                  ki2c->base + KI2C_CONTROL_REG);
 247         ret = ki2c_wait_for_mcf(ki2c);
 248         if (ret < 0) {
 249                 dev_err(&ki2c->auxdev->auxdev.dev, "Start condition failed\n");
 250
 251                 return ret;
 252         }
 253
 254         /* create stop condition */
 255         iowrite8(KI2C_CONTROL_MEN | KI2C_CONTROL_MTX | KI2C_CONTROL_TXAK,
 256                  ki2c->base + KI2C_CONTROL_REG);
 257         ret = ki2c_wait_for_mcf(ki2c);
 258         if (ret < 0)
 259                 dev_err(&ki2c->auxdev->auxdev.dev, "Stop condition failed\n");
 260
 261         return ret;
 262 }
 263
 264 static int ki2c_reset_bus(struct ki2c *ki2c)
 265 {
 266         int ret;
 267
 268         ret = ki2c_inuse_lock(ki2c);
 269         if (ret < 0)
 270                 return ret;
 271
 272         /*
 273          * If the I2C controller is capable of direct control of SCL/SDA, then a
 274          * bitwise reset is used. Otherwise fall back to bytewise reset.
 275          */
 276         if (ki2c_has_capability(ki2c, KI2C_CAPABILITY_DC))
 277                 ret = ki2c_reset_bus_bitwise(ki2c);
 278         else
 279                 ret = ki2c_reset_bus_bytewise(ki2c);
 280
 281         ki2c_inuse_unlock(ki2c);
 282
 283         return ret;
 284 }
 285
 286 static void ki2c_write_target_addr(struct ki2c *ki2c, struct i2c_msg *m)
 287 {
 288         u8 addr;
 289
 290         addr = m->addr << 1;
 291         /* Bit 0 signals RD/WR */
 292         if (m->flags & I2C_M_RD)
 293                 addr |= 0x01;
 294
 295         iowrite8(addr, ki2c->base + KI2C_DATA_REG);
 296 }
 297
 298 static int ki2c_start_addr(struct ki2c *ki2c, struct i2c_msg *m)
 299 {
 300         int ret;
 301
 302         /*
 303          * Store target address byte in the controller. This has to be done
 304          * before sending START condition.
 305          */
 306         ki2c_write_target_addr(ki2c, m);
 307
 308         /* enable controller for TX */
 309         iowrite8(KI2C_CONTROL_MEN | KI2C_CONTROL_MTX,
 310                  ki2c->base + KI2C_CONTROL_REG);
 311
 312         /* send START condition and target address byte */
 313         iowrite8(KI2C_CONTROL_MEN | KI2C_CONTROL_MTX | KI2C_CONTROL_MSTA,
 314                  ki2c->base + KI2C_CONTROL_REG);
 315
 316         ret = ki2c_wait_for_data_ack(ki2c);
 317         if (ret < 0)
 318                 /*
 319                  * For EEPROMs this is normal behavior during internal write
 320                  * operation.
 321                  */
 322                 dev_dbg(&ki2c->auxdev->auxdev.dev,
 323                         "%s wait for ACK err at 0x%02x!\n", __func__, m->addr);
 324
 325         return ret;
 326 }
 327
 328 static int ki2c_repstart_addr(struct ki2c *ki2c, struct i2c_msg *m)
 329 {
 330         int ret;
 331
 332         /* repeated start and write is not supported */
 333         if ((m->flags & I2C_M_RD) == 0) {
 334                 dev_err(&ki2c->auxdev->auxdev.dev,
 335                         "Repeated start not supported for writes\n");
 336                 return -EINVAL;
 337         }
 338
 339         /* send repeated start */
 340         iowrite8(KI2C_CONTROL_MEN | KI2C_CONTROL_MSTA | KI2C_CONTROL_RSTA,
 341                  ki2c->base + KI2C_CONTROL_REG);
 342
 343         ret = ki2c_wait_for_mcf(ki2c);
 344         if (ret < 0) {
 345                 dev_err(&ki2c->auxdev->auxdev.dev,
 346                         "%s wait for MCF err at 0x%02x!\n", __func__, m->addr);
 347                 return ret;
 348         }
 349
 350         /* write target-address byte */
 351         ki2c_write_target_addr(ki2c, m);
 352
 353         ret = ki2c_wait_for_data_ack(ki2c);
 354         if (ret < 0)
 355                 dev_err(&ki2c->auxdev->auxdev.dev,
 356                         "%s wait for ACK err at 0x%02x!\n", __func__, m->addr);
 357
 358         return ret;
 359 }
 360
 361 static void ki2c_stop(struct ki2c *ki2c)
 362 {
 363         iowrite8(KI2C_CONTROL_MEN, ki2c->base + KI2C_CONTROL_REG);
 364         ki2c_wait_for_mcf(ki2c);
 365 }
 366
 367 static int ki2c_write(struct ki2c *ki2c, const u8 *data, int len)
 368 {
 369         int ret;
 370         int i;
 371
 372         for (i = 0; i < len; i++) {
 373                 /* write data byte */
 374                 iowrite8(data[i], ki2c->base + KI2C_DATA_REG);
 375
 376                 ret = ki2c_wait_for_data_ack(ki2c);
 377                 if (ret < 0)
 378                         return ret;
 379         }
 380
 381         return 0;
 382 }
 383
 384 static int ki2c_read(struct ki2c *ki2c, u8 *data, int len)
 385 {
 386         u8 control;
 387         int ret;
 388         int i;
 389
 390         if (len == 0)
 391                 return 0;       /* nothing to do */
 392
 393         control = KI2C_CONTROL_MEN | KI2C_CONTROL_MSTA;
 394
 395         /* if just one byte => send tx-nack after transfer */
 396         if (len == 1)
 397                 control |= KI2C_CONTROL_TXAK;
 398
 399         iowrite8(control, ki2c->base + KI2C_CONTROL_REG);
 400
 401         /* dummy read to start transfer on bus */
 402         ioread8(ki2c->base + KI2C_DATA_REG);
 403
 404         for (i = 0; i < len; i++) {
 405                 ret = ki2c_wait_for_data(ki2c);
 406                 if (ret < 0)
 407                         return ret;
 408
 409                 if (i == len - 2)
 410                         /* send tx-nack after transfer of last byte */
 411                         iowrite8(KI2C_CONTROL_MEN | KI2C_CONTROL_MSTA | KI2C_CONTROL_TXAK,
 412                                  ki2c->base + KI2C_CONTROL_REG);
 413                 else if (i == len - 1)
 414                         /*
 415                          * switch to TX on last byte, so that reading DATA
 416                          * register does not trigger another read transfer
 417                          */
 418                         iowrite8(KI2C_CONTROL_MEN | KI2C_CONTROL_MSTA | KI2C_CONTROL_MTX,
 419                                  ki2c->base + KI2C_CONTROL_REG);
 420
 421                 /* read byte and start next transfer (if not last byte) */
 422                 data[i] = ioread8(ki2c->base + KI2C_DATA_REG);
 423         }
 424
 425         return len;
 426 }
 427
 428 static int ki2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 429 {
 430         struct ki2c *ki2c = i2c_get_adapdata(adap);
 431         int ret;
 432         int i;
 433
 434         ret = ki2c_inuse_lock(ki2c);
 435         if (ret < 0)
 436                 return ret;
 437
 438         for (i = 0; i < num; i++) {
 439                 struct i2c_msg *m = &msgs[i];
 440
 441                 if (i == 0)
 442                         ret = ki2c_start_addr(ki2c, m);
 443                 else
 444                         ret = ki2c_repstart_addr(ki2c, m);
 445                 if (ret < 0)
 446                         break;
 447
 448                 if (m->flags & I2C_M_RD)
 449                         ret = ki2c_read(ki2c, m->buf, m->len);
 450                 else
 451                         ret = ki2c_write(ki2c, m->buf, m->len);
 452                 if (ret < 0)
 453                         break;
 454         }
 455
 456         ki2c_stop(ki2c);
 457
 458         ki2c_inuse_unlock(ki2c);
 459
 460         return ret < 0 ? ret : num;
 461 }
 462
 463 static void ki2c_unregister_devices(struct ki2c *ki2c)
 464 {
 465         int i;
 466
 467         for (i = 0; i < ki2c->client_size; i++)
 468                 i2c_unregister_device(ki2c->client[i]);
 469 }
 470
 471 static int ki2c_register_devices(struct ki2c *ki2c)
 472 {
 473         struct i2c_board_info *info = ki2c->auxdev->info;
 474         int i;
 475
 476         /* register all known I2C devices */
 477         for (i = 0; i < ki2c->client_size; i++) {
 478                 struct i2c_client *client;
 479                 unsigned short const addr_list[2] = { info[i].addr,
 480                                                       I2C_CLIENT_END };
 481
 482                 client = i2c_new_scanned_device(&ki2c->adapter, &info[i],
 483                                                 addr_list, NULL);
 484                 if (!IS_ERR(client)) {
 485                         ki2c->client[i] = client;
 486                 } else if (PTR_ERR(client) != -ENODEV) {
 487                         ki2c->client_size = i;
 488                         ki2c_unregister_devices(ki2c);
 489
 490                         return PTR_ERR(client);
 491                 }
 492         }
 493
 494         return 0;
 495 }
 496
 497 static u32 ki2c_func(struct i2c_adapter *adap)
 498 {
 499         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 500 }
 501
 502 static const struct i2c_algorithm ki2c_algo = {
 503         .master_xfer   = ki2c_xfer,
 504         .functionality = ki2c_func,
 505 };
 506
 507 static int ki2c_probe(struct auxiliary_device *auxdev,
 508                       const struct auxiliary_device_id *id)
 509 {
 510         struct device *dev = &auxdev->dev;
 511         struct i2c_adapter *adap;
 512         struct ki2c *ki2c;
 513         int ret;
 514
 515         ki2c = devm_kzalloc(dev, sizeof(*ki2c), GFP_KERNEL);
 516         if (!ki2c)
 517                 return -ENOMEM;
 518         ki2c->auxdev = container_of(auxdev, struct keba_i2c_auxdev, auxdev);
 519         ki2c->client = devm_kcalloc(dev, ki2c->auxdev->info_size,
 520                                     sizeof(*ki2c->client), GFP_KERNEL);
 521         if (!ki2c->client)
 522                 return -ENOMEM;
 523         ki2c->client_size = ki2c->auxdev->info_size;
 524         auxiliary_set_drvdata(auxdev, ki2c);
 525
 526         ki2c->base = devm_ioremap_resource(dev, &ki2c->auxdev->io);
 527         if (IS_ERR(ki2c->base))
 528                 return PTR_ERR(ki2c->base);
 529
 530         adap = &ki2c->adapter;
 531         strscpy(adap->name, "KEBA I2C adapter", sizeof(adap->name));
 532         adap->owner = THIS_MODULE;
 533         adap->class = I2C_CLASS_HWMON;
 534         adap->algo = &ki2c_algo;
 535         adap->dev.parent = dev;
 536
 537         i2c_set_adapdata(adap, ki2c);
 538
 539         /* enable controller */
 540         iowrite8(KI2C_CONTROL_MEN, ki2c->base + KI2C_CONTROL_REG);
 541
 542         /* reset bus before probing I2C devices */
 543         ret = ki2c_reset_bus(ki2c);
 544         if (ret)
 545                 goto out;
 546
 547         ret = devm_i2c_add_adapter(dev, adap);
 548         if (ret) {
 549                 dev_err(dev, "Failed to add adapter (%d)!\n", ret);
 550                 goto out;
 551         }
 552
 553         ret = ki2c_register_devices(ki2c);
 554         if (ret) {
 555                 dev_err(dev, "Failed to register devices (%d)!\n", ret);
 556                 goto out;
 557         }
 558
 559         return 0;
 560
 561 out:
 562         iowrite8(KI2C_CONTROL_DISABLE, ki2c->base + KI2C_CONTROL_REG);
 563         return ret;
 564 }
 565
 566 static void ki2c_remove(struct auxiliary_device *auxdev)
 567 {
 568         struct ki2c *ki2c = auxiliary_get_drvdata(auxdev);
 569
 570         ki2c_unregister_devices(ki2c);
 571
 572         /* disable controller */
 573         iowrite8(KI2C_CONTROL_DISABLE, ki2c->base + KI2C_CONTROL_REG);
 574
 575         auxiliary_set_drvdata(auxdev, NULL);
 576 }
 577
 578 static const struct auxiliary_device_id ki2c_devtype_aux[] = {
 579         { .name = "keba.i2c" },
 580         { }
 581 };
 582 MODULE_DEVICE_TABLE(auxiliary, ki2c_devtype_aux);
 583
 584 static struct auxiliary_driver ki2c_driver_aux = {
 585         .name = KI2C,
 586         .id_table = ki2c_devtype_aux,
 587         .probe = ki2c_probe,
 588         .remove = ki2c_remove,
 589 };
 590 module_auxiliary_driver(ki2c_driver_aux);
 591
 592 MODULE_AUTHOR("Gerhard Engleder <[email protected]>");
 593 MODULE_DESCRIPTION("KEBA I2C bus controller driver");
 594 MODULE_LICENSE("GPL");