drivers/gpu/drm/tiny/mi0283qt.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * DRM driver for Multi-Inno MI0283QT panels
   4  *
   5  * Copyright 2016 Noralf Trønnes
   6  */
   7
   8 #include <linux/backlight.h>
   9 #include <linux/delay.h>
  10 #include <linux/gpio/consumer.h>
  11 #include <linux/module.h>
  12 #include <linux/property.h>
  13 #include <linux/regulator/consumer.h>
  14 #include <linux/spi/spi.h>
  15
  16 #include <drm/clients/drm_client_setup.h>
  17 #include <drm/drm_atomic_helper.h>
  18 #include <drm/drm_drv.h>
  19 #include <drm/drm_fbdev_dma.h>
  20 #include <drm/drm_gem_atomic_helper.h>
  21 #include <drm/drm_gem_dma_helper.h>
  22 #include <drm/drm_managed.h>
  23 #include <drm/drm_mipi_dbi.h>
  24 #include <drm/drm_modeset_helper.h>
  25 #include <video/mipi_display.h>
  26
  27 #define ILI9341_FRMCTR1         0xb1
  28 #define ILI9341_DISCTRL         0xb6
  29 #define ILI9341_ETMOD           0xb7
  30
  31 #define ILI9341_PWCTRL1         0xc0
  32 #define ILI9341_PWCTRL2         0xc1
  33 #define ILI9341_VMCTRL1         0xc5
  34 #define ILI9341_VMCTRL2         0xc7
  35 #define ILI9341_PWCTRLA         0xcb
  36 #define ILI9341_PWCTRLB         0xcf
  37
  38 #define ILI9341_PGAMCTRL        0xe0
  39 #define ILI9341_NGAMCTRL        0xe1
  40 #define ILI9341_DTCTRLA         0xe8
  41 #define ILI9341_DTCTRLB         0xea
  42 #define ILI9341_PWRSEQ          0xed
  43
  44 #define ILI9341_EN3GAM          0xf2
  45 #define ILI9341_PUMPCTRL        0xf7
  46
  47 #define ILI9341_MADCTL_BGR      BIT(3)
  48 #define ILI9341_MADCTL_MV       BIT(5)
  49 #define ILI9341_MADCTL_MX       BIT(6)
  50 #define ILI9341_MADCTL_MY       BIT(7)
  51
  52 static void mi0283qt_enable(struct drm_simple_display_pipe *pipe,
  53                             struct drm_crtc_state *crtc_state,
  54                             struct drm_plane_state *plane_state)
  55 {
  56         struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
  57         struct mipi_dbi *dbi = &dbidev->dbi;
  58         u8 addr_mode;
  59         int ret, idx;
  60
  61         if (!drm_dev_enter(pipe->crtc.dev, &idx))
  62                 return;
  63
  64         DRM_DEBUG_KMS("\n");
  65
  66         ret = mipi_dbi_poweron_conditional_reset(dbidev);
  67         if (ret < 0)
  68                 goto out_exit;
  69         if (ret == 1)
  70                 goto out_enable;
  71
  72         mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
  73
  74         mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);
  75         mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);
  76         mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);
  77         mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);
  78         mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);
  79         mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);
  80
  81         /* Power Control */
  82         mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26);
  83         mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11);
  84         /* VCOM */
  85         mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x35, 0x3e);
  86         mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0xbe);
  87
  88         /* Memory Access Control */
  89         mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
  90
  91         /* Frame Rate */
  92         mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b);
  93
  94         /* Gamma */
  95         mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x08);
  96         mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
  97         mipi_dbi_command(dbi, ILI9341_PGAMCTRL,
  98                        0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
  99                        0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00);
 100         mipi_dbi_command(dbi, ILI9341_NGAMCTRL,
 101                        0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
 102                        0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f);
 103
 104         /* DDRAM */
 105         mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07);
 106
 107         /* Display */
 108         mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);
 109         mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
 110         msleep(100);
 111
 112         mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
 113         msleep(100);
 114
 115 out_enable:
 116         /* The PiTFT (ili9340) has a hardware reset circuit that
 117          * resets only on power-on and not on each reboot through
 118          * a gpio like the rpi-display does.
 119          * As a result, we need to always apply the rotation value
 120          * regardless of the display "on/off" state.
 121          */
 122         switch (dbidev->rotation) {
 123         default:
 124                 addr_mode = ILI9341_MADCTL_MV | ILI9341_MADCTL_MY |
 125                             ILI9341_MADCTL_MX;
 126                 break;
 127         case 90:
 128                 addr_mode = ILI9341_MADCTL_MY;
 129                 break;
 130         case 180:
 131                 addr_mode = ILI9341_MADCTL_MV;
 132                 break;
 133         case 270:
 134                 addr_mode = ILI9341_MADCTL_MX;
 135                 break;
 136         }
 137         addr_mode |= ILI9341_MADCTL_BGR;
 138         mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
 139         mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
 140 out_exit:
 141         drm_dev_exit(idx);
 142 }
 143
 144 static const struct drm_simple_display_pipe_funcs mi0283qt_pipe_funcs = {
 145         DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(mi0283qt_enable),
 146 };
 147
 148 static const struct drm_display_mode mi0283qt_mode = {
 149         DRM_SIMPLE_MODE(320, 240, 58, 43),
 150 };
 151
 152 DEFINE_DRM_GEM_DMA_FOPS(mi0283qt_fops);
 153
 154 static const struct drm_driver mi0283qt_driver = {
 155         .driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
 156         .fops                   = &mi0283qt_fops,
 157         DRM_GEM_DMA_DRIVER_OPS_VMAP,
 158         DRM_FBDEV_DMA_DRIVER_OPS,
 159         .debugfs_init           = mipi_dbi_debugfs_init,
 160         .name                   = "mi0283qt",
 161         .desc                   = "Multi-Inno MI0283QT",
 162         .major                  = 1,
 163         .minor                  = 0,
 164 };
 165
 166 static const struct of_device_id mi0283qt_of_match[] = {
 167         { .compatible = "multi-inno,mi0283qt" },
 168         {},
 169 };
 170 MODULE_DEVICE_TABLE(of, mi0283qt_of_match);
 171
 172 static const struct spi_device_id mi0283qt_id[] = {
 173         { "mi0283qt", 0 },
 174         { },
 175 };
 176 MODULE_DEVICE_TABLE(spi, mi0283qt_id);
 177
 178 static int mi0283qt_probe(struct spi_device *spi)
 179 {
 180         struct device *dev = &spi->dev;
 181         struct mipi_dbi_dev *dbidev;
 182         struct drm_device *drm;
 183         struct mipi_dbi *dbi;
 184         struct gpio_desc *dc;
 185         u32 rotation = 0;
 186         int ret;
 187
 188         dbidev = devm_drm_dev_alloc(dev, &mi0283qt_driver,
 189                                     struct mipi_dbi_dev, drm);
 190         if (IS_ERR(dbidev))
 191                 return PTR_ERR(dbidev);
 192
 193         dbi = &dbidev->dbi;
 194         drm = &dbidev->drm;
 195
 196         dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
 197         if (IS_ERR(dbi->reset))
 198                 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
 199
 200         dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
 201         if (IS_ERR(dc))
 202                 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
 203
 204         dbidev->regulator = devm_regulator_get(dev, "power");
 205         if (IS_ERR(dbidev->regulator))
 206                 return PTR_ERR(dbidev->regulator);
 207
 208         dbidev->backlight = devm_of_find_backlight(dev);
 209         if (IS_ERR(dbidev->backlight))
 210                 return PTR_ERR(dbidev->backlight);
 211
 212         device_property_read_u32(dev, "rotation", &rotation);
 213
 214         ret = mipi_dbi_spi_init(spi, dbi, dc);
 215         if (ret)
 216                 return ret;
 217
 218         ret = mipi_dbi_dev_init(dbidev, &mi0283qt_pipe_funcs, &mi0283qt_mode, rotation);
 219         if (ret)
 220                 return ret;
 221
 222         drm_mode_config_reset(drm);
 223
 224         ret = drm_dev_register(drm, 0);
 225         if (ret)
 226                 return ret;
 227
 228         spi_set_drvdata(spi, drm);
 229
 230         drm_client_setup(drm, NULL);
 231
 232         return 0;
 233 }
 234
 235 static void mi0283qt_remove(struct spi_device *spi)
 236 {
 237         struct drm_device *drm = spi_get_drvdata(spi);
 238
 239         drm_dev_unplug(drm);
 240         drm_atomic_helper_shutdown(drm);
 241 }
 242
 243 static void mi0283qt_shutdown(struct spi_device *spi)
 244 {
 245         drm_atomic_helper_shutdown(spi_get_drvdata(spi));
 246 }
 247
 248 static int __maybe_unused mi0283qt_pm_suspend(struct device *dev)
 249 {
 250         return drm_mode_config_helper_suspend(dev_get_drvdata(dev));
 251 }
 252
 253 static int __maybe_unused mi0283qt_pm_resume(struct device *dev)
 254 {
 255         drm_mode_config_helper_resume(dev_get_drvdata(dev));
 256
 257         return 0;
 258 }
 259
 260 static const struct dev_pm_ops mi0283qt_pm_ops = {
 261         SET_SYSTEM_SLEEP_PM_OPS(mi0283qt_pm_suspend, mi0283qt_pm_resume)
 262 };
 263
 264 static struct spi_driver mi0283qt_spi_driver = {
 265         .driver = {
 266                 .name = "mi0283qt",
 267                 .of_match_table = mi0283qt_of_match,
 268                 .pm = &mi0283qt_pm_ops,
 269         },
 270         .id_table = mi0283qt_id,
 271         .probe = mi0283qt_probe,
 272         .remove = mi0283qt_remove,
 273         .shutdown = mi0283qt_shutdown,
 274 };
 275 module_spi_driver(mi0283qt_spi_driver);
 276
 277 MODULE_DESCRIPTION("Multi-Inno MI0283QT DRM driver");
 278 MODULE_AUTHOR("Noralf Trønnes");
 279 MODULE_LICENSE("GPL");