drivers/gpu/drm/nouveau/include/nvfw/acr.h

   1 #ifndef __NVFW_ACR_H__
   2 #define __NVFW_ACR_H__
   3
   4 struct wpr_header {
   5 #define WPR_HEADER_V0_FALCON_ID_INVALID                              0xffffffff
   6         u32 falcon_id;
   7         u32 lsb_offset;
   8         u32 bootstrap_owner;
   9         u32 lazy_bootstrap;
  10 #define WPR_HEADER_V0_STATUS_NONE                                             0
  11 #define WPR_HEADER_V0_STATUS_COPY                                             1
  12 #define WPR_HEADER_V0_STATUS_VALIDATION_CODE_FAILED                           2
  13 #define WPR_HEADER_V0_STATUS_VALIDATION_DATA_FAILED                           3
  14 #define WPR_HEADER_V0_STATUS_VALIDATION_DONE                                  4
  15 #define WPR_HEADER_V0_STATUS_VALIDATION_SKIPPED                               5
  16 #define WPR_HEADER_V0_STATUS_BOOTSTRAP_READY                                  6
  17         u32 status;
  18 };
  19
  20 void wpr_header_dump(struct nvkm_subdev *, const struct wpr_header *);
  21
  22 struct wpr_header_v1 {
  23 #define WPR_HEADER_V1_FALCON_ID_INVALID                              0xffffffff
  24         u32 falcon_id;
  25         u32 lsb_offset;
  26         u32 bootstrap_owner;
  27         u32 lazy_bootstrap;
  28         u32 bin_version;
  29 #define WPR_HEADER_V1_STATUS_NONE                                             0
  30 #define WPR_HEADER_V1_STATUS_COPY                                             1
  31 #define WPR_HEADER_V1_STATUS_VALIDATION_CODE_FAILED                           2
  32 #define WPR_HEADER_V1_STATUS_VALIDATION_DATA_FAILED                           3
  33 #define WPR_HEADER_V1_STATUS_VALIDATION_DONE                                  4
  34 #define WPR_HEADER_V1_STATUS_VALIDATION_SKIPPED                               5
  35 #define WPR_HEADER_V1_STATUS_BOOTSTRAP_READY                                  6
  36 #define WPR_HEADER_V1_STATUS_REVOCATION_CHECK_FAILED                          7
  37         u32 status;
  38 };
  39
  40 void wpr_header_v1_dump(struct nvkm_subdev *, const struct wpr_header_v1 *);
  41
  42 struct wpr_generic_header {
  43 #define WPR_GENERIC_HEADER_ID_LSF_UCODE_DESC     1
  44 #define WPR_GENERIC_HEADER_ID_LSF_WPR_HEADER     2
  45 #define WPR_GENERIC_HEADER_ID_LSF_SHARED_SUB_WPR 3
  46 #define WPR_GENERIC_HEADER_ID_LSF_LSB_HEADER     4
  47         u16 identifier;
  48         u16 version;
  49         u32 size;
  50 };
  51
  52 struct wpr_header_v2 {
  53         struct wpr_generic_header hdr;
  54         struct wpr_header_v1 wpr;
  55 };
  56
  57 void wpr_header_v2_dump(struct nvkm_subdev *, const struct wpr_header_v2 *);
  58
  59 struct lsf_signature {
  60         u8 prd_keys[2][16];
  61         u8 dbg_keys[2][16];
  62         u32 b_prd_present;
  63         u32 b_dbg_present;
  64         u32 falcon_id;
  65 };
  66
  67 struct lsf_signature_v1 {
  68         u8 prd_keys[2][16];
  69         u8 dbg_keys[2][16];
  70         u32 b_prd_present;
  71         u32 b_dbg_present;
  72         u32 falcon_id;
  73         u32 supports_versioning;
  74         u32 version;
  75         u32 depmap_count;
  76         u8 depmap[11/*LSF_LSB_DEPMAP_SIZE*/ * 2 * 4];
  77         u8 kdf[16];
  78 };
  79
  80 struct lsb_header_tail {
  81         u32 ucode_off;
  82         u32 ucode_size;
  83         u32 data_size;
  84         u32 bl_code_size;
  85         u32 bl_imem_off;
  86         u32 bl_data_off;
  87         u32 bl_data_size;
  88         u32 app_code_off;
  89         u32 app_code_size;
  90         u32 app_data_off;
  91         u32 app_data_size;
  92         u32 flags;
  93 };
  94
  95 struct lsb_header {
  96         struct lsf_signature signature;
  97         struct lsb_header_tail tail;
  98 };
  99
 100 void lsb_header_dump(struct nvkm_subdev *, struct lsb_header *);
 101
 102 struct lsb_header_v1 {
 103         struct lsf_signature_v1 signature;
 104         struct lsb_header_tail tail;
 105 };
 106
 107 void lsb_header_v1_dump(struct nvkm_subdev *, struct lsb_header_v1 *);
 108
 109 struct lsb_header_v2 {
 110         struct wpr_generic_header hdr;
 111         struct lsf_signature_v2 {
 112                 struct wpr_generic_header hdr;
 113                 u32 falcon_id;
 114                 u8 prd_present;
 115                 u8 dbg_present;
 116                 u16 reserved;
 117                 u32 sig_size;
 118                 u8 prod_sig[2][384 + 128];
 119                 u8 debug_sig[2][384 + 128];
 120                 u16 sig_algo_ver;
 121                 u16 sig_algo;
 122                 u16 hash_algo_ver;
 123                 u16 hash_algo;
 124                 u32 sig_algo_padding_type;
 125                 u8 depmap[11 * 2 * 4];
 126                 u32 depmap_count;
 127                 u8 supports_versioning;
 128                 u8 pad[3];
 129                 u32 ls_ucode_version;
 130                 u32 ls_ucode_id;
 131                 u32 ucode_ls_encrypted;
 132                 u32 ls_eng_algo_type;
 133                 u32 ls_eng_algo_ver;
 134                 u8 ls_enc_iv[16];
 135                 u8 rsvd[36];
 136         } signature;
 137         u32 ucode_off;
 138         u32 ucode_size;
 139         u32 data_size;
 140         u32 bl_code_size;
 141         u32 bl_imem_off;
 142         u32 bl_data_off;
 143         u32 bl_data_size;
 144         u32 rsvd0;
 145         u32 app_code_off;
 146         u32 app_code_size;
 147         u32 app_data_off;
 148         u32 app_data_size;
 149         u32 app_imem_offset;
 150         u32 app_dmem_offset;
 151         u32 flags;
 152         u32 monitor_code_offset;
 153         u32 monitor_data_offset;
 154         u32 manifest_offset;
 155         struct hs_fmc_params {
 156                 u8 hs_fmc;
 157                 u8 padding[3];
 158                 u16 pkc_algo;
 159                 u16 pkc_algo_version;
 160                 u32 engid_mask;
 161                 u32 ucode_id;
 162                 u32 fuse_ver;
 163                 u8 pkc_signature[384 + 128];
 164                 u8 pkc_key[2048];
 165                 u8 rsvd[4];
 166         } hs_fmc_params;
 167         struct hs_ovl_sig_blob_params {
 168                 u8 hs_ovl_sig_blob_present;
 169                 u32 hs_ovl_sig_blob_offset;
 170                 u32 hs_ovl_sig_blob_size;
 171         } hs_ovl_sig_blob_params;
 172         u8 rsvd[20];
 173 };
 174
 175 void lsb_header_v2_dump(struct nvkm_subdev *, struct lsb_header_v2 *);
 176
 177 struct flcn_acr_desc {
 178         union {
 179                 u8 reserved_dmem[0x200];
 180                 u32 signatures[4];
 181         } ucode_reserved_space;
 182         u32 wpr_region_id;
 183         u32 wpr_offset;
 184         u32 mmu_mem_range;
 185         struct {
 186                 u32 no_regions;
 187                 struct {
 188                         u32 start_addr;
 189                         u32 end_addr;
 190                         u32 region_id;
 191                         u32 read_mask;
 192                         u32 write_mask;
 193                         u32 client_mask;
 194                 } region_props[2];
 195         } regions;
 196         u32 ucode_blob_size;
 197         u64 ucode_blob_base __aligned(8);
 198         struct {
 199                 u32 vpr_enabled;
 200                 u32 vpr_start;
 201                 u32 vpr_end;
 202                 u32 hdcp_policies;
 203         } vpr_desc;
 204 };
 205
 206 void flcn_acr_desc_dump(struct nvkm_subdev *, struct flcn_acr_desc *);
 207
 208 struct flcn_acr_desc_v1 {
 209         u8 reserved_dmem[0x200];
 210         u32 signatures[4];
 211         u32 wpr_region_id;
 212         u32 wpr_offset;
 213         u32 mmu_memory_range;
 214         struct {
 215                 u32 no_regions;
 216                 struct {
 217                         u32 start_addr;
 218                         u32 end_addr;
 219                         u32 region_id;
 220                         u32 read_mask;
 221                         u32 write_mask;
 222                         u32 client_mask;
 223                         u32 shadow_mem_start_addr;
 224                 } region_props[2];
 225         } regions;
 226         u32 ucode_blob_size;
 227         u64 ucode_blob_base __aligned(8);
 228         struct {
 229                 u32 vpr_enabled;
 230                 u32 vpr_start;
 231                 u32 vpr_end;
 232                 u32 hdcp_policies;
 233         } vpr_desc;
 234 };
 235
 236 void flcn_acr_desc_v1_dump(struct nvkm_subdev *, struct flcn_acr_desc_v1 *);
 237 #endif