drivers/gpu/drm/nouveau/dispnv50/ovly827e.c

   1 /*
   2  * Copyright 2018 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22 #include "ovly.h"
  23 #include "atom.h"
  24
  25 #include <nouveau_bo.h>
  26
  27 #include <nvif/push507c.h>
  28 #include <nvif/timer.h>
  29
  30 #include <nvhw/class/cl827e.h>
  31
  32 static int
  33 ovly827e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
  34 {
  35         struct nvif_push *push = &wndw->wndw.push;
  36         int ret;
  37
  38         if ((ret = PUSH_WAIT(push, 12)))
  39                 return ret;
  40
  41         PUSH_MTHD(push, NV827E, SET_PRESENT_CONTROL,
  42                   NVDEF(NV827E, SET_PRESENT_CONTROL, BEGIN_MODE, ASAP) |
  43                   NVVAL(NV827E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
  44
  45         PUSH_MTHD(push, NV827E, SET_CONTEXT_DMA_ISO, asyw->image.handle[0]);
  46
  47         PUSH_MTHD(push, NV827E, SET_COMPOSITION_CONTROL,
  48                   NVDEF(NV827E, SET_COMPOSITION_CONTROL, MODE, OPAQUE_SUSPEND_BASE));
  49
  50         PUSH_MTHD(push, NV827E, SURFACE_SET_OFFSET, asyw->image.offset[0] >> 8);
  51
  52         PUSH_MTHD(push, NV827E, SURFACE_SET_SIZE,
  53                   NVVAL(NV827E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
  54                   NVVAL(NV827E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
  55
  56                                 SURFACE_SET_STORAGE,
  57                   NVVAL(NV827E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
  58                   NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) |
  59                   NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
  60                   NVVAL(NV827E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
  61
  62                                 SURFACE_SET_PARAMS,
  63                   NVVAL(NV827E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
  64                   NVVAL(NV827E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace));
  65         return 0;
  66 }
  67
  68 int
  69 ovly827e_ntfy_wait_begun(struct nouveau_bo *bo, u32 offset,
  70                          struct nvif_device *device)
  71 {
  72         s64 time = nvif_msec(device, 2000ULL,
  73                 if (NVBO_TD32(bo, offset, NV_DISP_NOTIFICATION_1, _3, STATUS, ==, BEGUN))
  74                         break;
  75                 usleep_range(1, 2);
  76         );
  77         return time < 0 ? time : 0;
  78 }
  79
  80 void
  81 ovly827e_ntfy_reset(struct nouveau_bo *bo, u32 offset)
  82 {
  83         NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, TIME_STAMP_0, 0);
  84         NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, TIME_STAMP_1, 0);
  85         NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, _2, 0);
  86         NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, _3,
  87                         NVDEF(NV_DISP_NOTIFICATION_1, _3, STATUS, NOT_BEGUN));
  88 }
  89
  90 static const struct nv50_wndw_func
  91 ovly827e = {
  92         .acquire = ovly507e_acquire,
  93         .release = ovly507e_release,
  94         .ntfy_set = base507c_ntfy_set,
  95         .ntfy_clr = base507c_ntfy_clr,
  96         .ntfy_reset = ovly827e_ntfy_reset,
  97         .ntfy_wait_begun = ovly827e_ntfy_wait_begun,
  98         .image_set = ovly827e_image_set,
  99         .image_clr = base507c_image_clr,
 100         .scale_set = ovly507e_scale_set,
 101         .update = base507c_update,
 102 };
 103
 104 const u32
 105 ovly827e_format[] = {
 106         DRM_FORMAT_YUYV,
 107         DRM_FORMAT_UYVY,
 108         DRM_FORMAT_XRGB8888,
 109         DRM_FORMAT_XRGB1555,
 110         DRM_FORMAT_XBGR2101010,
 111         0
 112 };
 113
 114 int
 115 ovly827e_new(struct nouveau_drm *drm, int head, s32 oclass,
 116              struct nv50_wndw **pwndw)
 117 {
 118         return ovly507e_new_(&ovly827e, ovly827e_format, drm, head, oclass,
 119                              0x00000004 << (head * 8), pwndw);
 120 }