1 // SPDX-License-Identifier: MIT
3 * Copyright © 2019 Intel Corporation
6 #include <linux/prime_numbers.h>
7 #include <linux/sort.h>
9 #include <drm/drm_buddy.h>
11 #include "../i915_selftest.h"
14 #include "mock_gem_device.h"
15 #include "mock_region.h"
17 #include "gem/i915_gem_context.h"
18 #include "gem/i915_gem_lmem.h"
19 #include "gem/i915_gem_region.h"
20 #include "gem/i915_gem_ttm.h"
21 #include "gem/selftests/igt_gem_utils.h"
22 #include "gem/selftests/mock_context.h"
23 #include "gt/intel_engine_pm.h"
24 #include "gt/intel_engine_user.h"
25 #include "gt/intel_gt.h"
26 #include "gt/intel_migrate.h"
27 #include "i915_memcpy.h"
28 #include "i915_ttm_buddy_manager.h"
29 #include "selftests/igt_flush_test.h"
30 #include "selftests/i915_random.h"
32 static void close_objects(struct intel_memory_region *mem,
33 struct list_head *objects)
35 struct drm_i915_private *i915 = mem->i915;
36 struct drm_i915_gem_object *obj, *on;
38 list_for_each_entry_safe(obj, on, objects, st_link) {
39 i915_gem_object_lock(obj, NULL);
40 if (i915_gem_object_has_pinned_pages(obj))
41 i915_gem_object_unpin_pages(obj);
42 /* No polluting the memory region between tests */
43 __i915_gem_object_put_pages(obj);
44 i915_gem_object_unlock(obj);
45 list_del(&obj->st_link);
46 i915_gem_object_put(obj);
51 i915_gem_drain_freed_objects(i915);
54 static int igt_mock_fill(void *arg)
56 struct intel_memory_region *mem = arg;
57 resource_size_t total = resource_size(&mem->region);
58 resource_size_t page_size;
60 unsigned long max_pages;
61 unsigned long page_num;
65 page_size = PAGE_SIZE;
66 max_pages = div64_u64(total, page_size);
69 for_each_prime_number_from(page_num, 1, max_pages) {
70 resource_size_t size = page_num * page_size;
71 struct drm_i915_gem_object *obj;
73 obj = i915_gem_object_create_region(mem, size, 0, 0);
79 err = i915_gem_object_pin_pages_unlocked(obj);
81 i915_gem_object_put(obj);
85 list_add(&obj->st_link, &objects);
92 if (page_num * page_size <= rem) {
93 pr_err("%s failed, space still left in region\n",
101 close_objects(mem, &objects);
106 static struct drm_i915_gem_object *
107 igt_object_create(struct intel_memory_region *mem,
108 struct list_head *objects,
112 struct drm_i915_gem_object *obj;
115 obj = i915_gem_object_create_region(mem, size, 0, flags);
119 err = i915_gem_object_pin_pages_unlocked(obj);
123 list_add(&obj->st_link, objects);
127 i915_gem_object_put(obj);
131 static void igt_object_release(struct drm_i915_gem_object *obj)
133 i915_gem_object_lock(obj, NULL);
134 i915_gem_object_unpin_pages(obj);
135 __i915_gem_object_put_pages(obj);
136 i915_gem_object_unlock(obj);
137 list_del(&obj->st_link);
138 i915_gem_object_put(obj);
141 static bool is_contiguous(struct drm_i915_gem_object *obj)
143 struct scatterlist *sg;
144 dma_addr_t addr = -1;
146 for (sg = obj->mm.pages->sgl; sg; sg = sg_next(sg)) {
147 if (addr != -1 && sg_dma_address(sg) != addr)
150 addr = sg_dma_address(sg) + sg_dma_len(sg);
156 static int igt_mock_reserve(void *arg)
158 struct intel_memory_region *mem = arg;
159 struct drm_i915_private *i915 = mem->i915;
160 resource_size_t avail = resource_size(&mem->region);
161 struct drm_i915_gem_object *obj;
162 const u32 chunk_size = SZ_32M;
163 u32 i, offset, count, *order;
164 u64 allocated, cur_avail;
165 I915_RND_STATE(prng);
169 count = avail / chunk_size;
170 order = i915_random_order(count, &prng);
174 mem = mock_region_create(i915, 0, SZ_2G, I915_GTT_PAGE_SIZE_4K, 0, 0);
176 pr_err("failed to create memory region\n");
181 /* Reserve a bunch of ranges within the region */
182 for (i = 0; i < count; ++i) {
183 u64 start = order[i] * chunk_size;
184 u64 size = i915_prandom_u32_max_state(chunk_size, &prng);
186 /* Allow for some really big holes */
190 size = round_up(size, PAGE_SIZE);
191 offset = igt_random_offset(&prng, 0, chunk_size, size,
194 err = intel_memory_region_reserve(mem, start + offset, size);
196 pr_err("%s failed to reserve range", __func__);
200 /* XXX: maybe sanity check the block range here? */
204 /* Try to see if we can allocate from the remaining space */
208 u32 size = i915_prandom_u32_max_state(cur_avail, &prng);
210 size = max_t(u32, round_up(size, PAGE_SIZE), PAGE_SIZE);
211 obj = igt_object_create(mem, &objects, size, 0);
213 if (PTR_ERR(obj) == -ENXIO)
223 if (allocated != avail) {
224 pr_err("%s mismatch between allocation and free space", __func__);
229 close_objects(mem, &objects);
230 intel_memory_region_destroy(mem);
236 static int igt_mock_contiguous(void *arg)
238 struct intel_memory_region *mem = arg;
239 struct drm_i915_gem_object *obj;
240 unsigned long n_objects;
243 I915_RND_STATE(prng);
244 resource_size_t total;
249 total = resource_size(&mem->region);
252 obj = igt_object_create(mem, &objects, PAGE_SIZE,
253 I915_BO_ALLOC_CONTIGUOUS);
257 if (!is_contiguous(obj)) {
258 pr_err("%s min object spans disjoint sg entries\n", __func__);
260 goto err_close_objects;
263 igt_object_release(obj);
266 obj = igt_object_create(mem, &objects, total, I915_BO_ALLOC_CONTIGUOUS);
270 if (!is_contiguous(obj)) {
271 pr_err("%s max object spans disjoint sg entries\n", __func__);
273 goto err_close_objects;
276 igt_object_release(obj);
278 /* Internal fragmentation should not bleed into the object size */
279 target = i915_prandom_u64_state(&prng);
280 div64_u64_rem(target, total, &target);
281 target = round_up(target, PAGE_SIZE);
282 target = max_t(u64, PAGE_SIZE, target);
284 obj = igt_object_create(mem, &objects, target,
285 I915_BO_ALLOC_CONTIGUOUS);
289 if (obj->base.size != target) {
290 pr_err("%s obj->base.size(%zx) != target(%llx)\n", __func__,
291 obj->base.size, target);
293 goto err_close_objects;
296 if (!is_contiguous(obj)) {
297 pr_err("%s object spans disjoint sg entries\n", __func__);
299 goto err_close_objects;
302 igt_object_release(obj);
305 * Try to fragment the address space, such that half of it is free, but
306 * the max contiguous block size is SZ_64K.
310 n_objects = div64_u64(total, target);
312 while (n_objects--) {
313 struct list_head *list;
320 obj = igt_object_create(mem, list, target,
321 I915_BO_ALLOC_CONTIGUOUS);
324 goto err_close_objects;
328 close_objects(mem, &holes);
333 /* Make sure we can still allocate all the fragmented space */
334 obj = igt_object_create(mem, &objects, target, 0);
337 goto err_close_objects;
340 igt_object_release(obj);
343 * Even though we have enough free space, we don't have a big enough
344 * contiguous block. Make sure that holds true.
348 bool should_fail = target > min;
350 obj = igt_object_create(mem, &objects, target,
351 I915_BO_ALLOC_CONTIGUOUS);
352 if (should_fail != IS_ERR(obj)) {
353 pr_err("%s target allocation(%llx) mismatch\n",
356 goto err_close_objects;
360 } while (target >= PAGE_SIZE);
363 list_splice_tail(&holes, &objects);
364 close_objects(mem, &objects);
368 static int igt_mock_splintered_region(void *arg)
370 struct intel_memory_region *mem = arg;
371 struct drm_i915_private *i915 = mem->i915;
372 struct i915_ttm_buddy_resource *res;
373 struct drm_i915_gem_object *obj;
374 struct drm_buddy *mm;
375 unsigned int expected_order;
381 * Sanity check we can still allocate everything even if the
382 * mm.max_order != mm.size. i.e our starting address space size is not a
386 size = (SZ_4G - 1) & PAGE_MASK;
387 mem = mock_region_create(i915, 0, size, PAGE_SIZE, 0, 0);
391 obj = igt_object_create(mem, &objects, size, 0);
397 res = to_ttm_buddy_resource(obj->mm.res);
399 if (mm->size != size) {
400 pr_err("%s size mismatch(%llu != %llu)\n",
401 __func__, mm->size, size);
406 expected_order = get_order(rounddown_pow_of_two(size));
407 if (mm->max_order != expected_order) {
408 pr_err("%s order mismatch(%u != %u)\n",
409 __func__, mm->max_order, expected_order);
414 close_objects(mem, &objects);
417 * While we should be able allocate everything without any flag
418 * restrictions, if we consider I915_BO_ALLOC_CONTIGUOUS then we are
419 * actually limited to the largest power-of-two for the region size i.e
420 * max_order, due to the inner workings of the buddy allocator. So make
421 * sure that does indeed hold true.
424 obj = igt_object_create(mem, &objects, size, I915_BO_ALLOC_CONTIGUOUS);
426 pr_err("%s too large contiguous allocation was not rejected\n",
432 obj = igt_object_create(mem, &objects, rounddown_pow_of_two(size),
433 I915_BO_ALLOC_CONTIGUOUS);
435 pr_err("%s largest possible contiguous allocation failed\n",
442 close_objects(mem, &objects);
444 intel_memory_region_destroy(mem);
449 #define SZ_8G BIT_ULL(33)
452 static int igt_mock_max_segment(void *arg)
454 struct intel_memory_region *mem = arg;
455 struct drm_i915_private *i915 = mem->i915;
456 struct i915_ttm_buddy_resource *res;
457 struct drm_i915_gem_object *obj;
458 struct drm_buddy_block *block;
459 struct drm_buddy *mm;
460 struct list_head *blocks;
461 struct scatterlist *sg;
462 I915_RND_STATE(prng);
464 unsigned int max_segment;
470 * While we may create very large contiguous blocks, we may need
471 * to break those down for consumption elsewhere. In particular,
472 * dma-mapping with scatterlist elements have an implicit limit of
473 * UINT_MAX on each element.
478 if (i915_prandom_u64_state(&prng) & 1)
479 ps = SZ_64K; /* For something like DG2 */
481 max_segment = round_down(UINT_MAX, ps);
483 mem = mock_region_create(i915, 0, size, ps, 0, 0);
487 obj = igt_object_create(mem, &objects, size, 0);
493 res = to_ttm_buddy_resource(obj->mm.res);
494 blocks = &res->blocks;
497 list_for_each_entry(block, blocks, link) {
498 if (drm_buddy_block_size(mm, block) > size)
499 size = drm_buddy_block_size(mm, block);
501 if (size < max_segment) {
502 pr_err("%s: Failed to create a huge contiguous block [> %u], largest block %lld\n",
503 __func__, max_segment, size);
508 for (sg = obj->mm.pages->sgl; sg; sg = sg_next(sg)) {
509 dma_addr_t daddr = sg_dma_address(sg);
511 if (sg->length > max_segment) {
512 pr_err("%s: Created an oversized scatterlist entry, %u > %u\n",
513 __func__, sg->length, max_segment);
518 if (!IS_ALIGNED(daddr, ps)) {
519 pr_err("%s: Created an unaligned scatterlist entry, addr=%pa, ps=%u\n",
520 __func__, &daddr, ps);
527 close_objects(mem, &objects);
529 intel_memory_region_destroy(mem);
533 static u64 igt_object_mappable_total(struct drm_i915_gem_object *obj)
535 struct intel_memory_region *mr = obj->mm.region;
536 struct i915_ttm_buddy_resource *bman_res =
537 to_ttm_buddy_resource(obj->mm.res);
538 struct drm_buddy *mm = bman_res->mm;
539 struct drm_buddy_block *block;
543 list_for_each_entry(block, &bman_res->blocks, link) {
544 u64 start = drm_buddy_block_offset(block);
545 u64 end = start + drm_buddy_block_size(mm, block);
547 if (start < resource_size(&mr->io))
548 total += min_t(u64, end, resource_size(&mr->io)) - start;
554 static int igt_mock_io_size(void *arg)
556 struct intel_memory_region *mr = arg;
557 struct drm_i915_private *i915 = mr->i915;
558 struct drm_i915_gem_object *obj;
559 u64 mappable_theft_total;
565 I915_RND_STATE(prng);
570 if (i915_prandom_u64_state(&prng) & 1)
571 ps = SZ_64K; /* For something like DG2 */
573 div64_u64_rem(i915_prandom_u64_state(&prng), SZ_8G, &total);
574 total = round_down(total, ps);
575 total = max_t(u64, total, SZ_1G);
577 div64_u64_rem(i915_prandom_u64_state(&prng), total - ps, &io_size);
578 io_size = round_down(io_size, ps);
579 io_size = max_t(u64, io_size, SZ_256M); /* 256M seems to be the common lower limit */
581 pr_info("%s with ps=%llx, io_size=%llx, total=%llx\n",
582 __func__, ps, io_size, total);
584 mr = mock_region_create(i915, 0, total, ps, 0, io_size);
590 mappable_theft_total = 0;
591 rem = total - io_size;
593 div64_u64_rem(i915_prandom_u64_state(&prng), rem, &size);
594 size = round_down(size, ps);
595 size = max(size, ps);
597 obj = igt_object_create(mr, &objects, size,
598 I915_BO_ALLOC_GPU_ONLY);
600 pr_err("%s TOPDOWN failed with rem=%llx, size=%llx\n",
601 __func__, rem, size);
606 mappable_theft_total += igt_object_mappable_total(obj);
610 pr_info("%s mappable theft=(%lluMiB/%lluMiB), total=%lluMiB\n",
612 (u64)mappable_theft_total >> 20,
617 * Even if we allocate all of the non-mappable portion, we should still
618 * be able to dip into the mappable portion.
620 obj = igt_object_create(mr, &objects, io_size,
621 I915_BO_ALLOC_GPU_ONLY);
623 pr_err("%s allocation unexpectedly failed\n", __func__);
628 close_objects(mr, &objects);
632 div64_u64_rem(i915_prandom_u64_state(&prng), rem, &size);
633 size = round_down(size, ps);
634 size = max(size, ps);
636 obj = igt_object_create(mr, &objects, size, 0);
638 pr_err("%s MAPPABLE failed with rem=%llx, size=%llx\n",
639 __func__, rem, size);
644 if (igt_object_mappable_total(obj) != size) {
645 pr_err("%s allocation is not mappable(size=%llx)\n",
654 * We assume CPU access is required by default, which should result in a
655 * failure here, even though the non-mappable portion is free.
657 obj = igt_object_create(mr, &objects, ps, 0);
659 pr_err("%s allocation unexpectedly succeeded\n", __func__);
665 close_objects(mr, &objects);
666 intel_memory_region_destroy(mr);
674 static int igt_gpu_write_dw(struct intel_context *ce,
675 struct i915_vma *vma,
679 return igt_gpu_fill_dw(ce, vma, dword * sizeof(u32),
680 vma->size >> PAGE_SHIFT, value);
683 static int igt_cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
685 unsigned long n = obj->base.size >> PAGE_SHIFT;
689 err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
693 ptr = i915_gem_object_pin_map(obj, I915_MAP_WC);
700 pr_err("base[%u]=%08x, val=%08x\n",
706 ptr += PAGE_SIZE / sizeof(*ptr);
709 i915_gem_object_unpin_map(obj);
713 static int igt_gpu_write(struct i915_gem_context *ctx,
714 struct drm_i915_gem_object *obj)
716 struct i915_gem_engines *engines;
717 struct i915_gem_engines_iter it;
718 struct i915_address_space *vm;
719 struct intel_context *ce;
720 I915_RND_STATE(prng);
721 IGT_TIMEOUT(end_time);
723 struct i915_vma *vma;
728 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
732 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
734 if (!intel_engine_can_store_dword(ce->engine))
740 i915_gem_context_unlock_engines(ctx);
744 order = i915_random_order(count * count, &prng);
748 vma = i915_vma_instance(obj, vm, NULL);
754 err = i915_vma_pin(vma, 0, 0, PIN_USER);
759 engines = i915_gem_context_lock_engines(ctx);
761 u32 rng = prandom_u32_state(&prng);
762 u32 dword = offset_in_page(rng) / 4;
764 ce = engines->engines[order[i] % engines->num_engines];
765 i = (i + 1) % (count * count);
766 if (!ce || !intel_engine_can_store_dword(ce->engine))
769 err = igt_gpu_write_dw(ce, vma, dword, rng);
773 i915_gem_object_lock(obj, NULL);
774 err = igt_cpu_check(obj, dword, rng);
775 i915_gem_object_unlock(obj);
778 } while (!__igt_timeout(end_time, NULL));
779 i915_gem_context_unlock_engines(ctx);
790 static int igt_lmem_create(void *arg)
792 struct drm_i915_private *i915 = arg;
793 struct drm_i915_gem_object *obj;
796 obj = i915_gem_object_create_lmem(i915, PAGE_SIZE, 0);
800 err = i915_gem_object_pin_pages_unlocked(obj);
804 i915_gem_object_unpin_pages(obj);
806 i915_gem_object_put(obj);
811 static int igt_lmem_create_with_ps(void *arg)
813 struct drm_i915_private *i915 = arg;
817 for (ps = PAGE_SIZE; ps <= SZ_1G; ps <<= 1) {
818 struct drm_i915_gem_object *obj;
821 obj = __i915_gem_object_create_lmem_with_ps(i915, ps, ps, 0);
824 if (err == -ENXIO || err == -E2BIG) {
825 pr_info("%s not enough lmem for ps(%u) err=%d\n",
833 if (obj->base.size != ps) {
834 pr_err("%s size(%zu) != ps(%u)\n",
835 __func__, obj->base.size, ps);
840 i915_gem_object_lock(obj, NULL);
841 err = i915_gem_object_pin_pages(obj);
843 if (err == -ENXIO || err == -E2BIG || err == -ENOMEM) {
844 pr_info("%s not enough lmem for ps(%u) err=%d\n",
851 daddr = i915_gem_object_get_dma_address(obj, 0);
852 if (!IS_ALIGNED(daddr, ps)) {
853 pr_err("%s daddr(%pa) not aligned with ps(%u)\n",
854 __func__, &daddr, ps);
860 i915_gem_object_unpin_pages(obj);
861 __i915_gem_object_put_pages(obj);
863 i915_gem_object_unlock(obj);
864 i915_gem_object_put(obj);
873 static int igt_lmem_create_cleared_cpu(void *arg)
875 struct drm_i915_private *i915 = arg;
876 I915_RND_STATE(prng);
877 IGT_TIMEOUT(end_time);
881 i915_gem_drain_freed_objects(i915);
883 size = max_t(u32, PAGE_SIZE, i915_prandom_u32_max_state(SZ_32M, &prng));
884 size = round_up(size, PAGE_SIZE);
888 struct drm_i915_gem_object *obj;
894 * Alternate between cleared and uncleared allocations, while
895 * also dirtying the pages each time to check that the pages are
896 * always cleared if requested, since we should get some overlap
897 * of the underlying pages, if not all, since we are the only
901 flags = I915_BO_ALLOC_CPU_CLEAR;
905 obj = i915_gem_object_create_lmem(i915, size, flags);
909 i915_gem_object_lock(obj, NULL);
910 err = i915_gem_object_pin_pages(obj);
914 dword = i915_prandom_u32_max_state(PAGE_SIZE / sizeof(u32),
917 if (flags & I915_BO_ALLOC_CPU_CLEAR) {
918 err = igt_cpu_check(obj, dword, 0);
920 pr_err("%s failed with size=%u, flags=%u\n",
921 __func__, size, flags);
926 vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
928 err = PTR_ERR(vaddr);
932 val = prandom_u32_state(&prng);
934 memset32(vaddr, val, obj->base.size / sizeof(u32));
936 i915_gem_object_flush_map(obj);
937 i915_gem_object_unpin_map(obj);
939 i915_gem_object_unpin_pages(obj);
940 __i915_gem_object_put_pages(obj);
942 i915_gem_object_unlock(obj);
943 i915_gem_object_put(obj);
948 } while (!__igt_timeout(end_time, NULL));
950 pr_info("%s completed (%u) iterations\n", __func__, i);
955 static int igt_lmem_write_gpu(void *arg)
957 struct drm_i915_private *i915 = arg;
958 struct drm_i915_gem_object *obj;
959 struct i915_gem_context *ctx;
961 I915_RND_STATE(prng);
965 file = mock_file(i915);
967 return PTR_ERR(file);
969 ctx = live_context(i915, file);
975 sz = round_up(prandom_u32_state(&prng) % SZ_32M, PAGE_SIZE);
977 obj = i915_gem_object_create_lmem(i915, sz, 0);
983 err = i915_gem_object_pin_pages_unlocked(obj);
987 err = igt_gpu_write(ctx, obj);
989 pr_err("igt_gpu_write failed(%d)\n", err);
991 i915_gem_object_unpin_pages(obj);
993 i915_gem_object_put(obj);
999 static struct intel_engine_cs *
1000 random_engine_class(struct drm_i915_private *i915,
1002 struct rnd_state *prng)
1004 struct intel_engine_cs *engine;
1008 for (engine = intel_engine_lookup_user(i915, class, 0);
1009 engine && engine->uabi_class == class;
1010 engine = rb_entry_safe(rb_next(&engine->uabi_node),
1011 typeof(*engine), uabi_node))
1014 count = i915_prandom_u32_max_state(count, prng);
1015 return intel_engine_lookup_user(i915, class, count);
1018 static int igt_lmem_write_cpu(void *arg)
1020 struct drm_i915_private *i915 = arg;
1021 struct drm_i915_gem_object *obj;
1022 I915_RND_STATE(prng);
1023 IGT_TIMEOUT(end_time);
1025 0, /* rng placeholder */
1030 PAGE_SIZE - sizeof(u32),
1031 PAGE_SIZE - sizeof(u64),
1034 struct intel_engine_cs *engine;
1035 struct i915_request *rq;
1043 engine = random_engine_class(i915, I915_ENGINE_CLASS_COPY, &prng);
1047 pr_info("%s: using %s\n", __func__, engine->name);
1049 sz = round_up(prandom_u32_state(&prng) % SZ_32M, PAGE_SIZE);
1050 sz = max_t(u32, 2 * PAGE_SIZE, sz);
1052 obj = i915_gem_object_create_lmem(i915, sz, I915_BO_ALLOC_CONTIGUOUS);
1054 return PTR_ERR(obj);
1056 vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WC);
1057 if (IS_ERR(vaddr)) {
1058 err = PTR_ERR(vaddr);
1062 i915_gem_object_lock(obj, NULL);
1064 err = dma_resv_reserve_fences(obj->base.resv, 1);
1066 i915_gem_object_unlock(obj);
1070 /* Put the pages into a known state -- from the gpu for added fun */
1071 intel_engine_pm_get(engine);
1072 err = intel_context_migrate_clear(engine->gt->migrate.context, NULL,
1074 i915_gem_get_pat_index(i915,
1076 true, 0xdeadbeaf, &rq);
1078 dma_resv_add_fence(obj->base.resv, &rq->fence,
1079 DMA_RESV_USAGE_WRITE);
1080 i915_request_put(rq);
1083 intel_engine_pm_put(engine);
1085 err = i915_gem_object_set_to_wc_domain(obj, true);
1086 i915_gem_object_unlock(obj);
1090 count = ARRAY_SIZE(bytes);
1091 order = i915_random_order(count * count, &prng);
1097 /* A random multiple of u32, picked between [64, PAGE_SIZE - 64] */
1098 bytes[0] = igt_random_offset(&prng, 64, PAGE_SIZE - 64, 0, sizeof(u32));
1099 GEM_BUG_ON(!IS_ALIGNED(bytes[0], sizeof(u32)));
1109 size = bytes[order[i] % count];
1110 i = (i + 1) % (count * count);
1112 align = bytes[order[i] % count];
1113 i = (i + 1) % (count * count);
1115 align = max_t(u32, sizeof(u32), rounddown_pow_of_two(align));
1117 offset = igt_random_offset(&prng, 0, obj->base.size,
1120 val = prandom_u32_state(&prng);
1121 memset32(vaddr + offset / sizeof(u32), val ^ 0xdeadbeaf,
1122 size / sizeof(u32));
1125 * Sample random dw -- don't waste precious time reading every
1128 dword = igt_random_offset(&prng, offset,
1130 sizeof(u32), sizeof(u32));
1131 dword /= sizeof(u32);
1132 if (vaddr[dword] != (val ^ 0xdeadbeaf)) {
1133 pr_err("%s vaddr[%u]=%u, val=%u, size=%u, align=%u, offset=%u\n",
1134 __func__, dword, vaddr[dword], val ^ 0xdeadbeaf,
1135 size, align, offset);
1139 } while (!__igt_timeout(end_time, NULL));
1142 i915_gem_object_unpin_map(obj);
1144 i915_gem_object_put(obj);
1149 static const char *repr_type(u32 type)
1161 static struct drm_i915_gem_object *
1162 create_region_for_mapping(struct intel_memory_region *mr, u64 size, u32 type,
1165 struct drm_i915_gem_object *obj;
1168 obj = i915_gem_object_create_region(mr, size, 0, 0);
1170 if (PTR_ERR(obj) == -ENOSPC) /* Stolen memory */
1171 return ERR_PTR(-ENODEV);
1175 addr = i915_gem_object_pin_map_unlocked(obj, type);
1177 i915_gem_object_put(obj);
1178 if (PTR_ERR(addr) == -ENXIO)
1179 return ERR_PTR(-ENODEV);
1187 static int wrap_ktime_compare(const void *A, const void *B)
1189 const ktime_t *a = A, *b = B;
1191 return ktime_compare(*a, *b);
1194 static void igt_memcpy_long(void *dst, const void *src, size_t size)
1196 unsigned long *tmp = dst;
1197 const unsigned long *s = src;
1199 size = size / sizeof(unsigned long);
1204 static inline void igt_memcpy(void *dst, const void *src, size_t size)
1206 memcpy(dst, src, size);
1209 static inline void igt_memcpy_from_wc(void *dst, const void *src, size_t size)
1211 i915_memcpy_from_wc(dst, src, size);
1214 static int _perf_memcpy(struct intel_memory_region *src_mr,
1215 struct intel_memory_region *dst_mr,
1216 u64 size, u32 src_type, u32 dst_type)
1218 struct drm_i915_private *i915 = src_mr->i915;
1221 void (*copy)(void *dst, const void *src, size_t size);
1235 !i915_has_memcpy_from_wc(),
1238 struct drm_i915_gem_object *src, *dst;
1239 void *src_addr, *dst_addr;
1243 src = create_region_for_mapping(src_mr, size, src_type, &src_addr);
1249 dst = create_region_for_mapping(dst_mr, size, dst_type, &dst_addr);
1255 for (i = 0; i < ARRAY_SIZE(tests); ++i) {
1262 for (pass = 0; pass < ARRAY_SIZE(t); pass++) {
1267 tests[i].copy(dst_addr, src_addr, size);
1270 t[pass] = ktime_sub(t1, t0);
1273 sort(t, ARRAY_SIZE(t), sizeof(*t), wrap_ktime_compare, NULL);
1275 /* ignore the impossible to protect our sanity */
1276 pr_debug("Skipping %s src(%s, %s) -> dst(%s, %s) %14s %4lluKiB copy, unstable measurement [%lld, %lld]\n",
1278 src_mr->name, repr_type(src_type),
1279 dst_mr->name, repr_type(dst_type),
1280 tests[i].name, size >> 10,
1285 pr_info("%s src(%s, %s) -> dst(%s, %s) %14s %4llu KiB copy: %5lld MiB/s\n",
1287 src_mr->name, repr_type(src_type),
1288 dst_mr->name, repr_type(dst_type),
1289 tests[i].name, size >> 10,
1290 div64_u64(mul_u32_u32(4 * size,
1291 1000 * 1000 * 1000),
1292 t[1] + 2 * t[2] + t[3]) >> 20);
1297 i915_gem_object_unpin_map(dst);
1298 i915_gem_object_put(dst);
1300 i915_gem_object_unpin_map(src);
1301 i915_gem_object_put(src);
1303 i915_gem_drain_freed_objects(i915);
1311 static int perf_memcpy(void *arg)
1313 struct drm_i915_private *i915 = arg;
1314 static const u32 types[] = {
1318 static const u32 sizes[] = {
1323 struct intel_memory_region *src_mr, *dst_mr;
1328 for_each_memory_region(src_mr, i915, src_id) {
1329 for_each_memory_region(dst_mr, i915, dst_id) {
1330 for (i = 0; i < ARRAY_SIZE(sizes); ++i) {
1331 for (j = 0; j < ARRAY_SIZE(types); ++j) {
1332 for (k = 0; k < ARRAY_SIZE(types); ++k) {
1333 ret = _perf_memcpy(src_mr,
1349 int intel_memory_region_mock_selftests(void)
1351 static const struct i915_subtest tests[] = {
1352 SUBTEST(igt_mock_reserve),
1353 SUBTEST(igt_mock_fill),
1354 SUBTEST(igt_mock_contiguous),
1355 SUBTEST(igt_mock_splintered_region),
1356 SUBTEST(igt_mock_max_segment),
1357 SUBTEST(igt_mock_io_size),
1359 struct intel_memory_region *mem;
1360 struct drm_i915_private *i915;
1363 i915 = mock_gem_device();
1367 mem = mock_region_create(i915, 0, SZ_2G, I915_GTT_PAGE_SIZE_4K, 0, 0);
1369 pr_err("failed to create memory region\n");
1374 err = i915_subtests(tests, mem);
1376 intel_memory_region_destroy(mem);
1378 mock_destroy_device(i915);
1382 int intel_memory_region_live_selftests(struct drm_i915_private *i915)
1384 static const struct i915_subtest tests[] = {
1385 SUBTEST(igt_lmem_create),
1386 SUBTEST(igt_lmem_create_with_ps),
1387 SUBTEST(igt_lmem_create_cleared_cpu),
1388 SUBTEST(igt_lmem_write_cpu),
1389 SUBTEST(igt_lmem_write_gpu),
1392 if (!HAS_LMEM(i915)) {
1393 pr_info("device lacks LMEM support, skipping\n");
1397 if (intel_gt_is_wedged(to_gt(i915)))
1400 return i915_live_subtests(tests, i915);
1403 int intel_memory_region_perf_selftests(struct drm_i915_private *i915)
1405 static const struct i915_subtest tests[] = {
1406 SUBTEST(perf_memcpy),
1409 if (intel_gt_is_wedged(to_gt(i915)))
1412 return i915_live_subtests(tests, i915);