1 /* SPDX-License-Identifier: MIT */
3 * Copyright © 2020 Intel Corporation
6 #ifndef __GEN2_ENGINE_CS_H__
7 #define __GEN2_ENGINE_CS_H__
9 #include <linux/types.h>
12 struct intel_engine_cs;
14 int gen2_emit_flush(struct i915_request *rq, u32 mode);
15 int gen4_emit_flush_rcs(struct i915_request *rq, u32 mode);
16 int gen4_emit_flush_vcs(struct i915_request *rq, u32 mode);
18 u32 *gen2_emit_breadcrumb(struct i915_request *rq, u32 *cs);
19 u32 *gen5_emit_breadcrumb(struct i915_request *rq, u32 *cs);
21 int i830_emit_bb_start(struct i915_request *rq,
23 unsigned int dispatch_flags);
24 int gen2_emit_bb_start(struct i915_request *rq,
26 unsigned int dispatch_flags);
27 int gen4_emit_bb_start(struct i915_request *rq,
28 u64 offset, u32 length,
29 unsigned int dispatch_flags);
31 void gen2_irq_enable(struct intel_engine_cs *engine);
32 void gen2_irq_disable(struct intel_engine_cs *engine);
33 void gen5_irq_enable(struct intel_engine_cs *engine);
34 void gen5_irq_disable(struct intel_engine_cs *engine);
36 #endif /* __GEN2_ENGINE_CS_H__ */