drivers/gpu/drm/i915/display/intel_drrs.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright © 2021 Intel Corporation
   4  */
   5
   6 #include <linux/debugfs.h>
   7
   8 #include "i915_drv.h"
   9 #include "i915_reg.h"
  10 #include "intel_atomic.h"
  11 #include "intel_de.h"
  12 #include "intel_display_types.h"
  13 #include "intel_drrs.h"
  14 #include "intel_frontbuffer.h"
  15 #include "intel_panel.h"
  16
  17 /**
  18  * DOC: Display Refresh Rate Switching (DRRS)
  19  *
  20  * Display Refresh Rate Switching (DRRS) is a power conservation feature
  21  * which enables swtching between low and high refresh rates,
  22  * dynamically, based on the usage scenario. This feature is applicable
  23  * for internal panels.
  24  *
  25  * Indication that the panel supports DRRS is given by the panel EDID, which
  26  * would list multiple refresh rates for one resolution.
  27  *
  28  * DRRS is of 2 types - static and seamless.
  29  * Static DRRS involves changing refresh rate (RR) by doing a full modeset
  30  * (may appear as a blink on screen) and is used in dock-undock scenario.
  31  * Seamless DRRS involves changing RR without any visual effect to the user
  32  * and can be used during normal system usage. This is done by programming
  33  * certain registers.
  34  *
  35  * Support for static/seamless DRRS may be indicated in the VBT based on
  36  * inputs from the panel spec.
  37  *
  38  * DRRS saves power by switching to low RR based on usage scenarios.
  39  *
  40  * The implementation is based on frontbuffer tracking implementation.  When
  41  * there is a disturbance on the screen triggered by user activity or a periodic
  42  * system activity, DRRS is disabled (RR is changed to high RR).  When there is
  43  * no movement on screen, after a timeout of 1 second, a switch to low RR is
  44  * made.
  45  *
  46  * For integration with frontbuffer tracking code, intel_drrs_invalidate()
  47  * and intel_drrs_flush() are called.
  48  *
  49  * DRRS can be further extended to support other internal panels and also
  50  * the scenario of video playback wherein RR is set based on the rate
  51  * requested by userspace.
  52  */
  53
  54 const char *intel_drrs_type_str(enum drrs_type drrs_type)
  55 {
  56         static const char * const str[] = {
  57                 [DRRS_TYPE_NONE] = "none",
  58                 [DRRS_TYPE_STATIC] = "static",
  59                 [DRRS_TYPE_SEAMLESS] = "seamless",
  60         };
  61
  62         if (drrs_type >= ARRAY_SIZE(str))
  63                 return "<invalid>";
  64
  65         return str[drrs_type];
  66 }
  67
  68 bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
  69                                    enum transcoder cpu_transcoder)
  70 {
  71         struct intel_display *display = &i915->display;
  72
  73         if (HAS_DOUBLE_BUFFERED_M_N(display))
  74                 return true;
  75
  76         return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
  77 }
  78
  79 static void
  80 intel_drrs_set_refresh_rate_pipeconf(struct intel_crtc *crtc,
  81                                      enum drrs_refresh_rate refresh_rate)
  82 {
  83         struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
  84         enum transcoder cpu_transcoder = crtc->drrs.cpu_transcoder;
  85         u32 bit;
  86
  87         if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
  88                 bit = TRANSCONF_REFRESH_RATE_ALT_VLV;
  89         else
  90                 bit = TRANSCONF_REFRESH_RATE_ALT_ILK;
  91
  92         intel_de_rmw(dev_priv, TRANSCONF(dev_priv, cpu_transcoder),
  93                      bit, refresh_rate == DRRS_REFRESH_RATE_LOW ? bit : 0);
  94 }
  95
  96 static void
  97 intel_drrs_set_refresh_rate_m_n(struct intel_crtc *crtc,
  98                                 enum drrs_refresh_rate refresh_rate)
  99 {
 100         intel_cpu_transcoder_set_m1_n1(crtc, crtc->drrs.cpu_transcoder,
 101                                        refresh_rate == DRRS_REFRESH_RATE_LOW ?
 102                                        &crtc->drrs.m2_n2 : &crtc->drrs.m_n);
 103 }
 104
 105 bool intel_drrs_is_active(struct intel_crtc *crtc)
 106 {
 107         return crtc->drrs.cpu_transcoder != INVALID_TRANSCODER;
 108 }
 109
 110 static void intel_drrs_set_state(struct intel_crtc *crtc,
 111                                  enum drrs_refresh_rate refresh_rate)
 112 {
 113         struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 114
 115         if (refresh_rate == crtc->drrs.refresh_rate)
 116                 return;
 117
 118         if (intel_cpu_transcoder_has_m2_n2(dev_priv, crtc->drrs.cpu_transcoder))
 119                 intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate);
 120         else
 121                 intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
 122
 123         crtc->drrs.refresh_rate = refresh_rate;
 124 }
 125
 126 static void intel_drrs_schedule_work(struct intel_crtc *crtc)
 127 {
 128         struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 129
 130         mod_delayed_work(i915->unordered_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
 131 }
 132
 133 static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
 134 {
 135         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 136         struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 137         unsigned int frontbuffer_bits;
 138
 139         frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
 140
 141         for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc,
 142                                          crtc_state->joiner_pipes)
 143                 frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
 144
 145         return frontbuffer_bits;
 146 }
 147
 148 /**
 149  * intel_drrs_activate - activate DRRS
 150  * @crtc_state: the crtc state
 151  *
 152  * Activates DRRS on the crtc.
 153  */
 154 void intel_drrs_activate(const struct intel_crtc_state *crtc_state)
 155 {
 156         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 157
 158         if (!crtc_state->has_drrs)
 159                 return;
 160
 161         if (!crtc_state->hw.active)
 162                 return;
 163
 164         if (intel_crtc_is_joiner_secondary(crtc_state))
 165                 return;
 166
 167         mutex_lock(&crtc->drrs.mutex);
 168
 169         crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder;
 170         crtc->drrs.m_n = crtc_state->dp_m_n;
 171         crtc->drrs.m2_n2 = crtc_state->dp_m2_n2;
 172         crtc->drrs.frontbuffer_bits = intel_drrs_frontbuffer_bits(crtc_state);
 173         crtc->drrs.busy_frontbuffer_bits = 0;
 174
 175         intel_drrs_schedule_work(crtc);
 176
 177         mutex_unlock(&crtc->drrs.mutex);
 178 }
 179
 180 /**
 181  * intel_drrs_deactivate - deactivate DRRS
 182  * @old_crtc_state: the old crtc state
 183  *
 184  * Deactivates DRRS on the crtc.
 185  */
 186 void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state)
 187 {
 188         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
 189
 190         if (!old_crtc_state->has_drrs)
 191                 return;
 192
 193         if (!old_crtc_state->hw.active)
 194                 return;
 195
 196         if (intel_crtc_is_joiner_secondary(old_crtc_state))
 197                 return;
 198
 199         mutex_lock(&crtc->drrs.mutex);
 200
 201         if (intel_drrs_is_active(crtc))
 202                 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
 203
 204         crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;
 205         crtc->drrs.frontbuffer_bits = 0;
 206         crtc->drrs.busy_frontbuffer_bits = 0;
 207
 208         mutex_unlock(&crtc->drrs.mutex);
 209
 210         cancel_delayed_work_sync(&crtc->drrs.work);
 211 }
 212
 213 static void intel_drrs_downclock_work(struct work_struct *work)
 214 {
 215         struct intel_crtc *crtc = container_of(work, typeof(*crtc), drrs.work.work);
 216
 217         mutex_lock(&crtc->drrs.mutex);
 218
 219         if (intel_drrs_is_active(crtc) && !crtc->drrs.busy_frontbuffer_bits)
 220                 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_LOW);
 221
 222         mutex_unlock(&crtc->drrs.mutex);
 223 }
 224
 225 static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv,
 226                                           unsigned int all_frontbuffer_bits,
 227                                           bool invalidate)
 228 {
 229         struct intel_crtc *crtc;
 230
 231         for_each_intel_crtc(&dev_priv->drm, crtc) {
 232                 unsigned int frontbuffer_bits;
 233
 234                 mutex_lock(&crtc->drrs.mutex);
 235
 236                 frontbuffer_bits = all_frontbuffer_bits & crtc->drrs.frontbuffer_bits;
 237                 if (!frontbuffer_bits) {
 238                         mutex_unlock(&crtc->drrs.mutex);
 239                         continue;
 240                 }
 241
 242                 if (invalidate)
 243                         crtc->drrs.busy_frontbuffer_bits |= frontbuffer_bits;
 244                 else
 245                         crtc->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;
 246
 247                 /* flush/invalidate means busy screen hence upclock */
 248                 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
 249
 250                 /*
 251                  * flush also means no more activity hence schedule downclock, if all
 252                  * other fbs are quiescent too
 253                  */
 254                 if (!crtc->drrs.busy_frontbuffer_bits)
 255                         intel_drrs_schedule_work(crtc);
 256                 else
 257                         cancel_delayed_work(&crtc->drrs.work);
 258
 259                 mutex_unlock(&crtc->drrs.mutex);
 260         }
 261 }
 262
 263 /**
 264  * intel_drrs_invalidate - Disable Idleness DRRS
 265  * @dev_priv: i915 device
 266  * @frontbuffer_bits: frontbuffer plane tracking bits
 267  *
 268  * This function gets called everytime rendering on the given planes start.
 269  * Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR).
 270  *
 271  * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
 272  */
 273 void intel_drrs_invalidate(struct drm_i915_private *dev_priv,
 274                            unsigned int frontbuffer_bits)
 275 {
 276         intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, true);
 277 }
 278
 279 /**
 280  * intel_drrs_flush - Restart Idleness DRRS
 281  * @dev_priv: i915 device
 282  * @frontbuffer_bits: frontbuffer plane tracking bits
 283  *
 284  * This function gets called every time rendering on the given planes has
 285  * completed or flip on a crtc is completed. So DRRS should be upclocked
 286  * (LOW_RR -> HIGH_RR). And also Idleness detection should be started again,
 287  * if no other planes are dirty.
 288  *
 289  * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
 290  */
 291 void intel_drrs_flush(struct drm_i915_private *dev_priv,
 292                       unsigned int frontbuffer_bits)
 293 {
 294         intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, false);
 295 }
 296
 297 /**
 298  * intel_drrs_crtc_init - Init DRRS for CRTC
 299  * @crtc: crtc
 300  *
 301  * This function is called only once at driver load to initialize basic
 302  * DRRS stuff.
 303  *
 304  */
 305 void intel_drrs_crtc_init(struct intel_crtc *crtc)
 306 {
 307         INIT_DELAYED_WORK(&crtc->drrs.work, intel_drrs_downclock_work);
 308         mutex_init(&crtc->drrs.mutex);
 309         crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;
 310 }
 311
 312 static int intel_drrs_debugfs_status_show(struct seq_file *m, void *unused)
 313 {
 314         struct intel_crtc *crtc = m->private;
 315         struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 316         const struct intel_crtc_state *crtc_state;
 317         int ret;
 318
 319         ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
 320         if (ret)
 321                 return ret;
 322
 323         crtc_state = to_intel_crtc_state(crtc->base.state);
 324
 325         mutex_lock(&crtc->drrs.mutex);
 326
 327         seq_printf(m, "DRRS capable: %s\n",
 328                    str_yes_no(intel_cpu_transcoder_has_drrs(i915,
 329                                                             crtc_state->cpu_transcoder)));
 330
 331         seq_printf(m, "DRRS enabled: %s\n",
 332                    str_yes_no(crtc_state->has_drrs));
 333
 334         seq_printf(m, "DRRS active: %s\n",
 335                    str_yes_no(intel_drrs_is_active(crtc)));
 336
 337         seq_printf(m, "DRRS refresh rate: %s\n",
 338                    crtc->drrs.refresh_rate == DRRS_REFRESH_RATE_LOW ?
 339                    "low" : "high");
 340
 341         seq_printf(m, "DRRS busy frontbuffer bits: 0x%x\n",
 342                    crtc->drrs.busy_frontbuffer_bits);
 343
 344         mutex_unlock(&crtc->drrs.mutex);
 345
 346         drm_modeset_unlock(&crtc->base.mutex);
 347
 348         return 0;
 349 }
 350
 351 DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_status);
 352
 353 static int intel_drrs_debugfs_ctl_set(void *data, u64 val)
 354 {
 355         struct intel_crtc *crtc = data;
 356         struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 357         struct intel_crtc_state *crtc_state;
 358         struct drm_crtc_commit *commit;
 359         int ret;
 360
 361         ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
 362         if (ret)
 363                 return ret;
 364
 365         crtc_state = to_intel_crtc_state(crtc->base.state);
 366
 367         if (!crtc_state->hw.active ||
 368             !crtc_state->has_drrs)
 369                 goto out;
 370
 371         commit = crtc_state->uapi.commit;
 372         if (commit) {
 373                 ret = wait_for_completion_interruptible(&commit->hw_done);
 374                 if (ret)
 375                         goto out;
 376         }
 377
 378         drm_dbg(&i915->drm,
 379                 "Manually %sactivating DRRS\n", val ? "" : "de");
 380
 381         if (val)
 382                 intel_drrs_activate(crtc_state);
 383         else
 384                 intel_drrs_deactivate(crtc_state);
 385
 386 out:
 387         drm_modeset_unlock(&crtc->base.mutex);
 388
 389         return ret;
 390 }
 391
 392 DEFINE_DEBUGFS_ATTRIBUTE(intel_drrs_debugfs_ctl_fops,
 393                          NULL, intel_drrs_debugfs_ctl_set, "%llu\n");
 394
 395 void intel_drrs_crtc_debugfs_add(struct intel_crtc *crtc)
 396 {
 397         debugfs_create_file("i915_drrs_status", 0444, crtc->base.debugfs_entry,
 398                             crtc, &intel_drrs_debugfs_status_fops);
 399
 400         debugfs_create_file_unsafe("i915_drrs_ctl", 0644, crtc->base.debugfs_entry,
 401                                    crtc, &intel_drrs_debugfs_ctl_fops);
 402 }
 403
 404 static int intel_drrs_debugfs_type_show(struct seq_file *m, void *unused)
 405 {
 406         struct intel_connector *connector = m->private;
 407
 408         seq_printf(m, "DRRS type: %s\n",
 409                    intel_drrs_type_str(intel_panel_drrs_type(connector)));
 410
 411         return 0;
 412 }
 413
 414 DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_type);
 415
 416 void intel_drrs_connector_debugfs_add(struct intel_connector *connector)
 417 {
 418         if (intel_panel_drrs_type(connector) == DRRS_TYPE_NONE)
 419                 return;
 420
 421         debugfs_create_file("i915_drrs_type", 0444, connector->base.debugfs_entry,
 422                             connector, &intel_drrs_debugfs_type_fops);
 423 }