drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c

   1 /*
   2  * Copyright 2023 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include "amdgpu_dm_replay.h"
  27 #include "dc_dmub_srv.h"
  28 #include "dc.h"
  29 #include "dm_helpers.h"
  30 #include "amdgpu_dm.h"
  31 #include "modules/power/power_helpers.h"
  32 #include "dmub/inc/dmub_cmd.h"
  33 #include "dc/inc/link.h"
  34
  35 /*
  36  * amdgpu_dm_link_supports_replay() - check if the link supports replay
  37  * @link: link
  38  * @aconnector: aconnector
  39  *
  40  */
  41 bool amdgpu_dm_link_supports_replay(struct dc_link *link, struct amdgpu_dm_connector *aconnector)
  42 {
  43         struct dm_connector_state *state = to_dm_connector_state(aconnector->base.state);
  44         struct dpcd_caps *dpcd_caps = &link->dpcd_caps;
  45         struct adaptive_sync_caps *as_caps = &link->dpcd_caps.adaptive_sync_caps;
  46
  47         if (!state->freesync_capable)
  48                 return false;
  49
  50         if (!aconnector->vsdb_info.replay_mode)
  51                 return false;
  52
  53         // Check the eDP version
  54         if (dpcd_caps->edp_rev < EDP_REVISION_13)
  55                 return false;
  56
  57         if (!dpcd_caps->alpm_caps.bits.AUX_WAKE_ALPM_CAP)
  58                 return false;
  59
  60         // Check adaptive sync support cap
  61         if (!as_caps->dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT)
  62                 return false;
  63
  64         // Sink shall populate line deviation information
  65         if (dpcd_caps->pr_info.pixel_deviation_per_line == 0 ||
  66                 dpcd_caps->pr_info.max_deviation_line == 0)
  67                 return false;
  68
  69         return true;
  70 }
  71
  72 /*
  73  * amdgpu_dm_set_replay_caps() - setup Replay capabilities
  74  * @link: link
  75  * @aconnector: aconnector
  76  *
  77  */
  78 bool amdgpu_dm_set_replay_caps(struct dc_link *link, struct amdgpu_dm_connector *aconnector)
  79 {
  80         struct replay_config pr_config = { 0 };
  81         union replay_debug_flags *debug_flags = NULL;
  82         struct dc *dc = link->ctx->dc;
  83
  84         // If Replay is already set to support, return true to skip checks
  85         if (link->replay_settings.config.replay_supported)
  86                 return true;
  87
  88         if (!dc_is_embedded_signal(link->connector_signal))
  89                 return false;
  90
  91         if (link->panel_config.psr.disallow_replay)
  92                 return false;
  93
  94         if (!amdgpu_dm_link_supports_replay(link, aconnector))
  95                 return false;
  96
  97         if (!dc->ctx->dmub_srv || !dc->ctx->dmub_srv->dmub ||
  98                 !dc->ctx->dmub_srv->dmub->feature_caps.replay_supported)
  99                 return false;
 100
 101         // Mark Replay is supported in pr_config
 102         pr_config.replay_supported = true;
 103
 104         debug_flags = (union replay_debug_flags *)&pr_config.debug_flags;
 105         debug_flags->u32All = 0;
 106         debug_flags->bitfields.visual_confirm =
 107                 link->ctx->dc->debug.visual_confirm == VISUAL_CONFIRM_REPLAY;
 108
 109         init_replay_config(link, &pr_config);
 110
 111         return true;
 112 }
 113
 114 /*
 115  * amdgpu_dm_link_setup_replay() - configure replay link
 116  * @link: link
 117  * @aconnector: aconnector
 118  *
 119  */
 120 bool amdgpu_dm_link_setup_replay(struct dc_link *link, struct amdgpu_dm_connector *aconnector)
 121 {
 122         struct replay_config *pr_config;
 123
 124         if (link == NULL || aconnector == NULL)
 125                 return false;
 126
 127         pr_config = &link->replay_settings.config;
 128
 129         if (!pr_config->replay_supported)
 130                 return false;
 131
 132         pr_config->replay_power_opt_supported = 0x11;
 133         pr_config->replay_smu_opt_supported = false;
 134         pr_config->replay_enable_option |= pr_enable_option_static_screen;
 135         pr_config->replay_support_fast_resync_in_ultra_sleep_mode = aconnector->max_vfreq >= 2 * aconnector->min_vfreq;
 136         pr_config->replay_timing_sync_supported = false;
 137
 138         if (!pr_config->replay_timing_sync_supported)
 139                 pr_config->replay_enable_option &= ~pr_enable_option_general_ui;
 140
 141         link->replay_settings.replay_feature_enabled = true;
 142
 143         return true;
 144 }
 145
 146 /*
 147  * amdgpu_dm_replay_enable() - enable replay f/w
 148  * @stream: stream state
 149  *
 150  * Return: true if success
 151  */
 152 bool amdgpu_dm_replay_enable(struct dc_stream_state *stream, bool wait)
 153 {
 154         bool replay_active = true;
 155         struct dc_link *link = NULL;
 156
 157         if (stream == NULL)
 158                 return false;
 159
 160         link = stream->link;
 161
 162         if (link) {
 163                 link->dc->link_srv->edp_setup_replay(link, stream);
 164                 link->dc->link_srv->edp_set_coasting_vtotal(link, stream->timing.v_total);
 165                 DRM_DEBUG_DRIVER("Enabling replay...\n");
 166                 link->dc->link_srv->edp_set_replay_allow_active(link, &replay_active, wait, false, NULL);
 167                 return true;
 168         }
 169
 170         return false;
 171 }
 172
 173 /*
 174  * amdgpu_dm_replay_disable() - disable replay f/w
 175  * @stream:  stream state
 176  *
 177  * Return: true if success
 178  */
 179 bool amdgpu_dm_replay_disable(struct dc_stream_state *stream)
 180 {
 181         bool replay_active = false;
 182         struct dc_link *link = NULL;
 183
 184         if (stream == NULL)
 185                 return false;
 186
 187         link = stream->link;
 188
 189         if (link) {
 190                 DRM_DEBUG_DRIVER("Disabling replay...\n");
 191                 link->dc->link_srv->edp_set_replay_allow_active(stream->link, &replay_active, true, false, NULL);
 192                 return true;
 193         }
 194
 195         return false;
 196 }
 197
 198 /*
 199  * amdgpu_dm_replay_disable_all() - disable replay f/w
 200  * if replay is enabled on any stream
 201  *
 202  * Return: true if success
 203  */
 204 bool amdgpu_dm_replay_disable_all(struct amdgpu_display_manager *dm)
 205 {
 206         DRM_DEBUG_DRIVER("Disabling replay if replay is enabled on any stream\n");
 207         return dc_set_replay_allow_active(dm->dc, false);
 208 }