drivers/cxl/core/trace.h

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2022 Intel Corporation. All rights reserved. */
   3 #undef TRACE_SYSTEM
   4 #define TRACE_SYSTEM cxl
   5
   6 #if !defined(_CXL_EVENTS_H) || defined(TRACE_HEADER_MULTI_READ)
   7 #define _CXL_EVENTS_H
   8
   9 #include <linux/tracepoint.h>
  10 #include <linux/pci.h>
  11 #include <linux/unaligned.h>
  12
  13 #include <cxl.h>
  14 #include <cxlmem.h>
  15 #include "core.h"
  16
  17 #define CXL_RAS_UC_CACHE_DATA_PARITY    BIT(0)
  18 #define CXL_RAS_UC_CACHE_ADDR_PARITY    BIT(1)
  19 #define CXL_RAS_UC_CACHE_BE_PARITY      BIT(2)
  20 #define CXL_RAS_UC_CACHE_DATA_ECC       BIT(3)
  21 #define CXL_RAS_UC_MEM_DATA_PARITY      BIT(4)
  22 #define CXL_RAS_UC_MEM_ADDR_PARITY      BIT(5)
  23 #define CXL_RAS_UC_MEM_BE_PARITY        BIT(6)
  24 #define CXL_RAS_UC_MEM_DATA_ECC         BIT(7)
  25 #define CXL_RAS_UC_REINIT_THRESH        BIT(8)
  26 #define CXL_RAS_UC_RSVD_ENCODE          BIT(9)
  27 #define CXL_RAS_UC_POISON               BIT(10)
  28 #define CXL_RAS_UC_RECV_OVERFLOW        BIT(11)
  29 #define CXL_RAS_UC_INTERNAL_ERR         BIT(14)
  30 #define CXL_RAS_UC_IDE_TX_ERR           BIT(15)
  31 #define CXL_RAS_UC_IDE_RX_ERR           BIT(16)
  32
  33 #define show_uc_errs(status)    __print_flags(status, " | ",              \
  34         { CXL_RAS_UC_CACHE_DATA_PARITY, "Cache Data Parity Error" },      \
  35         { CXL_RAS_UC_CACHE_ADDR_PARITY, "Cache Address Parity Error" },   \
  36         { CXL_RAS_UC_CACHE_BE_PARITY, "Cache Byte Enable Parity Error" }, \
  37         { CXL_RAS_UC_CACHE_DATA_ECC, "Cache Data ECC Error" },            \
  38         { CXL_RAS_UC_MEM_DATA_PARITY, "Memory Data Parity Error" },       \
  39         { CXL_RAS_UC_MEM_ADDR_PARITY, "Memory Address Parity Error" },    \
  40         { CXL_RAS_UC_MEM_BE_PARITY, "Memory Byte Enable Parity Error" },  \
  41         { CXL_RAS_UC_MEM_DATA_ECC, "Memory Data ECC Error" },             \
  42         { CXL_RAS_UC_REINIT_THRESH, "REINIT Threshold Hit" },             \
  43         { CXL_RAS_UC_RSVD_ENCODE, "Received Unrecognized Encoding" },     \
  44         { CXL_RAS_UC_POISON, "Received Poison From Peer" },               \
  45         { CXL_RAS_UC_RECV_OVERFLOW, "Receiver Overflow" },                \
  46         { CXL_RAS_UC_INTERNAL_ERR, "Component Specific Error" },          \
  47         { CXL_RAS_UC_IDE_TX_ERR, "IDE Tx Error" },                        \
  48         { CXL_RAS_UC_IDE_RX_ERR, "IDE Rx Error" }                         \
  49 )
  50
  51 TRACE_EVENT(cxl_aer_uncorrectable_error,
  52         TP_PROTO(const struct cxl_memdev *cxlmd, u32 status, u32 fe, u32 *hl),
  53         TP_ARGS(cxlmd, status, fe, hl),
  54         TP_STRUCT__entry(
  55                 __string(memdev, dev_name(&cxlmd->dev))
  56                 __string(host, dev_name(cxlmd->dev.parent))
  57                 __field(u64, serial)
  58                 __field(u32, status)
  59                 __field(u32, first_error)
  60                 __array(u32, header_log, CXL_HEADERLOG_SIZE_U32)
  61         ),
  62         TP_fast_assign(
  63                 __assign_str(memdev);
  64                 __assign_str(host);
  65                 __entry->serial = cxlmd->cxlds->serial;
  66                 __entry->status = status;
  67                 __entry->first_error = fe;
  68                 /*
  69                  * Embed the 512B headerlog data for user app retrieval and
  70                  * parsing, but no need to print this in the trace buffer.
  71                  */
  72                 memcpy(__entry->header_log, hl, CXL_HEADERLOG_SIZE);
  73         ),
  74         TP_printk("memdev=%s host=%s serial=%lld: status: '%s' first_error: '%s'",
  75                   __get_str(memdev), __get_str(host), __entry->serial,
  76                   show_uc_errs(__entry->status),
  77                   show_uc_errs(__entry->first_error)
  78         )
  79 );
  80
  81 #define CXL_RAS_CE_CACHE_DATA_ECC       BIT(0)
  82 #define CXL_RAS_CE_MEM_DATA_ECC         BIT(1)
  83 #define CXL_RAS_CE_CRC_THRESH           BIT(2)
  84 #define CLX_RAS_CE_RETRY_THRESH         BIT(3)
  85 #define CXL_RAS_CE_CACHE_POISON         BIT(4)
  86 #define CXL_RAS_CE_MEM_POISON           BIT(5)
  87 #define CXL_RAS_CE_PHYS_LAYER_ERR       BIT(6)
  88
  89 #define show_ce_errs(status)    __print_flags(status, " | ",                    \
  90         { CXL_RAS_CE_CACHE_DATA_ECC, "Cache Data ECC Error" },                  \
  91         { CXL_RAS_CE_MEM_DATA_ECC, "Memory Data ECC Error" },                   \
  92         { CXL_RAS_CE_CRC_THRESH, "CRC Threshold Hit" },                         \
  93         { CLX_RAS_CE_RETRY_THRESH, "Retry Threshold" },                         \
  94         { CXL_RAS_CE_CACHE_POISON, "Received Cache Poison From Peer" },         \
  95         { CXL_RAS_CE_MEM_POISON, "Received Memory Poison From Peer" },          \
  96         { CXL_RAS_CE_PHYS_LAYER_ERR, "Received Error From Physical Layer" }     \
  97 )
  98
  99 TRACE_EVENT(cxl_aer_correctable_error,
 100         TP_PROTO(const struct cxl_memdev *cxlmd, u32 status),
 101         TP_ARGS(cxlmd, status),
 102         TP_STRUCT__entry(
 103                 __string(memdev, dev_name(&cxlmd->dev))
 104                 __string(host, dev_name(cxlmd->dev.parent))
 105                 __field(u64, serial)
 106                 __field(u32, status)
 107         ),
 108         TP_fast_assign(
 109                 __assign_str(memdev);
 110                 __assign_str(host);
 111                 __entry->serial = cxlmd->cxlds->serial;
 112                 __entry->status = status;
 113         ),
 114         TP_printk("memdev=%s host=%s serial=%lld: status: '%s'",
 115                   __get_str(memdev), __get_str(host), __entry->serial,
 116                   show_ce_errs(__entry->status)
 117         )
 118 );
 119
 120 #define cxl_event_log_type_str(type)                            \
 121         __print_symbolic(type,                                  \
 122                 { CXL_EVENT_TYPE_INFO, "Informational" },       \
 123                 { CXL_EVENT_TYPE_WARN, "Warning" },             \
 124                 { CXL_EVENT_TYPE_FAIL, "Failure" },             \
 125                 { CXL_EVENT_TYPE_FATAL, "Fatal" })
 126
 127 TRACE_EVENT(cxl_overflow,
 128
 129         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 130                  struct cxl_get_event_payload *payload),
 131
 132         TP_ARGS(cxlmd, log, payload),
 133
 134         TP_STRUCT__entry(
 135                 __string(memdev, dev_name(&cxlmd->dev))
 136                 __string(host, dev_name(cxlmd->dev.parent))
 137                 __field(int, log)
 138                 __field(u64, serial)
 139                 __field(u64, first_ts)
 140                 __field(u64, last_ts)
 141                 __field(u16, count)
 142         ),
 143
 144         TP_fast_assign(
 145                 __assign_str(memdev);
 146                 __assign_str(host);
 147                 __entry->serial = cxlmd->cxlds->serial;
 148                 __entry->log = log;
 149                 __entry->count = le16_to_cpu(payload->overflow_err_count);
 150                 __entry->first_ts = le64_to_cpu(payload->first_overflow_timestamp);
 151                 __entry->last_ts = le64_to_cpu(payload->last_overflow_timestamp);
 152         ),
 153
 154         TP_printk("memdev=%s host=%s serial=%lld: log=%s : %u records from %llu to %llu",
 155                 __get_str(memdev), __get_str(host), __entry->serial,
 156                 cxl_event_log_type_str(__entry->log), __entry->count,
 157                 __entry->first_ts, __entry->last_ts)
 158
 159 );
 160
 161 /*
 162  * Common Event Record Format
 163  * CXL 3.0 section 8.2.9.2.1; Table 8-42
 164  */
 165 #define CXL_EVENT_RECORD_FLAG_PERMANENT         BIT(2)
 166 #define CXL_EVENT_RECORD_FLAG_MAINT_NEEDED      BIT(3)
 167 #define CXL_EVENT_RECORD_FLAG_PERF_DEGRADED     BIT(4)
 168 #define CXL_EVENT_RECORD_FLAG_HW_REPLACE        BIT(5)
 169 #define CXL_EVENT_RECORD_FLAG_MAINT_OP_SUB_CLASS_VALID  BIT(6)
 170 #define show_hdr_flags(flags)   __print_flags(flags, " | ",                        \
 171         { CXL_EVENT_RECORD_FLAG_PERMANENT,      "PERMANENT_CONDITION"           }, \
 172         { CXL_EVENT_RECORD_FLAG_MAINT_NEEDED,   "MAINTENANCE_NEEDED"            }, \
 173         { CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,  "PERFORMANCE_DEGRADED"          }, \
 174         { CXL_EVENT_RECORD_FLAG_HW_REPLACE,     "HARDWARE_REPLACEMENT_NEEDED"   },  \
 175         { CXL_EVENT_RECORD_FLAG_MAINT_OP_SUB_CLASS_VALID,       "MAINT_OP_SUB_CLASS_VALID" }    \
 176 )
 177
 178 /*
 179  * Define macros for the common header of each CXL event.
 180  *
 181  * Tracepoints using these macros must do 3 things:
 182  *
 183  *      1) Add CXL_EVT_TP_entry to TP_STRUCT__entry
 184  *      2) Use CXL_EVT_TP_fast_assign within TP_fast_assign;
 185  *         pass the dev, log, and CXL event header
 186  *         NOTE: The uuid must be assigned by the specific trace event
 187  *      3) Use CXL_EVT_TP_printk() instead of TP_printk()
 188  *
 189  * See the generic_event tracepoint as an example.
 190  */
 191 #define CXL_EVT_TP_entry                                        \
 192         __string(memdev, dev_name(&cxlmd->dev))                 \
 193         __string(host, dev_name(cxlmd->dev.parent))             \
 194         __field(int, log)                                       \
 195         __field_struct(uuid_t, hdr_uuid)                        \
 196         __field(u64, serial)                                    \
 197         __field(u32, hdr_flags)                                 \
 198         __field(u16, hdr_handle)                                \
 199         __field(u16, hdr_related_handle)                        \
 200         __field(u64, hdr_timestamp)                             \
 201         __field(u8, hdr_length)                                 \
 202         __field(u8, hdr_maint_op_class)                         \
 203         __field(u8, hdr_maint_op_sub_class)
 204
 205 #define CXL_EVT_TP_fast_assign(cxlmd, l, hdr)                                   \
 206         __assign_str(memdev);                           \
 207         __assign_str(host);                     \
 208         __entry->log = (l);                                                     \
 209         __entry->serial = (cxlmd)->cxlds->serial;                               \
 210         __entry->hdr_length = (hdr).length;                                     \
 211         __entry->hdr_flags = get_unaligned_le24((hdr).flags);                   \
 212         __entry->hdr_handle = le16_to_cpu((hdr).handle);                        \
 213         __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle);        \
 214         __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp);                  \
 215         __entry->hdr_maint_op_class = (hdr).maint_op_class;                     \
 216         __entry->hdr_maint_op_sub_class = (hdr).maint_op_sub_class
 217
 218 #define CXL_EVT_TP_printk(fmt, ...) \
 219         TP_printk("memdev=%s host=%s serial=%lld log=%s : time=%llu uuid=%pUb " \
 220                 "len=%d flags='%s' handle=%x related_handle=%x "                \
 221                 "maint_op_class=%u maint_op_sub_class=%u : " fmt,               \
 222                 __get_str(memdev), __get_str(host), __entry->serial,            \
 223                 cxl_event_log_type_str(__entry->log),                           \
 224                 __entry->hdr_timestamp, &__entry->hdr_uuid, __entry->hdr_length,\
 225                 show_hdr_flags(__entry->hdr_flags), __entry->hdr_handle,        \
 226                 __entry->hdr_related_handle, __entry->hdr_maint_op_class,       \
 227                 __entry->hdr_maint_op_sub_class,        \
 228                 ##__VA_ARGS__)
 229
 230 TRACE_EVENT(cxl_generic_event,
 231
 232         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 233                  const uuid_t *uuid, struct cxl_event_generic *gen_rec),
 234
 235         TP_ARGS(cxlmd, log, uuid, gen_rec),
 236
 237         TP_STRUCT__entry(
 238                 CXL_EVT_TP_entry
 239                 __array(u8, data, CXL_EVENT_RECORD_DATA_LENGTH)
 240         ),
 241
 242         TP_fast_assign(
 243                 CXL_EVT_TP_fast_assign(cxlmd, log, gen_rec->hdr);
 244                 memcpy(&__entry->hdr_uuid, uuid, sizeof(uuid_t));
 245                 memcpy(__entry->data, gen_rec->data, CXL_EVENT_RECORD_DATA_LENGTH);
 246         ),
 247
 248         CXL_EVT_TP_printk("%s",
 249                 __print_hex(__entry->data, CXL_EVENT_RECORD_DATA_LENGTH))
 250 );
 251
 252 /*
 253  * Physical Address field masks
 254  *
 255  * General Media Event Record
 256  * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
 257  *
 258  * DRAM Event Record
 259  * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
 260  */
 261 #define CXL_DPA_FLAGS_MASK                      GENMASK(1, 0)
 262 #define CXL_DPA_MASK                            GENMASK_ULL(63, 6)
 263
 264 #define CXL_DPA_VOLATILE                        BIT(0)
 265 #define CXL_DPA_NOT_REPAIRABLE                  BIT(1)
 266 #define show_dpa_flags(flags)   __print_flags(flags, "|",                  \
 267         { CXL_DPA_VOLATILE,                     "VOLATILE"              }, \
 268         { CXL_DPA_NOT_REPAIRABLE,               "NOT_REPAIRABLE"        }  \
 269 )
 270
 271 /*
 272  * Component ID Format
 273  * CXL 3.1 section 8.2.9.2.1; Table 8-44
 274  */
 275 #define CXL_PLDM_COMPONENT_ID_ENTITY_VALID      BIT(0)
 276 #define CXL_PLDM_COMPONENT_ID_RES_VALID         BIT(1)
 277
 278 #define show_comp_id_pldm_flags(flags)  __print_flags(flags, " | ",     \
 279         { CXL_PLDM_COMPONENT_ID_ENTITY_VALID,   "PLDM Entity ID" },     \
 280         { CXL_PLDM_COMPONENT_ID_RES_VALID,      "Resource ID" }         \
 281 )
 282
 283 #define show_pldm_entity_id(flags, valid_comp_id, valid_id_format, comp_id)     \
 284         (flags & valid_comp_id && flags & valid_id_format) ?                    \
 285         (comp_id[0] & CXL_PLDM_COMPONENT_ID_ENTITY_VALID) ?                     \
 286         __print_hex(&comp_id[1], 6) : "0x00" : "0x00"
 287
 288 #define show_pldm_resource_id(flags, valid_comp_id, valid_id_format, comp_id)   \
 289         (flags & valid_comp_id && flags & valid_id_format) ?                    \
 290         (comp_id[0] & CXL_PLDM_COMPONENT_ID_RES_VALID) ?                        \
 291         __print_hex(&comp_id[7], 4) : "0x00" : "0x00"
 292
 293 /*
 294  * General Media Event Record - GMER
 295  * CXL rev 3.1 Section 8.2.9.2.1.1; Table 8-45
 296  */
 297 #define CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT            BIT(0)
 298 #define CXL_GMER_EVT_DESC_THRESHOLD_EVENT               BIT(1)
 299 #define CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW          BIT(2)
 300 #define show_event_desc_flags(flags)    __print_flags(flags, "|",                  \
 301         { CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,         "UNCORRECTABLE_EVENT"   }, \
 302         { CXL_GMER_EVT_DESC_THRESHOLD_EVENT,            "THRESHOLD_EVENT"       }, \
 303         { CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW,       "POISON_LIST_OVERFLOW"  }  \
 304 )
 305
 306 #define CXL_GMER_MEM_EVT_TYPE_ECC_ERROR                 0x00
 307 #define CXL_GMER_MEM_EVT_TYPE_INV_ADDR                  0x01
 308 #define CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR           0x02
 309 #define CXL_GMER_MEM_EVT_TYPE_TE_STATE_VIOLATION        0x03
 310 #define CXL_GMER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR     0x04
 311 #define CXL_GMER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE     0x05
 312 #define CXL_GMER_MEM_EVT_TYPE_CKID_VIOLATION            0x06
 313 #define show_gmer_mem_event_type(type)  __print_symbolic(type,                          \
 314         { CXL_GMER_MEM_EVT_TYPE_ECC_ERROR,              "ECC Error" },                  \
 315         { CXL_GMER_MEM_EVT_TYPE_INV_ADDR,               "Invalid Address" },            \
 316         { CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,        "Data Path Error" },            \
 317         { CXL_GMER_MEM_EVT_TYPE_TE_STATE_VIOLATION,     "TE State Violation" },         \
 318         { CXL_GMER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR,  "Scrub Media ECC Error" },      \
 319         { CXL_GMER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE,  "Adv Prog CME Counter Expiration" },    \
 320         { CXL_GMER_MEM_EVT_TYPE_CKID_VIOLATION,         "CKID Violation" }              \
 321 )
 322
 323 #define CXL_GMER_TRANS_UNKNOWN                          0x00
 324 #define CXL_GMER_TRANS_HOST_READ                        0x01
 325 #define CXL_GMER_TRANS_HOST_WRITE                       0x02
 326 #define CXL_GMER_TRANS_HOST_SCAN_MEDIA                  0x03
 327 #define CXL_GMER_TRANS_HOST_INJECT_POISON               0x04
 328 #define CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB             0x05
 329 #define CXL_GMER_TRANS_INTERNAL_MEDIA_MANAGEMENT        0x06
 330 #define CXL_GMER_TRANS_INTERNAL_MEDIA_ECS               0x07
 331 #define CXL_GMER_TRANS_MEDIA_INITIALIZATION             0x08
 332 #define show_trans_type(type)   __print_symbolic(type,                                  \
 333         { CXL_GMER_TRANS_UNKNOWN,                       "Unknown" },                    \
 334         { CXL_GMER_TRANS_HOST_READ,                     "Host Read" },                  \
 335         { CXL_GMER_TRANS_HOST_WRITE,                    "Host Write" },                 \
 336         { CXL_GMER_TRANS_HOST_SCAN_MEDIA,               "Host Scan Media" },            \
 337         { CXL_GMER_TRANS_HOST_INJECT_POISON,            "Host Inject Poison" },         \
 338         { CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,          "Internal Media Scrub" },       \
 339         { CXL_GMER_TRANS_INTERNAL_MEDIA_MANAGEMENT,     "Internal Media Management" },  \
 340         { CXL_GMER_TRANS_INTERNAL_MEDIA_ECS,            "Internal Media Error Check Scrub" },   \
 341         { CXL_GMER_TRANS_MEDIA_INITIALIZATION,          "Media Initialization" }        \
 342 )
 343
 344 #define CXL_GMER_VALID_CHANNEL                          BIT(0)
 345 #define CXL_GMER_VALID_RANK                             BIT(1)
 346 #define CXL_GMER_VALID_DEVICE                           BIT(2)
 347 #define CXL_GMER_VALID_COMPONENT                        BIT(3)
 348 #define CXL_GMER_VALID_COMPONENT_ID_FORMAT              BIT(4)
 349 #define show_valid_flags(flags) __print_flags(flags, "|",                  \
 350         { CXL_GMER_VALID_CHANNEL,                       "CHANNEL"       }, \
 351         { CXL_GMER_VALID_RANK,                          "RANK"          }, \
 352         { CXL_GMER_VALID_DEVICE,                        "DEVICE"        }, \
 353         { CXL_GMER_VALID_COMPONENT,                     "COMPONENT"     }, \
 354         { CXL_GMER_VALID_COMPONENT_ID_FORMAT,           "COMPONENT PLDM FORMAT" } \
 355 )
 356
 357 #define CXL_GMER_CME_EV_FLAG_CME_MULTIPLE_MEDIA         BIT(0)
 358 #define CXL_GMER_CME_EV_FLAG_THRESHOLD_EXCEEDED         BIT(1)
 359 #define show_cme_threshold_ev_flags(flags)      __print_flags(flags, "|",       \
 360         {                                                                       \
 361                 CXL_GMER_CME_EV_FLAG_CME_MULTIPLE_MEDIA,                        \
 362                 "Corrected Memory Errors in Multiple Media Components"          \
 363         }, {                                                                    \
 364                 CXL_GMER_CME_EV_FLAG_THRESHOLD_EXCEEDED,                        \
 365                 "Exceeded Programmable Threshold"                               \
 366         }                                                                       \
 367 )
 368
 369 #define CXL_GMER_MEM_EVT_SUB_TYPE_NOT_REPORTED                          0x00
 370 #define CXL_GMER_MEM_EVT_SUB_TYPE_INTERNAL_DATAPATH_ERROR               0x01
 371 #define CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_COMMAND_TRAINING_ERROR     0x02
 372 #define CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_CONTROL_TRAINING_ERROR     0x03
 373 #define CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_DATA_TRAINING_ERROR        0x04
 374 #define CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_CRC_ERROR                  0x05
 375 #define show_mem_event_sub_type(sub_type)       __print_symbolic(sub_type,                      \
 376         { CXL_GMER_MEM_EVT_SUB_TYPE_NOT_REPORTED, "Not Reported" },                             \
 377         { CXL_GMER_MEM_EVT_SUB_TYPE_INTERNAL_DATAPATH_ERROR, "Internal Datapath Error" },       \
 378         {                                                                                       \
 379                 CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_COMMAND_TRAINING_ERROR,                    \
 380                 "Media Link Command Training Error"                                             \
 381         }, {                                                                                    \
 382                 CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_CONTROL_TRAINING_ERROR,                    \
 383                 "Media Link Control Training Error"                                             \
 384         }, {                                                                                    \
 385                 CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_DATA_TRAINING_ERROR,                       \
 386                 "Media Link Data Training Error"                                                \
 387         }, {                                                                                    \
 388                 CXL_GMER_MEM_EVT_SUB_TYPE_MEDIA_LINK_CRC_ERROR, "Media Link CRC Error"          \
 389         }                                                                                       \
 390 )
 391
 392 TRACE_EVENT(cxl_general_media,
 393
 394         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 395                  struct cxl_region *cxlr, u64 hpa, struct cxl_event_gen_media *rec),
 396
 397         TP_ARGS(cxlmd, log, cxlr, hpa, rec),
 398
 399         TP_STRUCT__entry(
 400                 CXL_EVT_TP_entry
 401                 /* General Media */
 402                 __field(u64, dpa)
 403                 __field(u8, descriptor)
 404                 __field(u8, type)
 405                 __field(u8, transaction_type)
 406                 __field(u8, channel)
 407                 __field(u32, device)
 408                 __array(u8, comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE)
 409                 /* Following are out of order to pack trace record */
 410                 __field(u64, hpa)
 411                 __field_struct(uuid_t, region_uuid)
 412                 __field(u16, validity_flags)
 413                 __field(u8, rank)
 414                 __field(u8, dpa_flags)
 415                 __field(u32, cme_count)
 416                 __field(u8, sub_type)
 417                 __field(u8, cme_threshold_ev_flags)
 418                 __string(region_name, cxlr ? dev_name(&cxlr->dev) : "")
 419         ),
 420
 421         TP_fast_assign(
 422                 CXL_EVT_TP_fast_assign(cxlmd, log, rec->media_hdr.hdr);
 423                 __entry->hdr_uuid = CXL_EVENT_GEN_MEDIA_UUID;
 424
 425                 /* General Media */
 426                 __entry->dpa = le64_to_cpu(rec->media_hdr.phys_addr);
 427                 __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK;
 428                 /* Mask after flags have been parsed */
 429                 __entry->dpa &= CXL_DPA_MASK;
 430                 __entry->descriptor = rec->media_hdr.descriptor;
 431                 __entry->type = rec->media_hdr.type;
 432                 __entry->sub_type = rec->sub_type;
 433                 __entry->transaction_type = rec->media_hdr.transaction_type;
 434                 __entry->channel = rec->media_hdr.channel;
 435                 __entry->rank = rec->media_hdr.rank;
 436                 __entry->device = get_unaligned_le24(rec->device);
 437                 memcpy(__entry->comp_id, &rec->component_id,
 438                         CXL_EVENT_GEN_MED_COMP_ID_SIZE);
 439                 __entry->validity_flags = get_unaligned_le16(&rec->media_hdr.validity_flags);
 440                 __entry->hpa = hpa;
 441                 if (cxlr) {
 442                         __assign_str(region_name);
 443                         uuid_copy(&__entry->region_uuid, &cxlr->params.uuid);
 444                 } else {
 445                         __assign_str(region_name);
 446                         uuid_copy(&__entry->region_uuid, &uuid_null);
 447                 }
 448                 __entry->cme_threshold_ev_flags = rec->cme_threshold_ev_flags;
 449                 __entry->cme_count = get_unaligned_le24(rec->cme_count);
 450         ),
 451
 452         CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' " \
 453                 "descriptor='%s' type='%s' sub_type='%s' " \
 454                 "transaction_type='%s' channel=%u rank=%u " \
 455                 "device=%x validity_flags='%s' " \
 456                 "comp_id=%s comp_id_pldm_valid_flags='%s' " \
 457                 "pldm_entity_id=%s pldm_resource_id=%s " \
 458                 "hpa=%llx region=%s region_uuid=%pUb " \
 459                 "cme_threshold_ev_flags='%s' cme_count=%u",
 460                 __entry->dpa, show_dpa_flags(__entry->dpa_flags),
 461                 show_event_desc_flags(__entry->descriptor),
 462                 show_gmer_mem_event_type(__entry->type),
 463                 show_mem_event_sub_type(__entry->sub_type),
 464                 show_trans_type(__entry->transaction_type),
 465                 __entry->channel, __entry->rank, __entry->device,
 466                 show_valid_flags(__entry->validity_flags),
 467                 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
 468                 show_comp_id_pldm_flags(__entry->comp_id[0]),
 469                 show_pldm_entity_id(__entry->validity_flags, CXL_GMER_VALID_COMPONENT,
 470                                     CXL_GMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
 471                 show_pldm_resource_id(__entry->validity_flags, CXL_GMER_VALID_COMPONENT,
 472                                       CXL_GMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
 473                 __entry->hpa, __get_str(region_name), &__entry->region_uuid,
 474                 show_cme_threshold_ev_flags(__entry->cme_threshold_ev_flags), __entry->cme_count
 475         )
 476 );
 477
 478 /*
 479  * DRAM Event Record - DER
 480  *
 481  * CXL rev 3.1 section 8.2.9.2.1.2; Table 8-46
 482  */
 483 /*
 484  * DRAM Event Record defines many fields the same as the General Media Event
 485  * Record.  Reuse those definitions as appropriate.
 486  */
 487 #define CXL_DER_MEM_EVT_TYPE_ECC_ERROR                  0x00
 488 #define CXL_DER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR      0x01
 489 #define CXL_DER_MEM_EVT_TYPE_INV_ADDR                   0x02
 490 #define CXL_DER_MEM_EVT_TYPE_DATA_PATH_ERROR            0x03
 491 #define CXL_DER_MEM_EVT_TYPE_TE_STATE_VIOLATION 0x04
 492 #define CXL_DER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE      0x05
 493 #define CXL_DER_MEM_EVT_TYPE_CKID_VIOLATION             0x06
 494 #define show_dram_mem_event_type(type)  __print_symbolic(type,                                  \
 495         { CXL_DER_MEM_EVT_TYPE_ECC_ERROR,               "ECC Error" },                          \
 496         { CXL_DER_MEM_EVT_TYPE_SCRUB_MEDIA_ECC_ERROR,   "Scrub Media ECC Error" },              \
 497         { CXL_DER_MEM_EVT_TYPE_INV_ADDR,                "Invalid Address" },                    \
 498         { CXL_DER_MEM_EVT_TYPE_DATA_PATH_ERROR,         "Data Path Error" },                    \
 499         { CXL_DER_MEM_EVT_TYPE_TE_STATE_VIOLATION,      "TE State Violation" },                 \
 500         { CXL_DER_MEM_EVT_TYPE_AP_CME_COUNTER_EXPIRE,   "Adv Prog CME Counter Expiration" },    \
 501         { CXL_DER_MEM_EVT_TYPE_CKID_VIOLATION,          "CKID Violation" }                      \
 502 )
 503
 504 #define CXL_DER_VALID_CHANNEL                           BIT(0)
 505 #define CXL_DER_VALID_RANK                              BIT(1)
 506 #define CXL_DER_VALID_NIBBLE                            BIT(2)
 507 #define CXL_DER_VALID_BANK_GROUP                        BIT(3)
 508 #define CXL_DER_VALID_BANK                              BIT(4)
 509 #define CXL_DER_VALID_ROW                               BIT(5)
 510 #define CXL_DER_VALID_COLUMN                            BIT(6)
 511 #define CXL_DER_VALID_CORRECTION_MASK                   BIT(7)
 512 #define CXL_DER_VALID_COMPONENT                         BIT(8)
 513 #define CXL_DER_VALID_COMPONENT_ID_FORMAT               BIT(9)
 514 #define CXL_DER_VALID_SUB_CHANNEL                       BIT(10)
 515 #define show_dram_valid_flags(flags)    __print_flags(flags, "|",                       \
 516         { CXL_DER_VALID_CHANNEL,                        "CHANNEL"               },      \
 517         { CXL_DER_VALID_RANK,                           "RANK"                  },      \
 518         { CXL_DER_VALID_NIBBLE,                         "NIBBLE"                },      \
 519         { CXL_DER_VALID_BANK_GROUP,                     "BANK GROUP"            },      \
 520         { CXL_DER_VALID_BANK,                           "BANK"                  },      \
 521         { CXL_DER_VALID_ROW,                            "ROW"                   },      \
 522         { CXL_DER_VALID_COLUMN,                         "COLUMN"                },      \
 523         { CXL_DER_VALID_CORRECTION_MASK,                "CORRECTION MASK"       },      \
 524         { CXL_DER_VALID_COMPONENT,                      "COMPONENT"             },      \
 525         { CXL_DER_VALID_COMPONENT_ID_FORMAT,            "COMPONENT PLDM FORMAT" },      \
 526         { CXL_DER_VALID_SUB_CHANNEL,                    "SUB CHANNEL"           }       \
 527 )
 528
 529 TRACE_EVENT(cxl_dram,
 530
 531         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 532                  struct cxl_region *cxlr, u64 hpa, struct cxl_event_dram *rec),
 533
 534         TP_ARGS(cxlmd, log, cxlr, hpa, rec),
 535
 536         TP_STRUCT__entry(
 537                 CXL_EVT_TP_entry
 538                 /* DRAM */
 539                 __field(u64, dpa)
 540                 __field(u8, descriptor)
 541                 __field(u8, type)
 542                 __field(u8, transaction_type)
 543                 __field(u8, channel)
 544                 __field(u16, validity_flags)
 545                 __field(u16, column)    /* Out of order to pack trace record */
 546                 __field(u32, nibble_mask)
 547                 __field(u32, row)
 548                 __array(u8, cor_mask, CXL_EVENT_DER_CORRECTION_MASK_SIZE)
 549                 __field(u64, hpa)
 550                 __field_struct(uuid_t, region_uuid)
 551                 __field(u8, rank)       /* Out of order to pack trace record */
 552                 __field(u8, bank_group) /* Out of order to pack trace record */
 553                 __field(u8, bank)       /* Out of order to pack trace record */
 554                 __field(u8, dpa_flags)  /* Out of order to pack trace record */
 555                 /* Following are out of order to pack trace record */
 556                 __array(u8, comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE)
 557                 __field(u32, cvme_count)
 558                 __field(u8, sub_type)
 559                 __field(u8, sub_channel)
 560                 __field(u8, cme_threshold_ev_flags)
 561                 __string(region_name, cxlr ? dev_name(&cxlr->dev) : "")
 562         ),
 563
 564         TP_fast_assign(
 565                 CXL_EVT_TP_fast_assign(cxlmd, log, rec->media_hdr.hdr);
 566                 __entry->hdr_uuid = CXL_EVENT_DRAM_UUID;
 567
 568                 /* DRAM */
 569                 __entry->dpa = le64_to_cpu(rec->media_hdr.phys_addr);
 570                 __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK;
 571                 __entry->dpa &= CXL_DPA_MASK;
 572                 __entry->descriptor = rec->media_hdr.descriptor;
 573                 __entry->type = rec->media_hdr.type;
 574                 __entry->sub_type = rec->sub_type;
 575                 __entry->transaction_type = rec->media_hdr.transaction_type;
 576                 __entry->validity_flags = get_unaligned_le16(rec->media_hdr.validity_flags);
 577                 __entry->channel = rec->media_hdr.channel;
 578                 __entry->rank = rec->media_hdr.rank;
 579                 __entry->nibble_mask = get_unaligned_le24(rec->nibble_mask);
 580                 __entry->bank_group = rec->bank_group;
 581                 __entry->bank = rec->bank;
 582                 __entry->row = get_unaligned_le24(rec->row);
 583                 __entry->column = get_unaligned_le16(rec->column);
 584                 memcpy(__entry->cor_mask, &rec->correction_mask,
 585                         CXL_EVENT_DER_CORRECTION_MASK_SIZE);
 586                 __entry->hpa = hpa;
 587                 if (cxlr) {
 588                         __assign_str(region_name);
 589                         uuid_copy(&__entry->region_uuid, &cxlr->params.uuid);
 590                 } else {
 591                         __assign_str(region_name);
 592                         uuid_copy(&__entry->region_uuid, &uuid_null);
 593                 }
 594                 memcpy(__entry->comp_id, &rec->component_id,
 595                        CXL_EVENT_GEN_MED_COMP_ID_SIZE);
 596                 __entry->sub_channel = rec->sub_channel;
 597                 __entry->cme_threshold_ev_flags = rec->cme_threshold_ev_flags;
 598                 __entry->cvme_count = get_unaligned_le24(rec->cvme_count);
 599         ),
 600
 601         CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' descriptor='%s' type='%s' sub_type='%s' " \
 602                 "transaction_type='%s' channel=%u rank=%u nibble_mask=%x " \
 603                 "bank_group=%u bank=%u row=%u column=%u cor_mask=%s " \
 604                 "validity_flags='%s' " \
 605                 "comp_id=%s comp_id_pldm_valid_flags='%s' " \
 606                 "pldm_entity_id=%s pldm_resource_id=%s " \
 607                 "hpa=%llx region=%s region_uuid=%pUb " \
 608                 "sub_channel=%u cme_threshold_ev_flags='%s' cvme_count=%u",
 609                 __entry->dpa, show_dpa_flags(__entry->dpa_flags),
 610                 show_event_desc_flags(__entry->descriptor),
 611                 show_dram_mem_event_type(__entry->type),
 612                 show_mem_event_sub_type(__entry->sub_type),
 613                 show_trans_type(__entry->transaction_type),
 614                 __entry->channel, __entry->rank, __entry->nibble_mask,
 615                 __entry->bank_group, __entry->bank,
 616                 __entry->row, __entry->column,
 617                 __print_hex(__entry->cor_mask, CXL_EVENT_DER_CORRECTION_MASK_SIZE),
 618                 show_dram_valid_flags(__entry->validity_flags),
 619                 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
 620                 show_comp_id_pldm_flags(__entry->comp_id[0]),
 621                 show_pldm_entity_id(__entry->validity_flags, CXL_DER_VALID_COMPONENT,
 622                                     CXL_DER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
 623                 show_pldm_resource_id(__entry->validity_flags, CXL_DER_VALID_COMPONENT,
 624                                       CXL_DER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
 625                 __entry->hpa, __get_str(region_name), &__entry->region_uuid,
 626                 __entry->sub_channel, show_cme_threshold_ev_flags(__entry->cme_threshold_ev_flags),
 627                 __entry->cvme_count
 628         )
 629 );
 630
 631 /*
 632  * Memory Module Event Record - MMER
 633  *
 634  * CXL res 3.1 section 8.2.9.2.1.3; Table 8-47
 635  */
 636 #define CXL_MMER_HEALTH_STATUS_CHANGE           0x00
 637 #define CXL_MMER_MEDIA_STATUS_CHANGE            0x01
 638 #define CXL_MMER_LIFE_USED_CHANGE               0x02
 639 #define CXL_MMER_TEMP_CHANGE                    0x03
 640 #define CXL_MMER_DATA_PATH_ERROR                0x04
 641 #define CXL_MMER_LSA_ERROR                      0x05
 642 #define CXL_MMER_UNRECOV_SIDEBAND_BUS_ERROR     0x06
 643 #define CXL_MMER_MEMORY_MEDIA_FRU_ERROR         0x07
 644 #define CXL_MMER_POWER_MANAGEMENT_FAULT         0x08
 645 #define show_dev_evt_type(type) __print_symbolic(type,                     \
 646         { CXL_MMER_HEALTH_STATUS_CHANGE,        "Health Status Change"  }, \
 647         { CXL_MMER_MEDIA_STATUS_CHANGE,         "Media Status Change"   }, \
 648         { CXL_MMER_LIFE_USED_CHANGE,            "Life Used Change"      }, \
 649         { CXL_MMER_TEMP_CHANGE,                 "Temperature Change"    }, \
 650         { CXL_MMER_DATA_PATH_ERROR,             "Data Path Error"       }, \
 651         { CXL_MMER_LSA_ERROR,                   "LSA Error"             }, \
 652         { CXL_MMER_UNRECOV_SIDEBAND_BUS_ERROR,  "Unrecoverable Internal Sideband Bus Error"     }, \
 653         { CXL_MMER_MEMORY_MEDIA_FRU_ERROR,      "Memory Media FRU Error"        }, \
 654         { CXL_MMER_POWER_MANAGEMENT_FAULT,      "Power Management Fault"        }  \
 655 )
 656
 657 /*
 658  * Device Health Information - DHI
 659  *
 660  * CXL res 3.1 section 8.2.9.9.3.1; Table 8-133
 661  */
 662 #define CXL_DHI_HS_MAINTENANCE_NEEDED                           BIT(0)
 663 #define CXL_DHI_HS_PERFORMANCE_DEGRADED                         BIT(1)
 664 #define CXL_DHI_HS_HW_REPLACEMENT_NEEDED                        BIT(2)
 665 #define CXL_DHI_HS_MEM_CAPACITY_DEGRADED                        BIT(3)
 666 #define show_health_status_flags(flags) __print_flags(flags, "|",          \
 667         { CXL_DHI_HS_MAINTENANCE_NEEDED,        "MAINTENANCE_NEEDED"    }, \
 668         { CXL_DHI_HS_PERFORMANCE_DEGRADED,      "PERFORMANCE_DEGRADED"  }, \
 669         { CXL_DHI_HS_HW_REPLACEMENT_NEEDED,     "REPLACEMENT_NEEDED"    }, \
 670         { CXL_DHI_HS_MEM_CAPACITY_DEGRADED,     "MEM_CAPACITY_DEGRADED" }  \
 671 )
 672
 673 #define CXL_DHI_MS_NORMAL                                                       0x00
 674 #define CXL_DHI_MS_NOT_READY                                                    0x01
 675 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOST                                       0x02
 676 #define CXL_DHI_MS_ALL_DATA_LOST                                                0x03
 677 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_POWER_LOSS                      0x04
 678 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_SHUTDOWN                        0x05
 679 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_IMMINENT                              0x06
 680 #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_POWER_LOSS                         0x07
 681 #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_SHUTDOWN                           0x08
 682 #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_IMMINENT                                 0x09
 683 #define show_media_status(ms)   __print_symbolic(ms,                       \
 684         { CXL_DHI_MS_NORMAL,                                               \
 685                 "Normal"                                                }, \
 686         { CXL_DHI_MS_NOT_READY,                                            \
 687                 "Not Ready"                                             }, \
 688         { CXL_DHI_MS_WRITE_PERSISTENCY_LOST,                               \
 689                 "Write Persistency Lost"                                }, \
 690         { CXL_DHI_MS_ALL_DATA_LOST,                                        \
 691                 "All Data Lost"                                         }, \
 692         { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_POWER_LOSS,              \
 693                 "Write Persistency Loss in the Event of Power Loss"     }, \
 694         { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_SHUTDOWN,                \
 695                 "Write Persistency Loss in Event of Shutdown"           }, \
 696         { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_IMMINENT,                      \
 697                 "Write Persistency Loss Imminent"                       }, \
 698         { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_POWER_LOSS,                 \
 699                 "All Data Loss in Event of Power Loss"                  }, \
 700         { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_SHUTDOWN,                   \
 701                 "All Data loss in the Event of Shutdown"                }, \
 702         { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_IMMINENT,                         \
 703                 "All Data Loss Imminent"                                }  \
 704 )
 705
 706 #define CXL_DHI_AS_NORMAL               0x0
 707 #define CXL_DHI_AS_WARNING              0x1
 708 #define CXL_DHI_AS_CRITICAL             0x2
 709 #define show_two_bit_status(as) __print_symbolic(as,       \
 710         { CXL_DHI_AS_NORMAL,            "Normal"        }, \
 711         { CXL_DHI_AS_WARNING,           "Warning"       }, \
 712         { CXL_DHI_AS_CRITICAL,          "Critical"      }  \
 713 )
 714 #define show_one_bit_status(as) __print_symbolic(as,       \
 715         { CXL_DHI_AS_NORMAL,            "Normal"        }, \
 716         { CXL_DHI_AS_WARNING,           "Warning"       }  \
 717 )
 718
 719 #define CXL_DHI_AS_LIFE_USED(as)                        (as & 0x3)
 720 #define CXL_DHI_AS_DEV_TEMP(as)                         ((as & 0xC) >> 2)
 721 #define CXL_DHI_AS_COR_VOL_ERR_CNT(as)                  ((as & 0x10) >> 4)
 722 #define CXL_DHI_AS_COR_PER_ERR_CNT(as)                  ((as & 0x20) >> 5)
 723
 724 #define CXL_MMER_VALID_COMPONENT                        BIT(0)
 725 #define CXL_MMER_VALID_COMPONENT_ID_FORMAT              BIT(1)
 726 #define show_mem_module_valid_flags(flags)      __print_flags(flags, "|",       \
 727         { CXL_MMER_VALID_COMPONENT,             "COMPONENT" },                  \
 728         { CXL_MMER_VALID_COMPONENT_ID_FORMAT,   "COMPONENT PLDM FORMAT" }       \
 729 )
 730 #define CXL_MMER_DEV_EVT_SUB_TYPE_NOT_REPORTED                  0x00
 731 #define CXL_MMER_DEV_EVT_SUB_TYPE_INVALID_CONFIG_DATA           0x01
 732 #define CXL_MMER_DEV_EVT_SUB_TYPE_UNSUPP_CONFIG_DATA            0x02
 733 #define CXL_MMER_DEV_EVT_SUB_TYPE_UNSUPP_MEM_MEDIA_FRU          0x03
 734 #define show_dev_event_sub_type(sub_type)       __print_symbolic(sub_type,                      \
 735         { CXL_MMER_DEV_EVT_SUB_TYPE_NOT_REPORTED,               "Not Reported" },               \
 736         { CXL_MMER_DEV_EVT_SUB_TYPE_INVALID_CONFIG_DATA,        "Invalid Config Data" },        \
 737         { CXL_MMER_DEV_EVT_SUB_TYPE_UNSUPP_CONFIG_DATA,         "Unsupported Config Data" },    \
 738         {                                                                                       \
 739                 CXL_MMER_DEV_EVT_SUB_TYPE_UNSUPP_MEM_MEDIA_FRU,                                 \
 740                 "Unsupported Memory Media FRU"                                                  \
 741         }                                                                                       \
 742 )
 743
 744 TRACE_EVENT(cxl_memory_module,
 745
 746         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 747                  struct cxl_event_mem_module *rec),
 748
 749         TP_ARGS(cxlmd, log, rec),
 750
 751         TP_STRUCT__entry(
 752                 CXL_EVT_TP_entry
 753
 754                 /* Memory Module Event */
 755                 __field(u8, event_type)
 756
 757                 /* Device Health Info */
 758                 __field(u8, health_status)
 759                 __field(u8, media_status)
 760                 __field(u8, life_used)
 761                 __field(u32, dirty_shutdown_cnt)
 762                 __field(u32, cor_vol_err_cnt)
 763                 __field(u32, cor_per_err_cnt)
 764                 __field(s16, device_temp)
 765                 __field(u8, add_status)
 766                 __field(u8, event_sub_type)
 767                 __array(u8, comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE)
 768                 __field(u16, validity_flags)
 769         ),
 770
 771         TP_fast_assign(
 772                 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
 773                 __entry->hdr_uuid = CXL_EVENT_MEM_MODULE_UUID;
 774
 775                 /* Memory Module Event */
 776                 __entry->event_type = rec->event_type;
 777                 __entry->event_sub_type = rec->event_sub_type;
 778
 779                 /* Device Health Info */
 780                 __entry->health_status = rec->info.health_status;
 781                 __entry->media_status = rec->info.media_status;
 782                 __entry->life_used = rec->info.life_used;
 783                 __entry->dirty_shutdown_cnt = get_unaligned_le32(rec->info.dirty_shutdown_cnt);
 784                 __entry->cor_vol_err_cnt = get_unaligned_le32(rec->info.cor_vol_err_cnt);
 785                 __entry->cor_per_err_cnt = get_unaligned_le32(rec->info.cor_per_err_cnt);
 786                 __entry->device_temp = get_unaligned_le16(rec->info.device_temp);
 787                 __entry->add_status = rec->info.add_status;
 788                 __entry->validity_flags = get_unaligned_le16(rec->validity_flags);
 789                 memcpy(__entry->comp_id, &rec->component_id,
 790                        CXL_EVENT_GEN_MED_COMP_ID_SIZE);
 791         ),
 792
 793         CXL_EVT_TP_printk("event_type='%s' event_sub_type='%s' health_status='%s' " \
 794                 "media_status='%s' as_life_used=%s as_dev_temp=%s as_cor_vol_err_cnt=%s " \
 795                 "as_cor_per_err_cnt=%s life_used=%u device_temp=%d " \
 796                 "dirty_shutdown_cnt=%u cor_vol_err_cnt=%u cor_per_err_cnt=%u " \
 797                 "validity_flags='%s' " \
 798                 "comp_id=%s comp_id_pldm_valid_flags='%s' " \
 799                 "pldm_entity_id=%s pldm_resource_id=%s",
 800                 show_dev_evt_type(__entry->event_type),
 801                 show_dev_event_sub_type(__entry->event_sub_type),
 802                 show_health_status_flags(__entry->health_status),
 803                 show_media_status(__entry->media_status),
 804                 show_two_bit_status(CXL_DHI_AS_LIFE_USED(__entry->add_status)),
 805                 show_two_bit_status(CXL_DHI_AS_DEV_TEMP(__entry->add_status)),
 806                 show_one_bit_status(CXL_DHI_AS_COR_VOL_ERR_CNT(__entry->add_status)),
 807                 show_one_bit_status(CXL_DHI_AS_COR_PER_ERR_CNT(__entry->add_status)),
 808                 __entry->life_used, __entry->device_temp,
 809                 __entry->dirty_shutdown_cnt, __entry->cor_vol_err_cnt,
 810                 __entry->cor_per_err_cnt,
 811                 show_mem_module_valid_flags(__entry->validity_flags),
 812                 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
 813                 show_comp_id_pldm_flags(__entry->comp_id[0]),
 814                 show_pldm_entity_id(__entry->validity_flags, CXL_MMER_VALID_COMPONENT,
 815                                     CXL_MMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
 816                 show_pldm_resource_id(__entry->validity_flags, CXL_MMER_VALID_COMPONENT,
 817                                       CXL_MMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id)
 818         )
 819 );
 820
 821 #define show_poison_trace_type(type)                    \
 822         __print_symbolic(type,                          \
 823         { CXL_POISON_TRACE_LIST,        "List"   },     \
 824         { CXL_POISON_TRACE_INJECT,      "Inject" },     \
 825         { CXL_POISON_TRACE_CLEAR,       "Clear"  })
 826
 827 #define __show_poison_source(source)                          \
 828         __print_symbolic(source,                              \
 829                 { CXL_POISON_SOURCE_UNKNOWN,   "Unknown"  },  \
 830                 { CXL_POISON_SOURCE_EXTERNAL,  "External" },  \
 831                 { CXL_POISON_SOURCE_INTERNAL,  "Internal" },  \
 832                 { CXL_POISON_SOURCE_INJECTED,  "Injected" },  \
 833                 { CXL_POISON_SOURCE_VENDOR,    "Vendor"   })
 834
 835 #define show_poison_source(source)                           \
 836         (((source > CXL_POISON_SOURCE_INJECTED) &&           \
 837          (source != CXL_POISON_SOURCE_VENDOR)) ? "Reserved"  \
 838          : __show_poison_source(source))
 839
 840 #define show_poison_flags(flags)                             \
 841         __print_flags(flags, "|",                            \
 842                 { CXL_POISON_FLAG_MORE,      "More"     },   \
 843                 { CXL_POISON_FLAG_OVERFLOW,  "Overflow"  },  \
 844                 { CXL_POISON_FLAG_SCANNING,  "Scanning"  })
 845
 846 #define __cxl_poison_addr(record)                                       \
 847         (le64_to_cpu(record->address))
 848 #define cxl_poison_record_dpa(record)                                   \
 849         (__cxl_poison_addr(record) & CXL_POISON_START_MASK)
 850 #define cxl_poison_record_source(record)                                \
 851         (__cxl_poison_addr(record)  & CXL_POISON_SOURCE_MASK)
 852 #define cxl_poison_record_dpa_length(record)                            \
 853         (le32_to_cpu(record->length) * CXL_POISON_LEN_MULT)
 854 #define cxl_poison_overflow(flags, time)                                \
 855         (flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0)
 856
 857 TRACE_EVENT(cxl_poison,
 858
 859         TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *cxlr,
 860                  const struct cxl_poison_record *record, u8 flags,
 861                  __le64 overflow_ts, enum cxl_poison_trace_type trace_type),
 862
 863         TP_ARGS(cxlmd, cxlr, record, flags, overflow_ts, trace_type),
 864
 865         TP_STRUCT__entry(
 866                 __string(memdev, dev_name(&cxlmd->dev))
 867                 __string(host, dev_name(cxlmd->dev.parent))
 868                 __field(u64, serial)
 869                 __field(u8, trace_type)
 870                 __string(region, cxlr ? dev_name(&cxlr->dev) : "")
 871                 __field(u64, overflow_ts)
 872                 __field(u64, hpa)
 873                 __field(u64, dpa)
 874                 __field(u32, dpa_length)
 875                 __array(char, uuid, 16)
 876                 __field(u8, source)
 877                 __field(u8, flags)
 878             ),
 879
 880         TP_fast_assign(
 881                 __assign_str(memdev);
 882                 __assign_str(host);
 883                 __entry->serial = cxlmd->cxlds->serial;
 884                 __entry->overflow_ts = cxl_poison_overflow(flags, overflow_ts);
 885                 __entry->dpa = cxl_poison_record_dpa(record);
 886                 __entry->dpa_length = cxl_poison_record_dpa_length(record);
 887                 __entry->source = cxl_poison_record_source(record);
 888                 __entry->trace_type = trace_type;
 889                 __entry->flags = flags;
 890                 if (cxlr) {
 891                         __assign_str(region);
 892                         memcpy(__entry->uuid, &cxlr->params.uuid, 16);
 893                         __entry->hpa = cxl_dpa_to_hpa(cxlr, cxlmd,
 894                                                       __entry->dpa);
 895                 } else {
 896                         __assign_str(region);
 897                         memset(__entry->uuid, 0, 16);
 898                         __entry->hpa = ULLONG_MAX;
 899                 }
 900             ),
 901
 902         TP_printk("memdev=%s host=%s serial=%lld trace_type=%s region=%s "  \
 903                 "region_uuid=%pU hpa=0x%llx dpa=0x%llx dpa_length=0x%x "    \
 904                 "source=%s flags=%s overflow_time=%llu",
 905                 __get_str(memdev),
 906                 __get_str(host),
 907                 __entry->serial,
 908                 show_poison_trace_type(__entry->trace_type),
 909                 __get_str(region),
 910                 __entry->uuid,
 911                 __entry->hpa,
 912                 __entry->dpa,
 913                 __entry->dpa_length,
 914                 show_poison_source(__entry->source),
 915                 show_poison_flags(__entry->flags),
 916                 __entry->overflow_ts
 917         )
 918 );
 919
 920 #endif /* _CXL_EVENTS_H */
 921
 922 #define TRACE_INCLUDE_FILE trace
 923 #include <trace/define_trace.h>