drivers/clk/mediatek/clk-mt2701-mm.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2014 MediaTek Inc.
   4  * Author: Shunli Wang <[email protected]>
   5  */
   6
   7 #include <linux/clk-provider.h>
   8 #include <linux/platform_device.h>
   9
  10 #include "clk-mtk.h"
  11 #include "clk-gate.h"
  12
  13 #include <dt-bindings/clock/mt2701-clk.h>
  14
  15 static const struct mtk_gate_regs disp0_cg_regs = {
  16         .set_ofs = 0x0104,
  17         .clr_ofs = 0x0108,
  18         .sta_ofs = 0x0100,
  19 };
  20
  21 static const struct mtk_gate_regs disp1_cg_regs = {
  22         .set_ofs = 0x0114,
  23         .clr_ofs = 0x0118,
  24         .sta_ofs = 0x0110,
  25 };
  26
  27 #define GATE_DISP0(_id, _name, _parent, _shift) \
  28         GATE_MTK(_id, _name, _parent, &disp0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
  29
  30 #define GATE_DISP1(_id, _name, _parent, _shift) \
  31         GATE_MTK(_id, _name, _parent, &disp1_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
  32
  33 static const struct mtk_gate mm_clks[] = {
  34         GATE_DUMMY(CLK_DUMMY, "mm_dummy"),
  35         GATE_DISP0(CLK_MM_SMI_COMMON, "mm_smi_comm", "mm_sel", 0),
  36         GATE_DISP0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
  37         GATE_DISP0(CLK_MM_CMDQ, "mm_cmdq", "mm_sel", 2),
  38         GATE_DISP0(CLK_MM_MUTEX, "mm_mutex", "mm_sel", 3),
  39         GATE_DISP0(CLK_MM_DISP_COLOR, "mm_disp_color", "mm_sel", 4),
  40         GATE_DISP0(CLK_MM_DISP_BLS, "mm_disp_bls", "mm_sel", 5),
  41         GATE_DISP0(CLK_MM_DISP_WDMA, "mm_disp_wdma", "mm_sel", 6),
  42         GATE_DISP0(CLK_MM_DISP_RDMA, "mm_disp_rdma", "mm_sel", 7),
  43         GATE_DISP0(CLK_MM_DISP_OVL, "mm_disp_ovl", "mm_sel", 8),
  44         GATE_DISP0(CLK_MM_MDP_TDSHP, "mm_mdp_tdshp", "mm_sel", 9),
  45         GATE_DISP0(CLK_MM_MDP_WROT, "mm_mdp_wrot", "mm_sel", 10),
  46         GATE_DISP0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "mm_sel", 11),
  47         GATE_DISP0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 12),
  48         GATE_DISP0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 13),
  49         GATE_DISP0(CLK_MM_MDP_RDMA, "mm_mdp_rdma", "mm_sel", 14),
  50         GATE_DISP0(CLK_MM_MDP_BLS_26M, "mm_mdp_bls_26m", "pwm_sel", 15),
  51         GATE_DISP0(CLK_MM_CAM_MDP, "mm_cam_mdp", "mm_sel", 16),
  52         GATE_DISP0(CLK_MM_FAKE_ENG, "mm_fake_eng", "mm_sel", 17),
  53         GATE_DISP0(CLK_MM_MUTEX_32K, "mm_mutex_32k", "rtc_sel", 18),
  54         GATE_DISP0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19),
  55         GATE_DISP0(CLK_MM_DISP_UFOE, "mm_disp_ufoe", "mm_sel", 20),
  56         GATE_DISP1(CLK_MM_DSI_ENGINE, "mm_dsi_eng", "mm_sel", 0),
  57         GATE_DISP1(CLK_MM_DSI_DIG, "mm_dsi_dig", "dsi0_lntc_dsi", 1),
  58         GATE_DISP1(CLK_MM_DPI_DIGL, "mm_dpi_digl", "dpi0_sel", 2),
  59         GATE_DISP1(CLK_MM_DPI_ENGINE, "mm_dpi_eng", "mm_sel", 3),
  60         GATE_DISP1(CLK_MM_DPI1_DIGL, "mm_dpi1_digl", "dpi1_sel", 4),
  61         GATE_DISP1(CLK_MM_DPI1_ENGINE, "mm_dpi1_eng", "mm_sel", 5),
  62         GATE_DISP1(CLK_MM_TVE_OUTPUT, "mm_tve_output", "tve_sel", 6),
  63         GATE_DISP1(CLK_MM_TVE_INPUT, "mm_tve_input", "dpi0_sel", 7),
  64         GATE_DISP1(CLK_MM_HDMI_PIXEL, "mm_hdmi_pixel", "dpi1_sel", 8),
  65         GATE_DISP1(CLK_MM_HDMI_PLL, "mm_hdmi_pll", "hdmi_sel", 9),
  66         GATE_DISP1(CLK_MM_HDMI_AUDIO, "mm_hdmi_audio", "apll_sel", 10),
  67         GATE_DISP1(CLK_MM_HDMI_SPDIF, "mm_hdmi_spdif", "apll_sel", 11),
  68         GATE_DISP1(CLK_MM_TVE_FMM, "mm_tve_fmm", "mm_sel", 14),
  69 };
  70
  71 static const struct mtk_clk_desc mm_desc = {
  72         .clks = mm_clks,
  73         .num_clks = ARRAY_SIZE(mm_clks),
  74 };
  75
  76 static const struct platform_device_id clk_mt2701_mm_id_table[] = {
  77         { .name = "clk-mt2701-mm", .driver_data = (kernel_ulong_t)&mm_desc },
  78         { /* sentinel */ }
  79 };
  80 MODULE_DEVICE_TABLE(platform, clk_mt2701_mm_id_table);
  81
  82 static struct platform_driver clk_mt2701_mm_drv = {
  83         .probe = mtk_clk_pdev_probe,
  84         .remove = mtk_clk_pdev_remove,
  85         .driver = {
  86                 .name = "clk-mt2701-mm",
  87         },
  88         .id_table = clk_mt2701_mm_id_table,
  89 };
  90 module_platform_driver(clk_mt2701_mm_drv);
  91
  92 MODULE_DESCRIPTION("MediaTek MT2701 MultiMedia ddp clocks driver");
  93 MODULE_LICENSE("GPL");