1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2021 Intel Corporation. */
3 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #include "kvm_cache_regs.h"
13 bool __read_mostly enable_sgx = 1;
14 module_param_named(sgx, enable_sgx, bool, 0444);
16 /* Initial value of guest's virtual SGX_LEPUBKEYHASHn MSRs */
17 static u64 sgx_pubkey_hash[4] __ro_after_init;
20 * ENCLS's memory operands use a fixed segment (DS) and a fixed
21 * address size based on the mode. Related prefixes are ignored.
23 static int sgx_get_encls_gva(struct kvm_vcpu *vcpu, unsigned long offset,
24 int size, int alignment, gva_t *gva)
29 /* Skip vmcs.GUEST_DS retrieval for 64-bit mode to avoid VMREADs. */
31 if (!is_64_bit_mode(vcpu)) {
32 vmx_get_segment(vcpu, &s, VCPU_SREG_DS);
36 if (!IS_ALIGNED(*gva, alignment)) {
38 } else if (likely(is_64_bit_mode(vcpu))) {
39 *gva = vmx_get_untagged_addr(vcpu, *gva, 0);
40 fault = is_noncanonical_address(*gva, vcpu, 0);
43 fault = (s.unusable) ||
44 (s.type != 2 && s.type != 3) ||
46 ((s.base != 0 || s.limit != 0xffffffff) &&
47 (((u64)*gva + size - 1) > s.limit + 1));
50 kvm_inject_gp(vcpu, 0);
51 return fault ? -EINVAL : 0;
54 static void sgx_handle_emulation_failure(struct kvm_vcpu *vcpu, u64 addr,
57 uint64_t data[2] = { addr, size };
59 __kvm_prepare_emulation_failure_exit(vcpu, data, ARRAY_SIZE(data));
62 static int sgx_read_hva(struct kvm_vcpu *vcpu, unsigned long hva, void *data,
65 if (__copy_from_user(data, (void __user *)hva, size)) {
66 sgx_handle_emulation_failure(vcpu, hva, size);
73 static int sgx_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t gva, bool write,
76 struct x86_exception ex;
79 *gpa = kvm_mmu_gva_to_gpa_write(vcpu, gva, &ex);
81 *gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, &ex);
83 if (*gpa == INVALID_GPA) {
84 kvm_inject_emulated_page_fault(vcpu, &ex);
91 static int sgx_gpa_to_hva(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned long *hva)
93 *hva = kvm_vcpu_gfn_to_hva(vcpu, PFN_DOWN(gpa));
94 if (kvm_is_error_hva(*hva)) {
95 sgx_handle_emulation_failure(vcpu, gpa, 1);
99 *hva |= gpa & ~PAGE_MASK;
104 static int sgx_inject_fault(struct kvm_vcpu *vcpu, gva_t gva, int trapnr)
106 struct x86_exception ex;
109 * A non-EPCM #PF indicates a bad userspace HVA. This *should* check
110 * for PFEC.SGX and not assume any #PF on SGX2 originated in the EPC,
111 * but the error code isn't (yet) plumbed through the ENCLS helpers.
113 if (trapnr == PF_VECTOR && !boot_cpu_has(X86_FEATURE_SGX2)) {
114 kvm_prepare_emulation_failure_exit(vcpu);
119 * If the guest thinks it's running on SGX2 hardware, inject an SGX
120 * #PF if the fault matches an EPCM fault signature (#GP on SGX1,
121 * #PF on SGX2). The assumption is that EPCM faults are much more
122 * likely than a bad userspace address.
124 if ((trapnr == PF_VECTOR || !boot_cpu_has(X86_FEATURE_SGX2)) &&
125 guest_cpu_cap_has(vcpu, X86_FEATURE_SGX2)) {
126 memset(&ex, 0, sizeof(ex));
127 ex.vector = PF_VECTOR;
128 ex.error_code = PFERR_PRESENT_MASK | PFERR_WRITE_MASK |
131 ex.error_code_valid = true;
132 ex.nested_page_fault = false;
133 kvm_inject_emulated_page_fault(vcpu, &ex);
135 kvm_inject_gp(vcpu, 0);
140 static int __handle_encls_ecreate(struct kvm_vcpu *vcpu,
141 struct sgx_pageinfo *pageinfo,
142 unsigned long secs_hva,
145 struct sgx_secs *contents = (struct sgx_secs *)pageinfo->contents;
146 struct kvm_cpuid_entry2 *sgx_12_0, *sgx_12_1;
147 u64 attributes, xfrm, size;
152 sgx_12_0 = kvm_find_cpuid_entry_index(vcpu, 0x12, 0);
153 sgx_12_1 = kvm_find_cpuid_entry_index(vcpu, 0x12, 1);
154 if (!sgx_12_0 || !sgx_12_1) {
155 kvm_prepare_emulation_failure_exit(vcpu);
159 miscselect = contents->miscselect;
160 attributes = contents->attributes;
161 xfrm = contents->xfrm;
162 size = contents->size;
164 /* Enforce restriction of access to the PROVISIONKEY. */
165 if (!vcpu->kvm->arch.sgx_provisioning_allowed &&
166 (attributes & SGX_ATTR_PROVISIONKEY)) {
167 if (sgx_12_1->eax & SGX_ATTR_PROVISIONKEY)
168 pr_warn_once("SGX PROVISIONKEY advertised but not allowed\n");
169 kvm_inject_gp(vcpu, 0);
174 * Enforce CPUID restrictions on MISCSELECT, ATTRIBUTES and XFRM. Note
175 * that the allowed XFRM (XFeature Request Mask) isn't strictly bound
176 * by the supported XCR0. FP+SSE *must* be set in XFRM, even if XSAVE
177 * is unsupported, i.e. even if XCR0 itself is completely unsupported.
179 if ((u32)miscselect & ~sgx_12_0->ebx ||
180 (u32)attributes & ~sgx_12_1->eax ||
181 (u32)(attributes >> 32) & ~sgx_12_1->ebx ||
182 (u32)xfrm & ~sgx_12_1->ecx ||
183 (u32)(xfrm >> 32) & ~sgx_12_1->edx ||
184 xfrm & ~(vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE) ||
185 (xfrm & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
186 kvm_inject_gp(vcpu, 0);
190 /* Enforce CPUID restriction on max enclave size. */
191 max_size_log2 = (attributes & SGX_ATTR_MODE64BIT) ? sgx_12_0->edx >> 8 :
193 if (size >= BIT_ULL(max_size_log2)) {
194 kvm_inject_gp(vcpu, 0);
199 * sgx_virt_ecreate() returns:
200 * 1) 0: ECREATE was successful
201 * 2) -EFAULT: ECREATE was run but faulted, and trapnr was set to the
203 * 3) -EINVAL: access_ok() on @secs_hva failed. This should never
204 * happen as KVM checks host addresses at memslot creation.
205 * sgx_virt_ecreate() has already warned in this case.
207 ret = sgx_virt_ecreate(pageinfo, (void __user *)secs_hva, &trapnr);
209 return kvm_skip_emulated_instruction(vcpu);
211 return sgx_inject_fault(vcpu, secs_gva, trapnr);
216 static int handle_encls_ecreate(struct kvm_vcpu *vcpu)
218 gva_t pageinfo_gva, secs_gva;
219 gva_t metadata_gva, contents_gva;
220 gpa_t metadata_gpa, contents_gpa, secs_gpa;
221 unsigned long metadata_hva, contents_hva, secs_hva;
222 struct sgx_pageinfo pageinfo;
223 struct sgx_secs *contents;
224 struct x86_exception ex;
227 if (sgx_get_encls_gva(vcpu, kvm_rbx_read(vcpu), 32, 32, &pageinfo_gva) ||
228 sgx_get_encls_gva(vcpu, kvm_rcx_read(vcpu), 4096, 4096, &secs_gva))
232 * Copy the PAGEINFO to local memory, its pointers need to be
233 * translated, i.e. we need to do a deep copy/translate.
235 r = kvm_read_guest_virt(vcpu, pageinfo_gva, &pageinfo,
236 sizeof(pageinfo), &ex);
237 if (r == X86EMUL_PROPAGATE_FAULT) {
238 kvm_inject_emulated_page_fault(vcpu, &ex);
240 } else if (r != X86EMUL_CONTINUE) {
241 sgx_handle_emulation_failure(vcpu, pageinfo_gva,
246 if (sgx_get_encls_gva(vcpu, pageinfo.metadata, 64, 64, &metadata_gva) ||
247 sgx_get_encls_gva(vcpu, pageinfo.contents, 4096, 4096,
252 * Translate the SECINFO, SOURCE and SECS pointers from GVA to GPA.
253 * Resume the guest on failure to inject a #PF.
255 if (sgx_gva_to_gpa(vcpu, metadata_gva, false, &metadata_gpa) ||
256 sgx_gva_to_gpa(vcpu, contents_gva, false, &contents_gpa) ||
257 sgx_gva_to_gpa(vcpu, secs_gva, true, &secs_gpa))
261 * ...and then to HVA. The order of accesses isn't architectural, i.e.
262 * KVM doesn't have to fully process one address at a time. Exit to
263 * userspace if a GPA is invalid.
265 if (sgx_gpa_to_hva(vcpu, metadata_gpa, &metadata_hva) ||
266 sgx_gpa_to_hva(vcpu, contents_gpa, &contents_hva) ||
267 sgx_gpa_to_hva(vcpu, secs_gpa, &secs_hva))
271 * Copy contents into kernel memory to prevent TOCTOU attack. E.g. the
272 * guest could do ECREATE w/ SECS.SGX_ATTR_PROVISIONKEY=0, and
273 * simultaneously set SGX_ATTR_PROVISIONKEY to bypass the check to
274 * enforce restriction of access to the PROVISIONKEY.
276 contents = (struct sgx_secs *)__get_free_page(GFP_KERNEL);
280 /* Exit to userspace if copying from a host userspace address fails. */
281 if (sgx_read_hva(vcpu, contents_hva, (void *)contents, PAGE_SIZE)) {
282 free_page((unsigned long)contents);
286 pageinfo.metadata = metadata_hva;
287 pageinfo.contents = (u64)contents;
289 r = __handle_encls_ecreate(vcpu, &pageinfo, secs_hva, secs_gva);
291 free_page((unsigned long)contents);
296 static int handle_encls_einit(struct kvm_vcpu *vcpu)
298 unsigned long sig_hva, secs_hva, token_hva, rflags;
299 struct vcpu_vmx *vmx = to_vmx(vcpu);
300 gva_t sig_gva, secs_gva, token_gva;
301 gpa_t sig_gpa, secs_gpa, token_gpa;
304 if (sgx_get_encls_gva(vcpu, kvm_rbx_read(vcpu), 1808, 4096, &sig_gva) ||
305 sgx_get_encls_gva(vcpu, kvm_rcx_read(vcpu), 4096, 4096, &secs_gva) ||
306 sgx_get_encls_gva(vcpu, kvm_rdx_read(vcpu), 304, 512, &token_gva))
310 * Translate the SIGSTRUCT, SECS and TOKEN pointers from GVA to GPA.
311 * Resume the guest on failure to inject a #PF.
313 if (sgx_gva_to_gpa(vcpu, sig_gva, false, &sig_gpa) ||
314 sgx_gva_to_gpa(vcpu, secs_gva, true, &secs_gpa) ||
315 sgx_gva_to_gpa(vcpu, token_gva, false, &token_gpa))
319 * ...and then to HVA. The order of accesses isn't architectural, i.e.
320 * KVM doesn't have to fully process one address at a time. Exit to
321 * userspace if a GPA is invalid. Note, all structures are aligned and
322 * cannot split pages.
324 if (sgx_gpa_to_hva(vcpu, sig_gpa, &sig_hva) ||
325 sgx_gpa_to_hva(vcpu, secs_gpa, &secs_hva) ||
326 sgx_gpa_to_hva(vcpu, token_gpa, &token_hva))
329 ret = sgx_virt_einit((void __user *)sig_hva, (void __user *)token_hva,
330 (void __user *)secs_hva,
331 vmx->msr_ia32_sgxlepubkeyhash, &trapnr);
334 return sgx_inject_fault(vcpu, secs_gva, trapnr);
337 * sgx_virt_einit() returns -EINVAL when access_ok() fails on @sig_hva,
338 * @token_hva or @secs_hva. This should never happen as KVM checks host
339 * addresses at memslot creation. sgx_virt_einit() has already warned
340 * in this case, so just return.
345 rflags = vmx_get_rflags(vcpu) & ~(X86_EFLAGS_CF | X86_EFLAGS_PF |
346 X86_EFLAGS_AF | X86_EFLAGS_SF |
349 rflags |= X86_EFLAGS_ZF;
351 rflags &= ~X86_EFLAGS_ZF;
352 vmx_set_rflags(vcpu, rflags);
354 kvm_rax_write(vcpu, ret);
355 return kvm_skip_emulated_instruction(vcpu);
358 static inline bool encls_leaf_enabled_in_guest(struct kvm_vcpu *vcpu, u32 leaf)
361 * ENCLS generates a #UD if SGX1 isn't supported, i.e. this point will
362 * be reached if and only if the SGX1 leafs are enabled.
364 if (leaf >= ECREATE && leaf <= ETRACK)
367 if (leaf >= EAUG && leaf <= EMODT)
368 return guest_cpu_cap_has(vcpu, X86_FEATURE_SGX2);
373 static inline bool sgx_enabled_in_guest_bios(struct kvm_vcpu *vcpu)
375 const u64 bits = FEAT_CTL_SGX_ENABLED | FEAT_CTL_LOCKED;
377 return (to_vmx(vcpu)->msr_ia32_feature_control & bits) == bits;
380 int handle_encls(struct kvm_vcpu *vcpu)
382 u32 leaf = (u32)kvm_rax_read(vcpu);
384 if (!enable_sgx || !guest_cpu_cap_has(vcpu, X86_FEATURE_SGX) ||
385 !guest_cpu_cap_has(vcpu, X86_FEATURE_SGX1)) {
386 kvm_queue_exception(vcpu, UD_VECTOR);
387 } else if (!encls_leaf_enabled_in_guest(vcpu, leaf) ||
388 !sgx_enabled_in_guest_bios(vcpu) || !is_paging(vcpu)) {
389 kvm_inject_gp(vcpu, 0);
392 return handle_encls_ecreate(vcpu);
394 return handle_encls_einit(vcpu);
395 WARN_ONCE(1, "unexpected exit on ENCLS[%u]", leaf);
396 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
397 vcpu->run->hw.hardware_exit_reason = EXIT_REASON_ENCLS;
403 void setup_default_sgx_lepubkeyhash(void)
406 * Use Intel's default value for Skylake hardware if Launch Control is
407 * not supported, i.e. Intel's hash is hardcoded into silicon, or if
408 * Launch Control is supported and enabled, i.e. mimic the reset value
409 * and let the guest write the MSRs at will. If Launch Control is
410 * supported but disabled, then use the current MSR values as the hash
411 * MSRs exist but are read-only (locked and not writable).
413 if (!enable_sgx || boot_cpu_has(X86_FEATURE_SGX_LC) ||
414 rdmsrl_safe(MSR_IA32_SGXLEPUBKEYHASH0, &sgx_pubkey_hash[0])) {
415 sgx_pubkey_hash[0] = 0xa6053e051270b7acULL;
416 sgx_pubkey_hash[1] = 0x6cfbe8ba8b3b413dULL;
417 sgx_pubkey_hash[2] = 0xc4916d99f2b3735dULL;
418 sgx_pubkey_hash[3] = 0xd4f8c05909f9bb3bULL;
420 /* MSR_IA32_SGXLEPUBKEYHASH0 is read above */
421 rdmsrl(MSR_IA32_SGXLEPUBKEYHASH1, sgx_pubkey_hash[1]);
422 rdmsrl(MSR_IA32_SGXLEPUBKEYHASH2, sgx_pubkey_hash[2]);
423 rdmsrl(MSR_IA32_SGXLEPUBKEYHASH3, sgx_pubkey_hash[3]);
427 void vcpu_setup_sgx_lepubkeyhash(struct kvm_vcpu *vcpu)
429 struct vcpu_vmx *vmx = to_vmx(vcpu);
431 memcpy(vmx->msr_ia32_sgxlepubkeyhash, sgx_pubkey_hash,
432 sizeof(sgx_pubkey_hash));
436 * ECREATE must be intercepted to enforce MISCSELECT, ATTRIBUTES and XFRM
437 * restrictions if the guest's allowed-1 settings diverge from hardware.
439 static bool sgx_intercept_encls_ecreate(struct kvm_vcpu *vcpu)
441 struct kvm_cpuid_entry2 *guest_cpuid;
442 u32 eax, ebx, ecx, edx;
444 if (!vcpu->kvm->arch.sgx_provisioning_allowed)
447 guest_cpuid = kvm_find_cpuid_entry_index(vcpu, 0x12, 0);
451 cpuid_count(0x12, 0, &eax, &ebx, &ecx, &edx);
452 if (guest_cpuid->ebx != ebx || guest_cpuid->edx != edx)
455 guest_cpuid = kvm_find_cpuid_entry_index(vcpu, 0x12, 1);
459 cpuid_count(0x12, 1, &eax, &ebx, &ecx, &edx);
460 if (guest_cpuid->eax != eax || guest_cpuid->ebx != ebx ||
461 guest_cpuid->ecx != ecx || guest_cpuid->edx != edx)
467 void vmx_write_encls_bitmap(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
470 * There is no software enable bit for SGX that is virtualized by
471 * hardware, e.g. there's no CR4.SGXE, so when SGX is disabled in the
472 * guest (either by the host or by the guest's BIOS) but enabled in the
473 * host, trap all ENCLS leafs and inject #UD/#GP as needed to emulate
474 * the expected system behavior for ENCLS.
478 /* Nothing to do if hardware doesn't support SGX */
479 if (!cpu_has_vmx_encls_vmexit())
482 if (guest_cpu_cap_has(vcpu, X86_FEATURE_SGX) &&
483 sgx_enabled_in_guest_bios(vcpu)) {
484 if (guest_cpu_cap_has(vcpu, X86_FEATURE_SGX1)) {
485 bitmap &= ~GENMASK_ULL(ETRACK, ECREATE);
486 if (sgx_intercept_encls_ecreate(vcpu))
487 bitmap |= (1 << ECREATE);
490 if (guest_cpu_cap_has(vcpu, X86_FEATURE_SGX2))
491 bitmap &= ~GENMASK_ULL(EMODT, EAUG);
494 * Trap and execute EINIT if launch control is enabled in the
495 * host using the guest's values for launch control MSRs, even
496 * if the guest's values are fixed to hardware default values.
497 * The MSRs are not loaded/saved on VM-Enter/VM-Exit as writing
498 * the MSRs is extraordinarily expensive.
500 if (boot_cpu_has(X86_FEATURE_SGX_LC))
501 bitmap |= (1 << EINIT);
503 if (!vmcs12 && is_guest_mode(vcpu))
504 vmcs12 = get_vmcs12(vcpu);
505 if (vmcs12 && nested_cpu_has_encls_exit(vmcs12))
506 bitmap |= vmcs12->encls_exiting_bitmap;
508 vmcs_write64(ENCLS_EXITING_BITMAP, bitmap);