1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _X86_MICROCODE_INTERNAL_H
3 #define _X86_MICROCODE_INTERNAL_H
5 #include <linux/earlycpio.h>
6 #include <linux/initrd.h>
9 #include <asm/microcode.h>
24 struct microcode_ops {
25 enum ucode_state (*request_microcode_fw)(int cpu, struct device *dev);
26 void (*microcode_fini_cpu)(int cpu);
29 * The generic 'microcode_core' part guarantees that the callbacks
30 * below run on a target CPU when they are being called.
31 * See also the "Synchronization" section in microcode_core.c.
33 enum ucode_state (*apply_microcode)(int cpu);
34 int (*collect_cpu_info)(int cpu, struct cpu_signature *csig);
35 void (*finalize_late_load)(int result);
36 unsigned int nmi_safe : 1,
40 struct early_load_data {
45 extern struct early_load_data early_data;
46 extern struct ucode_cpu_info ucode_cpu_info[];
47 struct cpio_data find_microcode_in_initrd(const char *path);
49 #define MAX_UCODE_COUNT 128
51 #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
52 #define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
53 #define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
54 #define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
55 #define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
56 #define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
57 #define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
59 #define CPUID_IS(a, b, c, ebx, ecx, edx) \
60 (!(((ebx) ^ (a)) | ((edx) ^ (b)) | ((ecx) ^ (c))))
63 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
64 * x86_cpuid_vendor() gets vendor id for BSP.
66 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
67 * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
69 * x86_cpuid_vendor() gets vendor information directly from CPUID.
71 static inline int x86_cpuid_vendor(void)
74 u32 ebx, ecx = 0, edx;
76 native_cpuid(&eax, &ebx, &ecx, &edx);
78 if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
79 return X86_VENDOR_INTEL;
81 if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
82 return X86_VENDOR_AMD;
84 return X86_VENDOR_UNKNOWN;
87 static inline unsigned int x86_cpuid_family(void)
90 u32 ebx, ecx = 0, edx;
92 native_cpuid(&eax, &ebx, &ecx, &edx);
94 return x86_family(eax);
97 extern bool dis_ucode_ldr;
98 extern bool force_minrev;
100 #ifdef CONFIG_CPU_SUP_AMD
101 void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family);
102 void load_ucode_amd_ap(unsigned int family);
103 int save_microcode_in_initrd_amd(unsigned int family);
104 void reload_ucode_amd(unsigned int cpu);
105 struct microcode_ops *init_amd_microcode(void);
106 void exit_amd_microcode(void);
107 #else /* CONFIG_CPU_SUP_AMD */
108 static inline void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family) { }
109 static inline void load_ucode_amd_ap(unsigned int family) { }
110 static inline int save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
111 static inline void reload_ucode_amd(unsigned int cpu) { }
112 static inline struct microcode_ops *init_amd_microcode(void) { return NULL; }
113 static inline void exit_amd_microcode(void) { }
114 #endif /* !CONFIG_CPU_SUP_AMD */
116 #ifdef CONFIG_CPU_SUP_INTEL
117 void load_ucode_intel_bsp(struct early_load_data *ed);
118 void load_ucode_intel_ap(void);
119 void reload_ucode_intel(void);
120 struct microcode_ops *init_intel_microcode(void);
121 #else /* CONFIG_CPU_SUP_INTEL */
122 static inline void load_ucode_intel_bsp(struct early_load_data *ed) { }
123 static inline void load_ucode_intel_ap(void) { }
124 static inline void reload_ucode_intel(void) { }
125 static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
126 #endif /* !CONFIG_CPU_SUP_INTEL */
128 #endif /* _X86_MICROCODE_INTERNAL_H */