drivers/gpu/drm/gma500/psb_intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <[email protected]>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <[email protected]>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <[email protected]>
  27  */
  28 #include <linux/module.h>
  29 #include <linux/i2c.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_edid.h>
  35 #include "psb_intel_drv.h"
  36 #include <drm/gma_drm.h>
  37 #include "psb_drv.h"
  38 #include "psb_intel_sdvo_regs.h"
  39 #include "psb_intel_reg.h"
  40 #include <linux/kernel.h>
  41
  42 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  43 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  44 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  45 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  46
  47 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  48                          SDVO_TV_MASK)
  49
  50 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  51 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  52 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  53 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char *tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 struct psb_intel_sdvo {
  67         struct gma_encoder base;
  68
  69         struct i2c_adapter *i2c;
  70         u8 slave_addr;
  71
  72         struct i2c_adapter ddc;
  73
  74         /* Register for the SDVO device: SDVOB or SDVOC */
  75         int sdvo_reg;
  76
  77         /* Active outputs controlled by this SDVO output */
  78         uint16_t controlled_output;
  79
  80         /*
  81          * Capabilities of the SDVO device returned by
  82          * i830_sdvo_get_capabilities()
  83          */
  84         struct psb_intel_sdvo_caps caps;
  85
  86         /* Pixel clock limitations reported by the SDVO device, in kHz */
  87         int pixel_clock_min, pixel_clock_max;
  88
  89         /*
  90         * For multiple function SDVO device,
  91         * this is for current attached outputs.
  92         */
  93         uint16_t attached_output;
  94
  95         /**
  96          * This is used to select the color range of RBG outputs in HDMI mode.
  97          * It is only valid when using TMDS encoding and 8 bit per color mode.
  98          */
  99         uint32_t color_range;
 100
 101         /**
 102          * This is set if we're going to treat the device as TV-out.
 103          *
 104          * While we have these nice friendly flags for output types that ought
 105          * to decide this for us, the S-Video output on our HDMI+S-Video card
 106          * shows up as RGB1 (VGA).
 107          */
 108         bool is_tv;
 109
 110         /* This is for current tv format name */
 111         int tv_format_index;
 112
 113         /**
 114          * This is set if we treat the device as HDMI, instead of DVI.
 115          */
 116         bool is_hdmi;
 117         bool has_hdmi_monitor;
 118         bool has_hdmi_audio;
 119
 120         /**
 121          * This is set if we detect output of sdvo device as LVDS and
 122          * have a valid fixed mode to use with the panel.
 123          */
 124         bool is_lvds;
 125
 126         /**
 127          * This is sdvo fixed pannel mode pointer
 128          */
 129         struct drm_display_mode *sdvo_lvds_fixed_mode;
 130
 131         /* DDC bus used by this SDVO encoder */
 132         uint8_t ddc_bus;
 133
 134         /* Input timings for adjusted_mode */
 135         struct psb_intel_sdvo_dtd input_dtd;
 136
 137         /* Saved SDVO output states */
 138         uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
 139 };
 140
 141 struct psb_intel_sdvo_connector {
 142         struct gma_connector base;
 143
 144         /* Mark the type of connector */
 145         uint16_t output_flag;
 146
 147         int force_audio;
 148
 149         /* This contains all current supported TV format */
 150         u8 tv_format_supported[ARRAY_SIZE(tv_format_names)];
 151         int   format_supported_num;
 152         struct drm_property *tv_format;
 153
 154         /* add the property for the SDVO-TV */
 155         struct drm_property *left;
 156         struct drm_property *right;
 157         struct drm_property *top;
 158         struct drm_property *bottom;
 159         struct drm_property *hpos;
 160         struct drm_property *vpos;
 161         struct drm_property *contrast;
 162         struct drm_property *saturation;
 163         struct drm_property *hue;
 164         struct drm_property *sharpness;
 165         struct drm_property *flicker_filter;
 166         struct drm_property *flicker_filter_adaptive;
 167         struct drm_property *flicker_filter_2d;
 168         struct drm_property *tv_chroma_filter;
 169         struct drm_property *tv_luma_filter;
 170         struct drm_property *dot_crawl;
 171
 172         /* add the property for the SDVO-TV/LVDS */
 173         struct drm_property *brightness;
 174
 175         /* Add variable to record current setting for the above property */
 176         u32     left_margin, right_margin, top_margin, bottom_margin;
 177
 178         /* this is to get the range of margin.*/
 179         u32     max_hscan,  max_vscan;
 180         u32     max_hpos, cur_hpos;
 181         u32     max_vpos, cur_vpos;
 182         u32     cur_brightness, max_brightness;
 183         u32     cur_contrast,   max_contrast;
 184         u32     cur_saturation, max_saturation;
 185         u32     cur_hue,        max_hue;
 186         u32     cur_sharpness,  max_sharpness;
 187         u32     cur_flicker_filter,             max_flicker_filter;
 188         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 189         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 190         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 191         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 192         u32     cur_dot_crawl,  max_dot_crawl;
 193 };
 194
 195 static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
 196 {
 197         return container_of(encoder, struct psb_intel_sdvo, base.base);
 198 }
 199
 200 static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 201 {
 202         return container_of(gma_attached_encoder(connector),
 203                             struct psb_intel_sdvo, base);
 204 }
 205
 206 static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
 207 {
 208         return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
 209 }
 210
 211 static bool
 212 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
 213 static bool
 214 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
 215                               struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
 216                               int type);
 217 static bool
 218 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
 219                                    struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
 220
 221 /**
 222  * Writes the SDVOB or SDVOC with the given value, but always writes both
 223  * SDVOB and SDVOC to work around apparent hardware issues (according to
 224  * comments in the BIOS).
 225  */
 226 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
 227 {
 228         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
 229         u32 bval = val, cval = val;
 230         int i, j;
 231         int need_aux = IS_MRST(dev) ? 1 : 0;
 232
 233         for (j = 0; j <= need_aux; j++) {
 234                 if (psb_intel_sdvo->sdvo_reg == SDVOB)
 235                         cval = REG_READ_WITH_AUX(SDVOC, j);
 236                 else
 237                         bval = REG_READ_WITH_AUX(SDVOB, j);
 238
 239                 /*
 240                 * Write the registers twice for luck. Sometimes,
 241                 * writing them only once doesn't appear to 'stick'.
 242                 * The BIOS does this too. Yay, magic
 243                 */
 244                 for (i = 0; i < 2; i++) {
 245                         REG_WRITE_WITH_AUX(SDVOB, bval, j);
 246                         REG_READ_WITH_AUX(SDVOB, j);
 247                         REG_WRITE_WITH_AUX(SDVOC, cval, j);
 248                         REG_READ_WITH_AUX(SDVOC, j);
 249                 }
 250         }
 251 }
 252
 253 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
 254 {
 255         struct i2c_msg msgs[] = {
 256                 {
 257                         .addr = psb_intel_sdvo->slave_addr,
 258                         .flags = 0,
 259                         .len = 1,
 260                         .buf = &addr,
 261                 },
 262                 {
 263                         .addr = psb_intel_sdvo->slave_addr,
 264                         .flags = I2C_M_RD,
 265                         .len = 1,
 266                         .buf = ch,
 267                 }
 268         };
 269         int ret;
 270
 271         if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
 272                 return true;
 273
 274         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 275         return false;
 276 }
 277
 278 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 279 /** Mapping of command numbers to names, for debug output */
 280 static const struct _sdvo_cmd_name {
 281         u8 cmd;
 282         const char *name;
 283 } sdvo_cmd_names[] = {
 284     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 285     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 286     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 287     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 288     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 289     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 290     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 291     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 292     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 293     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 294     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 295     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 296     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 297     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 298     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 299     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 300     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 324     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 325     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 327
 328     /* Add the op code for SDVO enhancements */
 329     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 330     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 331     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 334     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 335     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 344     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 345     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 370     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 371     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 373
 374     /* HDMI op code */
 375     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 376     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 377     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 380     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 381     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 390     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 391     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 392     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 393     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 394     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 395 };
 396
 397 #define IS_SDVOB(reg)   (reg == SDVOB)
 398 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
 399
 400 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 401                                    const void *args, int args_len)
 402 {
 403         int i;
 404
 405         DRM_DEBUG_KMS("%s: W: %02X ",
 406                                 SDVO_NAME(psb_intel_sdvo), cmd);
 407         for (i = 0; i < args_len; i++)
 408                 DRM_DEBUG_KMS("%02X ", ((u8 *)args)[i]);
 409         for (; i < 8; i++)
 410                 DRM_DEBUG_KMS("   ");
 411         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 412                 if (cmd == sdvo_cmd_names[i].cmd) {
 413                         DRM_DEBUG_KMS("(%s)", sdvo_cmd_names[i].name);
 414                         break;
 415                 }
 416         }
 417         if (i == ARRAY_SIZE(sdvo_cmd_names))
 418                 DRM_DEBUG_KMS("(%02X)", cmd);
 419         DRM_DEBUG_KMS("\n");
 420 }
 421
 422 static const char *cmd_status_names[] = {
 423         "Power on",
 424         "Success",
 425         "Not supported",
 426         "Invalid arg",
 427         "Pending",
 428         "Target not specified",
 429         "Scaling not supported"
 430 };
 431
 432 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 433                                  const void *args, int args_len)
 434 {
 435         u8 buf[args_len*2 + 2], status;
 436         struct i2c_msg msgs[args_len + 3];
 437         int i, ret;
 438
 439         psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
 440
 441         for (i = 0; i < args_len; i++) {
 442                 msgs[i].addr = psb_intel_sdvo->slave_addr;
 443                 msgs[i].flags = 0;
 444                 msgs[i].len = 2;
 445                 msgs[i].buf = buf + 2 *i;
 446                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 447                 buf[2*i + 1] = ((u8*)args)[i];
 448         }
 449         msgs[i].addr = psb_intel_sdvo->slave_addr;
 450         msgs[i].flags = 0;
 451         msgs[i].len = 2;
 452         msgs[i].buf = buf + 2*i;
 453         buf[2*i + 0] = SDVO_I2C_OPCODE;
 454         buf[2*i + 1] = cmd;
 455
 456         /* the following two are to read the response */
 457         status = SDVO_I2C_CMD_STATUS;
 458         msgs[i+1].addr = psb_intel_sdvo->slave_addr;
 459         msgs[i+1].flags = 0;
 460         msgs[i+1].len = 1;
 461         msgs[i+1].buf = &status;
 462
 463         msgs[i+2].addr = psb_intel_sdvo->slave_addr;
 464         msgs[i+2].flags = I2C_M_RD;
 465         msgs[i+2].len = 1;
 466         msgs[i+2].buf = &status;
 467
 468         ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
 469         if (ret < 0) {
 470                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 471                 return false;
 472         }
 473         if (ret != i+3) {
 474                 /* failure in I2C transfer */
 475                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 476                 return false;
 477         }
 478
 479         return true;
 480 }
 481
 482 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
 483                                      void *response, int response_len)
 484 {
 485         u8 retry = 5;
 486         u8 status;
 487         int i;
 488
 489         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo));
 490
 491         /*
 492          * The documentation states that all commands will be
 493          * processed within 15µs, and that we need only poll
 494          * the status byte a maximum of 3 times in order for the
 495          * command to be complete.
 496          *
 497          * Check 5 times in case the hardware failed to read the docs.
 498          */
 499         if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 500                                   SDVO_I2C_CMD_STATUS,
 501                                   &status))
 502                 goto log_fail;
 503
 504         while ((status == SDVO_CMD_STATUS_PENDING ||
 505                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) {
 506                 udelay(15);
 507                 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 508                                           SDVO_I2C_CMD_STATUS,
 509                                           &status))
 510                         goto log_fail;
 511         }
 512
 513         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 514                 DRM_DEBUG_KMS("(%s)", cmd_status_names[status]);
 515         else
 516                 DRM_DEBUG_KMS("(??? %d)", status);
 517
 518         if (status != SDVO_CMD_STATUS_SUCCESS)
 519                 goto log_fail;
 520
 521         /* Read the command response */
 522         for (i = 0; i < response_len; i++) {
 523                 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
 524                                           SDVO_I2C_RETURN_0 + i,
 525                                           &((u8 *)response)[i]))
 526                         goto log_fail;
 527                 DRM_DEBUG_KMS(" %02X", ((u8 *)response)[i]);
 528         }
 529         DRM_DEBUG_KMS("\n");
 530         return true;
 531
 532 log_fail:
 533         DRM_DEBUG_KMS("... failed\n");
 534         return false;
 535 }
 536
 537 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 538 {
 539         if (mode->clock >= 100000)
 540                 return 1;
 541         else if (mode->clock >= 50000)
 542                 return 2;
 543         else
 544                 return 4;
 545 }
 546
 547 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
 548                                               u8 ddc_bus)
 549 {
 550         /* This must be the immediately preceding write before the i2c xfer */
 551         return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
 552                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 553                                     &ddc_bus, 1);
 554 }
 555
 556 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
 557 {
 558         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
 559                 return false;
 560
 561         return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
 562 }
 563
 564 static bool
 565 psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
 566 {
 567         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
 568                 return false;
 569
 570         return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
 571 }
 572
 573 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
 574 {
 575         struct psb_intel_sdvo_set_target_input_args targets = {0};
 576         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 577                                     SDVO_CMD_SET_TARGET_INPUT,
 578                                     &targets, sizeof(targets));
 579 }
 580
 581 /**
 582  * Return whether each input is trained.
 583  *
 584  * This function is making an assumption about the layout of the response,
 585  * which should be checked against the docs.
 586  */
 587 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
 588 {
 589         struct psb_intel_sdvo_get_trained_inputs_response response;
 590
 591         BUILD_BUG_ON(sizeof(response) != 1);
 592         if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 593                                   &response, sizeof(response)))
 594                 return false;
 595
 596         *input_1 = response.input0_trained;
 597         *input_2 = response.input1_trained;
 598         return true;
 599 }
 600
 601 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
 602                                           u16 outputs)
 603 {
 604         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 605                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 606                                     &outputs, sizeof(outputs));
 607 }
 608
 609 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
 610                                                int mode)
 611 {
 612         u8 state = SDVO_ENCODER_STATE_ON;
 613
 614         switch (mode) {
 615         case DRM_MODE_DPMS_ON:
 616                 state = SDVO_ENCODER_STATE_ON;
 617                 break;
 618         case DRM_MODE_DPMS_STANDBY:
 619                 state = SDVO_ENCODER_STATE_STANDBY;
 620                 break;
 621         case DRM_MODE_DPMS_SUSPEND:
 622                 state = SDVO_ENCODER_STATE_SUSPEND;
 623                 break;
 624         case DRM_MODE_DPMS_OFF:
 625                 state = SDVO_ENCODER_STATE_OFF;
 626                 break;
 627         }
 628
 629         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 630                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 631 }
 632
 633 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
 634                                                    int *clock_min,
 635                                                    int *clock_max)
 636 {
 637         struct psb_intel_sdvo_pixel_clock_range clocks;
 638
 639         BUILD_BUG_ON(sizeof(clocks) != 4);
 640         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
 641                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 642                                   &clocks, sizeof(clocks)))
 643                 return false;
 644
 645         /* Convert the values from units of 10 kHz to kHz. */
 646         *clock_min = clocks.min * 10;
 647         *clock_max = clocks.max * 10;
 648         return true;
 649 }
 650
 651 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
 652                                          u16 outputs)
 653 {
 654         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 655                                     SDVO_CMD_SET_TARGET_OUTPUT,
 656                                     &outputs, sizeof(outputs));
 657 }
 658
 659 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
 660                                   struct psb_intel_sdvo_dtd *dtd)
 661 {
 662         return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 663                 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 664 }
 665
 666 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 667                                          struct psb_intel_sdvo_dtd *dtd)
 668 {
 669         return psb_intel_sdvo_set_timing(psb_intel_sdvo,
 670                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 671 }
 672
 673 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 674                                          struct psb_intel_sdvo_dtd *dtd)
 675 {
 676         return psb_intel_sdvo_set_timing(psb_intel_sdvo,
 677                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 678 }
 679
 680 static bool
 681 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 682                                          uint16_t clock,
 683                                          uint16_t width,
 684                                          uint16_t height)
 685 {
 686         struct psb_intel_sdvo_preferred_input_timing_args args;
 687
 688         memset(&args, 0, sizeof(args));
 689         args.clock = clock;
 690         args.width = width;
 691         args.height = height;
 692         args.interlace = 0;
 693
 694         if (psb_intel_sdvo->is_lvds &&
 695            (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 696             psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 697                 args.scaled = 1;
 698
 699         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 700                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 701                                     &args, sizeof(args));
 702 }
 703
 704 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
 705                                                   struct psb_intel_sdvo_dtd *dtd)
 706 {
 707         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 708         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 709         return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 710                                     &dtd->part1, sizeof(dtd->part1)) &&
 711                 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 712                                      &dtd->part2, sizeof(dtd->part2));
 713 }
 714
 715 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
 716 {
 717         return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 718 }
 719
 720 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
 721                                          const struct drm_display_mode *mode)
 722 {
 723         uint16_t width, height;
 724         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 725         uint16_t h_sync_offset, v_sync_offset;
 726
 727         width = mode->crtc_hdisplay;
 728         height = mode->crtc_vdisplay;
 729
 730         /* do some mode translations */
 731         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
 732         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 733
 734         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
 735         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 736
 737         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
 738         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
 739
 740         dtd->part1.clock = mode->clock / 10;
 741         dtd->part1.h_active = width & 0xff;
 742         dtd->part1.h_blank = h_blank_len & 0xff;
 743         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 744                 ((h_blank_len >> 8) & 0xf);
 745         dtd->part1.v_active = height & 0xff;
 746         dtd->part1.v_blank = v_blank_len & 0xff;
 747         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 748                 ((v_blank_len >> 8) & 0xf);
 749
 750         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 751         dtd->part2.h_sync_width = h_sync_len & 0xff;
 752         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 753                 (v_sync_len & 0xf);
 754         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 755                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 756                 ((v_sync_len & 0x30) >> 4);
 757
 758         dtd->part2.dtd_flags = 0x18;
 759         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 760                 dtd->part2.dtd_flags |= 0x2;
 761         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 762                 dtd->part2.dtd_flags |= 0x4;
 763
 764         dtd->part2.sdvo_flags = 0;
 765         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 766         dtd->part2.reserved = 0;
 767 }
 768
 769 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 770                                          const struct psb_intel_sdvo_dtd *dtd)
 771 {
 772         mode->hdisplay = dtd->part1.h_active;
 773         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 774         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 775         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 776         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 777         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 778         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 779         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 780
 781         mode->vdisplay = dtd->part1.v_active;
 782         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 783         mode->vsync_start = mode->vdisplay;
 784         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 785         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 786         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 787         mode->vsync_end = mode->vsync_start +
 788                 (dtd->part2.v_sync_off_width & 0xf);
 789         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 790         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 791         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 792
 793         mode->clock = dtd->part1.clock * 10;
 794
 795         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 796         if (dtd->part2.dtd_flags & 0x2)
 797                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 798         if (dtd->part2.dtd_flags & 0x4)
 799                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 800 }
 801
 802 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
 803 {
 804         struct psb_intel_sdvo_encode encode;
 805
 806         BUILD_BUG_ON(sizeof(encode) != 2);
 807         return psb_intel_sdvo_get_value(psb_intel_sdvo,
 808                                   SDVO_CMD_GET_SUPP_ENCODE,
 809                                   &encode, sizeof(encode));
 810 }
 811
 812 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
 813                                   uint8_t mode)
 814 {
 815         return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 816 }
 817
 818 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
 819                                        uint8_t mode)
 820 {
 821         return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 822 }
 823
 824 #if 0
 825 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
 826 {
 827         int i, j;
 828         uint8_t set_buf_index[2];
 829         uint8_t av_split;
 830         uint8_t buf_size;
 831         uint8_t buf[48];
 832         uint8_t *pos;
 833
 834         psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 835
 836         for (i = 0; i <= av_split; i++) {
 837                 set_buf_index[0] = i; set_buf_index[1] = 0;
 838                 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 839                                      set_buf_index, 2);
 840                 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 841                 psb_intel_sdvo_read_response(encoder, &buf_size, 1);
 842
 843                 pos = buf;
 844                 for (j = 0; j <= buf_size; j += 8) {
 845                         psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 846                                              NULL, 0);
 847                         psb_intel_sdvo_read_response(encoder, pos, 8);
 848                         pos += 8;
 849                 }
 850         }
 851 }
 852 #endif
 853
 854 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
 855 {
 856         DRM_INFO("HDMI is not supported yet");
 857
 858         return false;
 859 #if 0
 860         struct dip_infoframe avi_if = {
 861                 .type = DIP_TYPE_AVI,
 862                 .ver = DIP_VERSION_AVI,
 863                 .len = DIP_LEN_AVI,
 864         };
 865         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
 866         uint8_t set_buf_index[2] = { 1, 0 };
 867         uint64_t *data = (uint64_t *)&avi_if;
 868         unsigned i;
 869
 870         intel_dip_infoframe_csum(&avi_if);
 871
 872         if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
 873                                   SDVO_CMD_SET_HBUF_INDEX,
 874                                   set_buf_index, 2))
 875                 return false;
 876
 877         for (i = 0; i < sizeof(avi_if); i += 8) {
 878                 if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
 879                                           SDVO_CMD_SET_HBUF_DATA,
 880                                           data, 8))
 881                         return false;
 882                 data++;
 883         }
 884
 885         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 886                                     SDVO_CMD_SET_HBUF_TXRATE,
 887                                     &tx_rate, 1);
 888 #endif
 889 }
 890
 891 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
 892 {
 893         struct psb_intel_sdvo_tv_format format;
 894         uint32_t format_map;
 895
 896         format_map = 1 << psb_intel_sdvo->tv_format_index;
 897         memset(&format, 0, sizeof(format));
 898         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 899
 900         BUILD_BUG_ON(sizeof(format) != 6);
 901         return psb_intel_sdvo_set_value(psb_intel_sdvo,
 902                                     SDVO_CMD_SET_TV_FORMAT,
 903                                     &format, sizeof(format));
 904 }
 905
 906 static bool
 907 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
 908                                         const struct drm_display_mode *mode)
 909 {
 910         struct psb_intel_sdvo_dtd output_dtd;
 911
 912         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
 913                                           psb_intel_sdvo->attached_output))
 914                 return false;
 915
 916         psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 917         if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
 918                 return false;
 919
 920         return true;
 921 }
 922
 923 static bool
 924 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
 925                                         const struct drm_display_mode *mode,
 926                                         struct drm_display_mode *adjusted_mode)
 927 {
 928         /* Reset the input timing to the screen. Assume always input 0. */
 929         if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
 930                 return false;
 931
 932         if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
 933                                                       mode->clock / 10,
 934                                                       mode->hdisplay,
 935                                                       mode->vdisplay))
 936                 return false;
 937
 938         if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
 939                                                    &psb_intel_sdvo->input_dtd))
 940                 return false;
 941
 942         psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
 943
 944         drm_mode_set_crtcinfo(adjusted_mode, 0);
 945         return true;
 946 }
 947
 948 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 949                                   const struct drm_display_mode *mode,
 950                                   struct drm_display_mode *adjusted_mode)
 951 {
 952         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
 953         int multiplier;
 954
 955         /* We need to construct preferred input timings based on our
 956          * output timings.  To do that, we have to set the output
 957          * timings, even though this isn't really the right place in
 958          * the sequence to do it. Oh well.
 959          */
 960         if (psb_intel_sdvo->is_tv) {
 961                 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
 962                         return false;
 963
 964                 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
 965                                                              mode,
 966                                                              adjusted_mode);
 967         } else if (psb_intel_sdvo->is_lvds) {
 968                 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
 969                                                              psb_intel_sdvo->sdvo_lvds_fixed_mode))
 970                         return false;
 971
 972                 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
 973                                                              mode,
 974                                                              adjusted_mode);
 975         }
 976
 977         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
 978          * SDVO device will factor out the multiplier during mode_set.
 979          */
 980         multiplier = psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
 981         psb_intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
 982
 983         return true;
 984 }
 985
 986 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
 987                                 struct drm_display_mode *mode,
 988                                 struct drm_display_mode *adjusted_mode)
 989 {
 990         struct drm_device *dev = encoder->dev;
 991         struct drm_crtc *crtc = encoder->crtc;
 992         struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
 993         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
 994         u32 sdvox;
 995         struct psb_intel_sdvo_in_out_map in_out;
 996         struct psb_intel_sdvo_dtd input_dtd;
 997         int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode);
 998         int rate;
 999         int need_aux = IS_MRST(dev) ? 1 : 0;
1000
1001         if (!mode)
1002                 return;
1003
1004         /* First, set the input mapping for the first input to our controlled
1005          * output. This is only correct if we're a single-input device, in
1006          * which case the first input is the output from the appropriate SDVO
1007          * channel on the motherboard.  In a two-input device, the first input
1008          * will be SDVOB and the second SDVOC.
1009          */
1010         in_out.in0 = psb_intel_sdvo->attached_output;
1011         in_out.in1 = 0;
1012
1013         psb_intel_sdvo_set_value(psb_intel_sdvo,
1014                              SDVO_CMD_SET_IN_OUT_MAP,
1015                              &in_out, sizeof(in_out));
1016
1017         /* Set the output timings to the screen */
1018         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1019                                           psb_intel_sdvo->attached_output))
1020                 return;
1021
1022         /* We have tried to get input timing in mode_fixup, and filled into
1023          * adjusted_mode.
1024          */
1025         if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1026                 input_dtd = psb_intel_sdvo->input_dtd;
1027         } else {
1028                 /* Set the output timing to the screen */
1029                 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1030                                                   psb_intel_sdvo->attached_output))
1031                         return;
1032
1033                 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1034                 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1035         }
1036
1037         /* Set the input timing to the screen. Assume always input 0. */
1038         if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1039                 return;
1040
1041         if (psb_intel_sdvo->has_hdmi_monitor) {
1042                 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1043                 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1044                                            SDVO_COLORIMETRY_RGB256);
1045                 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1046         } else
1047                 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1048
1049         if (psb_intel_sdvo->is_tv &&
1050             !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1051                 return;
1052
1053         (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1054
1055         switch (pixel_multiplier) {
1056         default:
1057         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1058         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1059         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1060         }
1061         if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1062                 return;
1063
1064         /* Set the SDVO control regs. */
1065         if (need_aux)
1066                 sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1067         else
1068                 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1069
1070         switch (psb_intel_sdvo->sdvo_reg) {
1071         case SDVOB:
1072                 sdvox &= SDVOB_PRESERVE_MASK;
1073                 break;
1074         case SDVOC:
1075                 sdvox &= SDVOC_PRESERVE_MASK;
1076                 break;
1077         }
1078         sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1079
1080         if (gma_crtc->pipe == 1)
1081                 sdvox |= SDVO_PIPE_B_SELECT;
1082         if (psb_intel_sdvo->has_hdmi_audio)
1083                 sdvox |= SDVO_AUDIO_ENABLE;
1084
1085         /* FIXME: Check if this is needed for PSB
1086         sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1087         */
1088
1089         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1090                 sdvox |= SDVO_STALL_SELECT;
1091         psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1092 }
1093
1094 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1095 {
1096         struct drm_device *dev = encoder->dev;
1097         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1098         u32 temp;
1099         int i;
1100         int need_aux = IS_MRST(dev) ? 1 : 0;
1101
1102         switch (mode) {
1103         case DRM_MODE_DPMS_ON:
1104                 DRM_DEBUG("DPMS_ON");
1105                 break;
1106         case DRM_MODE_DPMS_OFF:
1107                 DRM_DEBUG("DPMS_OFF");
1108                 break;
1109         default:
1110                 DRM_DEBUG("DPMS: %d", mode);
1111         }
1112
1113         if (mode != DRM_MODE_DPMS_ON) {
1114                 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1115                 if (0)
1116                         psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1117
1118                 if (mode == DRM_MODE_DPMS_OFF) {
1119                         if (need_aux)
1120                                 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1121                         else
1122                                 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1123
1124                         if ((temp & SDVO_ENABLE) != 0) {
1125                                 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1126                         }
1127                 }
1128         } else {
1129                 bool input1, input2;
1130                 u8 status;
1131
1132                 if (need_aux)
1133                         temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1134                 else
1135                         temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1136
1137                 if ((temp & SDVO_ENABLE) == 0)
1138                         psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1139
1140                 for (i = 0; i < 2; i++)
1141                         gma_wait_for_vblank(dev);
1142
1143                 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1144                 /* Warn if the device reported failure to sync.
1145                  * A lot of SDVO devices fail to notify of sync, but it's
1146                  * a given it the status is a success, we succeeded.
1147                  */
1148                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1149                         DRM_DEBUG_KMS("First %s output reported failure to "
1150                                         "sync\n", SDVO_NAME(psb_intel_sdvo));
1151                 }
1152
1153                 if (0)
1154                         psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1155                 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1156         }
1157         return;
1158 }
1159
1160 static int psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1161                                  struct drm_display_mode *mode)
1162 {
1163         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1164
1165         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1166                 return MODE_NO_DBLESCAN;
1167
1168         if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1169                 return MODE_CLOCK_LOW;
1170
1171         if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1172                 return MODE_CLOCK_HIGH;
1173
1174         if (psb_intel_sdvo->is_lvds) {
1175                 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1176                         return MODE_PANEL;
1177
1178                 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1179                         return MODE_PANEL;
1180         }
1181
1182         return MODE_OK;
1183 }
1184
1185 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1186 {
1187         BUILD_BUG_ON(sizeof(*caps) != 8);
1188         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1189                                   SDVO_CMD_GET_DEVICE_CAPS,
1190                                   caps, sizeof(*caps)))
1191                 return false;
1192
1193         DRM_DEBUG_KMS("SDVO capabilities:\n"
1194                       "  vendor_id: %d\n"
1195                       "  device_id: %d\n"
1196                       "  device_rev_id: %d\n"
1197                       "  sdvo_version_major: %d\n"
1198                       "  sdvo_version_minor: %d\n"
1199                       "  sdvo_inputs_mask: %d\n"
1200                       "  smooth_scaling: %d\n"
1201                       "  sharp_scaling: %d\n"
1202                       "  up_scaling: %d\n"
1203                       "  down_scaling: %d\n"
1204                       "  stall_support: %d\n"
1205                       "  output_flags: %d\n",
1206                       caps->vendor_id,
1207                       caps->device_id,
1208                       caps->device_rev_id,
1209                       caps->sdvo_version_major,
1210                       caps->sdvo_version_minor,
1211                       caps->sdvo_inputs_mask,
1212                       caps->smooth_scaling,
1213                       caps->sharp_scaling,
1214                       caps->up_scaling,
1215                       caps->down_scaling,
1216                       caps->stall_support,
1217                       caps->output_flags);
1218
1219         return true;
1220 }
1221
1222 /* No use! */
1223 #if 0
1224 struct drm_connector* psb_intel_sdvo_find(struct drm_device *dev, int sdvoB)
1225 {
1226         struct drm_connector *connector = NULL;
1227         struct psb_intel_sdvo *iout = NULL;
1228         struct psb_intel_sdvo *sdvo;
1229
1230         /* find the sdvo connector */
1231         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1232                 iout = to_psb_intel_sdvo(connector);
1233
1234                 if (iout->type != INTEL_OUTPUT_SDVO)
1235                         continue;
1236
1237                 sdvo = iout->dev_priv;
1238
1239                 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1240                         return connector;
1241
1242                 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1243                         return connector;
1244
1245         }
1246
1247         return NULL;
1248 }
1249
1250 int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector)
1251 {
1252         u8 response[2];
1253         u8 status;
1254         struct psb_intel_sdvo *psb_intel_sdvo;
1255         DRM_DEBUG_KMS("\n");
1256
1257         if (!connector)
1258                 return 0;
1259
1260         psb_intel_sdvo = to_psb_intel_sdvo(connector);
1261
1262         return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1263                                     &response, 2) && response[0];
1264 }
1265
1266 void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1267 {
1268         u8 response[2];
1269         u8 status;
1270         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(connector);
1271
1272         psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1273         psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1274
1275         if (on) {
1276                 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1277                 status = psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1278
1279                 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1280         } else {
1281                 response[0] = 0;
1282                 response[1] = 0;
1283                 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1284         }
1285
1286         psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1287         psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1288 }
1289 #endif
1290
1291 static bool
1292 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1293 {
1294         /* Is there more than one type of output? */
1295         int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1296         return caps & -caps;
1297 }
1298
1299 static struct edid *
1300 psb_intel_sdvo_get_edid(struct drm_connector *connector)
1301 {
1302         struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1303         return drm_get_edid(connector, &sdvo->ddc);
1304 }
1305
1306 /* Mac mini hack -- use the same DDC as the analog connector */
1307 static struct edid *
1308 psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1309 {
1310         struct drm_psb_private *dev_priv = connector->dev->dev_private;
1311
1312         return drm_get_edid(connector,
1313                             &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1314 }
1315
1316 static enum drm_connector_status
1317 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1318 {
1319         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1320         enum drm_connector_status status;
1321         struct edid *edid;
1322
1323         edid = psb_intel_sdvo_get_edid(connector);
1324
1325         if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1326                 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1327
1328                 /*
1329                  * Don't use the 1 as the argument of DDC bus switch to get
1330                  * the EDID. It is used for SDVO SPD ROM.
1331                  */
1332                 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1333                         psb_intel_sdvo->ddc_bus = ddc;
1334                         edid = psb_intel_sdvo_get_edid(connector);
1335                         if (edid)
1336                                 break;
1337                 }
1338                 /*
1339                  * If we found the EDID on the other bus,
1340                  * assume that is the correct DDC bus.
1341                  */
1342                 if (edid == NULL)
1343                         psb_intel_sdvo->ddc_bus = saved_ddc;
1344         }
1345
1346         /*
1347          * When there is no edid and no monitor is connected with VGA
1348          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1349          */
1350         if (edid == NULL)
1351                 edid = psb_intel_sdvo_get_analog_edid(connector);
1352
1353         status = connector_status_unknown;
1354         if (edid != NULL) {
1355                 /* DDC bus is shared, match EDID to connector type */
1356                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1357                         status = connector_status_connected;
1358                         if (psb_intel_sdvo->is_hdmi) {
1359                                 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1360                                 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1361                         }
1362                 } else
1363                         status = connector_status_disconnected;
1364                 kfree(edid);
1365         }
1366
1367         if (status == connector_status_connected) {
1368                 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1369                 if (psb_intel_sdvo_connector->force_audio)
1370                         psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1371         }
1372
1373         return status;
1374 }
1375
1376 static enum drm_connector_status
1377 psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1378 {
1379         uint16_t response;
1380         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1381         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1382         enum drm_connector_status ret;
1383
1384         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1385                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1386                 return connector_status_unknown;
1387
1388         /* add 30ms delay when the output type might be TV */
1389         if (psb_intel_sdvo->caps.output_flags &
1390             (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1391                 mdelay(30);
1392
1393         if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1394                 return connector_status_unknown;
1395
1396         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1397                       response & 0xff, response >> 8,
1398                       psb_intel_sdvo_connector->output_flag);
1399
1400         if (response == 0)
1401                 return connector_status_disconnected;
1402
1403         psb_intel_sdvo->attached_output = response;
1404
1405         psb_intel_sdvo->has_hdmi_monitor = false;
1406         psb_intel_sdvo->has_hdmi_audio = false;
1407
1408         if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1409                 ret = connector_status_disconnected;
1410         else if (IS_TMDS(psb_intel_sdvo_connector))
1411                 ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1412         else {
1413                 struct edid *edid;
1414
1415                 /* if we have an edid check it matches the connection */
1416                 edid = psb_intel_sdvo_get_edid(connector);
1417                 if (edid == NULL)
1418                         edid = psb_intel_sdvo_get_analog_edid(connector);
1419                 if (edid != NULL) {
1420                         if (edid->input & DRM_EDID_INPUT_DIGITAL)
1421                                 ret = connector_status_disconnected;
1422                         else
1423                                 ret = connector_status_connected;
1424                         kfree(edid);
1425                 } else
1426                         ret = connector_status_connected;
1427         }
1428
1429         /* May update encoder flag for like clock for SDVO TV, etc.*/
1430         if (ret == connector_status_connected) {
1431                 psb_intel_sdvo->is_tv = false;
1432                 psb_intel_sdvo->is_lvds = false;
1433                 psb_intel_sdvo->base.needs_tv_clock = false;
1434
1435                 if (response & SDVO_TV_MASK) {
1436                         psb_intel_sdvo->is_tv = true;
1437                         psb_intel_sdvo->base.needs_tv_clock = true;
1438                 }
1439                 if (response & SDVO_LVDS_MASK)
1440                         psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1441         }
1442
1443         return ret;
1444 }
1445
1446 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1447 {
1448         struct edid *edid;
1449
1450         /* set the bus switch and get the modes */
1451         edid = psb_intel_sdvo_get_edid(connector);
1452
1453         /*
1454          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1455          * link between analog and digital outputs. So, if the regular SDVO
1456          * DDC fails, check to see if the analog output is disconnected, in
1457          * which case we'll look there for the digital DDC data.
1458          */
1459         if (edid == NULL)
1460                 edid = psb_intel_sdvo_get_analog_edid(connector);
1461
1462         if (edid != NULL) {
1463                 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1464                 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1465                 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1466
1467                 if (connector_is_digital == monitor_is_digital) {
1468                         drm_mode_connector_update_edid_property(connector, edid);
1469                         drm_add_edid_modes(connector, edid);
1470                 }
1471
1472                 kfree(edid);
1473         }
1474 }
1475
1476 /*
1477  * Set of SDVO TV modes.
1478  * Note!  This is in reply order (see loop in get_tv_modes).
1479  * XXX: all 60Hz refresh?
1480  */
1481 static const struct drm_display_mode sdvo_tv_modes[] = {
1482         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1483                    416, 0, 200, 201, 232, 233, 0,
1484                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1486                    416, 0, 240, 241, 272, 273, 0,
1487                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1489                    496, 0, 300, 301, 332, 333, 0,
1490                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1492                    736, 0, 350, 351, 382, 383, 0,
1493                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1495                    736, 0, 400, 401, 432, 433, 0,
1496                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1498                    736, 0, 480, 481, 512, 513, 0,
1499                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1501                    800, 0, 480, 481, 512, 513, 0,
1502                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1504                    800, 0, 576, 577, 608, 609, 0,
1505                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1507                    816, 0, 350, 351, 382, 383, 0,
1508                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1510                    816, 0, 400, 401, 432, 433, 0,
1511                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1513                    816, 0, 480, 481, 512, 513, 0,
1514                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1516                    816, 0, 540, 541, 572, 573, 0,
1517                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1519                    816, 0, 576, 577, 608, 609, 0,
1520                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1521         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1522                    864, 0, 576, 577, 608, 609, 0,
1523                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1524         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1525                    896, 0, 600, 601, 632, 633, 0,
1526                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1527         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1528                    928, 0, 624, 625, 656, 657, 0,
1529                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1530         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1531                    1016, 0, 766, 767, 798, 799, 0,
1532                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1533         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1534                    1120, 0, 768, 769, 800, 801, 0,
1535                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1536         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1537                    1376, 0, 1024, 1025, 1056, 1057, 0,
1538                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1539 };
1540
1541 static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1542 {
1543         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1544         struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1545         uint32_t reply = 0, format_map = 0;
1546         int i;
1547
1548         /* Read the list of supported input resolutions for the selected TV
1549          * format.
1550          */
1551         format_map = 1 << psb_intel_sdvo->tv_format_index;
1552         memcpy(&tv_res, &format_map,
1553                min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1554
1555         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1556                 return;
1557
1558         BUILD_BUG_ON(sizeof(tv_res) != 3);
1559         if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1560                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1561                                   &tv_res, sizeof(tv_res)))
1562                 return;
1563         if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1564                 return;
1565
1566         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1567                 if (reply & (1 << i)) {
1568                         struct drm_display_mode *nmode;
1569                         nmode = drm_mode_duplicate(connector->dev,
1570                                                    &sdvo_tv_modes[i]);
1571                         if (nmode)
1572                                 drm_mode_probed_add(connector, nmode);
1573                 }
1574 }
1575
1576 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1577 {
1578         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1579         struct drm_psb_private *dev_priv = connector->dev->dev_private;
1580         struct drm_display_mode *newmode;
1581
1582         /*
1583          * Attempt to get the mode list from DDC.
1584          * Assume that the preferred modes are
1585          * arranged in priority order.
1586          */
1587         psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1588         if (list_empty(&connector->probed_modes) == false)
1589                 goto end;
1590
1591         /* Fetch modes from VBT */
1592         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1593                 newmode = drm_mode_duplicate(connector->dev,
1594                                              dev_priv->sdvo_lvds_vbt_mode);
1595                 if (newmode != NULL) {
1596                         /* Guarantee the mode is preferred */
1597                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1598                                          DRM_MODE_TYPE_DRIVER);
1599                         drm_mode_probed_add(connector, newmode);
1600                 }
1601         }
1602
1603 end:
1604         list_for_each_entry(newmode, &connector->probed_modes, head) {
1605                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1606                         psb_intel_sdvo->sdvo_lvds_fixed_mode =
1607                                 drm_mode_duplicate(connector->dev, newmode);
1608
1609                         drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1610                                               0);
1611
1612                         psb_intel_sdvo->is_lvds = true;
1613                         break;
1614                 }
1615         }
1616
1617 }
1618
1619 static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1620 {
1621         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1622
1623         if (IS_TV(psb_intel_sdvo_connector))
1624                 psb_intel_sdvo_get_tv_modes(connector);
1625         else if (IS_LVDS(psb_intel_sdvo_connector))
1626                 psb_intel_sdvo_get_lvds_modes(connector);
1627         else
1628                 psb_intel_sdvo_get_ddc_modes(connector);
1629
1630         return !list_empty(&connector->probed_modes);
1631 }
1632
1633 static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1634 {
1635         drm_connector_unregister(connector);
1636         drm_connector_cleanup(connector);
1637         kfree(connector);
1638 }
1639
1640 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1641 {
1642         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1643         struct edid *edid;
1644         bool has_audio = false;
1645
1646         if (!psb_intel_sdvo->is_hdmi)
1647                 return false;
1648
1649         edid = psb_intel_sdvo_get_edid(connector);
1650         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1651                 has_audio = drm_detect_monitor_audio(edid);
1652
1653         return has_audio;
1654 }
1655
1656 static int
1657 psb_intel_sdvo_set_property(struct drm_connector *connector,
1658                         struct drm_property *property,
1659                         uint64_t val)
1660 {
1661         struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1662         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1663         struct drm_psb_private *dev_priv = connector->dev->dev_private;
1664         uint16_t temp_value;
1665         uint8_t cmd;
1666         int ret;
1667
1668         ret = drm_object_property_set_value(&connector->base, property, val);
1669         if (ret)
1670                 return ret;
1671
1672         if (property == dev_priv->force_audio_property) {
1673                 int i = val;
1674                 bool has_audio;
1675
1676                 if (i == psb_intel_sdvo_connector->force_audio)
1677                         return 0;
1678
1679                 psb_intel_sdvo_connector->force_audio = i;
1680
1681                 if (i == 0)
1682                         has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1683                 else
1684                         has_audio = i > 0;
1685
1686                 if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1687                         return 0;
1688
1689                 psb_intel_sdvo->has_hdmi_audio = has_audio;
1690                 goto done;
1691         }
1692
1693         if (property == dev_priv->broadcast_rgb_property) {
1694                 if (val == !!psb_intel_sdvo->color_range)
1695                         return 0;
1696
1697                 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1698                 goto done;
1699         }
1700
1701 #define CHECK_PROPERTY(name, NAME) \
1702         if (psb_intel_sdvo_connector->name == property) { \
1703                 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1704                 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1705                 cmd = SDVO_CMD_SET_##NAME; \
1706                 psb_intel_sdvo_connector->cur_##name = temp_value; \
1707                 goto set_value; \
1708         }
1709
1710         if (property == psb_intel_sdvo_connector->tv_format) {
1711                 if (val >= ARRAY_SIZE(tv_format_names))
1712                         return -EINVAL;
1713
1714                 if (psb_intel_sdvo->tv_format_index ==
1715                     psb_intel_sdvo_connector->tv_format_supported[val])
1716                         return 0;
1717
1718                 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1719                 goto done;
1720         } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1721                 temp_value = val;
1722                 if (psb_intel_sdvo_connector->left == property) {
1723                         drm_object_property_set_value(&connector->base,
1724                                                          psb_intel_sdvo_connector->right, val);
1725                         if (psb_intel_sdvo_connector->left_margin == temp_value)
1726                                 return 0;
1727
1728                         psb_intel_sdvo_connector->left_margin = temp_value;
1729                         psb_intel_sdvo_connector->right_margin = temp_value;
1730                         temp_value = psb_intel_sdvo_connector->max_hscan -
1731                                 psb_intel_sdvo_connector->left_margin;
1732                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1733                         goto set_value;
1734                 } else if (psb_intel_sdvo_connector->right == property) {
1735                         drm_object_property_set_value(&connector->base,
1736                                                          psb_intel_sdvo_connector->left, val);
1737                         if (psb_intel_sdvo_connector->right_margin == temp_value)
1738                                 return 0;
1739
1740                         psb_intel_sdvo_connector->left_margin = temp_value;
1741                         psb_intel_sdvo_connector->right_margin = temp_value;
1742                         temp_value = psb_intel_sdvo_connector->max_hscan -
1743                                 psb_intel_sdvo_connector->left_margin;
1744                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1745                         goto set_value;
1746                 } else if (psb_intel_sdvo_connector->top == property) {
1747                         drm_object_property_set_value(&connector->base,
1748                                                          psb_intel_sdvo_connector->bottom, val);
1749                         if (psb_intel_sdvo_connector->top_margin == temp_value)
1750                                 return 0;
1751
1752                         psb_intel_sdvo_connector->top_margin = temp_value;
1753                         psb_intel_sdvo_connector->bottom_margin = temp_value;
1754                         temp_value = psb_intel_sdvo_connector->max_vscan -
1755                                 psb_intel_sdvo_connector->top_margin;
1756                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1757                         goto set_value;
1758                 } else if (psb_intel_sdvo_connector->bottom == property) {
1759                         drm_object_property_set_value(&connector->base,
1760                                                          psb_intel_sdvo_connector->top, val);
1761                         if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1762                                 return 0;
1763
1764                         psb_intel_sdvo_connector->top_margin = temp_value;
1765                         psb_intel_sdvo_connector->bottom_margin = temp_value;
1766                         temp_value = psb_intel_sdvo_connector->max_vscan -
1767                                 psb_intel_sdvo_connector->top_margin;
1768                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1769                         goto set_value;
1770                 }
1771                 CHECK_PROPERTY(hpos, HPOS)
1772                 CHECK_PROPERTY(vpos, VPOS)
1773                 CHECK_PROPERTY(saturation, SATURATION)
1774                 CHECK_PROPERTY(contrast, CONTRAST)
1775                 CHECK_PROPERTY(hue, HUE)
1776                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1777                 CHECK_PROPERTY(sharpness, SHARPNESS)
1778                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1779                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1780                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1781                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1782                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1783                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1784         }
1785
1786         return -EINVAL; /* unknown property */
1787
1788 set_value:
1789         if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1790                 return -EIO;
1791
1792
1793 done:
1794         if (psb_intel_sdvo->base.base.crtc) {
1795                 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1796                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1797                                          crtc->y, crtc->primary->fb);
1798         }
1799
1800         return 0;
1801 #undef CHECK_PROPERTY
1802 }
1803
1804 static void psb_intel_sdvo_save(struct drm_connector *connector)
1805 {
1806         struct drm_device *dev = connector->dev;
1807         struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
1808         struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
1809
1810         sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1811 }
1812
1813 static void psb_intel_sdvo_restore(struct drm_connector *connector)
1814 {
1815         struct drm_device *dev = connector->dev;
1816         struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
1817         struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1818         struct drm_crtc *crtc = encoder->crtc;
1819
1820         REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1821
1822         /* Force a full mode set on the crtc. We're supposed to have the
1823            mode_config lock already. */
1824         if (connector->status == connector_status_connected)
1825                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1826                                          NULL);
1827 }
1828
1829 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1830         .dpms = psb_intel_sdvo_dpms,
1831         .mode_fixup = psb_intel_sdvo_mode_fixup,
1832         .prepare = gma_encoder_prepare,
1833         .mode_set = psb_intel_sdvo_mode_set,
1834         .commit = gma_encoder_commit,
1835 };
1836
1837 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1838         .dpms = drm_helper_connector_dpms,
1839         .detect = psb_intel_sdvo_detect,
1840         .fill_modes = drm_helper_probe_single_connector_modes,
1841         .set_property = psb_intel_sdvo_set_property,
1842         .destroy = psb_intel_sdvo_destroy,
1843 };
1844
1845 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1846         .get_modes = psb_intel_sdvo_get_modes,
1847         .mode_valid = psb_intel_sdvo_mode_valid,
1848         .best_encoder = gma_best_encoder,
1849 };
1850
1851 static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1852 {
1853         struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1854
1855         if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1856                 drm_mode_destroy(encoder->dev,
1857                                  psb_intel_sdvo->sdvo_lvds_fixed_mode);
1858
1859         i2c_del_adapter(&psb_intel_sdvo->ddc);
1860         gma_encoder_destroy(encoder);
1861 }
1862
1863 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1864         .destroy = psb_intel_sdvo_enc_destroy,
1865 };
1866
1867 static void
1868 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1869 {
1870         /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1871          * We need to figure out if this is true for all available poulsbo
1872          * hardware, or if we need to fiddle with the guessing code above.
1873          * The problem might go away if we can parse sdvo mappings from bios */
1874         sdvo->ddc_bus = 2;
1875
1876 #if 0
1877         uint16_t mask = 0;
1878         unsigned int num_bits;
1879
1880         /* Make a mask of outputs less than or equal to our own priority in the
1881          * list.
1882          */
1883         switch (sdvo->controlled_output) {
1884         case SDVO_OUTPUT_LVDS1:
1885                 mask |= SDVO_OUTPUT_LVDS1;
1886         case SDVO_OUTPUT_LVDS0:
1887                 mask |= SDVO_OUTPUT_LVDS0;
1888         case SDVO_OUTPUT_TMDS1:
1889                 mask |= SDVO_OUTPUT_TMDS1;
1890         case SDVO_OUTPUT_TMDS0:
1891                 mask |= SDVO_OUTPUT_TMDS0;
1892         case SDVO_OUTPUT_RGB1:
1893                 mask |= SDVO_OUTPUT_RGB1;
1894         case SDVO_OUTPUT_RGB0:
1895                 mask |= SDVO_OUTPUT_RGB0;
1896                 break;
1897         }
1898
1899         /* Count bits to find what number we are in the priority list. */
1900         mask &= sdvo->caps.output_flags;
1901         num_bits = hweight16(mask);
1902         /* If more than 3 outputs, default to DDC bus 3 for now. */
1903         if (num_bits > 3)
1904                 num_bits = 3;
1905
1906         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1907         sdvo->ddc_bus = 1 << num_bits;
1908 #endif
1909 }
1910
1911 /**
1912  * Choose the appropriate DDC bus for control bus switch command for this
1913  * SDVO output based on the controlled output.
1914  *
1915  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1916  * outputs, then LVDS outputs.
1917  */
1918 static void
1919 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1920                           struct psb_intel_sdvo *sdvo, u32 reg)
1921 {
1922         struct sdvo_device_mapping *mapping;
1923
1924         if (IS_SDVOB(reg))
1925                 mapping = &(dev_priv->sdvo_mappings[0]);
1926         else
1927                 mapping = &(dev_priv->sdvo_mappings[1]);
1928
1929         if (mapping->initialized)
1930                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1931         else
1932                 psb_intel_sdvo_guess_ddc_bus(sdvo);
1933 }
1934
1935 static void
1936 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1937                           struct psb_intel_sdvo *sdvo, u32 reg)
1938 {
1939         struct sdvo_device_mapping *mapping;
1940         u8 pin, speed;
1941
1942         if (IS_SDVOB(reg))
1943                 mapping = &dev_priv->sdvo_mappings[0];
1944         else
1945                 mapping = &dev_priv->sdvo_mappings[1];
1946
1947         pin = GMBUS_PORT_DPB;
1948         speed = GMBUS_RATE_1MHZ >> 8;
1949         if (mapping->initialized) {
1950                 pin = mapping->i2c_pin;
1951                 speed = mapping->i2c_speed;
1952         }
1953
1954         if (pin < GMBUS_NUM_PORTS) {
1955                 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1956                 gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1957                 gma_intel_gmbus_force_bit(sdvo->i2c, true);
1958         } else
1959                 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1960 }
1961
1962 static bool
1963 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1964 {
1965         return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
1966 }
1967
1968 static u8
1969 psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1970 {
1971         struct drm_psb_private *dev_priv = dev->dev_private;
1972         struct sdvo_device_mapping *my_mapping, *other_mapping;
1973
1974         if (IS_SDVOB(sdvo_reg)) {
1975                 my_mapping = &dev_priv->sdvo_mappings[0];
1976                 other_mapping = &dev_priv->sdvo_mappings[1];
1977         } else {
1978                 my_mapping = &dev_priv->sdvo_mappings[1];
1979                 other_mapping = &dev_priv->sdvo_mappings[0];
1980         }
1981
1982         /* If the BIOS described our SDVO device, take advantage of it. */
1983         if (my_mapping->slave_addr)
1984                 return my_mapping->slave_addr;
1985
1986         /* If the BIOS only described a different SDVO device, use the
1987          * address that it isn't using.
1988          */
1989         if (other_mapping->slave_addr) {
1990                 if (other_mapping->slave_addr == 0x70)
1991                         return 0x72;
1992                 else
1993                         return 0x70;
1994         }
1995
1996         /* No SDVO device info is found for another DVO port,
1997          * so use mapping assumption we had before BIOS parsing.
1998          */
1999         if (IS_SDVOB(sdvo_reg))
2000                 return 0x70;
2001         else
2002                 return 0x72;
2003 }
2004
2005 static void
2006 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
2007                           struct psb_intel_sdvo *encoder)
2008 {
2009         drm_connector_init(encoder->base.base.dev,
2010                            &connector->base.base,
2011                            &psb_intel_sdvo_connector_funcs,
2012                            connector->base.base.connector_type);
2013
2014         drm_connector_helper_add(&connector->base.base,
2015                                  &psb_intel_sdvo_connector_helper_funcs);
2016
2017         connector->base.base.interlace_allowed = 0;
2018         connector->base.base.doublescan_allowed = 0;
2019         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2020
2021         connector->base.save = psb_intel_sdvo_save;
2022         connector->base.restore = psb_intel_sdvo_restore;
2023
2024         gma_connector_attach_encoder(&connector->base, &encoder->base);
2025         drm_connector_register(&connector->base.base);
2026 }
2027
2028 static void
2029 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
2030 {
2031         /* FIXME: We don't support HDMI at the moment
2032         struct drm_device *dev = connector->base.base.dev;
2033
2034         intel_attach_force_audio_property(&connector->base.base);
2035         intel_attach_broadcast_rgb_property(&connector->base.base);
2036         */
2037 }
2038
2039 static bool
2040 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2041 {
2042         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2043         struct drm_connector *connector;
2044         struct gma_connector *intel_connector;
2045         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2046
2047         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2048         if (!psb_intel_sdvo_connector)
2049                 return false;
2050
2051         if (device == 0) {
2052                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2053                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2054         } else if (device == 1) {
2055                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2056                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2057         }
2058
2059         intel_connector = &psb_intel_sdvo_connector->base;
2060         connector = &intel_connector->base;
2061         // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2062         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2063         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2064
2065         if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
2066                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2067                 psb_intel_sdvo->is_hdmi = true;
2068         }
2069         psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2070                                        (1 << INTEL_ANALOG_CLONE_BIT));
2071
2072         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2073         if (psb_intel_sdvo->is_hdmi)
2074                 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
2075
2076         return true;
2077 }
2078
2079 static bool
2080 psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
2081 {
2082         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2083         struct drm_connector *connector;
2084         struct gma_connector *intel_connector;
2085         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2086
2087         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2088         if (!psb_intel_sdvo_connector)
2089                 return false;
2090
2091         intel_connector = &psb_intel_sdvo_connector->base;
2092         connector = &intel_connector->base;
2093         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2094         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2095
2096         psb_intel_sdvo->controlled_output |= type;
2097         psb_intel_sdvo_connector->output_flag = type;
2098
2099         psb_intel_sdvo->is_tv = true;
2100         psb_intel_sdvo->base.needs_tv_clock = true;
2101         psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2102
2103         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2104
2105         if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2106                 goto err;
2107
2108         if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2109                 goto err;
2110
2111         return true;
2112
2113 err:
2114         psb_intel_sdvo_destroy(connector);
2115         return false;
2116 }
2117
2118 static bool
2119 psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2120 {
2121         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2122         struct drm_connector *connector;
2123         struct gma_connector *intel_connector;
2124         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2125
2126         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2127         if (!psb_intel_sdvo_connector)
2128                 return false;
2129
2130         intel_connector = &psb_intel_sdvo_connector->base;
2131         connector = &intel_connector->base;
2132         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2133         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2134         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2135
2136         if (device == 0) {
2137                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2138                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2139         } else if (device == 1) {
2140                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2141                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2142         }
2143
2144         psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2145                                        (1 << INTEL_ANALOG_CLONE_BIT));
2146
2147         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2148                                   psb_intel_sdvo);
2149         return true;
2150 }
2151
2152 static bool
2153 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2154 {
2155         struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2156         struct drm_connector *connector;
2157         struct gma_connector *intel_connector;
2158         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2159
2160         psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2161         if (!psb_intel_sdvo_connector)
2162                 return false;
2163
2164         intel_connector = &psb_intel_sdvo_connector->base;
2165         connector = &intel_connector->base;
2166         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2167         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2168
2169         if (device == 0) {
2170                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2171                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2172         } else if (device == 1) {
2173                 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2174                 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2175         }
2176
2177         psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2178                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2179
2180         psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2181         if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2182                 goto err;
2183
2184         return true;
2185
2186 err:
2187         psb_intel_sdvo_destroy(connector);
2188         return false;
2189 }
2190
2191 static bool
2192 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2193 {
2194         psb_intel_sdvo->is_tv = false;
2195         psb_intel_sdvo->base.needs_tv_clock = false;
2196         psb_intel_sdvo->is_lvds = false;
2197
2198         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2199
2200         if (flags & SDVO_OUTPUT_TMDS0)
2201                 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2202                         return false;
2203
2204         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2205                 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2206                         return false;
2207
2208         /* TV has no XXX1 function block */
2209         if (flags & SDVO_OUTPUT_SVID0)
2210                 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2211                         return false;
2212
2213         if (flags & SDVO_OUTPUT_CVBS0)
2214                 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2215                         return false;
2216
2217         if (flags & SDVO_OUTPUT_RGB0)
2218                 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2219                         return false;
2220
2221         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2222                 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2223                         return false;
2224
2225         if (flags & SDVO_OUTPUT_LVDS0)
2226                 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2227                         return false;
2228
2229         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2230                 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2231                         return false;
2232
2233         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2234                 unsigned char bytes[2];
2235
2236                 psb_intel_sdvo->controlled_output = 0;
2237                 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2238                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2239                               SDVO_NAME(psb_intel_sdvo),
2240                               bytes[0], bytes[1]);
2241                 return false;
2242         }
2243         psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2244
2245         return true;
2246 }
2247
2248 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2249                                           struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2250                                           int type)
2251 {
2252         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2253         struct psb_intel_sdvo_tv_format format;
2254         uint32_t format_map, i;
2255
2256         if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2257                 return false;
2258
2259         BUILD_BUG_ON(sizeof(format) != 6);
2260         if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2261                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2262                                   &format, sizeof(format)))
2263                 return false;
2264
2265         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2266
2267         if (format_map == 0)
2268                 return false;
2269
2270         psb_intel_sdvo_connector->format_supported_num = 0;
2271         for (i = 0 ; i < ARRAY_SIZE(tv_format_names); i++)
2272                 if (format_map & (1 << i))
2273                         psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2274
2275
2276         psb_intel_sdvo_connector->tv_format =
2277                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2278                                             "mode", psb_intel_sdvo_connector->format_supported_num);
2279         if (!psb_intel_sdvo_connector->tv_format)
2280                 return false;
2281
2282         for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2283                 drm_property_add_enum(
2284                                 psb_intel_sdvo_connector->tv_format, i,
2285                                 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2286
2287         psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2288         drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2289                                       psb_intel_sdvo_connector->tv_format, 0);
2290         return true;
2291
2292 }
2293
2294 #define ENHANCEMENT(name, NAME) do { \
2295         if (enhancements.name) { \
2296                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2297                     !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2298                         return false; \
2299                 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2300                 psb_intel_sdvo_connector->cur_##name = response; \
2301                 psb_intel_sdvo_connector->name = \
2302                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2303                 if (!psb_intel_sdvo_connector->name) return false; \
2304                 drm_object_attach_property(&connector->base, \
2305                                               psb_intel_sdvo_connector->name, \
2306                                               psb_intel_sdvo_connector->cur_##name); \
2307                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2308                               data_value[0], data_value[1], response); \
2309         } \
2310 } while(0)
2311
2312 static bool
2313 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2314                                       struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2315                                       struct psb_intel_sdvo_enhancements_reply enhancements)
2316 {
2317         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2318         struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2319         uint16_t response, data_value[2];
2320
2321         /* when horizontal overscan is supported, Add the left/right  property */
2322         if (enhancements.overscan_h) {
2323                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2324                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2325                                           &data_value, 4))
2326                         return false;
2327
2328                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2329                                           SDVO_CMD_GET_OVERSCAN_H,
2330                                           &response, 2))
2331                         return false;
2332
2333                 psb_intel_sdvo_connector->max_hscan = data_value[0];
2334                 psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2335                 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2336                 psb_intel_sdvo_connector->left =
2337                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2338                 if (!psb_intel_sdvo_connector->left)
2339                         return false;
2340
2341                 drm_object_attach_property(&connector->base,
2342                                               psb_intel_sdvo_connector->left,
2343                                               psb_intel_sdvo_connector->left_margin);
2344
2345                 psb_intel_sdvo_connector->right =
2346                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2347                 if (!psb_intel_sdvo_connector->right)
2348                         return false;
2349
2350                 drm_object_attach_property(&connector->base,
2351                                               psb_intel_sdvo_connector->right,
2352                                               psb_intel_sdvo_connector->right_margin);
2353                 DRM_DEBUG_KMS("h_overscan: max %d, "
2354                               "default %d, current %d\n",
2355                               data_value[0], data_value[1], response);
2356         }
2357
2358         if (enhancements.overscan_v) {
2359                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2360                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2361                                           &data_value, 4))
2362                         return false;
2363
2364                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2365                                           SDVO_CMD_GET_OVERSCAN_V,
2366                                           &response, 2))
2367                         return false;
2368
2369                 psb_intel_sdvo_connector->max_vscan = data_value[0];
2370                 psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2371                 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2372                 psb_intel_sdvo_connector->top =
2373                         drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2374                 if (!psb_intel_sdvo_connector->top)
2375                         return false;
2376
2377                 drm_object_attach_property(&connector->base,
2378                                               psb_intel_sdvo_connector->top,
2379                                               psb_intel_sdvo_connector->top_margin);
2380
2381                 psb_intel_sdvo_connector->bottom =
2382                         drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2383                 if (!psb_intel_sdvo_connector->bottom)
2384                         return false;
2385
2386                 drm_object_attach_property(&connector->base,
2387                                               psb_intel_sdvo_connector->bottom,
2388                                               psb_intel_sdvo_connector->bottom_margin);
2389                 DRM_DEBUG_KMS("v_overscan: max %d, "
2390                               "default %d, current %d\n",
2391                               data_value[0], data_value[1], response);
2392         }
2393
2394         ENHANCEMENT(hpos, HPOS);
2395         ENHANCEMENT(vpos, VPOS);
2396         ENHANCEMENT(saturation, SATURATION);
2397         ENHANCEMENT(contrast, CONTRAST);
2398         ENHANCEMENT(hue, HUE);
2399         ENHANCEMENT(sharpness, SHARPNESS);
2400         ENHANCEMENT(brightness, BRIGHTNESS);
2401         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2402         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2403         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2404         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2405         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2406
2407         if (enhancements.dot_crawl) {
2408                 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2409                         return false;
2410
2411                 psb_intel_sdvo_connector->max_dot_crawl = 1;
2412                 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2413                 psb_intel_sdvo_connector->dot_crawl =
2414                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2415                 if (!psb_intel_sdvo_connector->dot_crawl)
2416                         return false;
2417
2418                 drm_object_attach_property(&connector->base,
2419                                               psb_intel_sdvo_connector->dot_crawl,
2420                                               psb_intel_sdvo_connector->cur_dot_crawl);
2421                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2422         }
2423
2424         return true;
2425 }
2426
2427 static bool
2428 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2429                                         struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2430                                         struct psb_intel_sdvo_enhancements_reply enhancements)
2431 {
2432         struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2433         struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2434         uint16_t response, data_value[2];
2435
2436         ENHANCEMENT(brightness, BRIGHTNESS);
2437
2438         return true;
2439 }
2440 #undef ENHANCEMENT
2441
2442 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2443                                                struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2444 {
2445         union {
2446                 struct psb_intel_sdvo_enhancements_reply reply;
2447                 uint16_t response;
2448         } enhancements;
2449
2450         BUILD_BUG_ON(sizeof(enhancements) != 2);
2451
2452         enhancements.response = 0;
2453         psb_intel_sdvo_get_value(psb_intel_sdvo,
2454                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2455                              &enhancements, sizeof(enhancements));
2456         if (enhancements.response == 0) {
2457                 DRM_DEBUG_KMS("No enhancement is supported\n");
2458                 return true;
2459         }
2460
2461         if (IS_TV(psb_intel_sdvo_connector))
2462                 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2463         else if(IS_LVDS(psb_intel_sdvo_connector))
2464                 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2465         else
2466                 return true;
2467 }
2468
2469 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2470                                      struct i2c_msg *msgs,
2471                                      int num)
2472 {
2473         struct psb_intel_sdvo *sdvo = adapter->algo_data;
2474
2475         if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2476                 return -EIO;
2477
2478         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2479 }
2480
2481 static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2482 {
2483         struct psb_intel_sdvo *sdvo = adapter->algo_data;
2484         return sdvo->i2c->algo->functionality(sdvo->i2c);
2485 }
2486
2487 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2488         .master_xfer    = psb_intel_sdvo_ddc_proxy_xfer,
2489         .functionality  = psb_intel_sdvo_ddc_proxy_func
2490 };
2491
2492 static bool
2493 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2494                           struct drm_device *dev)
2495 {
2496         sdvo->ddc.owner = THIS_MODULE;
2497         sdvo->ddc.class = I2C_CLASS_DDC;
2498         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2499         sdvo->ddc.dev.parent = &dev->pdev->dev;
2500         sdvo->ddc.algo_data = sdvo;
2501         sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2502
2503         return i2c_add_adapter(&sdvo->ddc) == 0;
2504 }
2505
2506 bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2507 {
2508         struct drm_psb_private *dev_priv = dev->dev_private;
2509         struct gma_encoder *gma_encoder;
2510         struct psb_intel_sdvo *psb_intel_sdvo;
2511         int i;
2512
2513         psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL);
2514         if (!psb_intel_sdvo)
2515                 return false;
2516
2517         psb_intel_sdvo->sdvo_reg = sdvo_reg;
2518         psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2519         psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2520         if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2521                 kfree(psb_intel_sdvo);
2522                 return false;
2523         }
2524
2525         /* encoder type will be decided later */
2526         gma_encoder = &psb_intel_sdvo->base;
2527         gma_encoder->type = INTEL_OUTPUT_SDVO;
2528         drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs,
2529                          0, NULL);
2530
2531         /* Read the regs to test if we can talk to the device */
2532         for (i = 0; i < 0x40; i++) {
2533                 u8 byte;
2534
2535                 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2536                         DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2537                                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2538                         goto err;
2539                 }
2540         }
2541
2542         if (IS_SDVOB(sdvo_reg))
2543                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2544         else
2545                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2546
2547         drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
2548
2549         /* In default case sdvo lvds is false */
2550         if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2551                 goto err;
2552
2553         if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2554                                     psb_intel_sdvo->caps.output_flags) != true) {
2555                 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2556                               IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2557                 goto err;
2558         }
2559
2560         psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2561
2562         /* Set the input timing to the screen. Assume always input 0. */
2563         if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2564                 goto err;
2565
2566         if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2567                                                     &psb_intel_sdvo->pixel_clock_min,
2568                                                     &psb_intel_sdvo->pixel_clock_max))
2569                 goto err;
2570
2571         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2572                         "clock range %dMHz - %dMHz, "
2573                         "input 1: %c, input 2: %c, "
2574                         "output 1: %c, output 2: %c\n",
2575                         SDVO_NAME(psb_intel_sdvo),
2576                         psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2577                         psb_intel_sdvo->caps.device_rev_id,
2578                         psb_intel_sdvo->pixel_clock_min / 1000,
2579                         psb_intel_sdvo->pixel_clock_max / 1000,
2580                         (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2581                         (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2582                         /* check currently supported outputs */
2583                         psb_intel_sdvo->caps.output_flags &
2584                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2585                         psb_intel_sdvo->caps.output_flags &
2586                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2587         return true;
2588
2589 err:
2590         drm_encoder_cleanup(&gma_encoder->base);
2591         i2c_del_adapter(&psb_intel_sdvo->ddc);
2592         kfree(psb_intel_sdvo);
2593
2594         return false;
2595 }