include/ufs/ufs.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Universal Flash Storage Host controller driver
   4  * Copyright (C) 2011-2013 Samsung India Software Operations
   5  *
   6  * Authors:
   7  *      Santosh Yaraganavi <[email protected]>
   8  *      Vinayak Holikatti <[email protected]>
   9  */
  10
  11 #ifndef _UFS_H
  12 #define _UFS_H
  13
  14 #include <linux/mutex.h>
  15 #include <linux/types.h>
  16 #include <uapi/scsi/scsi_bsg_ufs.h>
  17
  18 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
  19 #define QUERY_DESC_MAX_SIZE       255
  20 #define QUERY_DESC_MIN_SIZE       2
  21 #define QUERY_DESC_HDR_SIZE       2
  22 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
  23                                         (sizeof(struct utp_upiu_header)))
  24 #define UFS_SENSE_SIZE  18
  25
  26 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
  27                         cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
  28                          (byte1 << 8) | (byte0))
  29 /*
  30  * UFS device may have standard LUs and LUN id could be from 0x00 to
  31  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
  32  * UFS device may also have the Well Known LUs (also referred as W-LU)
  33  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
  34  * the "Extended Addressing Format" which means the W-LUNs would be
  35  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
  36  * This means max. LUN number reported from UFS device could be 0xC17F.
  37  */
  38 #define UFS_UPIU_MAX_UNIT_NUM_ID        0x7F
  39 #define UFS_MAX_LUNS            (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
  40 #define UFS_UPIU_WLUN_ID        (1 << 7)
  41 #define UFS_RPMB_UNIT           0xC4
  42
  43 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
  44 #define UFS_UPIU_MAX_WB_LUN_ID  8
  45
  46 /*
  47  * WriteBooster buffer lifetime has a limit setted by vendor.
  48  * If it is over the limit, WriteBooster feature will be disabled.
  49  */
  50 #define UFS_WB_EXCEED_LIFETIME          0x0B
  51
  52 /* Well known logical unit id in LUN field of UPIU */
  53 enum {
  54         UFS_UPIU_REPORT_LUNS_WLUN       = 0x81,
  55         UFS_UPIU_UFS_DEVICE_WLUN        = 0xD0,
  56         UFS_UPIU_BOOT_WLUN              = 0xB0,
  57         UFS_UPIU_RPMB_WLUN              = 0xC4,
  58 };
  59
  60 /*
  61  * UFS Protocol Information Unit related definitions
  62  */
  63
  64 /* Task management functions */
  65 enum {
  66         UFS_ABORT_TASK          = 0x01,
  67         UFS_ABORT_TASK_SET      = 0x02,
  68         UFS_CLEAR_TASK_SET      = 0x04,
  69         UFS_LOGICAL_RESET       = 0x08,
  70         UFS_QUERY_TASK          = 0x80,
  71         UFS_QUERY_TASK_SET      = 0x81,
  72 };
  73
  74 /* UTP UPIU Transaction Codes Initiator to Target */
  75 enum {
  76         UPIU_TRANSACTION_NOP_OUT        = 0x00,
  77         UPIU_TRANSACTION_COMMAND        = 0x01,
  78         UPIU_TRANSACTION_DATA_OUT       = 0x02,
  79         UPIU_TRANSACTION_TASK_REQ       = 0x04,
  80         UPIU_TRANSACTION_QUERY_REQ      = 0x16,
  81 };
  82
  83 /* UTP UPIU Transaction Codes Target to Initiator */
  84 enum {
  85         UPIU_TRANSACTION_NOP_IN         = 0x20,
  86         UPIU_TRANSACTION_RESPONSE       = 0x21,
  87         UPIU_TRANSACTION_DATA_IN        = 0x22,
  88         UPIU_TRANSACTION_TASK_RSP       = 0x24,
  89         UPIU_TRANSACTION_READY_XFER     = 0x31,
  90         UPIU_TRANSACTION_QUERY_RSP      = 0x36,
  91         UPIU_TRANSACTION_REJECT_UPIU    = 0x3F,
  92 };
  93
  94 /* UPIU Read/Write flags */
  95 enum {
  96         UPIU_CMD_FLAGS_NONE     = 0x00,
  97         UPIU_CMD_FLAGS_WRITE    = 0x20,
  98         UPIU_CMD_FLAGS_READ     = 0x40,
  99 };
 100
 101 /* UPIU Task Attributes */
 102 enum {
 103         UPIU_TASK_ATTR_SIMPLE   = 0x00,
 104         UPIU_TASK_ATTR_ORDERED  = 0x01,
 105         UPIU_TASK_ATTR_HEADQ    = 0x02,
 106         UPIU_TASK_ATTR_ACA      = 0x03,
 107 };
 108
 109 /* UPIU Query request function */
 110 enum {
 111         UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
 112         UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
 113 };
 114
 115 /* Flag idn for Query Requests*/
 116 enum flag_idn {
 117         QUERY_FLAG_IDN_FDEVICEINIT                      = 0x01,
 118         QUERY_FLAG_IDN_PERMANENT_WPE                    = 0x02,
 119         QUERY_FLAG_IDN_PWR_ON_WPE                       = 0x03,
 120         QUERY_FLAG_IDN_BKOPS_EN                         = 0x04,
 121         QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE            = 0x05,
 122         QUERY_FLAG_IDN_PURGE_ENABLE                     = 0x06,
 123         QUERY_FLAG_IDN_RESERVED2                        = 0x07,
 124         QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL              = 0x08,
 125         QUERY_FLAG_IDN_BUSY_RTC                         = 0x09,
 126         QUERY_FLAG_IDN_RESERVED3                        = 0x0A,
 127         QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE    = 0x0B,
 128         QUERY_FLAG_IDN_WB_EN                            = 0x0E,
 129         QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN                 = 0x0F,
 130         QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8     = 0x10,
 131         QUERY_FLAG_IDN_HPB_RESET                        = 0x11,
 132         QUERY_FLAG_IDN_HPB_EN                           = 0x12,
 133 };
 134
 135 /* Attribute idn for Query requests */
 136 enum attr_idn {
 137         QUERY_ATTR_IDN_BOOT_LU_EN               = 0x00,
 138         QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD       = 0x01,
 139         QUERY_ATTR_IDN_POWER_MODE               = 0x02,
 140         QUERY_ATTR_IDN_ACTIVE_ICC_LVL           = 0x03,
 141         QUERY_ATTR_IDN_OOO_DATA_EN              = 0x04,
 142         QUERY_ATTR_IDN_BKOPS_STATUS             = 0x05,
 143         QUERY_ATTR_IDN_PURGE_STATUS             = 0x06,
 144         QUERY_ATTR_IDN_MAX_DATA_IN              = 0x07,
 145         QUERY_ATTR_IDN_MAX_DATA_OUT             = 0x08,
 146         QUERY_ATTR_IDN_DYN_CAP_NEEDED           = 0x09,
 147         QUERY_ATTR_IDN_REF_CLK_FREQ             = 0x0A,
 148         QUERY_ATTR_IDN_CONF_DESC_LOCK           = 0x0B,
 149         QUERY_ATTR_IDN_MAX_NUM_OF_RTT           = 0x0C,
 150         QUERY_ATTR_IDN_EE_CONTROL               = 0x0D,
 151         QUERY_ATTR_IDN_EE_STATUS                = 0x0E,
 152         QUERY_ATTR_IDN_SECONDS_PASSED           = 0x0F,
 153         QUERY_ATTR_IDN_CNTX_CONF                = 0x10,
 154         QUERY_ATTR_IDN_CORR_PRG_BLK_NUM         = 0x11,
 155         QUERY_ATTR_IDN_RESERVED2                = 0x12,
 156         QUERY_ATTR_IDN_RESERVED3                = 0x13,
 157         QUERY_ATTR_IDN_FFU_STATUS               = 0x14,
 158         QUERY_ATTR_IDN_PSA_STATE                = 0x15,
 159         QUERY_ATTR_IDN_PSA_DATA_SIZE            = 0x16,
 160         QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
 161         QUERY_ATTR_IDN_CASE_ROUGH_TEMP          = 0x18,
 162         QUERY_ATTR_IDN_HIGH_TEMP_BOUND          = 0x19,
 163         QUERY_ATTR_IDN_LOW_TEMP_BOUND           = 0x1A,
 164         QUERY_ATTR_IDN_WB_FLUSH_STATUS          = 0x1C,
 165         QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE       = 0x1D,
 166         QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST    = 0x1E,
 167         QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE        = 0x1F,
 168 };
 169
 170 /* Descriptor idn for Query requests */
 171 enum desc_idn {
 172         QUERY_DESC_IDN_DEVICE           = 0x0,
 173         QUERY_DESC_IDN_CONFIGURATION    = 0x1,
 174         QUERY_DESC_IDN_UNIT             = 0x2,
 175         QUERY_DESC_IDN_RFU_0            = 0x3,
 176         QUERY_DESC_IDN_INTERCONNECT     = 0x4,
 177         QUERY_DESC_IDN_STRING           = 0x5,
 178         QUERY_DESC_IDN_RFU_1            = 0x6,
 179         QUERY_DESC_IDN_GEOMETRY         = 0x7,
 180         QUERY_DESC_IDN_POWER            = 0x8,
 181         QUERY_DESC_IDN_HEALTH           = 0x9,
 182         QUERY_DESC_IDN_MAX,
 183 };
 184
 185 enum desc_header_offset {
 186         QUERY_DESC_LENGTH_OFFSET        = 0x00,
 187         QUERY_DESC_DESC_TYPE_OFFSET     = 0x01,
 188 };
 189
 190 /* Unit descriptor parameters offsets in bytes*/
 191 enum unit_desc_param {
 192         UNIT_DESC_PARAM_LEN                     = 0x0,
 193         UNIT_DESC_PARAM_TYPE                    = 0x1,
 194         UNIT_DESC_PARAM_UNIT_INDEX              = 0x2,
 195         UNIT_DESC_PARAM_LU_ENABLE               = 0x3,
 196         UNIT_DESC_PARAM_BOOT_LUN_ID             = 0x4,
 197         UNIT_DESC_PARAM_LU_WR_PROTECT           = 0x5,
 198         UNIT_DESC_PARAM_LU_Q_DEPTH              = 0x6,
 199         UNIT_DESC_PARAM_PSA_SENSITIVE           = 0x7,
 200         UNIT_DESC_PARAM_MEM_TYPE                = 0x8,
 201         UNIT_DESC_PARAM_DATA_RELIABILITY        = 0x9,
 202         UNIT_DESC_PARAM_LOGICAL_BLK_SIZE        = 0xA,
 203         UNIT_DESC_PARAM_LOGICAL_BLK_COUNT       = 0xB,
 204         UNIT_DESC_PARAM_ERASE_BLK_SIZE          = 0x13,
 205         UNIT_DESC_PARAM_PROVISIONING_TYPE       = 0x17,
 206         UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT        = 0x18,
 207         UNIT_DESC_PARAM_CTX_CAPABILITIES        = 0x20,
 208         UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1      = 0x22,
 209         UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS  = 0x23,
 210         UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF   = 0x25,
 211         UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS        = 0x27,
 212         UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS      = 0x29,
 213 };
 214
 215 /* Device descriptor parameters offsets in bytes*/
 216 enum device_desc_param {
 217         DEVICE_DESC_PARAM_LEN                   = 0x0,
 218         DEVICE_DESC_PARAM_TYPE                  = 0x1,
 219         DEVICE_DESC_PARAM_DEVICE_TYPE           = 0x2,
 220         DEVICE_DESC_PARAM_DEVICE_CLASS          = 0x3,
 221         DEVICE_DESC_PARAM_DEVICE_SUB_CLASS      = 0x4,
 222         DEVICE_DESC_PARAM_PRTCL                 = 0x5,
 223         DEVICE_DESC_PARAM_NUM_LU                = 0x6,
 224         DEVICE_DESC_PARAM_NUM_WLU               = 0x7,
 225         DEVICE_DESC_PARAM_BOOT_ENBL             = 0x8,
 226         DEVICE_DESC_PARAM_DESC_ACCSS_ENBL       = 0x9,
 227         DEVICE_DESC_PARAM_INIT_PWR_MODE         = 0xA,
 228         DEVICE_DESC_PARAM_HIGH_PR_LUN           = 0xB,
 229         DEVICE_DESC_PARAM_SEC_RMV_TYPE          = 0xC,
 230         DEVICE_DESC_PARAM_SEC_LU                = 0xD,
 231         DEVICE_DESC_PARAM_BKOP_TERM_LT          = 0xE,
 232         DEVICE_DESC_PARAM_ACTVE_ICC_LVL         = 0xF,
 233         DEVICE_DESC_PARAM_SPEC_VER              = 0x10,
 234         DEVICE_DESC_PARAM_MANF_DATE             = 0x12,
 235         DEVICE_DESC_PARAM_MANF_NAME             = 0x14,
 236         DEVICE_DESC_PARAM_PRDCT_NAME            = 0x15,
 237         DEVICE_DESC_PARAM_SN                    = 0x16,
 238         DEVICE_DESC_PARAM_OEM_ID                = 0x17,
 239         DEVICE_DESC_PARAM_MANF_ID               = 0x18,
 240         DEVICE_DESC_PARAM_UD_OFFSET             = 0x1A,
 241         DEVICE_DESC_PARAM_UD_LEN                = 0x1B,
 242         DEVICE_DESC_PARAM_RTT_CAP               = 0x1C,
 243         DEVICE_DESC_PARAM_FRQ_RTC               = 0x1D,
 244         DEVICE_DESC_PARAM_UFS_FEAT              = 0x1F,
 245         DEVICE_DESC_PARAM_FFU_TMT               = 0x20,
 246         DEVICE_DESC_PARAM_Q_DPTH                = 0x21,
 247         DEVICE_DESC_PARAM_DEV_VER               = 0x22,
 248         DEVICE_DESC_PARAM_NUM_SEC_WPA           = 0x24,
 249         DEVICE_DESC_PARAM_PSA_MAX_DATA          = 0x25,
 250         DEVICE_DESC_PARAM_PSA_TMT               = 0x29,
 251         DEVICE_DESC_PARAM_PRDCT_REV             = 0x2A,
 252         DEVICE_DESC_PARAM_HPB_VER               = 0x40,
 253         DEVICE_DESC_PARAM_HPB_CONTROL           = 0x42,
 254         DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP   = 0x4F,
 255         DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN   = 0x53,
 256         DEVICE_DESC_PARAM_WB_TYPE               = 0x54,
 257         DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
 258 };
 259
 260 /* Interconnect descriptor parameters offsets in bytes*/
 261 enum interconnect_desc_param {
 262         INTERCONNECT_DESC_PARAM_LEN             = 0x0,
 263         INTERCONNECT_DESC_PARAM_TYPE            = 0x1,
 264         INTERCONNECT_DESC_PARAM_UNIPRO_VER      = 0x2,
 265         INTERCONNECT_DESC_PARAM_MPHY_VER        = 0x4,
 266 };
 267
 268 /* Geometry descriptor parameters offsets in bytes*/
 269 enum geometry_desc_param {
 270         GEOMETRY_DESC_PARAM_LEN                 = 0x0,
 271         GEOMETRY_DESC_PARAM_TYPE                = 0x1,
 272         GEOMETRY_DESC_PARAM_DEV_CAP             = 0x4,
 273         GEOMETRY_DESC_PARAM_MAX_NUM_LUN         = 0xC,
 274         GEOMETRY_DESC_PARAM_SEG_SIZE            = 0xD,
 275         GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE     = 0x11,
 276         GEOMETRY_DESC_PARAM_MIN_BLK_SIZE        = 0x12,
 277         GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE     = 0x13,
 278         GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE     = 0x14,
 279         GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE     = 0x15,
 280         GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE    = 0x16,
 281         GEOMETRY_DESC_PARAM_RPMB_RW_SIZE        = 0x17,
 282         GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC    = 0x18,
 283         GEOMETRY_DESC_PARAM_DATA_ORDER          = 0x19,
 284         GEOMETRY_DESC_PARAM_MAX_NUM_CTX         = 0x1A,
 285         GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE       = 0x1B,
 286         GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE       = 0x1C,
 287         GEOMETRY_DESC_PARAM_SEC_RM_TYPES        = 0x1D,
 288         GEOMETRY_DESC_PARAM_MEM_TYPES           = 0x1E,
 289         GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS   = 0x20,
 290         GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR    = 0x24,
 291         GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS   = 0x26,
 292         GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR    = 0x2A,
 293         GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS  = 0x2C,
 294         GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR   = 0x30,
 295         GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS  = 0x32,
 296         GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR   = 0x36,
 297         GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS  = 0x38,
 298         GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR   = 0x3C,
 299         GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS  = 0x3E,
 300         GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR   = 0x42,
 301         GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE    = 0x44,
 302         GEOMETRY_DESC_PARAM_HPB_REGION_SIZE     = 0x48,
 303         GEOMETRY_DESC_PARAM_HPB_NUMBER_LU       = 0x49,
 304         GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE  = 0x4A,
 305         GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS = 0x4B,
 306         GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS  = 0x4F,
 307         GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS      = 0x53,
 308         GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ     = 0x54,
 309         GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE     = 0x55,
 310         GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE      = 0x56,
 311 };
 312
 313 /* Health descriptor parameters offsets in bytes*/
 314 enum health_desc_param {
 315         HEALTH_DESC_PARAM_LEN                   = 0x0,
 316         HEALTH_DESC_PARAM_TYPE                  = 0x1,
 317         HEALTH_DESC_PARAM_EOL_INFO              = 0x2,
 318         HEALTH_DESC_PARAM_LIFE_TIME_EST_A       = 0x3,
 319         HEALTH_DESC_PARAM_LIFE_TIME_EST_B       = 0x4,
 320 };
 321
 322 /* WriteBooster buffer mode */
 323 enum {
 324         WB_BUF_MODE_LU_DEDICATED        = 0x0,
 325         WB_BUF_MODE_SHARED              = 0x1,
 326 };
 327
 328 /*
 329  * Logical Unit Write Protect
 330  * 00h: LU not write protected
 331  * 01h: LU write protected when fPowerOnWPEn =1
 332  * 02h: LU permanently write protected when fPermanentWPEn =1
 333  */
 334 enum ufs_lu_wp_type {
 335         UFS_LU_NO_WP            = 0x00,
 336         UFS_LU_POWER_ON_WP      = 0x01,
 337         UFS_LU_PERM_WP          = 0x02,
 338 };
 339
 340 /* bActiveICCLevel parameter current units */
 341 enum {
 342         UFSHCD_NANO_AMP         = 0,
 343         UFSHCD_MICRO_AMP        = 1,
 344         UFSHCD_MILI_AMP         = 2,
 345         UFSHCD_AMP              = 3,
 346 };
 347
 348 /* Possible values for dExtendedUFSFeaturesSupport */
 349 enum {
 350         UFS_DEV_LOW_TEMP_NOTIF          = BIT(4),
 351         UFS_DEV_HIGH_TEMP_NOTIF         = BIT(5),
 352         UFS_DEV_EXT_TEMP_NOTIF          = BIT(6),
 353         UFS_DEV_HPB_SUPPORT             = BIT(7),
 354         UFS_DEV_WRITE_BOOSTER_SUP       = BIT(8),
 355 };
 356 #define UFS_DEV_HPB_SUPPORT_VERSION             0x310
 357
 358 #define POWER_DESC_MAX_ACTV_ICC_LVLS            16
 359
 360 /* Attribute  bActiveICCLevel parameter bit masks definitions */
 361 #define ATTR_ICC_LVL_UNIT_OFFSET        14
 362 #define ATTR_ICC_LVL_UNIT_MASK          (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
 363 #define ATTR_ICC_LVL_VALUE_MASK         0x3FF
 364
 365 /* Power descriptor parameters offsets in bytes */
 366 enum power_desc_param_offset {
 367         PWR_DESC_LEN                    = 0x0,
 368         PWR_DESC_TYPE                   = 0x1,
 369         PWR_DESC_ACTIVE_LVLS_VCC_0      = 0x2,
 370         PWR_DESC_ACTIVE_LVLS_VCCQ_0     = 0x22,
 371         PWR_DESC_ACTIVE_LVLS_VCCQ2_0    = 0x42,
 372 };
 373
 374 /* Exception event mask values */
 375 enum {
 376         MASK_EE_STATUS                  = 0xFFFF,
 377         MASK_EE_DYNCAP_EVENT            = BIT(0),
 378         MASK_EE_SYSPOOL_EVENT           = BIT(1),
 379         MASK_EE_URGENT_BKOPS            = BIT(2),
 380         MASK_EE_TOO_HIGH_TEMP           = BIT(3),
 381         MASK_EE_TOO_LOW_TEMP            = BIT(4),
 382         MASK_EE_WRITEBOOSTER_EVENT      = BIT(5),
 383         MASK_EE_PERFORMANCE_THROTTLING  = BIT(6),
 384 };
 385 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
 386
 387 /* Background operation status */
 388 enum bkops_status {
 389         BKOPS_STATUS_NO_OP               = 0x0,
 390         BKOPS_STATUS_NON_CRITICAL        = 0x1,
 391         BKOPS_STATUS_PERF_IMPACT         = 0x2,
 392         BKOPS_STATUS_CRITICAL            = 0x3,
 393         BKOPS_STATUS_MAX                 = BKOPS_STATUS_CRITICAL,
 394 };
 395
 396 /* UTP QUERY Transaction Specific Fields OpCode */
 397 enum query_opcode {
 398         UPIU_QUERY_OPCODE_NOP           = 0x0,
 399         UPIU_QUERY_OPCODE_READ_DESC     = 0x1,
 400         UPIU_QUERY_OPCODE_WRITE_DESC    = 0x2,
 401         UPIU_QUERY_OPCODE_READ_ATTR     = 0x3,
 402         UPIU_QUERY_OPCODE_WRITE_ATTR    = 0x4,
 403         UPIU_QUERY_OPCODE_READ_FLAG     = 0x5,
 404         UPIU_QUERY_OPCODE_SET_FLAG      = 0x6,
 405         UPIU_QUERY_OPCODE_CLEAR_FLAG    = 0x7,
 406         UPIU_QUERY_OPCODE_TOGGLE_FLAG   = 0x8,
 407 };
 408
 409 /* bRefClkFreq attribute values */
 410 enum ufs_ref_clk_freq {
 411         REF_CLK_FREQ_19_2_MHZ   = 0,
 412         REF_CLK_FREQ_26_MHZ     = 1,
 413         REF_CLK_FREQ_38_4_MHZ   = 2,
 414         REF_CLK_FREQ_52_MHZ     = 3,
 415         REF_CLK_FREQ_INVAL      = -1,
 416 };
 417
 418 /* Query response result code */
 419 enum {
 420         QUERY_RESULT_SUCCESS                    = 0x00,
 421         QUERY_RESULT_NOT_READABLE               = 0xF6,
 422         QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
 423         QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
 424         QUERY_RESULT_INVALID_LENGTH             = 0xF9,
 425         QUERY_RESULT_INVALID_VALUE              = 0xFA,
 426         QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
 427         QUERY_RESULT_INVALID_INDEX              = 0xFC,
 428         QUERY_RESULT_INVALID_IDN                = 0xFD,
 429         QUERY_RESULT_INVALID_OPCODE             = 0xFE,
 430         QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
 431 };
 432
 433 /* UTP Transfer Request Command Type (CT) */
 434 enum {
 435         UPIU_COMMAND_SET_TYPE_SCSI      = 0x0,
 436         UPIU_COMMAND_SET_TYPE_UFS       = 0x1,
 437         UPIU_COMMAND_SET_TYPE_QUERY     = 0x2,
 438 };
 439
 440 /* UTP Transfer Request Command Offset */
 441 #define UPIU_COMMAND_TYPE_OFFSET        28
 442
 443 /* Offset of the response code in the UPIU header */
 444 #define UPIU_RSP_CODE_OFFSET            8
 445
 446 enum {
 447         MASK_SCSI_STATUS                = 0xFF,
 448         MASK_TASK_RESPONSE              = 0xFF00,
 449         MASK_RSP_UPIU_RESULT            = 0xFFFF,
 450         MASK_QUERY_DATA_SEG_LEN         = 0xFFFF,
 451         MASK_RSP_UPIU_DATA_SEG_LEN      = 0xFFFF,
 452         MASK_RSP_EXCEPTION_EVENT        = 0x10000,
 453         MASK_TM_SERVICE_RESP            = 0xFF,
 454         MASK_TM_FUNC                    = 0xFF,
 455 };
 456
 457 /* Task management service response */
 458 enum {
 459         UPIU_TASK_MANAGEMENT_FUNC_COMPL         = 0x00,
 460         UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
 461         UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED     = 0x08,
 462         UPIU_TASK_MANAGEMENT_FUNC_FAILED        = 0x05,
 463         UPIU_INCORRECT_LOGICAL_UNIT_NO          = 0x09,
 464 };
 465
 466 /* UFS device power modes */
 467 enum ufs_dev_pwr_mode {
 468         UFS_ACTIVE_PWR_MODE     = 1,
 469         UFS_SLEEP_PWR_MODE      = 2,
 470         UFS_POWERDOWN_PWR_MODE  = 3,
 471         UFS_DEEPSLEEP_PWR_MODE  = 4,
 472 };
 473
 474 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
 475
 476 /**
 477  * struct utp_cmd_rsp - Response UPIU structure
 478  * @residual_transfer_count: Residual transfer count DW-3
 479  * @reserved: Reserved double words DW-4 to DW-7
 480  * @sense_data_len: Sense data length DW-8 U16
 481  * @sense_data: Sense data field DW-8 to DW-12
 482  */
 483 struct utp_cmd_rsp {
 484         __be32 residual_transfer_count;
 485         __be32 reserved[4];
 486         __be16 sense_data_len;
 487         u8 sense_data[UFS_SENSE_SIZE];
 488 };
 489
 490 struct ufshpb_active_field {
 491         __be16 active_rgn;
 492         __be16 active_srgn;
 493 };
 494 #define HPB_ACT_FIELD_SIZE 4
 495
 496 /**
 497  * struct utp_hpb_rsp - Response UPIU structure
 498  * @residual_transfer_count: Residual transfer count DW-3
 499  * @reserved1: Reserved double words DW-4 to DW-7
 500  * @sense_data_len: Sense data length DW-8 U16
 501  * @desc_type: Descriptor type of sense data
 502  * @additional_len: Additional length of sense data
 503  * @hpb_op: HPB operation type
 504  * @lun: LUN of response UPIU
 505  * @active_rgn_cnt: Active region count
 506  * @inactive_rgn_cnt: Inactive region count
 507  * @hpb_active_field: Recommended to read HPB region and subregion
 508  * @hpb_inactive_field: To be inactivated HPB region and subregion
 509  */
 510 struct utp_hpb_rsp {
 511         __be32 residual_transfer_count;
 512         __be32 reserved1[4];
 513         __be16 sense_data_len;
 514         u8 desc_type;
 515         u8 additional_len;
 516         u8 hpb_op;
 517         u8 lun;
 518         u8 active_rgn_cnt;
 519         u8 inactive_rgn_cnt;
 520         struct ufshpb_active_field hpb_active_field[2];
 521         __be16 hpb_inactive_field[2];
 522 };
 523 #define UTP_HPB_RSP_SIZE 40
 524
 525 /**
 526  * struct utp_upiu_rsp - general upiu response structure
 527  * @header: UPIU header structure DW-0 to DW-2
 528  * @sr: fields structure for scsi command DW-3 to DW-12
 529  * @qr: fields structure for query request DW-3 to DW-7
 530  */
 531 struct utp_upiu_rsp {
 532         struct utp_upiu_header header;
 533         union {
 534                 struct utp_cmd_rsp sr;
 535                 struct utp_hpb_rsp hr;
 536                 struct utp_upiu_query qr;
 537         };
 538 };
 539
 540 /**
 541  * struct ufs_query_req - parameters for building a query request
 542  * @query_func: UPIU header query function
 543  * @upiu_req: the query request data
 544  */
 545 struct ufs_query_req {
 546         u8 query_func;
 547         struct utp_upiu_query upiu_req;
 548 };
 549
 550 /**
 551  * struct ufs_query_resp - UPIU QUERY
 552  * @response: device response code
 553  * @upiu_res: query response data
 554  */
 555 struct ufs_query_res {
 556         u8 response;
 557         struct utp_upiu_query upiu_res;
 558 };
 559
 560 /*
 561  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
 562  * and link is in Hibern8 state.
 563  */
 564 #define UFS_VREG_LPM_LOAD_UA    1000 /* uA */
 565
 566 struct ufs_vreg {
 567         struct regulator *reg;
 568         const char *name;
 569         bool always_on;
 570         bool enabled;
 571         int max_uA;
 572 };
 573
 574 struct ufs_vreg_info {
 575         struct ufs_vreg *vcc;
 576         struct ufs_vreg *vccq;
 577         struct ufs_vreg *vccq2;
 578         struct ufs_vreg *vdd_hba;
 579 };
 580
 581 struct ufs_dev_info {
 582         bool    f_power_on_wp_en;
 583         /* Keeps information if any of the LU is power on write protected */
 584         bool    is_lu_power_on_wp;
 585         /* Maximum number of general LU supported by the UFS device */
 586         u8      max_lu_supported;
 587         u16     wmanufacturerid;
 588         /*UFS device Product Name */
 589         u8      *model;
 590         u16     wspecversion;
 591         u32     clk_gating_wait_us;
 592
 593         /* UFS HPB related flag */
 594         bool    hpb_enabled;
 595
 596         /* UFS WB related flags */
 597         bool    wb_enabled;
 598         bool    wb_buf_flush_enabled;
 599         u8      wb_dedicated_lu;
 600         u8      wb_buffer_type;
 601
 602         bool    b_rpm_dev_flush_capable;
 603         u8      b_presrv_uspc_en;
 604 };
 605
 606 /*
 607  * This enum is used in string mapping in include/trace/events/ufs.h.
 608  */
 609 enum ufs_trace_str_t {
 610         UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
 611         UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
 612         UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
 613 };
 614
 615 /*
 616  * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
 617  * used in include/trace/events/ufs.h for UFS command trace.
 618  */
 619 enum ufs_trace_tsf_t {
 620         UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
 621 };
 622
 623 #endif /* End of Header */