arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <[email protected]>
  14  *   Yaniv Kamay  <[email protected]>
  15  *   Amit Shah    <[email protected]>
  16  *   Ben-Ami Yassour <[email protected]>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <asm/emulate_prefix.h>
  72 #include <clocksource/hyperv_timer.h>
  73
  74 #define CREATE_TRACE_POINTS
  75 #include "trace.h"
  76
  77 #define MAX_IO_MSRS 256
  78 #define KVM_MAX_MCE_BANKS 32
  79 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  80 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  81
  82 #define emul_to_vcpu(ctxt) \
  83         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  84
  85 /* EFER defaults:
  86  * - enable syscall per default because its emulated by KVM
  87  * - enable LME and LMA per default on 64 bit KVM
  88  */
  89 #ifdef CONFIG_X86_64
  90 static
  91 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  92 #else
  93 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  94 #endif
  95
  96 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
  97
  98 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
  99 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
 100
 101 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 102                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 103
 104 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 105 static void process_nmi(struct kvm_vcpu *vcpu);
 106 static void enter_smm(struct kvm_vcpu *vcpu);
 107 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 108 static void store_regs(struct kvm_vcpu *vcpu);
 109 static int sync_regs(struct kvm_vcpu *vcpu);
 110
 111 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 112 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 113
 114 static bool __read_mostly ignore_msrs = 0;
 115 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 static bool __read_mostly report_ignored_msrs = true;
 118 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 119
 120 unsigned int min_timer_period_us = 200;
 121 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 122
 123 static bool __read_mostly kvmclock_periodic_sync = true;
 124 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 125
 126 bool __read_mostly kvm_has_tsc_control;
 127 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 128 u32  __read_mostly kvm_max_guest_tsc_khz;
 129 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 130 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 131 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 132 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 133 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 134 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 136
 137 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 138 static u32 __read_mostly tsc_tolerance_ppm = 250;
 139 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 140
 141 /*
 142  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 143  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 144  * advancement entirely.  Any other value is used as-is and disables adaptive
 145  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 146  */
 147 static int __read_mostly lapic_timer_advance_ns = -1;
 148 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 149
 150 static bool __read_mostly vector_hashing = true;
 151 module_param(vector_hashing, bool, S_IRUGO);
 152
 153 bool __read_mostly enable_vmware_backdoor = false;
 154 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 155 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 156
 157 static bool __read_mostly force_emulation_prefix = false;
 158 module_param(force_emulation_prefix, bool, S_IRUGO);
 159
 160 int __read_mostly pi_inject_timer = -1;
 161 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 162
 163 #define KVM_NR_SHARED_MSRS 16
 164
 165 struct kvm_shared_msrs_global {
 166         int nr;
 167         u32 msrs[KVM_NR_SHARED_MSRS];
 168 };
 169
 170 struct kvm_shared_msrs {
 171         struct user_return_notifier urn;
 172         bool registered;
 173         struct kvm_shared_msr_values {
 174                 u64 host;
 175                 u64 curr;
 176         } values[KVM_NR_SHARED_MSRS];
 177 };
 178
 179 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 180 static struct kvm_shared_msrs __percpu *shared_msrs;
 181
 182 static u64 __read_mostly host_xss;
 183
 184 struct kvm_stats_debugfs_item debugfs_entries[] = {
 185         { "pf_fixed", VCPU_STAT(pf_fixed) },
 186         { "pf_guest", VCPU_STAT(pf_guest) },
 187         { "tlb_flush", VCPU_STAT(tlb_flush) },
 188         { "invlpg", VCPU_STAT(invlpg) },
 189         { "exits", VCPU_STAT(exits) },
 190         { "io_exits", VCPU_STAT(io_exits) },
 191         { "mmio_exits", VCPU_STAT(mmio_exits) },
 192         { "signal_exits", VCPU_STAT(signal_exits) },
 193         { "irq_window", VCPU_STAT(irq_window_exits) },
 194         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 195         { "halt_exits", VCPU_STAT(halt_exits) },
 196         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 197         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 198         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 199         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 200         { "hypercalls", VCPU_STAT(hypercalls) },
 201         { "request_irq", VCPU_STAT(request_irq_exits) },
 202         { "irq_exits", VCPU_STAT(irq_exits) },
 203         { "host_state_reload", VCPU_STAT(host_state_reload) },
 204         { "fpu_reload", VCPU_STAT(fpu_reload) },
 205         { "insn_emulation", VCPU_STAT(insn_emulation) },
 206         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 207         { "irq_injections", VCPU_STAT(irq_injections) },
 208         { "nmi_injections", VCPU_STAT(nmi_injections) },
 209         { "req_event", VCPU_STAT(req_event) },
 210         { "l1d_flush", VCPU_STAT(l1d_flush) },
 211         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 212         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 213         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 214         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 215         { "mmu_flooded", VM_STAT(mmu_flooded) },
 216         { "mmu_recycled", VM_STAT(mmu_recycled) },
 217         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 218         { "mmu_unsync", VM_STAT(mmu_unsync) },
 219         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 220         { "largepages", VM_STAT(lpages, .mode = 0444) },
 221         { "nx_largepages_splitted", VM_STAT(nx_lpage_splits, .mode = 0444) },
 222         { "max_mmu_page_hash_collisions",
 223                 VM_STAT(max_mmu_page_hash_collisions) },
 224         { NULL }
 225 };
 226
 227 u64 __read_mostly host_xcr0;
 228
 229 struct kmem_cache *x86_fpu_cache;
 230 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 231
 232 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 233
 234 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 235 {
 236         int i;
 237         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 238                 vcpu->arch.apf.gfns[i] = ~0;
 239 }
 240
 241 static void kvm_on_user_return(struct user_return_notifier *urn)
 242 {
 243         unsigned slot;
 244         struct kvm_shared_msrs *locals
 245                 = container_of(urn, struct kvm_shared_msrs, urn);
 246         struct kvm_shared_msr_values *values;
 247         unsigned long flags;
 248
 249         /*
 250          * Disabling irqs at this point since the following code could be
 251          * interrupted and executed through kvm_arch_hardware_disable()
 252          */
 253         local_irq_save(flags);
 254         if (locals->registered) {
 255                 locals->registered = false;
 256                 user_return_notifier_unregister(urn);
 257         }
 258         local_irq_restore(flags);
 259         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 260                 values = &locals->values[slot];
 261                 if (values->host != values->curr) {
 262                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 263                         values->curr = values->host;
 264                 }
 265         }
 266 }
 267
 268 void kvm_define_shared_msr(unsigned slot, u32 msr)
 269 {
 270         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 271         shared_msrs_global.msrs[slot] = msr;
 272         if (slot >= shared_msrs_global.nr)
 273                 shared_msrs_global.nr = slot + 1;
 274 }
 275 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 276
 277 static void kvm_shared_msr_cpu_online(void)
 278 {
 279         unsigned int cpu = smp_processor_id();
 280         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 281         u64 value;
 282         int i;
 283
 284         for (i = 0; i < shared_msrs_global.nr; ++i) {
 285                 rdmsrl_safe(shared_msrs_global.msrs[i], &value);
 286                 smsr->values[i].host = value;
 287                 smsr->values[i].curr = value;
 288         }
 289 }
 290
 291 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 292 {
 293         unsigned int cpu = smp_processor_id();
 294         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 295         int err;
 296
 297         value = (value & mask) | (smsr->values[slot].host & ~mask);
 298         if (value == smsr->values[slot].curr)
 299                 return 0;
 300         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 301         if (err)
 302                 return 1;
 303
 304         smsr->values[slot].curr = value;
 305         if (!smsr->registered) {
 306                 smsr->urn.on_user_return = kvm_on_user_return;
 307                 user_return_notifier_register(&smsr->urn);
 308                 smsr->registered = true;
 309         }
 310         return 0;
 311 }
 312 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 313
 314 static void drop_user_return_notifiers(void)
 315 {
 316         unsigned int cpu = smp_processor_id();
 317         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 318
 319         if (smsr->registered)
 320                 kvm_on_user_return(&smsr->urn);
 321 }
 322
 323 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 324 {
 325         return vcpu->arch.apic_base;
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 328
 329 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 330 {
 331         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 334
 335 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 336 {
 337         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 338         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 339         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 340                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 341
 342         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 343                 return 1;
 344         if (!msr_info->host_initiated) {
 345                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 346                         return 1;
 347                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 348                         return 1;
 349         }
 350
 351         kvm_lapic_set_base(vcpu, msr_info->data);
 352         return 0;
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 355
 356 asmlinkage __visible void kvm_spurious_fault(void)
 357 {
 358         /* Fault while not rebooting.  We want the trace. */
 359         BUG_ON(!kvm_rebooting);
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 362
 363 #define EXCPT_BENIGN            0
 364 #define EXCPT_CONTRIBUTORY      1
 365 #define EXCPT_PF                2
 366
 367 static int exception_class(int vector)
 368 {
 369         switch (vector) {
 370         case PF_VECTOR:
 371                 return EXCPT_PF;
 372         case DE_VECTOR:
 373         case TS_VECTOR:
 374         case NP_VECTOR:
 375         case SS_VECTOR:
 376         case GP_VECTOR:
 377                 return EXCPT_CONTRIBUTORY;
 378         default:
 379                 break;
 380         }
 381         return EXCPT_BENIGN;
 382 }
 383
 384 #define EXCPT_FAULT             0
 385 #define EXCPT_TRAP              1
 386 #define EXCPT_ABORT             2
 387 #define EXCPT_INTERRUPT         3
 388
 389 static int exception_type(int vector)
 390 {
 391         unsigned int mask;
 392
 393         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 394                 return EXCPT_INTERRUPT;
 395
 396         mask = 1 << vector;
 397
 398         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 399         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 400                 return EXCPT_TRAP;
 401
 402         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 403                 return EXCPT_ABORT;
 404
 405         /* Reserved exceptions will result in fault */
 406         return EXCPT_FAULT;
 407 }
 408
 409 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 410 {
 411         unsigned nr = vcpu->arch.exception.nr;
 412         bool has_payload = vcpu->arch.exception.has_payload;
 413         unsigned long payload = vcpu->arch.exception.payload;
 414
 415         if (!has_payload)
 416                 return;
 417
 418         switch (nr) {
 419         case DB_VECTOR:
 420                 /*
 421                  * "Certain debug exceptions may clear bit 0-3.  The
 422                  * remaining contents of the DR6 register are never
 423                  * cleared by the processor".
 424                  */
 425                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 426                 /*
 427                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 428                  */
 429                 vcpu->arch.dr6 |= DR6_RTM;
 430                 vcpu->arch.dr6 |= payload;
 431                 /*
 432                  * Bit 16 should be set in the payload whenever the #DB
 433                  * exception should clear DR6.RTM. This makes the payload
 434                  * compatible with the pending debug exceptions under VMX.
 435                  * Though not currently documented in the SDM, this also
 436                  * makes the payload compatible with the exit qualification
 437                  * for #DB exceptions under VMX.
 438                  */
 439                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 440                 break;
 441         case PF_VECTOR:
 442                 vcpu->arch.cr2 = payload;
 443                 break;
 444         }
 445
 446         vcpu->arch.exception.has_payload = false;
 447         vcpu->arch.exception.payload = 0;
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 450
 451 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 452                 unsigned nr, bool has_error, u32 error_code,
 453                 bool has_payload, unsigned long payload, bool reinject)
 454 {
 455         u32 prev_nr;
 456         int class1, class2;
 457
 458         kvm_make_request(KVM_REQ_EVENT, vcpu);
 459
 460         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 461         queue:
 462                 if (has_error && !is_protmode(vcpu))
 463                         has_error = false;
 464                 if (reinject) {
 465                         /*
 466                          * On vmentry, vcpu->arch.exception.pending is only
 467                          * true if an event injection was blocked by
 468                          * nested_run_pending.  In that case, however,
 469                          * vcpu_enter_guest requests an immediate exit,
 470                          * and the guest shouldn't proceed far enough to
 471                          * need reinjection.
 472                          */
 473                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 474                         vcpu->arch.exception.injected = true;
 475                         if (WARN_ON_ONCE(has_payload)) {
 476                                 /*
 477                                  * A reinjected event has already
 478                                  * delivered its payload.
 479                                  */
 480                                 has_payload = false;
 481                                 payload = 0;
 482                         }
 483                 } else {
 484                         vcpu->arch.exception.pending = true;
 485                         vcpu->arch.exception.injected = false;
 486                 }
 487                 vcpu->arch.exception.has_error_code = has_error;
 488                 vcpu->arch.exception.nr = nr;
 489                 vcpu->arch.exception.error_code = error_code;
 490                 vcpu->arch.exception.has_payload = has_payload;
 491                 vcpu->arch.exception.payload = payload;
 492                 /*
 493                  * In guest mode, payload delivery should be deferred,
 494                  * so that the L1 hypervisor can intercept #PF before
 495                  * CR2 is modified (or intercept #DB before DR6 is
 496                  * modified under nVMX).  However, for ABI
 497                  * compatibility with KVM_GET_VCPU_EVENTS and
 498                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 499                  * delivery unless userspace has enabled this
 500                  * functionality via the per-VM capability,
 501                  * KVM_CAP_EXCEPTION_PAYLOAD.
 502                  */
 503                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 504                     !is_guest_mode(vcpu))
 505                         kvm_deliver_exception_payload(vcpu);
 506                 return;
 507         }
 508
 509         /* to check exception */
 510         prev_nr = vcpu->arch.exception.nr;
 511         if (prev_nr == DF_VECTOR) {
 512                 /* triple fault -> shutdown */
 513                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 514                 return;
 515         }
 516         class1 = exception_class(prev_nr);
 517         class2 = exception_class(nr);
 518         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 519                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 520                 /*
 521                  * Generate double fault per SDM Table 5-5.  Set
 522                  * exception.pending = true so that the double fault
 523                  * can trigger a nested vmexit.
 524                  */
 525                 vcpu->arch.exception.pending = true;
 526                 vcpu->arch.exception.injected = false;
 527                 vcpu->arch.exception.has_error_code = true;
 528                 vcpu->arch.exception.nr = DF_VECTOR;
 529                 vcpu->arch.exception.error_code = 0;
 530                 vcpu->arch.exception.has_payload = false;
 531                 vcpu->arch.exception.payload = 0;
 532         } else
 533                 /* replace previous exception with a new one in a hope
 534                    that instruction re-execution will regenerate lost
 535                    exception */
 536                 goto queue;
 537 }
 538
 539 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 540 {
 541         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 544
 545 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 546 {
 547         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 548 }
 549 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 550
 551 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 552                                   unsigned long payload)
 553 {
 554         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 555 }
 556
 557 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 558                                     u32 error_code, unsigned long payload)
 559 {
 560         kvm_multiple_exception(vcpu, nr, true, error_code,
 561                                true, payload, false);
 562 }
 563
 564 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 565 {
 566         if (err)
 567                 kvm_inject_gp(vcpu, 0);
 568         else
 569                 return kvm_skip_emulated_instruction(vcpu);
 570
 571         return 1;
 572 }
 573 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 574
 575 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 576 {
 577         ++vcpu->stat.pf_guest;
 578         vcpu->arch.exception.nested_apf =
 579                 is_guest_mode(vcpu) && fault->async_page_fault;
 580         if (vcpu->arch.exception.nested_apf) {
 581                 vcpu->arch.apf.nested_apf_token = fault->address;
 582                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 583         } else {
 584                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 585                                         fault->address);
 586         }
 587 }
 588 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 589
 590 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 591 {
 592         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 593                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 594         else
 595                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 596
 597         return fault->nested_page_fault;
 598 }
 599
 600 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 601 {
 602         atomic_inc(&vcpu->arch.nmi_queued);
 603         kvm_make_request(KVM_REQ_NMI, vcpu);
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 606
 607 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 608 {
 609         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 612
 613 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 614 {
 615         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 618
 619 /*
 620  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 621  * a #GP and return false.
 622  */
 623 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 624 {
 625         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 626                 return true;
 627         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 628         return false;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 631
 632 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 633 {
 634         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 635                 return true;
 636
 637         kvm_queue_exception(vcpu, UD_VECTOR);
 638         return false;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_require_dr);
 641
 642 /*
 643  * This function will be used to read from the physical memory of the currently
 644  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 645  * can read from guest physical or from the guest's guest physical memory.
 646  */
 647 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 648                             gfn_t ngfn, void *data, int offset, int len,
 649                             u32 access)
 650 {
 651         struct x86_exception exception;
 652         gfn_t real_gfn;
 653         gpa_t ngpa;
 654
 655         ngpa     = gfn_to_gpa(ngfn);
 656         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 657         if (real_gfn == UNMAPPED_GVA)
 658                 return -EFAULT;
 659
 660         real_gfn = gpa_to_gfn(real_gfn);
 661
 662         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 665
 666 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 667                                void *data, int offset, int len, u32 access)
 668 {
 669         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 670                                        data, offset, len, access);
 671 }
 672
 673 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 674 {
 675         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 676                rsvd_bits(1, 2);
 677 }
 678
 679 /*
 680  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 681  */
 682 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 683 {
 684         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 685         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 686         int i;
 687         int ret;
 688         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 689
 690         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 691                                       offset * sizeof(u64), sizeof(pdpte),
 692                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 693         if (ret < 0) {
 694                 ret = 0;
 695                 goto out;
 696         }
 697         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 698                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 699                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 700                         ret = 0;
 701                         goto out;
 702                 }
 703         }
 704         ret = 1;
 705
 706         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 707         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 708
 709 out:
 710
 711         return ret;
 712 }
 713 EXPORT_SYMBOL_GPL(load_pdptrs);
 714
 715 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 716 {
 717         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 718         int offset;
 719         gfn_t gfn;
 720         int r;
 721
 722         if (!is_pae_paging(vcpu))
 723                 return false;
 724
 725         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 726                 return true;
 727
 728         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 729         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 730         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 731                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 732         if (r < 0)
 733                 return true;
 734
 735         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 736 }
 737 EXPORT_SYMBOL_GPL(pdptrs_changed);
 738
 739 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 740 {
 741         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 742         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 743
 744         cr0 |= X86_CR0_ET;
 745
 746 #ifdef CONFIG_X86_64
 747         if (cr0 & 0xffffffff00000000UL)
 748                 return 1;
 749 #endif
 750
 751         cr0 &= ~CR0_RESERVED_BITS;
 752
 753         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 754                 return 1;
 755
 756         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 757                 return 1;
 758
 759         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 760 #ifdef CONFIG_X86_64
 761                 if ((vcpu->arch.efer & EFER_LME)) {
 762                         int cs_db, cs_l;
 763
 764                         if (!is_pae(vcpu))
 765                                 return 1;
 766                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 767                         if (cs_l)
 768                                 return 1;
 769                 } else
 770 #endif
 771                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 772                                                  kvm_read_cr3(vcpu)))
 773                         return 1;
 774         }
 775
 776         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 777                 return 1;
 778
 779         kvm_x86_ops->set_cr0(vcpu, cr0);
 780
 781         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 782                 kvm_clear_async_pf_completion_queue(vcpu);
 783                 kvm_async_pf_hash_reset(vcpu);
 784         }
 785
 786         if ((cr0 ^ old_cr0) & update_bits)
 787                 kvm_mmu_reset_context(vcpu);
 788
 789         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 790             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 791             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 792                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 793
 794         return 0;
 795 }
 796 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 797
 798 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 799 {
 800         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 801 }
 802 EXPORT_SYMBOL_GPL(kvm_lmsw);
 803
 804 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 805 {
 806         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 807
 808                 if (vcpu->arch.xcr0 != host_xcr0)
 809                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 810
 811                 if (vcpu->arch.xsaves_enabled &&
 812                     vcpu->arch.ia32_xss != host_xss)
 813                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 814         }
 815 }
 816 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 817
 818 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 819 {
 820         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 821
 822                 if (vcpu->arch.xcr0 != host_xcr0)
 823                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 824
 825                 if (vcpu->arch.xsaves_enabled &&
 826                     vcpu->arch.ia32_xss != host_xss)
 827                         wrmsrl(MSR_IA32_XSS, host_xss);
 828         }
 829
 830 }
 831 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 832
 833 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 834 {
 835         u64 xcr0 = xcr;
 836         u64 old_xcr0 = vcpu->arch.xcr0;
 837         u64 valid_bits;
 838
 839         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 840         if (index != XCR_XFEATURE_ENABLED_MASK)
 841                 return 1;
 842         if (!(xcr0 & XFEATURE_MASK_FP))
 843                 return 1;
 844         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 845                 return 1;
 846
 847         /*
 848          * Do not allow the guest to set bits that we do not support
 849          * saving.  However, xcr0 bit 0 is always set, even if the
 850          * emulated CPU does not support XSAVE (see fx_init).
 851          */
 852         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 853         if (xcr0 & ~valid_bits)
 854                 return 1;
 855
 856         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 857             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 858                 return 1;
 859
 860         if (xcr0 & XFEATURE_MASK_AVX512) {
 861                 if (!(xcr0 & XFEATURE_MASK_YMM))
 862                         return 1;
 863                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 864                         return 1;
 865         }
 866         vcpu->arch.xcr0 = xcr0;
 867
 868         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 869                 kvm_update_cpuid(vcpu);
 870         return 0;
 871 }
 872
 873 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 874 {
 875         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 876             __kvm_set_xcr(vcpu, index, xcr)) {
 877                 kvm_inject_gp(vcpu, 0);
 878                 return 1;
 879         }
 880         return 0;
 881 }
 882 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 883
 884 #define __cr4_reserved_bits(__cpu_has, __c)             \
 885 ({                                                      \
 886         u64 __reserved_bits = CR4_RESERVED_BITS;        \
 887                                                         \
 888         if (!__cpu_has(__c, X86_FEATURE_XSAVE))         \
 889                 __reserved_bits |= X86_CR4_OSXSAVE;     \
 890         if (!__cpu_has(__c, X86_FEATURE_SMEP))          \
 891                 __reserved_bits |= X86_CR4_SMEP;        \
 892         if (!__cpu_has(__c, X86_FEATURE_SMAP))          \
 893                 __reserved_bits |= X86_CR4_SMAP;        \
 894         if (!__cpu_has(__c, X86_FEATURE_FSGSBASE))      \
 895                 __reserved_bits |= X86_CR4_FSGSBASE;    \
 896         if (!__cpu_has(__c, X86_FEATURE_PKU))           \
 897                 __reserved_bits |= X86_CR4_PKE;         \
 898         if (!__cpu_has(__c, X86_FEATURE_LA57))          \
 899                 __reserved_bits |= X86_CR4_LA57;        \
 900         __reserved_bits;                                \
 901 })
 902
 903 static u64 kvm_host_cr4_reserved_bits(struct cpuinfo_x86 *c)
 904 {
 905         u64 reserved_bits = __cr4_reserved_bits(cpu_has, c);
 906
 907         if (cpuid_ecx(0x7) & feature_bit(LA57))
 908                 reserved_bits &= ~X86_CR4_LA57;
 909
 910         if (kvm_x86_ops->umip_emulated())
 911                 reserved_bits &= ~X86_CR4_UMIP;
 912
 913         return reserved_bits;
 914 }
 915
 916 static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 917 {
 918         if (cr4 & cr4_reserved_bits)
 919                 return -EINVAL;
 920
 921         if (cr4 & __cr4_reserved_bits(guest_cpuid_has, vcpu))
 922                 return -EINVAL;
 923
 924         return 0;
 925 }
 926
 927 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 928 {
 929         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 930         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 931                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 932
 933         if (kvm_valid_cr4(vcpu, cr4))
 934                 return 1;
 935
 936         if (is_long_mode(vcpu)) {
 937                 if (!(cr4 & X86_CR4_PAE))
 938                         return 1;
 939         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 940                    && ((cr4 ^ old_cr4) & pdptr_bits)
 941                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 942                                    kvm_read_cr3(vcpu)))
 943                 return 1;
 944
 945         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 946                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 947                         return 1;
 948
 949                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 950                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 951                         return 1;
 952         }
 953
 954         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 955                 return 1;
 956
 957         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 958             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 959                 kvm_mmu_reset_context(vcpu);
 960
 961         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 962                 kvm_update_cpuid(vcpu);
 963
 964         return 0;
 965 }
 966 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 967
 968 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 969 {
 970         bool skip_tlb_flush = false;
 971 #ifdef CONFIG_X86_64
 972         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 973
 974         if (pcid_enabled) {
 975                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 976                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 977         }
 978 #endif
 979
 980         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 981                 if (!skip_tlb_flush) {
 982                         kvm_mmu_sync_roots(vcpu);
 983                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 984                 }
 985                 return 0;
 986         }
 987
 988         if (is_long_mode(vcpu) &&
 989             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 990                 return 1;
 991         else if (is_pae_paging(vcpu) &&
 992                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 993                 return 1;
 994
 995         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 996         vcpu->arch.cr3 = cr3;
 997         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
 998
 999         return 0;
1000 }
1001 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1002
1003 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1004 {
1005         if (cr8 & CR8_RESERVED_BITS)
1006                 return 1;
1007         if (lapic_in_kernel(vcpu))
1008                 kvm_lapic_set_tpr(vcpu, cr8);
1009         else
1010                 vcpu->arch.cr8 = cr8;
1011         return 0;
1012 }
1013 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1014
1015 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1016 {
1017         if (lapic_in_kernel(vcpu))
1018                 return kvm_lapic_get_cr8(vcpu);
1019         else
1020                 return vcpu->arch.cr8;
1021 }
1022 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1023
1024 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1025 {
1026         int i;
1027
1028         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1029                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1030                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1031                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1032         }
1033 }
1034
1035 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1036 {
1037         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1038                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1039 }
1040
1041 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1042 {
1043         unsigned long dr7;
1044
1045         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1046                 dr7 = vcpu->arch.guest_debug_dr7;
1047         else
1048                 dr7 = vcpu->arch.dr7;
1049         kvm_x86_ops->set_dr7(vcpu, dr7);
1050         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1051         if (dr7 & DR7_BP_EN_MASK)
1052                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1053 }
1054
1055 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1056 {
1057         u64 fixed = DR6_FIXED_1;
1058
1059         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1060                 fixed |= DR6_RTM;
1061         return fixed;
1062 }
1063
1064 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1065 {
1066         switch (dr) {
1067         case 0 ... 3:
1068                 vcpu->arch.db[dr] = val;
1069                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1070                         vcpu->arch.eff_db[dr] = val;
1071                 break;
1072         case 4:
1073                 /* fall through */
1074         case 6:
1075                 if (val & 0xffffffff00000000ULL)
1076                         return -1; /* #GP */
1077                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1078                 kvm_update_dr6(vcpu);
1079                 break;
1080         case 5:
1081                 /* fall through */
1082         default: /* 7 */
1083                 if (val & 0xffffffff00000000ULL)
1084                         return -1; /* #GP */
1085                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1086                 kvm_update_dr7(vcpu);
1087                 break;
1088         }
1089
1090         return 0;
1091 }
1092
1093 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1094 {
1095         if (__kvm_set_dr(vcpu, dr, val)) {
1096                 kvm_inject_gp(vcpu, 0);
1097                 return 1;
1098         }
1099         return 0;
1100 }
1101 EXPORT_SYMBOL_GPL(kvm_set_dr);
1102
1103 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1104 {
1105         switch (dr) {
1106         case 0 ... 3:
1107                 *val = vcpu->arch.db[dr];
1108                 break;
1109         case 4:
1110                 /* fall through */
1111         case 6:
1112                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1113                         *val = vcpu->arch.dr6;
1114                 else
1115                         *val = kvm_x86_ops->get_dr6(vcpu);
1116                 break;
1117         case 5:
1118                 /* fall through */
1119         default: /* 7 */
1120                 *val = vcpu->arch.dr7;
1121                 break;
1122         }
1123         return 0;
1124 }
1125 EXPORT_SYMBOL_GPL(kvm_get_dr);
1126
1127 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1128 {
1129         u32 ecx = kvm_rcx_read(vcpu);
1130         u64 data;
1131         int err;
1132
1133         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1134         if (err)
1135                 return err;
1136         kvm_rax_write(vcpu, (u32)data);
1137         kvm_rdx_write(vcpu, data >> 32);
1138         return err;
1139 }
1140 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1141
1142 /*
1143  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1144  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1145  *
1146  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1147  * extract the supported MSRs from the related const lists.
1148  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1149  * capabilities of the host cpu. This capabilities test skips MSRs that are
1150  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1151  * may depend on host virtualization features rather than host cpu features.
1152  */
1153
1154 static const u32 msrs_to_save_all[] = {
1155         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1156         MSR_STAR,
1157 #ifdef CONFIG_X86_64
1158         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1159 #endif
1160         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1161         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1162         MSR_IA32_SPEC_CTRL,
1163         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1164         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1165         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1166         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1167         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1168         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1169         MSR_IA32_UMWAIT_CONTROL,
1170
1171         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1172         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1173         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1174         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1175         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1176         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1177         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1178         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1179         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1180         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1181         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1182         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1183         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1184         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1185         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1186         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1187         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1188         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1189         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1190         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1191         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1192         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1193 };
1194
1195 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1196 static unsigned num_msrs_to_save;
1197
1198 static const u32 emulated_msrs_all[] = {
1199         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1200         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1201         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1202         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1203         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1204         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1205         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1206         HV_X64_MSR_RESET,
1207         HV_X64_MSR_VP_INDEX,
1208         HV_X64_MSR_VP_RUNTIME,
1209         HV_X64_MSR_SCONTROL,
1210         HV_X64_MSR_STIMER0_CONFIG,
1211         HV_X64_MSR_VP_ASSIST_PAGE,
1212         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1213         HV_X64_MSR_TSC_EMULATION_STATUS,
1214
1215         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1216         MSR_KVM_PV_EOI_EN,
1217
1218         MSR_IA32_TSC_ADJUST,
1219         MSR_IA32_TSCDEADLINE,
1220         MSR_IA32_ARCH_CAPABILITIES,
1221         MSR_IA32_MISC_ENABLE,
1222         MSR_IA32_MCG_STATUS,
1223         MSR_IA32_MCG_CTL,
1224         MSR_IA32_MCG_EXT_CTL,
1225         MSR_IA32_SMBASE,
1226         MSR_SMI_COUNT,
1227         MSR_PLATFORM_INFO,
1228         MSR_MISC_FEATURES_ENABLES,
1229         MSR_AMD64_VIRT_SPEC_CTRL,
1230         MSR_IA32_POWER_CTL,
1231         MSR_IA32_UCODE_REV,
1232
1233         /*
1234          * The following list leaves out MSRs whose values are determined
1235          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1236          * We always support the "true" VMX control MSRs, even if the host
1237          * processor does not, so I am putting these registers here rather
1238          * than in msrs_to_save_all.
1239          */
1240         MSR_IA32_VMX_BASIC,
1241         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1242         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1243         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1244         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1245         MSR_IA32_VMX_MISC,
1246         MSR_IA32_VMX_CR0_FIXED0,
1247         MSR_IA32_VMX_CR4_FIXED0,
1248         MSR_IA32_VMX_VMCS_ENUM,
1249         MSR_IA32_VMX_PROCBASED_CTLS2,
1250         MSR_IA32_VMX_EPT_VPID_CAP,
1251         MSR_IA32_VMX_VMFUNC,
1252
1253         MSR_K7_HWCR,
1254         MSR_KVM_POLL_CONTROL,
1255 };
1256
1257 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1258 static unsigned num_emulated_msrs;
1259
1260 /*
1261  * List of msr numbers which are used to expose MSR-based features that
1262  * can be used by a hypervisor to validate requested CPU features.
1263  */
1264 static const u32 msr_based_features_all[] = {
1265         MSR_IA32_VMX_BASIC,
1266         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1267         MSR_IA32_VMX_PINBASED_CTLS,
1268         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1269         MSR_IA32_VMX_PROCBASED_CTLS,
1270         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1271         MSR_IA32_VMX_EXIT_CTLS,
1272         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1273         MSR_IA32_VMX_ENTRY_CTLS,
1274         MSR_IA32_VMX_MISC,
1275         MSR_IA32_VMX_CR0_FIXED0,
1276         MSR_IA32_VMX_CR0_FIXED1,
1277         MSR_IA32_VMX_CR4_FIXED0,
1278         MSR_IA32_VMX_CR4_FIXED1,
1279         MSR_IA32_VMX_VMCS_ENUM,
1280         MSR_IA32_VMX_PROCBASED_CTLS2,
1281         MSR_IA32_VMX_EPT_VPID_CAP,
1282         MSR_IA32_VMX_VMFUNC,
1283
1284         MSR_F10H_DECFG,
1285         MSR_IA32_UCODE_REV,
1286         MSR_IA32_ARCH_CAPABILITIES,
1287 };
1288
1289 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1290 static unsigned int num_msr_based_features;
1291
1292 static u64 kvm_get_arch_capabilities(void)
1293 {
1294         u64 data = 0;
1295
1296         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1297                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1298
1299         /*
1300          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1301          * the nested hypervisor runs with NX huge pages.  If it is not,
1302          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1303          * L1 guests, so it need not worry about its own (L2) guests.
1304          */
1305         data |= ARCH_CAP_PSCHANGE_MC_NO;
1306
1307         /*
1308          * If we're doing cache flushes (either "always" or "cond")
1309          * we will do one whenever the guest does a vmlaunch/vmresume.
1310          * If an outer hypervisor is doing the cache flush for us
1311          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1312          * capability to the guest too, and if EPT is disabled we're not
1313          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1314          * require a nested hypervisor to do a flush of its own.
1315          */
1316         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1317                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1318
1319         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1320                 data |= ARCH_CAP_RDCL_NO;
1321         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1322                 data |= ARCH_CAP_SSB_NO;
1323         if (!boot_cpu_has_bug(X86_BUG_MDS))
1324                 data |= ARCH_CAP_MDS_NO;
1325
1326         /*
1327          * On TAA affected systems:
1328          *      - nothing to do if TSX is disabled on the host.
1329          *      - we emulate TSX_CTRL if present on the host.
1330          *        This lets the guest use VERW to clear CPU buffers.
1331          */
1332         if (!boot_cpu_has(X86_FEATURE_RTM))
1333                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1334         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1335                 data |= ARCH_CAP_TAA_NO;
1336
1337         return data;
1338 }
1339
1340 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1341 {
1342         switch (msr->index) {
1343         case MSR_IA32_ARCH_CAPABILITIES:
1344                 msr->data = kvm_get_arch_capabilities();
1345                 break;
1346         case MSR_IA32_UCODE_REV:
1347                 rdmsrl_safe(msr->index, &msr->data);
1348                 break;
1349         default:
1350                 if (kvm_x86_ops->get_msr_feature(msr))
1351                         return 1;
1352         }
1353         return 0;
1354 }
1355
1356 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1357 {
1358         struct kvm_msr_entry msr;
1359         int r;
1360
1361         msr.index = index;
1362         r = kvm_get_msr_feature(&msr);
1363         if (r)
1364                 return r;
1365
1366         *data = msr.data;
1367
1368         return 0;
1369 }
1370
1371 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1372 {
1373         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1374                 return false;
1375
1376         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1377                 return false;
1378
1379         if (efer & (EFER_LME | EFER_LMA) &&
1380             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1381                 return false;
1382
1383         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1384                 return false;
1385
1386         return true;
1387
1388 }
1389 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1390 {
1391         if (efer & efer_reserved_bits)
1392                 return false;
1393
1394         return __kvm_valid_efer(vcpu, efer);
1395 }
1396 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1397
1398 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1399 {
1400         u64 old_efer = vcpu->arch.efer;
1401         u64 efer = msr_info->data;
1402
1403         if (efer & efer_reserved_bits)
1404                 return 1;
1405
1406         if (!msr_info->host_initiated) {
1407                 if (!__kvm_valid_efer(vcpu, efer))
1408                         return 1;
1409
1410                 if (is_paging(vcpu) &&
1411                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1412                         return 1;
1413         }
1414
1415         efer &= ~EFER_LMA;
1416         efer |= vcpu->arch.efer & EFER_LMA;
1417
1418         kvm_x86_ops->set_efer(vcpu, efer);
1419
1420         /* Update reserved bits */
1421         if ((efer ^ old_efer) & EFER_NX)
1422                 kvm_mmu_reset_context(vcpu);
1423
1424         return 0;
1425 }
1426
1427 void kvm_enable_efer_bits(u64 mask)
1428 {
1429        efer_reserved_bits &= ~mask;
1430 }
1431 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1432
1433 /*
1434  * Write @data into the MSR specified by @index.  Select MSR specific fault
1435  * checks are bypassed if @host_initiated is %true.
1436  * Returns 0 on success, non-0 otherwise.
1437  * Assumes vcpu_load() was already called.
1438  */
1439 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1440                          bool host_initiated)
1441 {
1442         struct msr_data msr;
1443
1444         switch (index) {
1445         case MSR_FS_BASE:
1446         case MSR_GS_BASE:
1447         case MSR_KERNEL_GS_BASE:
1448         case MSR_CSTAR:
1449         case MSR_LSTAR:
1450                 if (is_noncanonical_address(data, vcpu))
1451                         return 1;
1452                 break;
1453         case MSR_IA32_SYSENTER_EIP:
1454         case MSR_IA32_SYSENTER_ESP:
1455                 /*
1456                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1457                  * non-canonical address is written on Intel but not on
1458                  * AMD (which ignores the top 32-bits, because it does
1459                  * not implement 64-bit SYSENTER).
1460                  *
1461                  * 64-bit code should hence be able to write a non-canonical
1462                  * value on AMD.  Making the address canonical ensures that
1463                  * vmentry does not fail on Intel after writing a non-canonical
1464                  * value, and that something deterministic happens if the guest
1465                  * invokes 64-bit SYSENTER.
1466                  */
1467                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1468         }
1469
1470         msr.data = data;
1471         msr.index = index;
1472         msr.host_initiated = host_initiated;
1473
1474         return kvm_x86_ops->set_msr(vcpu, &msr);
1475 }
1476
1477 /*
1478  * Read the MSR specified by @index into @data.  Select MSR specific fault
1479  * checks are bypassed if @host_initiated is %true.
1480  * Returns 0 on success, non-0 otherwise.
1481  * Assumes vcpu_load() was already called.
1482  */
1483 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1484                   bool host_initiated)
1485 {
1486         struct msr_data msr;
1487         int ret;
1488
1489         msr.index = index;
1490         msr.host_initiated = host_initiated;
1491
1492         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1493         if (!ret)
1494                 *data = msr.data;
1495         return ret;
1496 }
1497
1498 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1499 {
1500         return __kvm_get_msr(vcpu, index, data, false);
1501 }
1502 EXPORT_SYMBOL_GPL(kvm_get_msr);
1503
1504 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1505 {
1506         return __kvm_set_msr(vcpu, index, data, false);
1507 }
1508 EXPORT_SYMBOL_GPL(kvm_set_msr);
1509
1510 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1511 {
1512         u32 ecx = kvm_rcx_read(vcpu);
1513         u64 data;
1514
1515         if (kvm_get_msr(vcpu, ecx, &data)) {
1516                 trace_kvm_msr_read_ex(ecx);
1517                 kvm_inject_gp(vcpu, 0);
1518                 return 1;
1519         }
1520
1521         trace_kvm_msr_read(ecx, data);
1522
1523         kvm_rax_write(vcpu, data & -1u);
1524         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1525         return kvm_skip_emulated_instruction(vcpu);
1526 }
1527 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1528
1529 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1530 {
1531         u32 ecx = kvm_rcx_read(vcpu);
1532         u64 data = kvm_read_edx_eax(vcpu);
1533
1534         if (kvm_set_msr(vcpu, ecx, data)) {
1535                 trace_kvm_msr_write_ex(ecx, data);
1536                 kvm_inject_gp(vcpu, 0);
1537                 return 1;
1538         }
1539
1540         trace_kvm_msr_write(ecx, data);
1541         return kvm_skip_emulated_instruction(vcpu);
1542 }
1543 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1544
1545 /*
1546  * The fast path for frequent and performance sensitive wrmsr emulation,
1547  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1548  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1549  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1550  * other cases which must be called after interrupts are enabled on the host.
1551  */
1552 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1553 {
1554         if (lapic_in_kernel(vcpu) && apic_x2apic_mode(vcpu->arch.apic) &&
1555                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1556                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED)) {
1557
1558                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1559                 return kvm_lapic_reg_write(vcpu->arch.apic, APIC_ICR, (u32)data);
1560         }
1561
1562         return 1;
1563 }
1564
1565 enum exit_fastpath_completion handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1566 {
1567         u32 msr = kvm_rcx_read(vcpu);
1568         u64 data = kvm_read_edx_eax(vcpu);
1569         int ret = 0;
1570
1571         switch (msr) {
1572         case APIC_BASE_MSR + (APIC_ICR >> 4):
1573                 ret = handle_fastpath_set_x2apic_icr_irqoff(vcpu, data);
1574                 break;
1575         default:
1576                 return EXIT_FASTPATH_NONE;
1577         }
1578
1579         if (!ret) {
1580                 trace_kvm_msr_write(msr, data);
1581                 return EXIT_FASTPATH_SKIP_EMUL_INS;
1582         }
1583
1584         return EXIT_FASTPATH_NONE;
1585 }
1586 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1587
1588 /*
1589  * Adapt set_msr() to msr_io()'s calling convention
1590  */
1591 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1592 {
1593         return __kvm_get_msr(vcpu, index, data, true);
1594 }
1595
1596 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1597 {
1598         return __kvm_set_msr(vcpu, index, *data, true);
1599 }
1600
1601 #ifdef CONFIG_X86_64
1602 struct pvclock_clock {
1603         int vclock_mode;
1604         u64 cycle_last;
1605         u64 mask;
1606         u32 mult;
1607         u32 shift;
1608 };
1609
1610 struct pvclock_gtod_data {
1611         seqcount_t      seq;
1612
1613         struct pvclock_clock clock; /* extract of a clocksource struct */
1614         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1615
1616         u64             boot_ns_raw;
1617         u64             boot_ns;
1618         u64             nsec_base;
1619         u64             wall_time_sec;
1620         u64             monotonic_raw_nsec;
1621 };
1622
1623 static struct pvclock_gtod_data pvclock_gtod_data;
1624
1625 static void update_pvclock_gtod(struct timekeeper *tk)
1626 {
1627         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1628         u64 boot_ns, boot_ns_raw;
1629
1630         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1631         boot_ns_raw = ktime_to_ns(ktime_add(tk->tkr_raw.base, tk->offs_boot));
1632
1633         write_seqcount_begin(&vdata->seq);
1634
1635         /* copy pvclock gtod data */
1636         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1637         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1638         vdata->clock.mask               = tk->tkr_mono.mask;
1639         vdata->clock.mult               = tk->tkr_mono.mult;
1640         vdata->clock.shift              = tk->tkr_mono.shift;
1641
1642         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->archdata.vclock_mode;
1643         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1644         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1645         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1646         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1647
1648         vdata->boot_ns                  = boot_ns;
1649         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1650
1651         vdata->wall_time_sec            = tk->xtime_sec;
1652
1653         vdata->boot_ns_raw              = boot_ns_raw;
1654         vdata->monotonic_raw_nsec       = tk->tkr_raw.xtime_nsec;
1655
1656         write_seqcount_end(&vdata->seq);
1657 }
1658 #endif
1659
1660 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1661 {
1662         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1663         kvm_vcpu_kick(vcpu);
1664 }
1665
1666 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1667 {
1668         int version;
1669         int r;
1670         struct pvclock_wall_clock wc;
1671         struct timespec64 boot;
1672
1673         if (!wall_clock)
1674                 return;
1675
1676         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1677         if (r)
1678                 return;
1679
1680         if (version & 1)
1681                 ++version;  /* first time write, random junk */
1682
1683         ++version;
1684
1685         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1686                 return;
1687
1688         /*
1689          * The guest calculates current wall clock time by adding
1690          * system time (updated by kvm_guest_time_update below) to the
1691          * wall clock specified here.  guest system time equals host
1692          * system time for us, thus we must fill in host boot time here.
1693          */
1694         getboottime64(&boot);
1695
1696         if (kvm->arch.kvmclock_offset) {
1697                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1698                 boot = timespec64_sub(boot, ts);
1699         }
1700         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1701         wc.nsec = boot.tv_nsec;
1702         wc.version = version;
1703
1704         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1705
1706         version++;
1707         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1708 }
1709
1710 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1711 {
1712         do_shl32_div32(dividend, divisor);
1713         return dividend;
1714 }
1715
1716 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1717                                s8 *pshift, u32 *pmultiplier)
1718 {
1719         uint64_t scaled64;
1720         int32_t  shift = 0;
1721         uint64_t tps64;
1722         uint32_t tps32;
1723
1724         tps64 = base_hz;
1725         scaled64 = scaled_hz;
1726         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1727                 tps64 >>= 1;
1728                 shift--;
1729         }
1730
1731         tps32 = (uint32_t)tps64;
1732         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1733                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1734                         scaled64 >>= 1;
1735                 else
1736                         tps32 <<= 1;
1737                 shift++;
1738         }
1739
1740         *pshift = shift;
1741         *pmultiplier = div_frac(scaled64, tps32);
1742 }
1743
1744 #ifdef CONFIG_X86_64
1745 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1746 #endif
1747
1748 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1749 static unsigned long max_tsc_khz;
1750
1751 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1752 {
1753         u64 v = (u64)khz * (1000000 + ppm);
1754         do_div(v, 1000000);
1755         return v;
1756 }
1757
1758 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1759 {
1760         u64 ratio;
1761
1762         /* Guest TSC same frequency as host TSC? */
1763         if (!scale) {
1764                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1765                 return 0;
1766         }
1767
1768         /* TSC scaling supported? */
1769         if (!kvm_has_tsc_control) {
1770                 if (user_tsc_khz > tsc_khz) {
1771                         vcpu->arch.tsc_catchup = 1;
1772                         vcpu->arch.tsc_always_catchup = 1;
1773                         return 0;
1774                 } else {
1775                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1776                         return -1;
1777                 }
1778         }
1779
1780         /* TSC scaling required  - calculate ratio */
1781         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1782                                 user_tsc_khz, tsc_khz);
1783
1784         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1785                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1786                                     user_tsc_khz);
1787                 return -1;
1788         }
1789
1790         vcpu->arch.tsc_scaling_ratio = ratio;
1791         return 0;
1792 }
1793
1794 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1795 {
1796         u32 thresh_lo, thresh_hi;
1797         int use_scaling = 0;
1798
1799         /* tsc_khz can be zero if TSC calibration fails */
1800         if (user_tsc_khz == 0) {
1801                 /* set tsc_scaling_ratio to a safe value */
1802                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1803                 return -1;
1804         }
1805
1806         /* Compute a scale to convert nanoseconds in TSC cycles */
1807         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1808                            &vcpu->arch.virtual_tsc_shift,
1809                            &vcpu->arch.virtual_tsc_mult);
1810         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1811
1812         /*
1813          * Compute the variation in TSC rate which is acceptable
1814          * within the range of tolerance and decide if the
1815          * rate being applied is within that bounds of the hardware
1816          * rate.  If so, no scaling or compensation need be done.
1817          */
1818         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1819         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1820         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1821                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1822                 use_scaling = 1;
1823         }
1824         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1825 }
1826
1827 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1828 {
1829         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1830                                       vcpu->arch.virtual_tsc_mult,
1831                                       vcpu->arch.virtual_tsc_shift);
1832         tsc += vcpu->arch.this_tsc_write;
1833         return tsc;
1834 }
1835
1836 static inline int gtod_is_based_on_tsc(int mode)
1837 {
1838         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1839 }
1840
1841 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1842 {
1843 #ifdef CONFIG_X86_64
1844         bool vcpus_matched;
1845         struct kvm_arch *ka = &vcpu->kvm->arch;
1846         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1847
1848         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1849                          atomic_read(&vcpu->kvm->online_vcpus));
1850
1851         /*
1852          * Once the masterclock is enabled, always perform request in
1853          * order to update it.
1854          *
1855          * In order to enable masterclock, the host clocksource must be TSC
1856          * and the vcpus need to have matched TSCs.  When that happens,
1857          * perform request to enable masterclock.
1858          */
1859         if (ka->use_master_clock ||
1860             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1861                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1862
1863         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1864                             atomic_read(&vcpu->kvm->online_vcpus),
1865                             ka->use_master_clock, gtod->clock.vclock_mode);
1866 #endif
1867 }
1868
1869 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1870 {
1871         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1872         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1873 }
1874
1875 /*
1876  * Multiply tsc by a fixed point number represented by ratio.
1877  *
1878  * The most significant 64-N bits (mult) of ratio represent the
1879  * integral part of the fixed point number; the remaining N bits
1880  * (frac) represent the fractional part, ie. ratio represents a fixed
1881  * point number (mult + frac * 2^(-N)).
1882  *
1883  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1884  */
1885 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1886 {
1887         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1888 }
1889
1890 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1891 {
1892         u64 _tsc = tsc;
1893         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1894
1895         if (ratio != kvm_default_tsc_scaling_ratio)
1896                 _tsc = __scale_tsc(ratio, tsc);
1897
1898         return _tsc;
1899 }
1900 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1901
1902 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1903 {
1904         u64 tsc;
1905
1906         tsc = kvm_scale_tsc(vcpu, rdtsc());
1907
1908         return target_tsc - tsc;
1909 }
1910
1911 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1912 {
1913         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1914
1915         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1916 }
1917 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1918
1919 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1920 {
1921         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1922 }
1923
1924 static inline bool kvm_check_tsc_unstable(void)
1925 {
1926 #ifdef CONFIG_X86_64
1927         /*
1928          * TSC is marked unstable when we're running on Hyper-V,
1929          * 'TSC page' clocksource is good.
1930          */
1931         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1932                 return false;
1933 #endif
1934         return check_tsc_unstable();
1935 }
1936
1937 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1938 {
1939         struct kvm *kvm = vcpu->kvm;
1940         u64 offset, ns, elapsed;
1941         unsigned long flags;
1942         bool matched;
1943         bool already_matched;
1944         u64 data = msr->data;
1945         bool synchronizing = false;
1946
1947         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1948         offset = kvm_compute_tsc_offset(vcpu, data);
1949         ns = ktime_get_boottime_ns();
1950         elapsed = ns - kvm->arch.last_tsc_nsec;
1951
1952         if (vcpu->arch.virtual_tsc_khz) {
1953                 if (data == 0 && msr->host_initiated) {
1954                         /*
1955                          * detection of vcpu initialization -- need to sync
1956                          * with other vCPUs. This particularly helps to keep
1957                          * kvm_clock stable after CPU hotplug
1958                          */
1959                         synchronizing = true;
1960                 } else {
1961                         u64 tsc_exp = kvm->arch.last_tsc_write +
1962                                                 nsec_to_cycles(vcpu, elapsed);
1963                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1964                         /*
1965                          * Special case: TSC write with a small delta (1 second)
1966                          * of virtual cycle time against real time is
1967                          * interpreted as an attempt to synchronize the CPU.
1968                          */
1969                         synchronizing = data < tsc_exp + tsc_hz &&
1970                                         data + tsc_hz > tsc_exp;
1971                 }
1972         }
1973
1974         /*
1975          * For a reliable TSC, we can match TSC offsets, and for an unstable
1976          * TSC, we add elapsed time in this computation.  We could let the
1977          * compensation code attempt to catch up if we fall behind, but
1978          * it's better to try to match offsets from the beginning.
1979          */
1980         if (synchronizing &&
1981             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1982                 if (!kvm_check_tsc_unstable()) {
1983                         offset = kvm->arch.cur_tsc_offset;
1984                 } else {
1985                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1986                         data += delta;
1987                         offset = kvm_compute_tsc_offset(vcpu, data);
1988                 }
1989                 matched = true;
1990                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1991         } else {
1992                 /*
1993                  * We split periods of matched TSC writes into generations.
1994                  * For each generation, we track the original measured
1995                  * nanosecond time, offset, and write, so if TSCs are in
1996                  * sync, we can match exact offset, and if not, we can match
1997                  * exact software computation in compute_guest_tsc()
1998                  *
1999                  * These values are tracked in kvm->arch.cur_xxx variables.
2000                  */
2001                 kvm->arch.cur_tsc_generation++;
2002                 kvm->arch.cur_tsc_nsec = ns;
2003                 kvm->arch.cur_tsc_write = data;
2004                 kvm->arch.cur_tsc_offset = offset;
2005                 matched = false;
2006         }
2007
2008         /*
2009          * We also track th most recent recorded KHZ, write and time to
2010          * allow the matching interval to be extended at each write.
2011          */
2012         kvm->arch.last_tsc_nsec = ns;
2013         kvm->arch.last_tsc_write = data;
2014         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2015
2016         vcpu->arch.last_guest_tsc = data;
2017
2018         /* Keep track of which generation this VCPU has synchronized to */
2019         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2020         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2021         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2022
2023         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
2024                 update_ia32_tsc_adjust_msr(vcpu, offset);
2025
2026         kvm_vcpu_write_tsc_offset(vcpu, offset);
2027         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2028
2029         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2030         if (!matched) {
2031                 kvm->arch.nr_vcpus_matched_tsc = 0;
2032         } else if (!already_matched) {
2033                 kvm->arch.nr_vcpus_matched_tsc++;
2034         }
2035
2036         kvm_track_tsc_matching(vcpu);
2037         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2038 }
2039
2040 EXPORT_SYMBOL_GPL(kvm_write_tsc);
2041
2042 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2043                                            s64 adjustment)
2044 {
2045         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
2046         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2047 }
2048
2049 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2050 {
2051         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2052                 WARN_ON(adjustment < 0);
2053         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2054         adjust_tsc_offset_guest(vcpu, adjustment);
2055 }
2056
2057 #ifdef CONFIG_X86_64
2058
2059 static u64 read_tsc(void)
2060 {
2061         u64 ret = (u64)rdtsc_ordered();
2062         u64 last = pvclock_gtod_data.clock.cycle_last;
2063
2064         if (likely(ret >= last))
2065                 return ret;
2066
2067         /*
2068          * GCC likes to generate cmov here, but this branch is extremely
2069          * predictable (it's just a function of time and the likely is
2070          * very likely) and there's a data dependence, so force GCC
2071          * to generate a branch instead.  I don't barrier() because
2072          * we don't actually need a barrier, and if this function
2073          * ever gets inlined it will generate worse code.
2074          */
2075         asm volatile ("");
2076         return last;
2077 }
2078
2079 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2080                           int *mode)
2081 {
2082         long v;
2083         u64 tsc_pg_val;
2084
2085         switch (clock->vclock_mode) {
2086         case VCLOCK_HVCLOCK:
2087                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2088                                                   tsc_timestamp);
2089                 if (tsc_pg_val != U64_MAX) {
2090                         /* TSC page valid */
2091                         *mode = VCLOCK_HVCLOCK;
2092                         v = (tsc_pg_val - clock->cycle_last) &
2093                                 clock->mask;
2094                 } else {
2095                         /* TSC page invalid */
2096                         *mode = VCLOCK_NONE;
2097                 }
2098                 break;
2099         case VCLOCK_TSC:
2100                 *mode = VCLOCK_TSC;
2101                 *tsc_timestamp = read_tsc();
2102                 v = (*tsc_timestamp - clock->cycle_last) &
2103                         clock->mask;
2104                 break;
2105         default:
2106                 *mode = VCLOCK_NONE;
2107         }
2108
2109         if (*mode == VCLOCK_NONE)
2110                 *tsc_timestamp = v = 0;
2111
2112         return v * clock->mult;
2113 }
2114
2115 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2116 {
2117         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2118         unsigned long seq;
2119         int mode;
2120         u64 ns;
2121
2122         do {
2123                 seq = read_seqcount_begin(&gtod->seq);
2124                 ns = gtod->monotonic_raw_nsec;
2125                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2126                 ns >>= gtod->clock.shift;
2127                 ns += gtod->boot_ns_raw;
2128         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2129         *t = ns;
2130
2131         return mode;
2132 }
2133
2134 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2135 {
2136         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2137         unsigned long seq;
2138         int mode;
2139         u64 ns;
2140
2141         do {
2142                 seq = read_seqcount_begin(&gtod->seq);
2143                 ts->tv_sec = gtod->wall_time_sec;
2144                 ns = gtod->nsec_base;
2145                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2146                 ns >>= gtod->clock.shift;
2147         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2148
2149         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2150         ts->tv_nsec = ns;
2151
2152         return mode;
2153 }
2154
2155 /* returns true if host is using TSC based clocksource */
2156 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2157 {
2158         /* checked again under seqlock below */
2159         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2160                 return false;
2161
2162         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2163                                                       tsc_timestamp));
2164 }
2165
2166 /* returns true if host is using TSC based clocksource */
2167 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2168                                            u64 *tsc_timestamp)
2169 {
2170         /* checked again under seqlock below */
2171         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2172                 return false;
2173
2174         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2175 }
2176 #endif
2177
2178 /*
2179  *
2180  * Assuming a stable TSC across physical CPUS, and a stable TSC
2181  * across virtual CPUs, the following condition is possible.
2182  * Each numbered line represents an event visible to both
2183  * CPUs at the next numbered event.
2184  *
2185  * "timespecX" represents host monotonic time. "tscX" represents
2186  * RDTSC value.
2187  *
2188  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2189  *
2190  * 1.  read timespec0,tsc0
2191  * 2.                                   | timespec1 = timespec0 + N
2192  *                                      | tsc1 = tsc0 + M
2193  * 3. transition to guest               | transition to guest
2194  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2195  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2196  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2197  *
2198  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2199  *
2200  *      - ret0 < ret1
2201  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2202  *              ...
2203  *      - 0 < N - M => M < N
2204  *
2205  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2206  * always the case (the difference between two distinct xtime instances
2207  * might be smaller then the difference between corresponding TSC reads,
2208  * when updating guest vcpus pvclock areas).
2209  *
2210  * To avoid that problem, do not allow visibility of distinct
2211  * system_timestamp/tsc_timestamp values simultaneously: use a master
2212  * copy of host monotonic time values. Update that master copy
2213  * in lockstep.
2214  *
2215  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2216  *
2217  */
2218
2219 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2220 {
2221 #ifdef CONFIG_X86_64
2222         struct kvm_arch *ka = &kvm->arch;
2223         int vclock_mode;
2224         bool host_tsc_clocksource, vcpus_matched;
2225
2226         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2227                         atomic_read(&kvm->online_vcpus));
2228
2229         /*
2230          * If the host uses TSC clock, then passthrough TSC as stable
2231          * to the guest.
2232          */
2233         host_tsc_clocksource = kvm_get_time_and_clockread(
2234                                         &ka->master_kernel_ns,
2235                                         &ka->master_cycle_now);
2236
2237         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2238                                 && !ka->backwards_tsc_observed
2239                                 && !ka->boot_vcpu_runs_old_kvmclock;
2240
2241         if (ka->use_master_clock)
2242                 atomic_set(&kvm_guest_has_master_clock, 1);
2243
2244         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2245         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2246                                         vcpus_matched);
2247 #endif
2248 }
2249
2250 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2251 {
2252         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2253 }
2254
2255 static void kvm_gen_update_masterclock(struct kvm *kvm)
2256 {
2257 #ifdef CONFIG_X86_64
2258         int i;
2259         struct kvm_vcpu *vcpu;
2260         struct kvm_arch *ka = &kvm->arch;
2261
2262         spin_lock(&ka->pvclock_gtod_sync_lock);
2263         kvm_make_mclock_inprogress_request(kvm);
2264         /* no guest entries from this point */
2265         pvclock_update_vm_gtod_copy(kvm);
2266
2267         kvm_for_each_vcpu(i, vcpu, kvm)
2268                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2269
2270         /* guest entries allowed */
2271         kvm_for_each_vcpu(i, vcpu, kvm)
2272                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2273
2274         spin_unlock(&ka->pvclock_gtod_sync_lock);
2275 #endif
2276 }
2277
2278 u64 get_kvmclock_ns(struct kvm *kvm)
2279 {
2280         struct kvm_arch *ka = &kvm->arch;
2281         struct pvclock_vcpu_time_info hv_clock;
2282         u64 ret;
2283
2284         spin_lock(&ka->pvclock_gtod_sync_lock);
2285         if (!ka->use_master_clock) {
2286                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2287                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2288         }
2289
2290         hv_clock.tsc_timestamp = ka->master_cycle_now;
2291         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2292         spin_unlock(&ka->pvclock_gtod_sync_lock);
2293
2294         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2295         get_cpu();
2296
2297         if (__this_cpu_read(cpu_tsc_khz)) {
2298                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2299                                    &hv_clock.tsc_shift,
2300                                    &hv_clock.tsc_to_system_mul);
2301                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2302         } else
2303                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2304
2305         put_cpu();
2306
2307         return ret;
2308 }
2309
2310 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2311 {
2312         struct kvm_vcpu_arch *vcpu = &v->arch;
2313         struct pvclock_vcpu_time_info guest_hv_clock;
2314
2315         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2316                 &guest_hv_clock, sizeof(guest_hv_clock))))
2317                 return;
2318
2319         /* This VCPU is paused, but it's legal for a guest to read another
2320          * VCPU's kvmclock, so we really have to follow the specification where
2321          * it says that version is odd if data is being modified, and even after
2322          * it is consistent.
2323          *
2324          * Version field updates must be kept separate.  This is because
2325          * kvm_write_guest_cached might use a "rep movs" instruction, and
2326          * writes within a string instruction are weakly ordered.  So there
2327          * are three writes overall.
2328          *
2329          * As a small optimization, only write the version field in the first
2330          * and third write.  The vcpu->pv_time cache is still valid, because the
2331          * version field is the first in the struct.
2332          */
2333         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2334
2335         if (guest_hv_clock.version & 1)
2336                 ++guest_hv_clock.version;  /* first time write, random junk */
2337
2338         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2339         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2340                                 &vcpu->hv_clock,
2341                                 sizeof(vcpu->hv_clock.version));
2342
2343         smp_wmb();
2344
2345         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2346         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2347
2348         if (vcpu->pvclock_set_guest_stopped_request) {
2349                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2350                 vcpu->pvclock_set_guest_stopped_request = false;
2351         }
2352
2353         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2354
2355         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2356                                 &vcpu->hv_clock,
2357                                 sizeof(vcpu->hv_clock));
2358
2359         smp_wmb();
2360
2361         vcpu->hv_clock.version++;
2362         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2363                                 &vcpu->hv_clock,
2364                                 sizeof(vcpu->hv_clock.version));
2365 }
2366
2367 static int kvm_guest_time_update(struct kvm_vcpu *v)
2368 {
2369         unsigned long flags, tgt_tsc_khz;
2370         struct kvm_vcpu_arch *vcpu = &v->arch;
2371         struct kvm_arch *ka = &v->kvm->arch;
2372         s64 kernel_ns;
2373         u64 tsc_timestamp, host_tsc;
2374         u8 pvclock_flags;
2375         bool use_master_clock;
2376
2377         kernel_ns = 0;
2378         host_tsc = 0;
2379
2380         /*
2381          * If the host uses TSC clock, then passthrough TSC as stable
2382          * to the guest.
2383          */
2384         spin_lock(&ka->pvclock_gtod_sync_lock);
2385         use_master_clock = ka->use_master_clock;
2386         if (use_master_clock) {
2387                 host_tsc = ka->master_cycle_now;
2388                 kernel_ns = ka->master_kernel_ns;
2389         }
2390         spin_unlock(&ka->pvclock_gtod_sync_lock);
2391
2392         /* Keep irq disabled to prevent changes to the clock */
2393         local_irq_save(flags);
2394         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2395         if (unlikely(tgt_tsc_khz == 0)) {
2396                 local_irq_restore(flags);
2397                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2398                 return 1;
2399         }
2400         if (!use_master_clock) {
2401                 host_tsc = rdtsc();
2402                 kernel_ns = ktime_get_boottime_ns();
2403         }
2404
2405         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2406
2407         /*
2408          * We may have to catch up the TSC to match elapsed wall clock
2409          * time for two reasons, even if kvmclock is used.
2410          *   1) CPU could have been running below the maximum TSC rate
2411          *   2) Broken TSC compensation resets the base at each VCPU
2412          *      entry to avoid unknown leaps of TSC even when running
2413          *      again on the same CPU.  This may cause apparent elapsed
2414          *      time to disappear, and the guest to stand still or run
2415          *      very slowly.
2416          */
2417         if (vcpu->tsc_catchup) {
2418                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2419                 if (tsc > tsc_timestamp) {
2420                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2421                         tsc_timestamp = tsc;
2422                 }
2423         }
2424
2425         local_irq_restore(flags);
2426
2427         /* With all the info we got, fill in the values */
2428
2429         if (kvm_has_tsc_control)
2430                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2431
2432         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2433                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2434                                    &vcpu->hv_clock.tsc_shift,
2435                                    &vcpu->hv_clock.tsc_to_system_mul);
2436                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2437         }
2438
2439         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2440         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2441         vcpu->last_guest_tsc = tsc_timestamp;
2442
2443         /* If the host uses TSC clocksource, then it is stable */
2444         pvclock_flags = 0;
2445         if (use_master_clock)
2446                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2447
2448         vcpu->hv_clock.flags = pvclock_flags;
2449
2450         if (vcpu->pv_time_enabled)
2451                 kvm_setup_pvclock_page(v);
2452         if (v == kvm_get_vcpu(v->kvm, 0))
2453                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2454         return 0;
2455 }
2456
2457 /*
2458  * kvmclock updates which are isolated to a given vcpu, such as
2459  * vcpu->cpu migration, should not allow system_timestamp from
2460  * the rest of the vcpus to remain static. Otherwise ntp frequency
2461  * correction applies to one vcpu's system_timestamp but not
2462  * the others.
2463  *
2464  * So in those cases, request a kvmclock update for all vcpus.
2465  * We need to rate-limit these requests though, as they can
2466  * considerably slow guests that have a large number of vcpus.
2467  * The time for a remote vcpu to update its kvmclock is bound
2468  * by the delay we use to rate-limit the updates.
2469  */
2470
2471 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2472
2473 static void kvmclock_update_fn(struct work_struct *work)
2474 {
2475         int i;
2476         struct delayed_work *dwork = to_delayed_work(work);
2477         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2478                                            kvmclock_update_work);
2479         struct kvm *kvm = container_of(ka, struct kvm, arch);
2480         struct kvm_vcpu *vcpu;
2481
2482         kvm_for_each_vcpu(i, vcpu, kvm) {
2483                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2484                 kvm_vcpu_kick(vcpu);
2485         }
2486 }
2487
2488 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2489 {
2490         struct kvm *kvm = v->kvm;
2491
2492         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2493         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2494                                         KVMCLOCK_UPDATE_DELAY);
2495 }
2496
2497 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2498
2499 static void kvmclock_sync_fn(struct work_struct *work)
2500 {
2501         struct delayed_work *dwork = to_delayed_work(work);
2502         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2503                                            kvmclock_sync_work);
2504         struct kvm *kvm = container_of(ka, struct kvm, arch);
2505
2506         if (!kvmclock_periodic_sync)
2507                 return;
2508
2509         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2510         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2511                                         KVMCLOCK_SYNC_PERIOD);
2512 }
2513
2514 /*
2515  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2516  */
2517 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2518 {
2519         /* McStatusWrEn enabled? */
2520         if (guest_cpuid_is_amd(vcpu))
2521                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2522
2523         return false;
2524 }
2525
2526 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2527 {
2528         u64 mcg_cap = vcpu->arch.mcg_cap;
2529         unsigned bank_num = mcg_cap & 0xff;
2530         u32 msr = msr_info->index;
2531         u64 data = msr_info->data;
2532
2533         switch (msr) {
2534         case MSR_IA32_MCG_STATUS:
2535                 vcpu->arch.mcg_status = data;
2536                 break;
2537         case MSR_IA32_MCG_CTL:
2538                 if (!(mcg_cap & MCG_CTL_P) &&
2539                     (data || !msr_info->host_initiated))
2540                         return 1;
2541                 if (data != 0 && data != ~(u64)0)
2542                         return 1;
2543                 vcpu->arch.mcg_ctl = data;
2544                 break;
2545         default:
2546                 if (msr >= MSR_IA32_MC0_CTL &&
2547                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2548                         u32 offset = msr - MSR_IA32_MC0_CTL;
2549                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2550                          * some Linux kernels though clear bit 10 in bank 4 to
2551                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2552                          * this to avoid an uncatched #GP in the guest
2553                          */
2554                         if ((offset & 0x3) == 0 &&
2555                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2556                                 return -1;
2557
2558                         /* MCi_STATUS */
2559                         if (!msr_info->host_initiated &&
2560                             (offset & 0x3) == 1 && data != 0) {
2561                                 if (!can_set_mci_status(vcpu))
2562                                         return -1;
2563                         }
2564
2565                         vcpu->arch.mce_banks[offset] = data;
2566                         break;
2567                 }
2568                 return 1;
2569         }
2570         return 0;
2571 }
2572
2573 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2574 {
2575         struct kvm *kvm = vcpu->kvm;
2576         int lm = is_long_mode(vcpu);
2577         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2578                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2579         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2580                 : kvm->arch.xen_hvm_config.blob_size_32;
2581         u32 page_num = data & ~PAGE_MASK;
2582         u64 page_addr = data & PAGE_MASK;
2583         u8 *page;
2584         int r;
2585
2586         r = -E2BIG;
2587         if (page_num >= blob_size)
2588                 goto out;
2589         r = -ENOMEM;
2590         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2591         if (IS_ERR(page)) {
2592                 r = PTR_ERR(page);
2593                 goto out;
2594         }
2595         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2596                 goto out_free;
2597         r = 0;
2598 out_free:
2599         kfree(page);
2600 out:
2601         return r;
2602 }
2603
2604 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2605 {
2606         gpa_t gpa = data & ~0x3f;
2607
2608         /* Bits 3:5 are reserved, Should be zero */
2609         if (data & 0x38)
2610                 return 1;
2611
2612         vcpu->arch.apf.msr_val = data;
2613
2614         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2615                 kvm_clear_async_pf_completion_queue(vcpu);
2616                 kvm_async_pf_hash_reset(vcpu);
2617                 return 0;
2618         }
2619
2620         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2621                                         sizeof(u32)))
2622                 return 1;
2623
2624         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2625         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2626         kvm_async_pf_wakeup_all(vcpu);
2627         return 0;
2628 }
2629
2630 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2631 {
2632         vcpu->arch.pv_time_enabled = false;
2633         vcpu->arch.time = 0;
2634 }
2635
2636 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2637 {
2638         ++vcpu->stat.tlb_flush;
2639         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2640 }
2641
2642 static void record_steal_time(struct kvm_vcpu *vcpu)
2643 {
2644         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2645                 return;
2646
2647         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2648                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2649                 return;
2650
2651         /*
2652          * Doing a TLB flush here, on the guest's behalf, can avoid
2653          * expensive IPIs.
2654          */
2655         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2656                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2657         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2658                 kvm_vcpu_flush_tlb(vcpu, false);
2659
2660         if (vcpu->arch.st.steal.version & 1)
2661                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2662
2663         vcpu->arch.st.steal.version += 1;
2664
2665         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2666                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2667
2668         smp_wmb();
2669
2670         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2671                 vcpu->arch.st.last_steal;
2672         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2673
2674         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2675                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2676
2677         smp_wmb();
2678
2679         vcpu->arch.st.steal.version += 1;
2680
2681         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2682                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2683 }
2684
2685 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2686 {
2687         bool pr = false;
2688         u32 msr = msr_info->index;
2689         u64 data = msr_info->data;
2690
2691         switch (msr) {
2692         case MSR_AMD64_NB_CFG:
2693         case MSR_IA32_UCODE_WRITE:
2694         case MSR_VM_HSAVE_PA:
2695         case MSR_AMD64_PATCH_LOADER:
2696         case MSR_AMD64_BU_CFG2:
2697         case MSR_AMD64_DC_CFG:
2698         case MSR_F15H_EX_CFG:
2699                 break;
2700
2701         case MSR_IA32_UCODE_REV:
2702                 if (msr_info->host_initiated)
2703                         vcpu->arch.microcode_version = data;
2704                 break;
2705         case MSR_IA32_ARCH_CAPABILITIES:
2706                 if (!msr_info->host_initiated)
2707                         return 1;
2708                 vcpu->arch.arch_capabilities = data;
2709                 break;
2710         case MSR_EFER:
2711                 return set_efer(vcpu, msr_info);
2712         case MSR_K7_HWCR:
2713                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2714                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2715                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2716
2717                 /* Handle McStatusWrEn */
2718                 if (data == BIT_ULL(18)) {
2719                         vcpu->arch.msr_hwcr = data;
2720                 } else if (data != 0) {
2721                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2722                                     data);
2723                         return 1;
2724                 }
2725                 break;
2726         case MSR_FAM10H_MMIO_CONF_BASE:
2727                 if (data != 0) {
2728                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2729                                     "0x%llx\n", data);
2730                         return 1;
2731                 }
2732                 break;
2733         case MSR_IA32_DEBUGCTLMSR:
2734                 if (!data) {
2735                         /* We support the non-activated case already */
2736                         break;
2737                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2738                         /* Values other than LBR and BTF are vendor-specific,
2739                            thus reserved and should throw a #GP */
2740                         return 1;
2741                 }
2742                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2743                             __func__, data);
2744                 break;
2745         case 0x200 ... 0x2ff:
2746                 return kvm_mtrr_set_msr(vcpu, msr, data);
2747         case MSR_IA32_APICBASE:
2748                 return kvm_set_apic_base(vcpu, msr_info);
2749         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2750                 return kvm_x2apic_msr_write(vcpu, msr, data);
2751         case MSR_IA32_TSCDEADLINE:
2752                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2753                 break;
2754         case MSR_IA32_TSC_ADJUST:
2755                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2756                         if (!msr_info->host_initiated) {
2757                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2758                                 adjust_tsc_offset_guest(vcpu, adj);
2759                         }
2760                         vcpu->arch.ia32_tsc_adjust_msr = data;
2761                 }
2762                 break;
2763         case MSR_IA32_MISC_ENABLE:
2764                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2765                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2766                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2767                                 return 1;
2768                         vcpu->arch.ia32_misc_enable_msr = data;
2769                         kvm_update_cpuid(vcpu);
2770                 } else {
2771                         vcpu->arch.ia32_misc_enable_msr = data;
2772                 }
2773                 break;
2774         case MSR_IA32_SMBASE:
2775                 if (!msr_info->host_initiated)
2776                         return 1;
2777                 vcpu->arch.smbase = data;
2778                 break;
2779         case MSR_IA32_POWER_CTL:
2780                 vcpu->arch.msr_ia32_power_ctl = data;
2781                 break;
2782         case MSR_IA32_TSC:
2783                 kvm_write_tsc(vcpu, msr_info);
2784                 break;
2785         case MSR_IA32_XSS:
2786                 if (!msr_info->host_initiated &&
2787                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
2788                         return 1;
2789                 /*
2790                  * We do support PT if kvm_x86_ops->pt_supported(), but we do
2791                  * not support IA32_XSS[bit 8]. Guests will have to use
2792                  * RDMSR/WRMSR rather than XSAVES/XRSTORS to save/restore PT
2793                  * MSRs.
2794                  */
2795                 if (data != 0)
2796                         return 1;
2797                 vcpu->arch.ia32_xss = data;
2798                 break;
2799         case MSR_SMI_COUNT:
2800                 if (!msr_info->host_initiated)
2801                         return 1;
2802                 vcpu->arch.smi_count = data;
2803                 break;
2804         case MSR_KVM_WALL_CLOCK_NEW:
2805         case MSR_KVM_WALL_CLOCK:
2806                 vcpu->kvm->arch.wall_clock = data;
2807                 kvm_write_wall_clock(vcpu->kvm, data);
2808                 break;
2809         case MSR_KVM_SYSTEM_TIME_NEW:
2810         case MSR_KVM_SYSTEM_TIME: {
2811                 struct kvm_arch *ka = &vcpu->kvm->arch;
2812
2813                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2814                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2815
2816                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2817                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2818
2819                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2820                 }
2821
2822                 vcpu->arch.time = data;
2823                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2824
2825                 /* we verify if the enable bit is set... */
2826                 vcpu->arch.pv_time_enabled = false;
2827                 if (!(data & 1))
2828                         break;
2829
2830                 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2831                      &vcpu->arch.pv_time, data & ~1ULL,
2832                      sizeof(struct pvclock_vcpu_time_info)))
2833                         vcpu->arch.pv_time_enabled = true;
2834
2835                 break;
2836         }
2837         case MSR_KVM_ASYNC_PF_EN:
2838                 if (kvm_pv_enable_async_pf(vcpu, data))
2839                         return 1;
2840                 break;
2841         case MSR_KVM_STEAL_TIME:
2842
2843                 if (unlikely(!sched_info_on()))
2844                         return 1;
2845
2846                 if (data & KVM_STEAL_RESERVED_MASK)
2847                         return 1;
2848
2849                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2850                                                 data & KVM_STEAL_VALID_BITS,
2851                                                 sizeof(struct kvm_steal_time)))
2852                         return 1;
2853
2854                 vcpu->arch.st.msr_val = data;
2855
2856                 if (!(data & KVM_MSR_ENABLED))
2857                         break;
2858
2859                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2860
2861                 break;
2862         case MSR_KVM_PV_EOI_EN:
2863                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2864                         return 1;
2865                 break;
2866
2867         case MSR_KVM_POLL_CONTROL:
2868                 /* only enable bit supported */
2869                 if (data & (-1ULL << 1))
2870                         return 1;
2871
2872                 vcpu->arch.msr_kvm_poll_control = data;
2873                 break;
2874
2875         case MSR_IA32_MCG_CTL:
2876         case MSR_IA32_MCG_STATUS:
2877         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2878                 return set_msr_mce(vcpu, msr_info);
2879
2880         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2881         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2882                 pr = true; /* fall through */
2883         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2884         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2885                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2886                         return kvm_pmu_set_msr(vcpu, msr_info);
2887
2888                 if (pr || data != 0)
2889                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2890                                     "0x%x data 0x%llx\n", msr, data);
2891                 break;
2892         case MSR_K7_CLK_CTL:
2893                 /*
2894                  * Ignore all writes to this no longer documented MSR.
2895                  * Writes are only relevant for old K7 processors,
2896                  * all pre-dating SVM, but a recommended workaround from
2897                  * AMD for these chips. It is possible to specify the
2898                  * affected processor models on the command line, hence
2899                  * the need to ignore the workaround.
2900                  */
2901                 break;
2902         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2903         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2904         case HV_X64_MSR_CRASH_CTL:
2905         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2906         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2907         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2908         case HV_X64_MSR_TSC_EMULATION_STATUS:
2909                 return kvm_hv_set_msr_common(vcpu, msr, data,
2910                                              msr_info->host_initiated);
2911         case MSR_IA32_BBL_CR_CTL3:
2912                 /* Drop writes to this legacy MSR -- see rdmsr
2913                  * counterpart for further detail.
2914                  */
2915                 if (report_ignored_msrs)
2916                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2917                                 msr, data);
2918                 break;
2919         case MSR_AMD64_OSVW_ID_LENGTH:
2920                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2921                         return 1;
2922                 vcpu->arch.osvw.length = data;
2923                 break;
2924         case MSR_AMD64_OSVW_STATUS:
2925                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2926                         return 1;
2927                 vcpu->arch.osvw.status = data;
2928                 break;
2929         case MSR_PLATFORM_INFO:
2930                 if (!msr_info->host_initiated ||
2931                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2932                      cpuid_fault_enabled(vcpu)))
2933                         return 1;
2934                 vcpu->arch.msr_platform_info = data;
2935                 break;
2936         case MSR_MISC_FEATURES_ENABLES:
2937                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2938                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2939                      !supports_cpuid_fault(vcpu)))
2940                         return 1;
2941                 vcpu->arch.msr_misc_features_enables = data;
2942                 break;
2943         default:
2944                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2945                         return xen_hvm_config(vcpu, data);
2946                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2947                         return kvm_pmu_set_msr(vcpu, msr_info);
2948                 if (!ignore_msrs) {
2949                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2950                                     msr, data);
2951                         return 1;
2952                 } else {
2953                         if (report_ignored_msrs)
2954                                 vcpu_unimpl(vcpu,
2955                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2956                                         msr, data);
2957                         break;
2958                 }
2959         }
2960         return 0;
2961 }
2962 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2963
2964 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2965 {
2966         u64 data;
2967         u64 mcg_cap = vcpu->arch.mcg_cap;
2968         unsigned bank_num = mcg_cap & 0xff;
2969
2970         switch (msr) {
2971         case MSR_IA32_P5_MC_ADDR:
2972         case MSR_IA32_P5_MC_TYPE:
2973                 data = 0;
2974                 break;
2975         case MSR_IA32_MCG_CAP:
2976                 data = vcpu->arch.mcg_cap;
2977                 break;
2978         case MSR_IA32_MCG_CTL:
2979                 if (!(mcg_cap & MCG_CTL_P) && !host)
2980                         return 1;
2981                 data = vcpu->arch.mcg_ctl;
2982                 break;
2983         case MSR_IA32_MCG_STATUS:
2984                 data = vcpu->arch.mcg_status;
2985                 break;
2986         default:
2987                 if (msr >= MSR_IA32_MC0_CTL &&
2988                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2989                         u32 offset = msr - MSR_IA32_MC0_CTL;
2990                         data = vcpu->arch.mce_banks[offset];
2991                         break;
2992                 }
2993                 return 1;
2994         }
2995         *pdata = data;
2996         return 0;
2997 }
2998
2999 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3000 {
3001         switch (msr_info->index) {
3002         case MSR_IA32_PLATFORM_ID:
3003         case MSR_IA32_EBL_CR_POWERON:
3004         case MSR_IA32_DEBUGCTLMSR:
3005         case MSR_IA32_LASTBRANCHFROMIP:
3006         case MSR_IA32_LASTBRANCHTOIP:
3007         case MSR_IA32_LASTINTFROMIP:
3008         case MSR_IA32_LASTINTTOIP:
3009         case MSR_K8_SYSCFG:
3010         case MSR_K8_TSEG_ADDR:
3011         case MSR_K8_TSEG_MASK:
3012         case MSR_VM_HSAVE_PA:
3013         case MSR_K8_INT_PENDING_MSG:
3014         case MSR_AMD64_NB_CFG:
3015         case MSR_FAM10H_MMIO_CONF_BASE:
3016         case MSR_AMD64_BU_CFG2:
3017         case MSR_IA32_PERF_CTL:
3018         case MSR_AMD64_DC_CFG:
3019         case MSR_F15H_EX_CFG:
3020                 msr_info->data = 0;
3021                 break;
3022         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3023         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3024         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3025         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3026         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3027                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3028                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3029                 msr_info->data = 0;
3030                 break;
3031         case MSR_IA32_UCODE_REV:
3032                 msr_info->data = vcpu->arch.microcode_version;
3033                 break;
3034         case MSR_IA32_ARCH_CAPABILITIES:
3035                 if (!msr_info->host_initiated &&
3036                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3037                         return 1;
3038                 msr_info->data = vcpu->arch.arch_capabilities;
3039                 break;
3040         case MSR_IA32_POWER_CTL:
3041                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3042                 break;
3043         case MSR_IA32_TSC:
3044                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
3045                 break;
3046         case MSR_MTRRcap:
3047         case 0x200 ... 0x2ff:
3048                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3049         case 0xcd: /* fsb frequency */
3050                 msr_info->data = 3;
3051                 break;
3052                 /*
3053                  * MSR_EBC_FREQUENCY_ID
3054                  * Conservative value valid for even the basic CPU models.
3055                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3056                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3057                  * and 266MHz for model 3, or 4. Set Core Clock
3058                  * Frequency to System Bus Frequency Ratio to 1 (bits
3059                  * 31:24) even though these are only valid for CPU
3060                  * models > 2, however guests may end up dividing or
3061                  * multiplying by zero otherwise.
3062                  */
3063         case MSR_EBC_FREQUENCY_ID:
3064                 msr_info->data = 1 << 24;
3065                 break;
3066         case MSR_IA32_APICBASE:
3067                 msr_info->data = kvm_get_apic_base(vcpu);
3068                 break;
3069         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
3070                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3071                 break;
3072         case MSR_IA32_TSCDEADLINE:
3073                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3074                 break;
3075         case MSR_IA32_TSC_ADJUST:
3076                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3077                 break;
3078         case MSR_IA32_MISC_ENABLE:
3079                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3080                 break;
3081         case MSR_IA32_SMBASE:
3082                 if (!msr_info->host_initiated)
3083                         return 1;
3084                 msr_info->data = vcpu->arch.smbase;
3085                 break;
3086         case MSR_SMI_COUNT:
3087                 msr_info->data = vcpu->arch.smi_count;
3088                 break;
3089         case MSR_IA32_PERF_STATUS:
3090                 /* TSC increment by tick */
3091                 msr_info->data = 1000ULL;
3092                 /* CPU multiplier */
3093                 msr_info->data |= (((uint64_t)4ULL) << 40);
3094                 break;
3095         case MSR_EFER:
3096                 msr_info->data = vcpu->arch.efer;
3097                 break;
3098         case MSR_KVM_WALL_CLOCK:
3099         case MSR_KVM_WALL_CLOCK_NEW:
3100                 msr_info->data = vcpu->kvm->arch.wall_clock;
3101                 break;
3102         case MSR_KVM_SYSTEM_TIME:
3103         case MSR_KVM_SYSTEM_TIME_NEW:
3104                 msr_info->data = vcpu->arch.time;
3105                 break;
3106         case MSR_KVM_ASYNC_PF_EN:
3107                 msr_info->data = vcpu->arch.apf.msr_val;
3108                 break;
3109         case MSR_KVM_STEAL_TIME:
3110                 msr_info->data = vcpu->arch.st.msr_val;
3111                 break;
3112         case MSR_KVM_PV_EOI_EN:
3113                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3114                 break;
3115         case MSR_KVM_POLL_CONTROL:
3116                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3117                 break;
3118         case MSR_IA32_P5_MC_ADDR:
3119         case MSR_IA32_P5_MC_TYPE:
3120         case MSR_IA32_MCG_CAP:
3121         case MSR_IA32_MCG_CTL:
3122         case MSR_IA32_MCG_STATUS:
3123         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3124                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3125                                    msr_info->host_initiated);
3126         case MSR_IA32_XSS:
3127                 if (!msr_info->host_initiated &&
3128                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3129                         return 1;
3130                 msr_info->data = vcpu->arch.ia32_xss;
3131                 break;
3132         case MSR_K7_CLK_CTL:
3133                 /*
3134                  * Provide expected ramp-up count for K7. All other
3135                  * are set to zero, indicating minimum divisors for
3136                  * every field.
3137                  *
3138                  * This prevents guest kernels on AMD host with CPU
3139                  * type 6, model 8 and higher from exploding due to
3140                  * the rdmsr failing.
3141                  */
3142                 msr_info->data = 0x20000000;
3143                 break;
3144         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3145         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3146         case HV_X64_MSR_CRASH_CTL:
3147         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3148         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3149         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3150         case HV_X64_MSR_TSC_EMULATION_STATUS:
3151                 return kvm_hv_get_msr_common(vcpu,
3152                                              msr_info->index, &msr_info->data,
3153                                              msr_info->host_initiated);
3154                 break;
3155         case MSR_IA32_BBL_CR_CTL3:
3156                 /* This legacy MSR exists but isn't fully documented in current
3157                  * silicon.  It is however accessed by winxp in very narrow
3158                  * scenarios where it sets bit #19, itself documented as
3159                  * a "reserved" bit.  Best effort attempt to source coherent
3160                  * read data here should the balance of the register be
3161                  * interpreted by the guest:
3162                  *
3163                  * L2 cache control register 3: 64GB range, 256KB size,
3164                  * enabled, latency 0x1, configured
3165                  */
3166                 msr_info->data = 0xbe702111;
3167                 break;
3168         case MSR_AMD64_OSVW_ID_LENGTH:
3169                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3170                         return 1;
3171                 msr_info->data = vcpu->arch.osvw.length;
3172                 break;
3173         case MSR_AMD64_OSVW_STATUS:
3174                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3175                         return 1;
3176                 msr_info->data = vcpu->arch.osvw.status;
3177                 break;
3178         case MSR_PLATFORM_INFO:
3179                 if (!msr_info->host_initiated &&
3180                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3181                         return 1;
3182                 msr_info->data = vcpu->arch.msr_platform_info;
3183                 break;
3184         case MSR_MISC_FEATURES_ENABLES:
3185                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3186                 break;
3187         case MSR_K7_HWCR:
3188                 msr_info->data = vcpu->arch.msr_hwcr;
3189                 break;
3190         default:
3191                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3192                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3193                 if (!ignore_msrs) {
3194                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3195                                                msr_info->index);
3196                         return 1;
3197                 } else {
3198                         if (report_ignored_msrs)
3199                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3200                                         msr_info->index);
3201                         msr_info->data = 0;
3202                 }
3203                 break;
3204         }
3205         return 0;
3206 }
3207 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3208
3209 /*
3210  * Read or write a bunch of msrs. All parameters are kernel addresses.
3211  *
3212  * @return number of msrs set successfully.
3213  */
3214 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3215                     struct kvm_msr_entry *entries,
3216                     int (*do_msr)(struct kvm_vcpu *vcpu,
3217                                   unsigned index, u64 *data))
3218 {
3219         int i;
3220
3221         for (i = 0; i < msrs->nmsrs; ++i)
3222                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3223                         break;
3224
3225         return i;
3226 }
3227
3228 /*
3229  * Read or write a bunch of msrs. Parameters are user addresses.
3230  *
3231  * @return number of msrs set successfully.
3232  */
3233 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3234                   int (*do_msr)(struct kvm_vcpu *vcpu,
3235                                 unsigned index, u64 *data),
3236                   int writeback)
3237 {
3238         struct kvm_msrs msrs;
3239         struct kvm_msr_entry *entries;
3240         int r, n;
3241         unsigned size;
3242
3243         r = -EFAULT;
3244         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3245                 goto out;
3246
3247         r = -E2BIG;
3248         if (msrs.nmsrs >= MAX_IO_MSRS)
3249                 goto out;
3250
3251         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3252         entries = memdup_user(user_msrs->entries, size);
3253         if (IS_ERR(entries)) {
3254                 r = PTR_ERR(entries);
3255                 goto out;
3256         }
3257
3258         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3259         if (r < 0)
3260                 goto out_free;
3261
3262         r = -EFAULT;
3263         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3264                 goto out_free;
3265
3266         r = n;
3267
3268 out_free:
3269         kfree(entries);
3270 out:
3271         return r;
3272 }
3273
3274 static inline bool kvm_can_mwait_in_guest(void)
3275 {
3276         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3277                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3278                 boot_cpu_has(X86_FEATURE_ARAT);
3279 }
3280
3281 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3282 {
3283         int r = 0;
3284
3285         switch (ext) {
3286         case KVM_CAP_IRQCHIP:
3287         case KVM_CAP_HLT:
3288         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3289         case KVM_CAP_SET_TSS_ADDR:
3290         case KVM_CAP_EXT_CPUID:
3291         case KVM_CAP_EXT_EMUL_CPUID:
3292         case KVM_CAP_CLOCKSOURCE:
3293         case KVM_CAP_PIT:
3294         case KVM_CAP_NOP_IO_DELAY:
3295         case KVM_CAP_MP_STATE:
3296         case KVM_CAP_SYNC_MMU:
3297         case KVM_CAP_USER_NMI:
3298         case KVM_CAP_REINJECT_CONTROL:
3299         case KVM_CAP_IRQ_INJECT_STATUS:
3300         case KVM_CAP_IOEVENTFD:
3301         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3302         case KVM_CAP_PIT2:
3303         case KVM_CAP_PIT_STATE2:
3304         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3305         case KVM_CAP_XEN_HVM:
3306         case KVM_CAP_VCPU_EVENTS:
3307         case KVM_CAP_HYPERV:
3308         case KVM_CAP_HYPERV_VAPIC:
3309         case KVM_CAP_HYPERV_SPIN:
3310         case KVM_CAP_HYPERV_SYNIC:
3311         case KVM_CAP_HYPERV_SYNIC2:
3312         case KVM_CAP_HYPERV_VP_INDEX:
3313         case KVM_CAP_HYPERV_EVENTFD:
3314         case KVM_CAP_HYPERV_TLBFLUSH:
3315         case KVM_CAP_HYPERV_SEND_IPI:
3316         case KVM_CAP_HYPERV_CPUID:
3317         case KVM_CAP_PCI_SEGMENT:
3318         case KVM_CAP_DEBUGREGS:
3319         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3320         case KVM_CAP_XSAVE:
3321         case KVM_CAP_ASYNC_PF:
3322         case KVM_CAP_GET_TSC_KHZ:
3323         case KVM_CAP_KVMCLOCK_CTRL:
3324         case KVM_CAP_READONLY_MEM:
3325         case KVM_CAP_HYPERV_TIME:
3326         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3327         case KVM_CAP_TSC_DEADLINE_TIMER:
3328         case KVM_CAP_DISABLE_QUIRKS:
3329         case KVM_CAP_SET_BOOT_CPU_ID:
3330         case KVM_CAP_SPLIT_IRQCHIP:
3331         case KVM_CAP_IMMEDIATE_EXIT:
3332         case KVM_CAP_PMU_EVENT_FILTER:
3333         case KVM_CAP_GET_MSR_FEATURES:
3334         case KVM_CAP_MSR_PLATFORM_INFO:
3335         case KVM_CAP_EXCEPTION_PAYLOAD:
3336                 r = 1;
3337                 break;
3338         case KVM_CAP_SYNC_REGS:
3339                 r = KVM_SYNC_X86_VALID_FIELDS;
3340                 break;
3341         case KVM_CAP_ADJUST_CLOCK:
3342                 r = KVM_CLOCK_TSC_STABLE;
3343                 break;
3344         case KVM_CAP_X86_DISABLE_EXITS:
3345                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3346                       KVM_X86_DISABLE_EXITS_CSTATE;
3347                 if(kvm_can_mwait_in_guest())
3348                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3349                 break;
3350         case KVM_CAP_X86_SMM:
3351                 /* SMBASE is usually relocated above 1M on modern chipsets,
3352                  * and SMM handlers might indeed rely on 4G segment limits,
3353                  * so do not report SMM to be available if real mode is
3354                  * emulated via vm86 mode.  Still, do not go to great lengths
3355                  * to avoid userspace's usage of the feature, because it is a
3356                  * fringe case that is not enabled except via specific settings
3357                  * of the module parameters.
3358                  */
3359                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3360                 break;
3361         case KVM_CAP_VAPIC:
3362                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3363                 break;
3364         case KVM_CAP_NR_VCPUS:
3365                 r = KVM_SOFT_MAX_VCPUS;
3366                 break;
3367         case KVM_CAP_MAX_VCPUS:
3368                 r = KVM_MAX_VCPUS;
3369                 break;
3370         case KVM_CAP_MAX_VCPU_ID:
3371                 r = KVM_MAX_VCPU_ID;
3372                 break;
3373         case KVM_CAP_PV_MMU:    /* obsolete */
3374                 r = 0;
3375                 break;
3376         case KVM_CAP_MCE:
3377                 r = KVM_MAX_MCE_BANKS;
3378                 break;
3379         case KVM_CAP_XCRS:
3380                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3381                 break;
3382         case KVM_CAP_TSC_CONTROL:
3383                 r = kvm_has_tsc_control;
3384                 break;
3385         case KVM_CAP_X2APIC_API:
3386                 r = KVM_X2APIC_API_VALID_FLAGS;
3387                 break;
3388         case KVM_CAP_NESTED_STATE:
3389                 r = kvm_x86_ops->get_nested_state ?
3390                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3391                 break;
3392         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3393                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3394                 break;
3395         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3396                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3397                 break;
3398         default:
3399                 break;
3400         }
3401         return r;
3402
3403 }
3404
3405 long kvm_arch_dev_ioctl(struct file *filp,
3406                         unsigned int ioctl, unsigned long arg)
3407 {
3408         void __user *argp = (void __user *)arg;
3409         long r;
3410
3411         switch (ioctl) {
3412         case KVM_GET_MSR_INDEX_LIST: {
3413                 struct kvm_msr_list __user *user_msr_list = argp;
3414                 struct kvm_msr_list msr_list;
3415                 unsigned n;
3416
3417                 r = -EFAULT;
3418                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3419                         goto out;
3420                 n = msr_list.nmsrs;
3421                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3422                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3423                         goto out;
3424                 r = -E2BIG;
3425                 if (n < msr_list.nmsrs)
3426                         goto out;
3427                 r = -EFAULT;
3428                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3429                                  num_msrs_to_save * sizeof(u32)))
3430                         goto out;
3431                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3432                                  &emulated_msrs,
3433                                  num_emulated_msrs * sizeof(u32)))
3434                         goto out;
3435                 r = 0;
3436                 break;
3437         }
3438         case KVM_GET_SUPPORTED_CPUID:
3439         case KVM_GET_EMULATED_CPUID: {
3440                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3441                 struct kvm_cpuid2 cpuid;
3442
3443                 r = -EFAULT;
3444                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3445                         goto out;
3446
3447                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3448                                             ioctl);
3449                 if (r)
3450                         goto out;
3451
3452                 r = -EFAULT;
3453                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3454                         goto out;
3455                 r = 0;
3456                 break;
3457         }
3458         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3459                 r = -EFAULT;
3460                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3461                                  sizeof(kvm_mce_cap_supported)))
3462                         goto out;
3463                 r = 0;
3464                 break;
3465         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3466                 struct kvm_msr_list __user *user_msr_list = argp;
3467                 struct kvm_msr_list msr_list;
3468                 unsigned int n;
3469
3470                 r = -EFAULT;
3471                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3472                         goto out;
3473                 n = msr_list.nmsrs;
3474                 msr_list.nmsrs = num_msr_based_features;
3475                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3476                         goto out;
3477                 r = -E2BIG;
3478                 if (n < msr_list.nmsrs)
3479                         goto out;
3480                 r = -EFAULT;
3481                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3482                                  num_msr_based_features * sizeof(u32)))
3483                         goto out;
3484                 r = 0;
3485                 break;
3486         }
3487         case KVM_GET_MSRS:
3488                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3489                 break;
3490         }
3491         default:
3492                 r = -EINVAL;
3493         }
3494 out:
3495         return r;
3496 }
3497
3498 static void wbinvd_ipi(void *garbage)
3499 {
3500         wbinvd();
3501 }
3502
3503 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3504 {
3505         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3506 }
3507
3508 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3509 {
3510         /* Address WBINVD may be executed by guest */
3511         if (need_emulate_wbinvd(vcpu)) {
3512                 if (kvm_x86_ops->has_wbinvd_exit())
3513                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3514                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3515                         smp_call_function_single(vcpu->cpu,
3516                                         wbinvd_ipi, NULL, 1);
3517         }
3518
3519         kvm_x86_ops->vcpu_load(vcpu, cpu);
3520
3521         fpregs_assert_state_consistent();
3522         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3523                 switch_fpu_return();
3524
3525         /* Apply any externally detected TSC adjustments (due to suspend) */
3526         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3527                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3528                 vcpu->arch.tsc_offset_adjustment = 0;
3529                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3530         }
3531
3532         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3533                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3534                                 rdtsc() - vcpu->arch.last_host_tsc;
3535                 if (tsc_delta < 0)
3536                         mark_tsc_unstable("KVM discovered backwards TSC");
3537
3538                 if (kvm_check_tsc_unstable()) {
3539                         u64 offset = kvm_compute_tsc_offset(vcpu,
3540                                                 vcpu->arch.last_guest_tsc);
3541                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3542                         vcpu->arch.tsc_catchup = 1;
3543                 }
3544
3545                 if (kvm_lapic_hv_timer_in_use(vcpu))
3546                         kvm_lapic_restart_hv_timer(vcpu);
3547
3548                 /*
3549                  * On a host with synchronized TSC, there is no need to update
3550                  * kvmclock on vcpu->cpu migration
3551                  */
3552                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3553                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3554                 if (vcpu->cpu != cpu)
3555                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3556                 vcpu->cpu = cpu;
3557         }
3558
3559         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3560 }
3561
3562 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3563 {
3564         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3565                 return;
3566
3567         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3568
3569         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3570                         &vcpu->arch.st.steal.preempted,
3571                         offsetof(struct kvm_steal_time, preempted),
3572                         sizeof(vcpu->arch.st.steal.preempted));
3573 }
3574
3575 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3576 {
3577         int idx;
3578
3579         if (vcpu->preempted)
3580                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3581
3582         /*
3583          * Disable page faults because we're in atomic context here.
3584          * kvm_write_guest_offset_cached() would call might_fault()
3585          * that relies on pagefault_disable() to tell if there's a
3586          * bug. NOTE: the write to guest memory may not go through if
3587          * during postcopy live migration or if there's heavy guest
3588          * paging.
3589          */
3590         pagefault_disable();
3591         /*
3592          * kvm_memslots() will be called by
3593          * kvm_write_guest_offset_cached() so take the srcu lock.
3594          */
3595         idx = srcu_read_lock(&vcpu->kvm->srcu);
3596         kvm_steal_time_set_preempted(vcpu);
3597         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3598         pagefault_enable();
3599         kvm_x86_ops->vcpu_put(vcpu);
3600         vcpu->arch.last_host_tsc = rdtsc();
3601         /*
3602          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3603          * on every vmexit, but if not, we might have a stale dr6 from the
3604          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3605          */
3606         set_debugreg(0, 6);
3607 }
3608
3609 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3610                                     struct kvm_lapic_state *s)
3611 {
3612         if (vcpu->arch.apicv_active)
3613                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3614
3615         return kvm_apic_get_state(vcpu, s);
3616 }
3617
3618 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3619                                     struct kvm_lapic_state *s)
3620 {
3621         int r;
3622
3623         r = kvm_apic_set_state(vcpu, s);
3624         if (r)
3625                 return r;
3626         update_cr8_intercept(vcpu);
3627
3628         return 0;
3629 }
3630
3631 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3632 {
3633         return (!lapic_in_kernel(vcpu) ||
3634                 kvm_apic_accept_pic_intr(vcpu));
3635 }
3636
3637 /*
3638  * if userspace requested an interrupt window, check that the
3639  * interrupt window is open.
3640  *
3641  * No need to exit to userspace if we already have an interrupt queued.
3642  */
3643 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3644 {
3645         return kvm_arch_interrupt_allowed(vcpu) &&
3646                 !kvm_cpu_has_interrupt(vcpu) &&
3647                 !kvm_event_needs_reinjection(vcpu) &&
3648                 kvm_cpu_accept_dm_intr(vcpu);
3649 }
3650
3651 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3652                                     struct kvm_interrupt *irq)
3653 {
3654         if (irq->irq >= KVM_NR_INTERRUPTS)
3655                 return -EINVAL;
3656
3657         if (!irqchip_in_kernel(vcpu->kvm)) {
3658                 kvm_queue_interrupt(vcpu, irq->irq, false);
3659                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3660                 return 0;
3661         }
3662
3663         /*
3664          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3665          * fail for in-kernel 8259.
3666          */
3667         if (pic_in_kernel(vcpu->kvm))
3668                 return -ENXIO;
3669
3670         if (vcpu->arch.pending_external_vector != -1)
3671                 return -EEXIST;
3672
3673         vcpu->arch.pending_external_vector = irq->irq;
3674         kvm_make_request(KVM_REQ_EVENT, vcpu);
3675         return 0;
3676 }
3677
3678 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3679 {
3680         kvm_inject_nmi(vcpu);
3681
3682         return 0;
3683 }
3684
3685 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3686 {
3687         kvm_make_request(KVM_REQ_SMI, vcpu);
3688
3689         return 0;
3690 }
3691
3692 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3693                                            struct kvm_tpr_access_ctl *tac)
3694 {
3695         if (tac->flags)
3696                 return -EINVAL;
3697         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3698         return 0;
3699 }
3700
3701 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3702                                         u64 mcg_cap)
3703 {
3704         int r;
3705         unsigned bank_num = mcg_cap & 0xff, bank;
3706
3707         r = -EINVAL;
3708         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3709                 goto out;
3710         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3711                 goto out;
3712         r = 0;
3713         vcpu->arch.mcg_cap = mcg_cap;
3714         /* Init IA32_MCG_CTL to all 1s */
3715         if (mcg_cap & MCG_CTL_P)
3716                 vcpu->arch.mcg_ctl = ~(u64)0;
3717         /* Init IA32_MCi_CTL to all 1s */
3718         for (bank = 0; bank < bank_num; bank++)
3719                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3720
3721         kvm_x86_ops->setup_mce(vcpu);
3722 out:
3723         return r;
3724 }
3725
3726 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3727                                       struct kvm_x86_mce *mce)
3728 {
3729         u64 mcg_cap = vcpu->arch.mcg_cap;
3730         unsigned bank_num = mcg_cap & 0xff;
3731         u64 *banks = vcpu->arch.mce_banks;
3732
3733         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3734                 return -EINVAL;
3735         /*
3736          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3737          * reporting is disabled
3738          */
3739         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3740             vcpu->arch.mcg_ctl != ~(u64)0)
3741                 return 0;
3742         banks += 4 * mce->bank;
3743         /*
3744          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3745          * reporting is disabled for the bank
3746          */
3747         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3748                 return 0;
3749         if (mce->status & MCI_STATUS_UC) {
3750                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3751                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3752                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3753                         return 0;
3754                 }
3755                 if (banks[1] & MCI_STATUS_VAL)
3756                         mce->status |= MCI_STATUS_OVER;
3757                 banks[2] = mce->addr;
3758                 banks[3] = mce->misc;
3759                 vcpu->arch.mcg_status = mce->mcg_status;
3760                 banks[1] = mce->status;
3761                 kvm_queue_exception(vcpu, MC_VECTOR);
3762         } else if (!(banks[1] & MCI_STATUS_VAL)
3763                    || !(banks[1] & MCI_STATUS_UC)) {
3764                 if (banks[1] & MCI_STATUS_VAL)
3765                         mce->status |= MCI_STATUS_OVER;
3766                 banks[2] = mce->addr;
3767                 banks[3] = mce->misc;
3768                 banks[1] = mce->status;
3769         } else
3770                 banks[1] |= MCI_STATUS_OVER;
3771         return 0;
3772 }
3773
3774 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3775                                                struct kvm_vcpu_events *events)
3776 {
3777         process_nmi(vcpu);
3778
3779         /*
3780          * The API doesn't provide the instruction length for software
3781          * exceptions, so don't report them. As long as the guest RIP
3782          * isn't advanced, we should expect to encounter the exception
3783          * again.
3784          */
3785         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3786                 events->exception.injected = 0;
3787                 events->exception.pending = 0;
3788         } else {
3789                 events->exception.injected = vcpu->arch.exception.injected;
3790                 events->exception.pending = vcpu->arch.exception.pending;
3791                 /*
3792                  * For ABI compatibility, deliberately conflate
3793                  * pending and injected exceptions when
3794                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3795                  */
3796                 if (!vcpu->kvm->arch.exception_payload_enabled)
3797                         events->exception.injected |=
3798                                 vcpu->arch.exception.pending;
3799         }
3800         events->exception.nr = vcpu->arch.exception.nr;
3801         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3802         events->exception.error_code = vcpu->arch.exception.error_code;
3803         events->exception_has_payload = vcpu->arch.exception.has_payload;
3804         events->exception_payload = vcpu->arch.exception.payload;
3805
3806         events->interrupt.injected =
3807                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3808         events->interrupt.nr = vcpu->arch.interrupt.nr;
3809         events->interrupt.soft = 0;
3810         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3811
3812         events->nmi.injected = vcpu->arch.nmi_injected;
3813         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3814         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3815         events->nmi.pad = 0;
3816
3817         events->sipi_vector = 0; /* never valid when reporting to user space */
3818
3819         events->smi.smm = is_smm(vcpu);
3820         events->smi.pending = vcpu->arch.smi_pending;
3821         events->smi.smm_inside_nmi =
3822                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3823         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3824
3825         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3826                          | KVM_VCPUEVENT_VALID_SHADOW
3827                          | KVM_VCPUEVENT_VALID_SMM);
3828         if (vcpu->kvm->arch.exception_payload_enabled)
3829                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3830
3831         memset(&events->reserved, 0, sizeof(events->reserved));
3832 }
3833
3834 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3835
3836 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3837                                               struct kvm_vcpu_events *events)
3838 {
3839         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3840                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3841                               | KVM_VCPUEVENT_VALID_SHADOW
3842                               | KVM_VCPUEVENT_VALID_SMM
3843                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3844                 return -EINVAL;
3845
3846         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3847                 if (!vcpu->kvm->arch.exception_payload_enabled)
3848                         return -EINVAL;
3849                 if (events->exception.pending)
3850                         events->exception.injected = 0;
3851                 else
3852                         events->exception_has_payload = 0;
3853         } else {
3854                 events->exception.pending = 0;
3855                 events->exception_has_payload = 0;
3856         }
3857
3858         if ((events->exception.injected || events->exception.pending) &&
3859             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3860                 return -EINVAL;
3861
3862         /* INITs are latched while in SMM */
3863         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3864             (events->smi.smm || events->smi.pending) &&
3865             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3866                 return -EINVAL;
3867
3868         process_nmi(vcpu);
3869         vcpu->arch.exception.injected = events->exception.injected;
3870         vcpu->arch.exception.pending = events->exception.pending;
3871         vcpu->arch.exception.nr = events->exception.nr;
3872         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3873         vcpu->arch.exception.error_code = events->exception.error_code;
3874         vcpu->arch.exception.has_payload = events->exception_has_payload;
3875         vcpu->arch.exception.payload = events->exception_payload;
3876
3877         vcpu->arch.interrupt.injected = events->interrupt.injected;
3878         vcpu->arch.interrupt.nr = events->interrupt.nr;
3879         vcpu->arch.interrupt.soft = events->interrupt.soft;
3880         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3881                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3882                                                   events->interrupt.shadow);
3883
3884         vcpu->arch.nmi_injected = events->nmi.injected;
3885         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3886                 vcpu->arch.nmi_pending = events->nmi.pending;
3887         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3888
3889         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3890             lapic_in_kernel(vcpu))
3891                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3892
3893         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3894                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3895                         if (events->smi.smm)
3896                                 vcpu->arch.hflags |= HF_SMM_MASK;
3897                         else
3898                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3899                         kvm_smm_changed(vcpu);
3900                 }
3901
3902                 vcpu->arch.smi_pending = events->smi.pending;
3903
3904                 if (events->smi.smm) {
3905                         if (events->smi.smm_inside_nmi)
3906                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3907                         else
3908                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3909                 }
3910
3911                 if (lapic_in_kernel(vcpu)) {
3912                         if (events->smi.latched_init)
3913                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3914                         else
3915                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3916                 }
3917         }
3918
3919         kvm_make_request(KVM_REQ_EVENT, vcpu);
3920
3921         return 0;
3922 }
3923
3924 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3925                                              struct kvm_debugregs *dbgregs)
3926 {
3927         unsigned long val;
3928
3929         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3930         kvm_get_dr(vcpu, 6, &val);
3931         dbgregs->dr6 = val;
3932         dbgregs->dr7 = vcpu->arch.dr7;
3933         dbgregs->flags = 0;
3934         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3935 }
3936
3937 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3938                                             struct kvm_debugregs *dbgregs)
3939 {
3940         if (dbgregs->flags)
3941                 return -EINVAL;
3942
3943         if (dbgregs->dr6 & ~0xffffffffull)
3944                 return -EINVAL;
3945         if (dbgregs->dr7 & ~0xffffffffull)
3946                 return -EINVAL;
3947
3948         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3949         kvm_update_dr0123(vcpu);
3950         vcpu->arch.dr6 = dbgregs->dr6;
3951         kvm_update_dr6(vcpu);
3952         vcpu->arch.dr7 = dbgregs->dr7;
3953         kvm_update_dr7(vcpu);
3954
3955         return 0;
3956 }
3957
3958 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3959
3960 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3961 {
3962         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3963         u64 xstate_bv = xsave->header.xfeatures;
3964         u64 valid;
3965
3966         /*
3967          * Copy legacy XSAVE area, to avoid complications with CPUID
3968          * leaves 0 and 1 in the loop below.
3969          */
3970         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3971
3972         /* Set XSTATE_BV */
3973         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3974         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3975
3976         /*
3977          * Copy each region from the possibly compacted offset to the
3978          * non-compacted offset.
3979          */
3980         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3981         while (valid) {
3982                 u64 xfeature_mask = valid & -valid;
3983                 int xfeature_nr = fls64(xfeature_mask) - 1;
3984                 void *src = get_xsave_addr(xsave, xfeature_nr);
3985
3986                 if (src) {
3987                         u32 size, offset, ecx, edx;
3988                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3989                                     &size, &offset, &ecx, &edx);
3990                         if (xfeature_nr == XFEATURE_PKRU)
3991                                 memcpy(dest + offset, &vcpu->arch.pkru,
3992                                        sizeof(vcpu->arch.pkru));
3993                         else
3994                                 memcpy(dest + offset, src, size);
3995
3996                 }
3997
3998                 valid -= xfeature_mask;
3999         }
4000 }
4001
4002 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4003 {
4004         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4005         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4006         u64 valid;
4007
4008         /*
4009          * Copy legacy XSAVE area, to avoid complications with CPUID
4010          * leaves 0 and 1 in the loop below.
4011          */
4012         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4013
4014         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4015         xsave->header.xfeatures = xstate_bv;
4016         if (boot_cpu_has(X86_FEATURE_XSAVES))
4017                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4018
4019         /*
4020          * Copy each region from the non-compacted offset to the
4021          * possibly compacted offset.
4022          */
4023         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4024         while (valid) {
4025                 u64 xfeature_mask = valid & -valid;
4026                 int xfeature_nr = fls64(xfeature_mask) - 1;
4027                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4028
4029                 if (dest) {
4030                         u32 size, offset, ecx, edx;
4031                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4032                                     &size, &offset, &ecx, &edx);
4033                         if (xfeature_nr == XFEATURE_PKRU)
4034                                 memcpy(&vcpu->arch.pkru, src + offset,
4035                                        sizeof(vcpu->arch.pkru));
4036                         else
4037                                 memcpy(dest, src + offset, size);
4038                 }
4039
4040                 valid -= xfeature_mask;
4041         }
4042 }
4043
4044 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4045                                          struct kvm_xsave *guest_xsave)
4046 {
4047         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4048                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4049                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4050         } else {
4051                 memcpy(guest_xsave->region,
4052                         &vcpu->arch.guest_fpu->state.fxsave,
4053                         sizeof(struct fxregs_state));
4054                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4055                         XFEATURE_MASK_FPSSE;
4056         }
4057 }
4058
4059 #define XSAVE_MXCSR_OFFSET 24
4060
4061 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4062                                         struct kvm_xsave *guest_xsave)
4063 {
4064         u64 xstate_bv =
4065                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4066         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4067
4068         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4069                 /*
4070                  * Here we allow setting states that are not present in
4071                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4072                  * with old userspace.
4073                  */
4074                 if (xstate_bv & ~kvm_supported_xcr0() ||
4075                         mxcsr & ~mxcsr_feature_mask)
4076                         return -EINVAL;
4077                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4078         } else {
4079                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4080                         mxcsr & ~mxcsr_feature_mask)
4081                         return -EINVAL;
4082                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4083                         guest_xsave->region, sizeof(struct fxregs_state));
4084         }
4085         return 0;
4086 }
4087
4088 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4089                                         struct kvm_xcrs *guest_xcrs)
4090 {
4091         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4092                 guest_xcrs->nr_xcrs = 0;
4093                 return;
4094         }
4095
4096         guest_xcrs->nr_xcrs = 1;
4097         guest_xcrs->flags = 0;
4098         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4099         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4100 }
4101
4102 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4103                                        struct kvm_xcrs *guest_xcrs)
4104 {
4105         int i, r = 0;
4106
4107         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4108                 return -EINVAL;
4109
4110         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4111                 return -EINVAL;
4112
4113         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4114                 /* Only support XCR0 currently */
4115                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4116                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4117                                 guest_xcrs->xcrs[i].value);
4118                         break;
4119                 }
4120         if (r)
4121                 r = -EINVAL;
4122         return r;
4123 }
4124
4125 /*
4126  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4127  * stopped by the hypervisor.  This function will be called from the host only.
4128  * EINVAL is returned when the host attempts to set the flag for a guest that
4129  * does not support pv clocks.
4130  */
4131 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4132 {
4133         if (!vcpu->arch.pv_time_enabled)
4134                 return -EINVAL;
4135         vcpu->arch.pvclock_set_guest_stopped_request = true;
4136         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4137         return 0;
4138 }
4139
4140 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4141                                      struct kvm_enable_cap *cap)
4142 {
4143         int r;
4144         uint16_t vmcs_version;
4145         void __user *user_ptr;
4146
4147         if (cap->flags)
4148                 return -EINVAL;
4149
4150         switch (cap->cap) {
4151         case KVM_CAP_HYPERV_SYNIC2:
4152                 if (cap->args[0])
4153                         return -EINVAL;
4154                 /* fall through */
4155
4156         case KVM_CAP_HYPERV_SYNIC:
4157                 if (!irqchip_in_kernel(vcpu->kvm))
4158                         return -EINVAL;
4159                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4160                                              KVM_CAP_HYPERV_SYNIC2);
4161         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4162                 if (!kvm_x86_ops->nested_enable_evmcs)
4163                         return -ENOTTY;
4164                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4165                 if (!r) {
4166                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4167                         if (copy_to_user(user_ptr, &vmcs_version,
4168                                          sizeof(vmcs_version)))
4169                                 r = -EFAULT;
4170                 }
4171                 return r;
4172         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4173                 if (!kvm_x86_ops->enable_direct_tlbflush)
4174                         return -ENOTTY;
4175
4176                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4177
4178         default:
4179                 return -EINVAL;
4180         }
4181 }
4182
4183 long kvm_arch_vcpu_ioctl(struct file *filp,
4184                          unsigned int ioctl, unsigned long arg)
4185 {
4186         struct kvm_vcpu *vcpu = filp->private_data;
4187         void __user *argp = (void __user *)arg;
4188         int r;
4189         union {
4190                 struct kvm_lapic_state *lapic;
4191                 struct kvm_xsave *xsave;
4192                 struct kvm_xcrs *xcrs;
4193                 void *buffer;
4194         } u;
4195
4196         vcpu_load(vcpu);
4197
4198         u.buffer = NULL;
4199         switch (ioctl) {
4200         case KVM_GET_LAPIC: {
4201                 r = -EINVAL;
4202                 if (!lapic_in_kernel(vcpu))
4203                         goto out;
4204                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4205                                 GFP_KERNEL_ACCOUNT);
4206
4207                 r = -ENOMEM;
4208                 if (!u.lapic)
4209                         goto out;
4210                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4211                 if (r)
4212                         goto out;
4213                 r = -EFAULT;
4214                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4215                         goto out;
4216                 r = 0;
4217                 break;
4218         }
4219         case KVM_SET_LAPIC: {
4220                 r = -EINVAL;
4221                 if (!lapic_in_kernel(vcpu))
4222                         goto out;
4223                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4224                 if (IS_ERR(u.lapic)) {
4225                         r = PTR_ERR(u.lapic);
4226                         goto out_nofree;
4227                 }
4228
4229                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4230                 break;
4231         }
4232         case KVM_INTERRUPT: {
4233                 struct kvm_interrupt irq;
4234
4235                 r = -EFAULT;
4236                 if (copy_from_user(&irq, argp, sizeof(irq)))
4237                         goto out;
4238                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4239                 break;
4240         }
4241         case KVM_NMI: {
4242                 r = kvm_vcpu_ioctl_nmi(vcpu);
4243                 break;
4244         }
4245         case KVM_SMI: {
4246                 r = kvm_vcpu_ioctl_smi(vcpu);
4247                 break;
4248         }
4249         case KVM_SET_CPUID: {
4250                 struct kvm_cpuid __user *cpuid_arg = argp;
4251                 struct kvm_cpuid cpuid;
4252
4253                 r = -EFAULT;
4254                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4255                         goto out;
4256                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4257                 break;
4258         }
4259         case KVM_SET_CPUID2: {
4260                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4261                 struct kvm_cpuid2 cpuid;
4262
4263                 r = -EFAULT;
4264                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4265                         goto out;
4266                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4267                                               cpuid_arg->entries);
4268                 break;
4269         }
4270         case KVM_GET_CPUID2: {
4271                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4272                 struct kvm_cpuid2 cpuid;
4273
4274                 r = -EFAULT;
4275                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4276                         goto out;
4277                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4278                                               cpuid_arg->entries);
4279                 if (r)
4280                         goto out;
4281                 r = -EFAULT;
4282                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4283                         goto out;
4284                 r = 0;
4285                 break;
4286         }
4287         case KVM_GET_MSRS: {
4288                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4289                 r = msr_io(vcpu, argp, do_get_msr, 1);
4290                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4291                 break;
4292         }
4293         case KVM_SET_MSRS: {
4294                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4295                 r = msr_io(vcpu, argp, do_set_msr, 0);
4296                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4297                 break;
4298         }
4299         case KVM_TPR_ACCESS_REPORTING: {
4300                 struct kvm_tpr_access_ctl tac;
4301
4302                 r = -EFAULT;
4303                 if (copy_from_user(&tac, argp, sizeof(tac)))
4304                         goto out;
4305                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4306                 if (r)
4307                         goto out;
4308                 r = -EFAULT;
4309                 if (copy_to_user(argp, &tac, sizeof(tac)))
4310                         goto out;
4311                 r = 0;
4312                 break;
4313         };
4314         case KVM_SET_VAPIC_ADDR: {
4315                 struct kvm_vapic_addr va;
4316                 int idx;
4317
4318                 r = -EINVAL;
4319                 if (!lapic_in_kernel(vcpu))
4320                         goto out;
4321                 r = -EFAULT;
4322                 if (copy_from_user(&va, argp, sizeof(va)))
4323                         goto out;
4324                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4325                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4326                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4327                 break;
4328         }
4329         case KVM_X86_SETUP_MCE: {
4330                 u64 mcg_cap;
4331
4332                 r = -EFAULT;
4333                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4334                         goto out;
4335                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4336                 break;
4337         }
4338         case KVM_X86_SET_MCE: {
4339                 struct kvm_x86_mce mce;
4340
4341                 r = -EFAULT;
4342                 if (copy_from_user(&mce, argp, sizeof(mce)))
4343                         goto out;
4344                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4345                 break;
4346         }
4347         case KVM_GET_VCPU_EVENTS: {
4348                 struct kvm_vcpu_events events;
4349
4350                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4351
4352                 r = -EFAULT;
4353                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4354                         break;
4355                 r = 0;
4356                 break;
4357         }
4358         case KVM_SET_VCPU_EVENTS: {
4359                 struct kvm_vcpu_events events;
4360
4361                 r = -EFAULT;
4362                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4363                         break;
4364
4365                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4366                 break;
4367         }
4368         case KVM_GET_DEBUGREGS: {
4369                 struct kvm_debugregs dbgregs;
4370
4371                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4372
4373                 r = -EFAULT;
4374                 if (copy_to_user(argp, &dbgregs,
4375                                  sizeof(struct kvm_debugregs)))
4376                         break;
4377                 r = 0;
4378                 break;
4379         }
4380         case KVM_SET_DEBUGREGS: {
4381                 struct kvm_debugregs dbgregs;
4382
4383                 r = -EFAULT;
4384                 if (copy_from_user(&dbgregs, argp,
4385                                    sizeof(struct kvm_debugregs)))
4386                         break;
4387
4388                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4389                 break;
4390         }
4391         case KVM_GET_XSAVE: {
4392                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4393                 r = -ENOMEM;
4394                 if (!u.xsave)
4395                         break;
4396
4397                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4398
4399                 r = -EFAULT;
4400                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4401                         break;
4402                 r = 0;
4403                 break;
4404         }
4405         case KVM_SET_XSAVE: {
4406                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4407                 if (IS_ERR(u.xsave)) {
4408                         r = PTR_ERR(u.xsave);
4409                         goto out_nofree;
4410                 }
4411
4412                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4413                 break;
4414         }
4415         case KVM_GET_XCRS: {
4416                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4417                 r = -ENOMEM;
4418                 if (!u.xcrs)
4419                         break;
4420
4421                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4422
4423                 r = -EFAULT;
4424                 if (copy_to_user(argp, u.xcrs,
4425                                  sizeof(struct kvm_xcrs)))
4426                         break;
4427                 r = 0;
4428                 break;
4429         }
4430         case KVM_SET_XCRS: {
4431                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4432                 if (IS_ERR(u.xcrs)) {
4433                         r = PTR_ERR(u.xcrs);
4434                         goto out_nofree;
4435                 }
4436
4437                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4438                 break;
4439         }
4440         case KVM_SET_TSC_KHZ: {
4441                 u32 user_tsc_khz;
4442
4443                 r = -EINVAL;
4444                 user_tsc_khz = (u32)arg;
4445
4446                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4447                         goto out;
4448
4449                 if (user_tsc_khz == 0)
4450                         user_tsc_khz = tsc_khz;
4451
4452                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4453                         r = 0;
4454
4455                 goto out;
4456         }
4457         case KVM_GET_TSC_KHZ: {
4458                 r = vcpu->arch.virtual_tsc_khz;
4459                 goto out;
4460         }
4461         case KVM_KVMCLOCK_CTRL: {
4462                 r = kvm_set_guest_paused(vcpu);
4463                 goto out;
4464         }
4465         case KVM_ENABLE_CAP: {
4466                 struct kvm_enable_cap cap;
4467
4468                 r = -EFAULT;
4469                 if (copy_from_user(&cap, argp, sizeof(cap)))
4470                         goto out;
4471                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4472                 break;
4473         }
4474         case KVM_GET_NESTED_STATE: {
4475                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4476                 u32 user_data_size;
4477
4478                 r = -EINVAL;
4479                 if (!kvm_x86_ops->get_nested_state)
4480                         break;
4481
4482                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4483                 r = -EFAULT;
4484                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4485                         break;
4486
4487                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4488                                                   user_data_size);
4489                 if (r < 0)
4490                         break;
4491
4492                 if (r > user_data_size) {
4493                         if (put_user(r, &user_kvm_nested_state->size))
4494                                 r = -EFAULT;
4495                         else
4496                                 r = -E2BIG;
4497                         break;
4498                 }
4499
4500                 r = 0;
4501                 break;
4502         }
4503         case KVM_SET_NESTED_STATE: {
4504                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4505                 struct kvm_nested_state kvm_state;
4506                 int idx;
4507
4508                 r = -EINVAL;
4509                 if (!kvm_x86_ops->set_nested_state)
4510                         break;
4511
4512                 r = -EFAULT;
4513                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4514                         break;
4515
4516                 r = -EINVAL;
4517                 if (kvm_state.size < sizeof(kvm_state))
4518                         break;
4519
4520                 if (kvm_state.flags &
4521                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4522                       | KVM_STATE_NESTED_EVMCS))
4523                         break;
4524
4525                 /* nested_run_pending implies guest_mode.  */
4526                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4527                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4528                         break;
4529
4530                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4531                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4532                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4533                 break;
4534         }
4535         case KVM_GET_SUPPORTED_HV_CPUID: {
4536                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4537                 struct kvm_cpuid2 cpuid;
4538
4539                 r = -EFAULT;
4540                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4541                         goto out;
4542
4543                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4544                                                 cpuid_arg->entries);
4545                 if (r)
4546                         goto out;
4547
4548                 r = -EFAULT;
4549                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4550                         goto out;
4551                 r = 0;
4552                 break;
4553         }
4554         default:
4555                 r = -EINVAL;
4556         }
4557 out:
4558         kfree(u.buffer);
4559 out_nofree:
4560         vcpu_put(vcpu);
4561         return r;
4562 }
4563
4564 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4565 {
4566         return VM_FAULT_SIGBUS;
4567 }
4568
4569 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4570 {
4571         int ret;
4572
4573         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4574                 return -EINVAL;
4575         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4576         return ret;
4577 }
4578
4579 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4580                                               u64 ident_addr)
4581 {
4582         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4583 }
4584
4585 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4586                                          unsigned long kvm_nr_mmu_pages)
4587 {
4588         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4589                 return -EINVAL;
4590
4591         mutex_lock(&kvm->slots_lock);
4592
4593         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4594         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4595
4596         mutex_unlock(&kvm->slots_lock);
4597         return 0;
4598 }
4599
4600 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4601 {
4602         return kvm->arch.n_max_mmu_pages;
4603 }
4604
4605 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4606 {
4607         struct kvm_pic *pic = kvm->arch.vpic;
4608         int r;
4609
4610         r = 0;
4611         switch (chip->chip_id) {
4612         case KVM_IRQCHIP_PIC_MASTER:
4613                 memcpy(&chip->chip.pic, &pic->pics[0],
4614                         sizeof(struct kvm_pic_state));
4615                 break;
4616         case KVM_IRQCHIP_PIC_SLAVE:
4617                 memcpy(&chip->chip.pic, &pic->pics[1],
4618                         sizeof(struct kvm_pic_state));
4619                 break;
4620         case KVM_IRQCHIP_IOAPIC:
4621                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4622                 break;
4623         default:
4624                 r = -EINVAL;
4625                 break;
4626         }
4627         return r;
4628 }
4629
4630 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4631 {
4632         struct kvm_pic *pic = kvm->arch.vpic;
4633         int r;
4634
4635         r = 0;
4636         switch (chip->chip_id) {
4637         case KVM_IRQCHIP_PIC_MASTER:
4638                 spin_lock(&pic->lock);
4639                 memcpy(&pic->pics[0], &chip->chip.pic,
4640                         sizeof(struct kvm_pic_state));
4641                 spin_unlock(&pic->lock);
4642                 break;
4643         case KVM_IRQCHIP_PIC_SLAVE:
4644                 spin_lock(&pic->lock);
4645                 memcpy(&pic->pics[1], &chip->chip.pic,
4646                         sizeof(struct kvm_pic_state));
4647                 spin_unlock(&pic->lock);
4648                 break;
4649         case KVM_IRQCHIP_IOAPIC:
4650                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4651                 break;
4652         default:
4653                 r = -EINVAL;
4654                 break;
4655         }
4656         kvm_pic_update_irq(pic);
4657         return r;
4658 }
4659
4660 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4661 {
4662         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4663
4664         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4665
4666         mutex_lock(&kps->lock);
4667         memcpy(ps, &kps->channels, sizeof(*ps));
4668         mutex_unlock(&kps->lock);
4669         return 0;
4670 }
4671
4672 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4673 {
4674         int i;
4675         struct kvm_pit *pit = kvm->arch.vpit;
4676
4677         mutex_lock(&pit->pit_state.lock);
4678         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4679         for (i = 0; i < 3; i++)
4680                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4681         mutex_unlock(&pit->pit_state.lock);
4682         return 0;
4683 }
4684
4685 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4686 {
4687         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4688         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4689                 sizeof(ps->channels));
4690         ps->flags = kvm->arch.vpit->pit_state.flags;
4691         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4692         memset(&ps->reserved, 0, sizeof(ps->reserved));
4693         return 0;
4694 }
4695
4696 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4697 {
4698         int start = 0;
4699         int i;
4700         u32 prev_legacy, cur_legacy;
4701         struct kvm_pit *pit = kvm->arch.vpit;
4702
4703         mutex_lock(&pit->pit_state.lock);
4704         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4705         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4706         if (!prev_legacy && cur_legacy)
4707                 start = 1;
4708         memcpy(&pit->pit_state.channels, &ps->channels,
4709                sizeof(pit->pit_state.channels));
4710         pit->pit_state.flags = ps->flags;
4711         for (i = 0; i < 3; i++)
4712                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4713                                    start && i == 0);
4714         mutex_unlock(&pit->pit_state.lock);
4715         return 0;
4716 }
4717
4718 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4719                                  struct kvm_reinject_control *control)
4720 {
4721         struct kvm_pit *pit = kvm->arch.vpit;
4722
4723         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4724          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4725          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4726          */
4727         mutex_lock(&pit->pit_state.lock);
4728         kvm_pit_set_reinject(pit, control->pit_reinject);
4729         mutex_unlock(&pit->pit_state.lock);
4730
4731         return 0;
4732 }
4733
4734 /**
4735  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4736  * @kvm: kvm instance
4737  * @log: slot id and address to which we copy the log
4738  *
4739  * Steps 1-4 below provide general overview of dirty page logging. See
4740  * kvm_get_dirty_log_protect() function description for additional details.
4741  *
4742  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4743  * always flush the TLB (step 4) even if previous step failed  and the dirty
4744  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4745  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4746  * writes will be marked dirty for next log read.
4747  *
4748  *   1. Take a snapshot of the bit and clear it if needed.
4749  *   2. Write protect the corresponding page.
4750  *   3. Copy the snapshot to the userspace.
4751  *   4. Flush TLB's if needed.
4752  */
4753 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4754 {
4755         bool flush = false;
4756         int r;
4757
4758         mutex_lock(&kvm->slots_lock);
4759
4760         /*
4761          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4762          */
4763         if (kvm_x86_ops->flush_log_dirty)
4764                 kvm_x86_ops->flush_log_dirty(kvm);
4765
4766         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4767
4768         /*
4769          * All the TLBs can be flushed out of mmu lock, see the comments in
4770          * kvm_mmu_slot_remove_write_access().
4771          */
4772         lockdep_assert_held(&kvm->slots_lock);
4773         if (flush)
4774                 kvm_flush_remote_tlbs(kvm);
4775
4776         mutex_unlock(&kvm->slots_lock);
4777         return r;
4778 }
4779
4780 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4781 {
4782         bool flush = false;
4783         int r;
4784
4785         mutex_lock(&kvm->slots_lock);
4786
4787         /*
4788          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4789          */
4790         if (kvm_x86_ops->flush_log_dirty)
4791                 kvm_x86_ops->flush_log_dirty(kvm);
4792
4793         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4794
4795         /*
4796          * All the TLBs can be flushed out of mmu lock, see the comments in
4797          * kvm_mmu_slot_remove_write_access().
4798          */
4799         lockdep_assert_held(&kvm->slots_lock);
4800         if (flush)
4801                 kvm_flush_remote_tlbs(kvm);
4802
4803         mutex_unlock(&kvm->slots_lock);
4804         return r;
4805 }
4806
4807 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4808                         bool line_status)
4809 {
4810         if (!irqchip_in_kernel(kvm))
4811                 return -ENXIO;
4812
4813         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4814                                         irq_event->irq, irq_event->level,
4815                                         line_status);
4816         return 0;
4817 }
4818
4819 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4820                             struct kvm_enable_cap *cap)
4821 {
4822         int r;
4823
4824         if (cap->flags)
4825                 return -EINVAL;
4826
4827         switch (cap->cap) {
4828         case KVM_CAP_DISABLE_QUIRKS:
4829                 kvm->arch.disabled_quirks = cap->args[0];
4830                 r = 0;
4831                 break;
4832         case KVM_CAP_SPLIT_IRQCHIP: {
4833                 mutex_lock(&kvm->lock);
4834                 r = -EINVAL;
4835                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4836                         goto split_irqchip_unlock;
4837                 r = -EEXIST;
4838                 if (irqchip_in_kernel(kvm))
4839                         goto split_irqchip_unlock;
4840                 if (kvm->created_vcpus)
4841                         goto split_irqchip_unlock;
4842                 r = kvm_setup_empty_irq_routing(kvm);
4843                 if (r)
4844                         goto split_irqchip_unlock;
4845                 /* Pairs with irqchip_in_kernel. */
4846                 smp_wmb();
4847                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4848                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4849                 r = 0;
4850 split_irqchip_unlock:
4851                 mutex_unlock(&kvm->lock);
4852                 break;
4853         }
4854         case KVM_CAP_X2APIC_API:
4855                 r = -EINVAL;
4856                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4857                         break;
4858
4859                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4860                         kvm->arch.x2apic_format = true;
4861                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4862                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4863
4864                 r = 0;
4865                 break;
4866         case KVM_CAP_X86_DISABLE_EXITS:
4867                 r = -EINVAL;
4868                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4869                         break;
4870
4871                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4872                         kvm_can_mwait_in_guest())
4873                         kvm->arch.mwait_in_guest = true;
4874                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4875                         kvm->arch.hlt_in_guest = true;
4876                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4877                         kvm->arch.pause_in_guest = true;
4878                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4879                         kvm->arch.cstate_in_guest = true;
4880                 r = 0;
4881                 break;
4882         case KVM_CAP_MSR_PLATFORM_INFO:
4883                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4884                 r = 0;
4885                 break;
4886         case KVM_CAP_EXCEPTION_PAYLOAD:
4887                 kvm->arch.exception_payload_enabled = cap->args[0];
4888                 r = 0;
4889                 break;
4890         default:
4891                 r = -EINVAL;
4892                 break;
4893         }
4894         return r;
4895 }
4896
4897 long kvm_arch_vm_ioctl(struct file *filp,
4898                        unsigned int ioctl, unsigned long arg)
4899 {
4900         struct kvm *kvm = filp->private_data;
4901         void __user *argp = (void __user *)arg;
4902         int r = -ENOTTY;
4903         /*
4904          * This union makes it completely explicit to gcc-3.x
4905          * that these two variables' stack usage should be
4906          * combined, not added together.
4907          */
4908         union {
4909                 struct kvm_pit_state ps;
4910                 struct kvm_pit_state2 ps2;
4911                 struct kvm_pit_config pit_config;
4912         } u;
4913
4914         switch (ioctl) {
4915         case KVM_SET_TSS_ADDR:
4916                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4917                 break;
4918         case KVM_SET_IDENTITY_MAP_ADDR: {
4919                 u64 ident_addr;
4920
4921                 mutex_lock(&kvm->lock);
4922                 r = -EINVAL;
4923                 if (kvm->created_vcpus)
4924                         goto set_identity_unlock;
4925                 r = -EFAULT;
4926                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4927                         goto set_identity_unlock;
4928                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4929 set_identity_unlock:
4930                 mutex_unlock(&kvm->lock);
4931                 break;
4932         }
4933         case KVM_SET_NR_MMU_PAGES:
4934                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4935                 break;
4936         case KVM_GET_NR_MMU_PAGES:
4937                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4938                 break;
4939         case KVM_CREATE_IRQCHIP: {
4940                 mutex_lock(&kvm->lock);
4941
4942                 r = -EEXIST;
4943                 if (irqchip_in_kernel(kvm))
4944                         goto create_irqchip_unlock;
4945
4946                 r = -EINVAL;
4947                 if (kvm->created_vcpus)
4948                         goto create_irqchip_unlock;
4949
4950                 r = kvm_pic_init(kvm);
4951                 if (r)
4952                         goto create_irqchip_unlock;
4953
4954                 r = kvm_ioapic_init(kvm);
4955                 if (r) {
4956                         kvm_pic_destroy(kvm);
4957                         goto create_irqchip_unlock;
4958                 }
4959
4960                 r = kvm_setup_default_irq_routing(kvm);
4961                 if (r) {
4962                         kvm_ioapic_destroy(kvm);
4963                         kvm_pic_destroy(kvm);
4964                         goto create_irqchip_unlock;
4965                 }
4966                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4967                 smp_wmb();
4968                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4969         create_irqchip_unlock:
4970                 mutex_unlock(&kvm->lock);
4971                 break;
4972         }
4973         case KVM_CREATE_PIT:
4974                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4975                 goto create_pit;
4976         case KVM_CREATE_PIT2:
4977                 r = -EFAULT;
4978                 if (copy_from_user(&u.pit_config, argp,
4979                                    sizeof(struct kvm_pit_config)))
4980                         goto out;
4981         create_pit:
4982                 mutex_lock(&kvm->lock);
4983                 r = -EEXIST;
4984                 if (kvm->arch.vpit)
4985                         goto create_pit_unlock;
4986                 r = -ENOMEM;
4987                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4988                 if (kvm->arch.vpit)
4989                         r = 0;
4990         create_pit_unlock:
4991                 mutex_unlock(&kvm->lock);
4992                 break;
4993         case KVM_GET_IRQCHIP: {
4994                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4995                 struct kvm_irqchip *chip;
4996
4997                 chip = memdup_user(argp, sizeof(*chip));
4998                 if (IS_ERR(chip)) {
4999                         r = PTR_ERR(chip);
5000                         goto out;
5001                 }
5002
5003                 r = -ENXIO;
5004                 if (!irqchip_kernel(kvm))
5005                         goto get_irqchip_out;
5006                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5007                 if (r)
5008                         goto get_irqchip_out;
5009                 r = -EFAULT;
5010                 if (copy_to_user(argp, chip, sizeof(*chip)))
5011                         goto get_irqchip_out;
5012                 r = 0;
5013         get_irqchip_out:
5014                 kfree(chip);
5015                 break;
5016         }
5017         case KVM_SET_IRQCHIP: {
5018                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5019                 struct kvm_irqchip *chip;
5020
5021                 chip = memdup_user(argp, sizeof(*chip));
5022                 if (IS_ERR(chip)) {
5023                         r = PTR_ERR(chip);
5024                         goto out;
5025                 }
5026
5027                 r = -ENXIO;
5028                 if (!irqchip_kernel(kvm))
5029                         goto set_irqchip_out;
5030                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5031         set_irqchip_out:
5032                 kfree(chip);
5033                 break;
5034         }
5035         case KVM_GET_PIT: {
5036                 r = -EFAULT;
5037                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5038                         goto out;
5039                 r = -ENXIO;
5040                 if (!kvm->arch.vpit)
5041                         goto out;
5042                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5043                 if (r)
5044                         goto out;
5045                 r = -EFAULT;
5046                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5047                         goto out;
5048                 r = 0;
5049                 break;
5050         }
5051         case KVM_SET_PIT: {
5052                 r = -EFAULT;
5053                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5054                         goto out;
5055                 r = -ENXIO;
5056                 if (!kvm->arch.vpit)
5057                         goto out;
5058                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5059                 break;
5060         }
5061         case KVM_GET_PIT2: {
5062                 r = -ENXIO;
5063                 if (!kvm->arch.vpit)
5064                         goto out;
5065                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5066                 if (r)
5067                         goto out;
5068                 r = -EFAULT;
5069                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5070                         goto out;
5071                 r = 0;
5072                 break;
5073         }
5074         case KVM_SET_PIT2: {
5075                 r = -EFAULT;
5076                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5077                         goto out;
5078                 r = -ENXIO;
5079                 if (!kvm->arch.vpit)
5080                         goto out;
5081                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5082                 break;
5083         }
5084         case KVM_REINJECT_CONTROL: {
5085                 struct kvm_reinject_control control;
5086                 r =  -EFAULT;
5087                 if (copy_from_user(&control, argp, sizeof(control)))
5088                         goto out;
5089                 r = -ENXIO;
5090                 if (!kvm->arch.vpit)
5091                         goto out;
5092                 r = kvm_vm_ioctl_reinject(kvm, &control);
5093                 break;
5094         }
5095         case KVM_SET_BOOT_CPU_ID:
5096                 r = 0;
5097                 mutex_lock(&kvm->lock);
5098                 if (kvm->created_vcpus)
5099                         r = -EBUSY;
5100                 else
5101                         kvm->arch.bsp_vcpu_id = arg;
5102                 mutex_unlock(&kvm->lock);
5103                 break;
5104         case KVM_XEN_HVM_CONFIG: {
5105                 struct kvm_xen_hvm_config xhc;
5106                 r = -EFAULT;
5107                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5108                         goto out;
5109                 r = -EINVAL;
5110                 if (xhc.flags)
5111                         goto out;
5112                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5113                 r = 0;
5114                 break;
5115         }
5116         case KVM_SET_CLOCK: {
5117                 struct kvm_clock_data user_ns;
5118                 u64 now_ns;
5119
5120                 r = -EFAULT;
5121                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5122                         goto out;
5123
5124                 r = -EINVAL;
5125                 if (user_ns.flags)
5126                         goto out;
5127
5128                 r = 0;
5129                 /*
5130                  * TODO: userspace has to take care of races with VCPU_RUN, so
5131                  * kvm_gen_update_masterclock() can be cut down to locked
5132                  * pvclock_update_vm_gtod_copy().
5133                  */
5134                 kvm_gen_update_masterclock(kvm);
5135                 now_ns = get_kvmclock_ns(kvm);
5136                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5137                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5138                 break;
5139         }
5140         case KVM_GET_CLOCK: {
5141                 struct kvm_clock_data user_ns;
5142                 u64 now_ns;
5143
5144                 now_ns = get_kvmclock_ns(kvm);
5145                 user_ns.clock = now_ns;
5146                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5147                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5148
5149                 r = -EFAULT;
5150                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5151                         goto out;
5152                 r = 0;
5153                 break;
5154         }
5155         case KVM_MEMORY_ENCRYPT_OP: {
5156                 r = -ENOTTY;
5157                 if (kvm_x86_ops->mem_enc_op)
5158                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5159                 break;
5160         }
5161         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5162                 struct kvm_enc_region region;
5163
5164                 r = -EFAULT;
5165                 if (copy_from_user(&region, argp, sizeof(region)))
5166                         goto out;
5167
5168                 r = -ENOTTY;
5169                 if (kvm_x86_ops->mem_enc_reg_region)
5170                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5171                 break;
5172         }
5173         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5174                 struct kvm_enc_region region;
5175
5176                 r = -EFAULT;
5177                 if (copy_from_user(&region, argp, sizeof(region)))
5178                         goto out;
5179
5180                 r = -ENOTTY;
5181                 if (kvm_x86_ops->mem_enc_unreg_region)
5182                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5183                 break;
5184         }
5185         case KVM_HYPERV_EVENTFD: {
5186                 struct kvm_hyperv_eventfd hvevfd;
5187
5188                 r = -EFAULT;
5189                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5190                         goto out;
5191                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5192                 break;
5193         }
5194         case KVM_SET_PMU_EVENT_FILTER:
5195                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5196                 break;
5197         default:
5198                 r = -ENOTTY;
5199         }
5200 out:
5201         return r;
5202 }
5203
5204 static void kvm_init_msr_list(void)
5205 {
5206         struct x86_pmu_capability x86_pmu;
5207         u32 dummy[2];
5208         unsigned i;
5209
5210         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5211                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5212
5213         perf_get_x86_pmu_capability(&x86_pmu);
5214
5215         num_msrs_to_save = 0;
5216         num_emulated_msrs = 0;
5217         num_msr_based_features = 0;
5218
5219         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5220                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5221                         continue;
5222
5223                 /*
5224                  * Even MSRs that are valid in the host may not be exposed
5225                  * to the guests in some cases.
5226                  */
5227                 switch (msrs_to_save_all[i]) {
5228                 case MSR_IA32_BNDCFGS:
5229                         if (!kvm_mpx_supported())
5230                                 continue;
5231                         break;
5232                 case MSR_TSC_AUX:
5233                         if (!kvm_x86_ops->rdtscp_supported())
5234                                 continue;
5235                         break;
5236                 case MSR_IA32_RTIT_CTL:
5237                 case MSR_IA32_RTIT_STATUS:
5238                         if (!kvm_x86_ops->pt_supported())
5239                                 continue;
5240                         break;
5241                 case MSR_IA32_RTIT_CR3_MATCH:
5242                         if (!kvm_x86_ops->pt_supported() ||
5243                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5244                                 continue;
5245                         break;
5246                 case MSR_IA32_RTIT_OUTPUT_BASE:
5247                 case MSR_IA32_RTIT_OUTPUT_MASK:
5248                         if (!kvm_x86_ops->pt_supported() ||
5249                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5250                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5251                                 continue;
5252                         break;
5253                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5254                         if (!kvm_x86_ops->pt_supported() ||
5255                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5256                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5257                                 continue;
5258                         break;
5259                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5260                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5261                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5262                                 continue;
5263                         break;
5264                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5265                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5266                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5267                                 continue;
5268                 }
5269                 default:
5270                         break;
5271                 }
5272
5273                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5274         }
5275
5276         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5277                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs_all[i]))
5278                         continue;
5279
5280                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5281         }
5282
5283         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5284                 struct kvm_msr_entry msr;
5285
5286                 msr.index = msr_based_features_all[i];
5287                 if (kvm_get_msr_feature(&msr))
5288                         continue;
5289
5290                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5291         }
5292 }
5293
5294 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5295                            const void *v)
5296 {
5297         int handled = 0;
5298         int n;
5299
5300         do {
5301                 n = min(len, 8);
5302                 if (!(lapic_in_kernel(vcpu) &&
5303                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5304                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5305                         break;
5306                 handled += n;
5307                 addr += n;
5308                 len -= n;
5309                 v += n;
5310         } while (len);
5311
5312         return handled;
5313 }
5314
5315 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5316 {
5317         int handled = 0;
5318         int n;
5319
5320         do {
5321                 n = min(len, 8);
5322                 if (!(lapic_in_kernel(vcpu) &&
5323                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5324                                          addr, n, v))
5325                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5326                         break;
5327                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5328                 handled += n;
5329                 addr += n;
5330                 len -= n;
5331                 v += n;
5332         } while (len);
5333
5334         return handled;
5335 }
5336
5337 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5338                         struct kvm_segment *var, int seg)
5339 {
5340         kvm_x86_ops->set_segment(vcpu, var, seg);
5341 }
5342
5343 void kvm_get_segment(struct kvm_vcpu *vcpu,
5344                      struct kvm_segment *var, int seg)
5345 {
5346         kvm_x86_ops->get_segment(vcpu, var, seg);
5347 }
5348
5349 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5350                            struct x86_exception *exception)
5351 {
5352         gpa_t t_gpa;
5353
5354         BUG_ON(!mmu_is_nested(vcpu));
5355
5356         /* NPT walks are always user-walks */
5357         access |= PFERR_USER_MASK;
5358         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5359
5360         return t_gpa;
5361 }
5362
5363 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5364                               struct x86_exception *exception)
5365 {
5366         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5367         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5368 }
5369
5370  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5371                                 struct x86_exception *exception)
5372 {
5373         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5374         access |= PFERR_FETCH_MASK;
5375         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5376 }
5377
5378 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5379                                struct x86_exception *exception)
5380 {
5381         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5382         access |= PFERR_WRITE_MASK;
5383         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5384 }
5385
5386 /* uses this to access any guest's mapped memory without checking CPL */
5387 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5388                                 struct x86_exception *exception)
5389 {
5390         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5391 }
5392
5393 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5394                                       struct kvm_vcpu *vcpu, u32 access,
5395                                       struct x86_exception *exception)
5396 {
5397         void *data = val;
5398         int r = X86EMUL_CONTINUE;
5399
5400         while (bytes) {
5401                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5402                                                             exception);
5403                 unsigned offset = addr & (PAGE_SIZE-1);
5404                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5405                 int ret;
5406
5407                 if (gpa == UNMAPPED_GVA)
5408                         return X86EMUL_PROPAGATE_FAULT;
5409                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5410                                                offset, toread);
5411                 if (ret < 0) {
5412                         r = X86EMUL_IO_NEEDED;
5413                         goto out;
5414                 }
5415
5416                 bytes -= toread;
5417                 data += toread;
5418                 addr += toread;
5419         }
5420 out:
5421         return r;
5422 }
5423
5424 /* used for instruction fetching */
5425 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5426                                 gva_t addr, void *val, unsigned int bytes,
5427                                 struct x86_exception *exception)
5428 {
5429         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5430         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5431         unsigned offset;
5432         int ret;
5433
5434         /* Inline kvm_read_guest_virt_helper for speed.  */
5435         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5436                                                     exception);
5437         if (unlikely(gpa == UNMAPPED_GVA))
5438                 return X86EMUL_PROPAGATE_FAULT;
5439
5440         offset = addr & (PAGE_SIZE-1);
5441         if (WARN_ON(offset + bytes > PAGE_SIZE))
5442                 bytes = (unsigned)PAGE_SIZE - offset;
5443         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5444                                        offset, bytes);
5445         if (unlikely(ret < 0))
5446                 return X86EMUL_IO_NEEDED;
5447
5448         return X86EMUL_CONTINUE;
5449 }
5450
5451 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5452                                gva_t addr, void *val, unsigned int bytes,
5453                                struct x86_exception *exception)
5454 {
5455         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5456
5457         /*
5458          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5459          * is returned, but our callers are not ready for that and they blindly
5460          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5461          * uninitialized kernel stack memory into cr2 and error code.
5462          */
5463         memset(exception, 0, sizeof(*exception));
5464         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5465                                           exception);
5466 }
5467 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5468
5469 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5470                              gva_t addr, void *val, unsigned int bytes,
5471                              struct x86_exception *exception, bool system)
5472 {
5473         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5474         u32 access = 0;
5475
5476         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5477                 access |= PFERR_USER_MASK;
5478
5479         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5480 }
5481
5482 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5483                 unsigned long addr, void *val, unsigned int bytes)
5484 {
5485         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5486         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5487
5488         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5489 }
5490
5491 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5492                                       struct kvm_vcpu *vcpu, u32 access,
5493                                       struct x86_exception *exception)
5494 {
5495         void *data = val;
5496         int r = X86EMUL_CONTINUE;
5497
5498         while (bytes) {
5499                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5500                                                              access,
5501                                                              exception);
5502                 unsigned offset = addr & (PAGE_SIZE-1);
5503                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5504                 int ret;
5505
5506                 if (gpa == UNMAPPED_GVA)
5507                         return X86EMUL_PROPAGATE_FAULT;
5508                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5509                 if (ret < 0) {
5510                         r = X86EMUL_IO_NEEDED;
5511                         goto out;
5512                 }
5513
5514                 bytes -= towrite;
5515                 data += towrite;
5516                 addr += towrite;
5517         }
5518 out:
5519         return r;
5520 }
5521
5522 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5523                               unsigned int bytes, struct x86_exception *exception,
5524                               bool system)
5525 {
5526         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5527         u32 access = PFERR_WRITE_MASK;
5528
5529         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5530                 access |= PFERR_USER_MASK;
5531
5532         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5533                                            access, exception);
5534 }
5535
5536 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5537                                 unsigned int bytes, struct x86_exception *exception)
5538 {
5539         /* kvm_write_guest_virt_system can pull in tons of pages. */
5540         vcpu->arch.l1tf_flush_l1d = true;
5541
5542         /*
5543          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5544          * is returned, but our callers are not ready for that and they blindly
5545          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5546          * uninitialized kernel stack memory into cr2 and error code.
5547          */
5548         memset(exception, 0, sizeof(*exception));
5549         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5550                                            PFERR_WRITE_MASK, exception);
5551 }
5552 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5553
5554 int handle_ud(struct kvm_vcpu *vcpu)
5555 {
5556         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
5557         int emul_type = EMULTYPE_TRAP_UD;
5558         char sig[5]; /* ud2; .ascii "kvm" */
5559         struct x86_exception e;
5560
5561         if (force_emulation_prefix &&
5562             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5563                                 sig, sizeof(sig), &e) == 0 &&
5564             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
5565                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5566                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5567         }
5568
5569         return kvm_emulate_instruction(vcpu, emul_type);
5570 }
5571 EXPORT_SYMBOL_GPL(handle_ud);
5572
5573 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5574                             gpa_t gpa, bool write)
5575 {
5576         /* For APIC access vmexit */
5577         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5578                 return 1;
5579
5580         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5581                 trace_vcpu_match_mmio(gva, gpa, write, true);
5582                 return 1;
5583         }
5584
5585         return 0;
5586 }
5587
5588 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5589                                 gpa_t *gpa, struct x86_exception *exception,
5590                                 bool write)
5591 {
5592         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5593                 | (write ? PFERR_WRITE_MASK : 0);
5594
5595         /*
5596          * currently PKRU is only applied to ept enabled guest so
5597          * there is no pkey in EPT page table for L1 guest or EPT
5598          * shadow page table for L2 guest.
5599          */
5600         if (vcpu_match_mmio_gva(vcpu, gva)
5601             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5602                                  vcpu->arch.mmio_access, 0, access)) {
5603                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5604                                         (gva & (PAGE_SIZE - 1));
5605                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5606                 return 1;
5607         }
5608
5609         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5610
5611         if (*gpa == UNMAPPED_GVA)
5612                 return -1;
5613
5614         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5615 }
5616
5617 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5618                         const void *val, int bytes)
5619 {
5620         int ret;
5621
5622         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5623         if (ret < 0)
5624                 return 0;
5625         kvm_page_track_write(vcpu, gpa, val, bytes);
5626         return 1;
5627 }
5628
5629 struct read_write_emulator_ops {
5630         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5631                                   int bytes);
5632         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5633                                   void *val, int bytes);
5634         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5635                                int bytes, void *val);
5636         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5637                                     void *val, int bytes);
5638         bool write;
5639 };
5640
5641 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5642 {
5643         if (vcpu->mmio_read_completed) {
5644                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5645                                vcpu->mmio_fragments[0].gpa, val);
5646                 vcpu->mmio_read_completed = 0;
5647                 return 1;
5648         }
5649
5650         return 0;
5651 }
5652
5653 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5654                         void *val, int bytes)
5655 {
5656         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5657 }
5658
5659 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5660                          void *val, int bytes)
5661 {
5662         return emulator_write_phys(vcpu, gpa, val, bytes);
5663 }
5664
5665 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5666 {
5667         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5668         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5669 }
5670
5671 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5672                           void *val, int bytes)
5673 {
5674         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5675         return X86EMUL_IO_NEEDED;
5676 }
5677
5678 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5679                            void *val, int bytes)
5680 {
5681         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5682
5683         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5684         return X86EMUL_CONTINUE;
5685 }
5686
5687 static const struct read_write_emulator_ops read_emultor = {
5688         .read_write_prepare = read_prepare,
5689         .read_write_emulate = read_emulate,
5690         .read_write_mmio = vcpu_mmio_read,
5691         .read_write_exit_mmio = read_exit_mmio,
5692 };
5693
5694 static const struct read_write_emulator_ops write_emultor = {
5695         .read_write_emulate = write_emulate,
5696         .read_write_mmio = write_mmio,
5697         .read_write_exit_mmio = write_exit_mmio,
5698         .write = true,
5699 };
5700
5701 static int emulator_read_write_onepage(unsigned long addr, void *val,
5702                                        unsigned int bytes,
5703                                        struct x86_exception *exception,
5704                                        struct kvm_vcpu *vcpu,
5705                                        const struct read_write_emulator_ops *ops)
5706 {
5707         gpa_t gpa;
5708         int handled, ret;
5709         bool write = ops->write;
5710         struct kvm_mmio_fragment *frag;
5711         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5712
5713         /*
5714          * If the exit was due to a NPF we may already have a GPA.
5715          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5716          * Note, this cannot be used on string operations since string
5717          * operation using rep will only have the initial GPA from the NPF
5718          * occurred.
5719          */
5720         if (vcpu->arch.gpa_available &&
5721             emulator_can_use_gpa(ctxt) &&
5722             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5723                 gpa = vcpu->arch.gpa_val;
5724                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5725         } else {
5726                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5727                 if (ret < 0)
5728                         return X86EMUL_PROPAGATE_FAULT;
5729         }
5730
5731         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5732                 return X86EMUL_CONTINUE;
5733
5734         /*
5735          * Is this MMIO handled locally?
5736          */
5737         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5738         if (handled == bytes)
5739                 return X86EMUL_CONTINUE;
5740
5741         gpa += handled;
5742         bytes -= handled;
5743         val += handled;
5744
5745         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5746         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5747         frag->gpa = gpa;
5748         frag->data = val;
5749         frag->len = bytes;
5750         return X86EMUL_CONTINUE;
5751 }
5752
5753 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5754                         unsigned long addr,
5755                         void *val, unsigned int bytes,
5756                         struct x86_exception *exception,
5757                         const struct read_write_emulator_ops *ops)
5758 {
5759         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5760         gpa_t gpa;
5761         int rc;
5762
5763         if (ops->read_write_prepare &&
5764                   ops->read_write_prepare(vcpu, val, bytes))
5765                 return X86EMUL_CONTINUE;
5766
5767         vcpu->mmio_nr_fragments = 0;
5768
5769         /* Crossing a page boundary? */
5770         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5771                 int now;
5772
5773                 now = -addr & ~PAGE_MASK;
5774                 rc = emulator_read_write_onepage(addr, val, now, exception,
5775                                                  vcpu, ops);
5776
5777                 if (rc != X86EMUL_CONTINUE)
5778                         return rc;
5779                 addr += now;
5780                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5781                         addr = (u32)addr;
5782                 val += now;
5783                 bytes -= now;
5784         }
5785
5786         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5787                                          vcpu, ops);
5788         if (rc != X86EMUL_CONTINUE)
5789                 return rc;
5790
5791         if (!vcpu->mmio_nr_fragments)
5792                 return rc;
5793
5794         gpa = vcpu->mmio_fragments[0].gpa;
5795
5796         vcpu->mmio_needed = 1;
5797         vcpu->mmio_cur_fragment = 0;
5798
5799         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5800         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5801         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5802         vcpu->run->mmio.phys_addr = gpa;
5803
5804         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5805 }
5806
5807 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5808                                   unsigned long addr,
5809                                   void *val,
5810                                   unsigned int bytes,
5811                                   struct x86_exception *exception)
5812 {
5813         return emulator_read_write(ctxt, addr, val, bytes,
5814                                    exception, &read_emultor);
5815 }
5816
5817 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5818                             unsigned long addr,
5819                             const void *val,
5820                             unsigned int bytes,
5821                             struct x86_exception *exception)
5822 {
5823         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5824                                    exception, &write_emultor);
5825 }
5826
5827 #define CMPXCHG_TYPE(t, ptr, old, new) \
5828         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5829
5830 #ifdef CONFIG_X86_64
5831 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5832 #else
5833 #  define CMPXCHG64(ptr, old, new) \
5834         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5835 #endif
5836
5837 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5838                                      unsigned long addr,
5839                                      const void *old,
5840                                      const void *new,
5841                                      unsigned int bytes,
5842                                      struct x86_exception *exception)
5843 {
5844         struct kvm_host_map map;
5845         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5846         gpa_t gpa;
5847         char *kaddr;
5848         bool exchanged;
5849
5850         /* guests cmpxchg8b have to be emulated atomically */
5851         if (bytes > 8 || (bytes & (bytes - 1)))
5852                 goto emul_write;
5853
5854         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5855
5856         if (gpa == UNMAPPED_GVA ||
5857             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5858                 goto emul_write;
5859
5860         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5861                 goto emul_write;
5862
5863         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5864                 goto emul_write;
5865
5866         kaddr = map.hva + offset_in_page(gpa);
5867
5868         switch (bytes) {
5869         case 1:
5870                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5871                 break;
5872         case 2:
5873                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5874                 break;
5875         case 4:
5876                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5877                 break;
5878         case 8:
5879                 exchanged = CMPXCHG64(kaddr, old, new);
5880                 break;
5881         default:
5882                 BUG();
5883         }
5884
5885         kvm_vcpu_unmap(vcpu, &map, true);
5886
5887         if (!exchanged)
5888                 return X86EMUL_CMPXCHG_FAILED;
5889
5890         kvm_page_track_write(vcpu, gpa, new, bytes);
5891
5892         return X86EMUL_CONTINUE;
5893
5894 emul_write:
5895         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5896
5897         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5898 }
5899
5900 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5901 {
5902         int r = 0, i;
5903
5904         for (i = 0; i < vcpu->arch.pio.count; i++) {
5905                 if (vcpu->arch.pio.in)
5906                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5907                                             vcpu->arch.pio.size, pd);
5908                 else
5909                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5910                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5911                                              pd);
5912                 if (r)
5913                         break;
5914                 pd += vcpu->arch.pio.size;
5915         }
5916         return r;
5917 }
5918
5919 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5920                                unsigned short port, void *val,
5921                                unsigned int count, bool in)
5922 {
5923         vcpu->arch.pio.port = port;
5924         vcpu->arch.pio.in = in;
5925         vcpu->arch.pio.count  = count;
5926         vcpu->arch.pio.size = size;
5927
5928         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5929                 vcpu->arch.pio.count = 0;
5930                 return 1;
5931         }
5932
5933         vcpu->run->exit_reason = KVM_EXIT_IO;
5934         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5935         vcpu->run->io.size = size;
5936         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5937         vcpu->run->io.count = count;
5938         vcpu->run->io.port = port;
5939
5940         return 0;
5941 }
5942
5943 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5944                                     int size, unsigned short port, void *val,
5945                                     unsigned int count)
5946 {
5947         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5948         int ret;
5949
5950         if (vcpu->arch.pio.count)
5951                 goto data_avail;
5952
5953         memset(vcpu->arch.pio_data, 0, size * count);
5954
5955         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5956         if (ret) {
5957 data_avail:
5958                 memcpy(val, vcpu->arch.pio_data, size * count);
5959                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5960                 vcpu->arch.pio.count = 0;
5961                 return 1;
5962         }
5963
5964         return 0;
5965 }
5966
5967 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5968                                      int size, unsigned short port,
5969                                      const void *val, unsigned int count)
5970 {
5971         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5972
5973         memcpy(vcpu->arch.pio_data, val, size * count);
5974         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5975         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5976 }
5977
5978 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5979 {
5980         return kvm_x86_ops->get_segment_base(vcpu, seg);
5981 }
5982
5983 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5984 {
5985         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5986 }
5987
5988 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5989 {
5990         if (!need_emulate_wbinvd(vcpu))
5991                 return X86EMUL_CONTINUE;
5992
5993         if (kvm_x86_ops->has_wbinvd_exit()) {
5994                 int cpu = get_cpu();
5995
5996                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5997                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5998                                 wbinvd_ipi, NULL, 1);
5999                 put_cpu();
6000                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6001         } else
6002                 wbinvd();
6003         return X86EMUL_CONTINUE;
6004 }
6005
6006 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6007 {
6008         kvm_emulate_wbinvd_noskip(vcpu);
6009         return kvm_skip_emulated_instruction(vcpu);
6010 }
6011 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6012
6013
6014
6015 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6016 {
6017         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6018 }
6019
6020 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6021                            unsigned long *dest)
6022 {
6023         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6024 }
6025
6026 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6027                            unsigned long value)
6028 {
6029
6030         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6031 }
6032
6033 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6034 {
6035         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6036 }
6037
6038 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6039 {
6040         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6041         unsigned long value;
6042
6043         switch (cr) {
6044         case 0:
6045                 value = kvm_read_cr0(vcpu);
6046                 break;
6047         case 2:
6048                 value = vcpu->arch.cr2;
6049                 break;
6050         case 3:
6051                 value = kvm_read_cr3(vcpu);
6052                 break;
6053         case 4:
6054                 value = kvm_read_cr4(vcpu);
6055                 break;
6056         case 8:
6057                 value = kvm_get_cr8(vcpu);
6058                 break;
6059         default:
6060                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6061                 return 0;
6062         }
6063
6064         return value;
6065 }
6066
6067 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6068 {
6069         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6070         int res = 0;
6071
6072         switch (cr) {
6073         case 0:
6074                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6075                 break;
6076         case 2:
6077                 vcpu->arch.cr2 = val;
6078                 break;
6079         case 3:
6080                 res = kvm_set_cr3(vcpu, val);
6081                 break;
6082         case 4:
6083                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6084                 break;
6085         case 8:
6086                 res = kvm_set_cr8(vcpu, val);
6087                 break;
6088         default:
6089                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6090                 res = -1;
6091         }
6092
6093         return res;
6094 }
6095
6096 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6097 {
6098         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
6099 }
6100
6101 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6102 {
6103         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
6104 }
6105
6106 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6107 {
6108         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
6109 }
6110
6111 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6112 {
6113         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6114 }
6115
6116 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6117 {
6118         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6119 }
6120
6121 static unsigned long emulator_get_cached_segment_base(
6122         struct x86_emulate_ctxt *ctxt, int seg)
6123 {
6124         return get_segment_base(emul_to_vcpu(ctxt), seg);
6125 }
6126
6127 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6128                                  struct desc_struct *desc, u32 *base3,
6129                                  int seg)
6130 {
6131         struct kvm_segment var;
6132
6133         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6134         *selector = var.selector;
6135
6136         if (var.unusable) {
6137                 memset(desc, 0, sizeof(*desc));
6138                 if (base3)
6139                         *base3 = 0;
6140                 return false;
6141         }
6142
6143         if (var.g)
6144                 var.limit >>= 12;
6145         set_desc_limit(desc, var.limit);
6146         set_desc_base(desc, (unsigned long)var.base);
6147 #ifdef CONFIG_X86_64
6148         if (base3)
6149                 *base3 = var.base >> 32;
6150 #endif
6151         desc->type = var.type;
6152         desc->s = var.s;
6153         desc->dpl = var.dpl;
6154         desc->p = var.present;
6155         desc->avl = var.avl;
6156         desc->l = var.l;
6157         desc->d = var.db;
6158         desc->g = var.g;
6159
6160         return true;
6161 }
6162
6163 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6164                                  struct desc_struct *desc, u32 base3,
6165                                  int seg)
6166 {
6167         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6168         struct kvm_segment var;
6169
6170         var.selector = selector;
6171         var.base = get_desc_base(desc);
6172 #ifdef CONFIG_X86_64
6173         var.base |= ((u64)base3) << 32;
6174 #endif
6175         var.limit = get_desc_limit(desc);
6176         if (desc->g)
6177                 var.limit = (var.limit << 12) | 0xfff;
6178         var.type = desc->type;
6179         var.dpl = desc->dpl;
6180         var.db = desc->d;
6181         var.s = desc->s;
6182         var.l = desc->l;
6183         var.g = desc->g;
6184         var.avl = desc->avl;
6185         var.present = desc->p;
6186         var.unusable = !var.present;
6187         var.padding = 0;
6188
6189         kvm_set_segment(vcpu, &var, seg);
6190         return;
6191 }
6192
6193 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6194                             u32 msr_index, u64 *pdata)
6195 {
6196         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6197 }
6198
6199 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6200                             u32 msr_index, u64 data)
6201 {
6202         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6203 }
6204
6205 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6206 {
6207         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6208
6209         return vcpu->arch.smbase;
6210 }
6211
6212 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6213 {
6214         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6215
6216         vcpu->arch.smbase = smbase;
6217 }
6218
6219 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6220                               u32 pmc)
6221 {
6222         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6223 }
6224
6225 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6226                              u32 pmc, u64 *pdata)
6227 {
6228         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6229 }
6230
6231 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6232 {
6233         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6234 }
6235
6236 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6237                               struct x86_instruction_info *info,
6238                               enum x86_intercept_stage stage)
6239 {
6240         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6241 }
6242
6243 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6244                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6245 {
6246         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6247 }
6248
6249 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6250 {
6251         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6252 }
6253
6254 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6255 {
6256         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6257 }
6258
6259 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6260 {
6261         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6262 }
6263
6264 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6265 {
6266         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6267 }
6268
6269 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6270 {
6271         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6272 }
6273
6274 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6275 {
6276         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6277 }
6278
6279 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6280 {
6281         return emul_to_vcpu(ctxt)->arch.hflags;
6282 }
6283
6284 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6285 {
6286         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6287 }
6288
6289 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6290                                   const char *smstate)
6291 {
6292         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6293 }
6294
6295 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6296 {
6297         kvm_smm_changed(emul_to_vcpu(ctxt));
6298 }
6299
6300 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6301 {
6302         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6303 }
6304
6305 static const struct x86_emulate_ops emulate_ops = {
6306         .read_gpr            = emulator_read_gpr,
6307         .write_gpr           = emulator_write_gpr,
6308         .read_std            = emulator_read_std,
6309         .write_std           = emulator_write_std,
6310         .read_phys           = kvm_read_guest_phys_system,
6311         .fetch               = kvm_fetch_guest_virt,
6312         .read_emulated       = emulator_read_emulated,
6313         .write_emulated      = emulator_write_emulated,
6314         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6315         .invlpg              = emulator_invlpg,
6316         .pio_in_emulated     = emulator_pio_in_emulated,
6317         .pio_out_emulated    = emulator_pio_out_emulated,
6318         .get_segment         = emulator_get_segment,
6319         .set_segment         = emulator_set_segment,
6320         .get_cached_segment_base = emulator_get_cached_segment_base,
6321         .get_gdt             = emulator_get_gdt,
6322         .get_idt             = emulator_get_idt,
6323         .set_gdt             = emulator_set_gdt,
6324         .set_idt             = emulator_set_idt,
6325         .get_cr              = emulator_get_cr,
6326         .set_cr              = emulator_set_cr,
6327         .cpl                 = emulator_get_cpl,
6328         .get_dr              = emulator_get_dr,
6329         .set_dr              = emulator_set_dr,
6330         .get_smbase          = emulator_get_smbase,
6331         .set_smbase          = emulator_set_smbase,
6332         .set_msr             = emulator_set_msr,
6333         .get_msr             = emulator_get_msr,
6334         .check_pmc           = emulator_check_pmc,
6335         .read_pmc            = emulator_read_pmc,
6336         .halt                = emulator_halt,
6337         .wbinvd              = emulator_wbinvd,
6338         .fix_hypercall       = emulator_fix_hypercall,
6339         .intercept           = emulator_intercept,
6340         .get_cpuid           = emulator_get_cpuid,
6341         .guest_has_long_mode = emulator_guest_has_long_mode,
6342         .guest_has_movbe     = emulator_guest_has_movbe,
6343         .guest_has_fxsr      = emulator_guest_has_fxsr,
6344         .set_nmi_mask        = emulator_set_nmi_mask,
6345         .get_hflags          = emulator_get_hflags,
6346         .set_hflags          = emulator_set_hflags,
6347         .pre_leave_smm       = emulator_pre_leave_smm,
6348         .post_leave_smm      = emulator_post_leave_smm,
6349         .set_xcr             = emulator_set_xcr,
6350 };
6351
6352 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6353 {
6354         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6355         /*
6356          * an sti; sti; sequence only disable interrupts for the first
6357          * instruction. So, if the last instruction, be it emulated or
6358          * not, left the system with the INT_STI flag enabled, it
6359          * means that the last instruction is an sti. We should not
6360          * leave the flag on in this case. The same goes for mov ss
6361          */
6362         if (int_shadow & mask)
6363                 mask = 0;
6364         if (unlikely(int_shadow || mask)) {
6365                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6366                 if (!mask)
6367                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6368         }
6369 }
6370
6371 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6372 {
6373         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6374         if (ctxt->exception.vector == PF_VECTOR)
6375                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6376
6377         if (ctxt->exception.error_code_valid)
6378                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6379                                       ctxt->exception.error_code);
6380         else
6381                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6382         return false;
6383 }
6384
6385 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6386 {
6387         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6388         int cs_db, cs_l;
6389
6390         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6391
6392         ctxt->eflags = kvm_get_rflags(vcpu);
6393         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6394
6395         ctxt->eip = kvm_rip_read(vcpu);
6396         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6397                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6398                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6399                      cs_db                              ? X86EMUL_MODE_PROT32 :
6400                                                           X86EMUL_MODE_PROT16;
6401         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6402         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6403         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6404
6405         init_decode_cache(ctxt);
6406         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6407 }
6408
6409 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6410 {
6411         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6412         int ret;
6413
6414         init_emulate_ctxt(vcpu);
6415
6416         ctxt->op_bytes = 2;
6417         ctxt->ad_bytes = 2;
6418         ctxt->_eip = ctxt->eip + inc_eip;
6419         ret = emulate_int_real(ctxt, irq);
6420
6421         if (ret != X86EMUL_CONTINUE) {
6422                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6423         } else {
6424                 ctxt->eip = ctxt->_eip;
6425                 kvm_rip_write(vcpu, ctxt->eip);
6426                 kvm_set_rflags(vcpu, ctxt->eflags);
6427         }
6428 }
6429 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6430
6431 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6432 {
6433         ++vcpu->stat.insn_emulation_fail;
6434         trace_kvm_emulate_insn_failed(vcpu);
6435
6436         if (emulation_type & EMULTYPE_VMWARE_GP) {
6437                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6438                 return 1;
6439         }
6440
6441         if (emulation_type & EMULTYPE_SKIP) {
6442                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6443                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6444                 vcpu->run->internal.ndata = 0;
6445                 return 0;
6446         }
6447
6448         kvm_queue_exception(vcpu, UD_VECTOR);
6449
6450         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6451                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6452                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6453                 vcpu->run->internal.ndata = 0;
6454                 return 0;
6455         }
6456
6457         return 1;
6458 }
6459
6460 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6461                                   bool write_fault_to_shadow_pgtable,
6462                                   int emulation_type)
6463 {
6464         gpa_t gpa = cr2_or_gpa;
6465         kvm_pfn_t pfn;
6466
6467         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6468                 return false;
6469
6470         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6471                 return false;
6472
6473         if (!vcpu->arch.mmu->direct_map) {
6474                 /*
6475                  * Write permission should be allowed since only
6476                  * write access need to be emulated.
6477                  */
6478                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
6479
6480                 /*
6481                  * If the mapping is invalid in guest, let cpu retry
6482                  * it to generate fault.
6483                  */
6484                 if (gpa == UNMAPPED_GVA)
6485                         return true;
6486         }
6487
6488         /*
6489          * Do not retry the unhandleable instruction if it faults on the
6490          * readonly host memory, otherwise it will goto a infinite loop:
6491          * retry instruction -> write #PF -> emulation fail -> retry
6492          * instruction -> ...
6493          */
6494         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6495
6496         /*
6497          * If the instruction failed on the error pfn, it can not be fixed,
6498          * report the error to userspace.
6499          */
6500         if (is_error_noslot_pfn(pfn))
6501                 return false;
6502
6503         kvm_release_pfn_clean(pfn);
6504
6505         /* The instructions are well-emulated on direct mmu. */
6506         if (vcpu->arch.mmu->direct_map) {
6507                 unsigned int indirect_shadow_pages;
6508
6509                 spin_lock(&vcpu->kvm->mmu_lock);
6510                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6511                 spin_unlock(&vcpu->kvm->mmu_lock);
6512
6513                 if (indirect_shadow_pages)
6514                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6515
6516                 return true;
6517         }
6518
6519         /*
6520          * if emulation was due to access to shadowed page table
6521          * and it failed try to unshadow page and re-enter the
6522          * guest to let CPU execute the instruction.
6523          */
6524         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6525
6526         /*
6527          * If the access faults on its page table, it can not
6528          * be fixed by unprotecting shadow page and it should
6529          * be reported to userspace.
6530          */
6531         return !write_fault_to_shadow_pgtable;
6532 }
6533
6534 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6535                               gpa_t cr2_or_gpa,  int emulation_type)
6536 {
6537         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6538         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
6539
6540         last_retry_eip = vcpu->arch.last_retry_eip;
6541         last_retry_addr = vcpu->arch.last_retry_addr;
6542
6543         /*
6544          * If the emulation is caused by #PF and it is non-page_table
6545          * writing instruction, it means the VM-EXIT is caused by shadow
6546          * page protected, we can zap the shadow page and retry this
6547          * instruction directly.
6548          *
6549          * Note: if the guest uses a non-page-table modifying instruction
6550          * on the PDE that points to the instruction, then we will unmap
6551          * the instruction and go to an infinite loop. So, we cache the
6552          * last retried eip and the last fault address, if we meet the eip
6553          * and the address again, we can break out of the potential infinite
6554          * loop.
6555          */
6556         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6557
6558         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6559                 return false;
6560
6561         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6562                 return false;
6563
6564         if (x86_page_table_writing_insn(ctxt))
6565                 return false;
6566
6567         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
6568                 return false;
6569
6570         vcpu->arch.last_retry_eip = ctxt->eip;
6571         vcpu->arch.last_retry_addr = cr2_or_gpa;
6572
6573         if (!vcpu->arch.mmu->direct_map)
6574                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
6575
6576         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6577
6578         return true;
6579 }
6580
6581 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6582 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6583
6584 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6585 {
6586         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6587                 /* This is a good place to trace that we are exiting SMM.  */
6588                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6589
6590                 /* Process a latched INIT or SMI, if any.  */
6591                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6592         }
6593
6594         kvm_mmu_reset_context(vcpu);
6595 }
6596
6597 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6598                                 unsigned long *db)
6599 {
6600         u32 dr6 = 0;
6601         int i;
6602         u32 enable, rwlen;
6603
6604         enable = dr7;
6605         rwlen = dr7 >> 16;
6606         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6607                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6608                         dr6 |= (1 << i);
6609         return dr6;
6610 }
6611
6612 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6613 {
6614         struct kvm_run *kvm_run = vcpu->run;
6615
6616         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6617                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6618                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6619                 kvm_run->debug.arch.exception = DB_VECTOR;
6620                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6621                 return 0;
6622         }
6623         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6624         return 1;
6625 }
6626
6627 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6628 {
6629         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6630         int r;
6631
6632         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6633         if (unlikely(!r))
6634                 return 0;
6635
6636         /*
6637          * rflags is the old, "raw" value of the flags.  The new value has
6638          * not been saved yet.
6639          *
6640          * This is correct even for TF set by the guest, because "the
6641          * processor will not generate this exception after the instruction
6642          * that sets the TF flag".
6643          */
6644         if (unlikely(rflags & X86_EFLAGS_TF))
6645                 r = kvm_vcpu_do_singlestep(vcpu);
6646         return r;
6647 }
6648 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6649
6650 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6651 {
6652         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6653             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6654                 struct kvm_run *kvm_run = vcpu->run;
6655                 unsigned long eip = kvm_get_linear_rip(vcpu);
6656                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6657                                            vcpu->arch.guest_debug_dr7,
6658                                            vcpu->arch.eff_db);
6659
6660                 if (dr6 != 0) {
6661                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6662                         kvm_run->debug.arch.pc = eip;
6663                         kvm_run->debug.arch.exception = DB_VECTOR;
6664                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6665                         *r = 0;
6666                         return true;
6667                 }
6668         }
6669
6670         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6671             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6672                 unsigned long eip = kvm_get_linear_rip(vcpu);
6673                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6674                                            vcpu->arch.dr7,
6675                                            vcpu->arch.db);
6676
6677                 if (dr6 != 0) {
6678                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6679                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6680                         kvm_queue_exception(vcpu, DB_VECTOR);
6681                         *r = 1;
6682                         return true;
6683                 }
6684         }
6685
6686         return false;
6687 }
6688
6689 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6690 {
6691         switch (ctxt->opcode_len) {
6692         case 1:
6693                 switch (ctxt->b) {
6694                 case 0xe4:      /* IN */
6695                 case 0xe5:
6696                 case 0xec:
6697                 case 0xed:
6698                 case 0xe6:      /* OUT */
6699                 case 0xe7:
6700                 case 0xee:
6701                 case 0xef:
6702                 case 0x6c:      /* INS */
6703                 case 0x6d:
6704                 case 0x6e:      /* OUTS */
6705                 case 0x6f:
6706                         return true;
6707                 }
6708                 break;
6709         case 2:
6710                 switch (ctxt->b) {
6711                 case 0x33:      /* RDPMC */
6712                         return true;
6713                 }
6714                 break;
6715         }
6716
6717         return false;
6718 }
6719
6720 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6721                             int emulation_type, void *insn, int insn_len)
6722 {
6723         int r;
6724         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6725         bool writeback = true;
6726         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6727
6728         vcpu->arch.l1tf_flush_l1d = true;
6729
6730         /*
6731          * Clear write_fault_to_shadow_pgtable here to ensure it is
6732          * never reused.
6733          */
6734         vcpu->arch.write_fault_to_shadow_pgtable = false;
6735         kvm_clear_exception_queue(vcpu);
6736
6737         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6738                 init_emulate_ctxt(vcpu);
6739
6740                 /*
6741                  * We will reenter on the same instruction since
6742                  * we do not set complete_userspace_io.  This does not
6743                  * handle watchpoints yet, those would be handled in
6744                  * the emulate_ops.
6745                  */
6746                 if (!(emulation_type & EMULTYPE_SKIP) &&
6747                     kvm_vcpu_check_breakpoint(vcpu, &r))
6748                         return r;
6749
6750                 ctxt->interruptibility = 0;
6751                 ctxt->have_exception = false;
6752                 ctxt->exception.vector = -1;
6753                 ctxt->perm_ok = false;
6754
6755                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6756
6757                 r = x86_decode_insn(ctxt, insn, insn_len);
6758
6759                 trace_kvm_emulate_insn_start(vcpu);
6760                 ++vcpu->stat.insn_emulation;
6761                 if (r != EMULATION_OK)  {
6762                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6763                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6764                                 kvm_queue_exception(vcpu, UD_VECTOR);
6765                                 return 1;
6766                         }
6767                         if (reexecute_instruction(vcpu, cr2_or_gpa,
6768                                                   write_fault_to_spt,
6769                                                   emulation_type))
6770                                 return 1;
6771                         if (ctxt->have_exception) {
6772                                 /*
6773                                  * #UD should result in just EMULATION_FAILED, and trap-like
6774                                  * exception should not be encountered during decode.
6775                                  */
6776                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6777                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6778                                 inject_emulated_exception(vcpu);
6779                                 return 1;
6780                         }
6781                         return handle_emulation_failure(vcpu, emulation_type);
6782                 }
6783         }
6784
6785         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6786             !is_vmware_backdoor_opcode(ctxt)) {
6787                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6788                 return 1;
6789         }
6790
6791         /*
6792          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6793          * for kvm_skip_emulated_instruction().  The caller is responsible for
6794          * updating interruptibility state and injecting single-step #DBs.
6795          */
6796         if (emulation_type & EMULTYPE_SKIP) {
6797                 kvm_rip_write(vcpu, ctxt->_eip);
6798                 if (ctxt->eflags & X86_EFLAGS_RF)
6799                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6800                 return 1;
6801         }
6802
6803         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
6804                 return 1;
6805
6806         /* this is needed for vmware backdoor interface to work since it
6807            changes registers values  during IO operation */
6808         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6809                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6810                 emulator_invalidate_register_cache(ctxt);
6811         }
6812
6813 restart:
6814         /* Save the faulting GPA (cr2) in the address field */
6815         ctxt->exception.address = cr2_or_gpa;
6816
6817         r = x86_emulate_insn(ctxt);
6818
6819         if (r == EMULATION_INTERCEPTED)
6820                 return 1;
6821
6822         if (r == EMULATION_FAILED) {
6823                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
6824                                         emulation_type))
6825                         return 1;
6826
6827                 return handle_emulation_failure(vcpu, emulation_type);
6828         }
6829
6830         if (ctxt->have_exception) {
6831                 r = 1;
6832                 if (inject_emulated_exception(vcpu))
6833                         return r;
6834         } else if (vcpu->arch.pio.count) {
6835                 if (!vcpu->arch.pio.in) {
6836                         /* FIXME: return into emulator if single-stepping.  */
6837                         vcpu->arch.pio.count = 0;
6838                 } else {
6839                         writeback = false;
6840                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6841                 }
6842                 r = 0;
6843         } else if (vcpu->mmio_needed) {
6844                 ++vcpu->stat.mmio_exits;
6845
6846                 if (!vcpu->mmio_is_write)
6847                         writeback = false;
6848                 r = 0;
6849                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6850         } else if (r == EMULATION_RESTART)
6851                 goto restart;
6852         else
6853                 r = 1;
6854
6855         if (writeback) {
6856                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6857                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6858                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6859                 if (!ctxt->have_exception ||
6860                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6861                         kvm_rip_write(vcpu, ctxt->eip);
6862                         if (r && ctxt->tf)
6863                                 r = kvm_vcpu_do_singlestep(vcpu);
6864                         __kvm_set_rflags(vcpu, ctxt->eflags);
6865                 }
6866
6867                 /*
6868                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6869                  * do nothing, and it will be requested again as soon as
6870                  * the shadow expires.  But we still need to check here,
6871                  * because POPF has no interrupt shadow.
6872                  */
6873                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6874                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6875         } else
6876                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6877
6878         return r;
6879 }
6880
6881 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6882 {
6883         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6884 }
6885 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6886
6887 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6888                                         void *insn, int insn_len)
6889 {
6890         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6891 }
6892 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6893
6894 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6895 {
6896         vcpu->arch.pio.count = 0;
6897         return 1;
6898 }
6899
6900 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6901 {
6902         vcpu->arch.pio.count = 0;
6903
6904         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6905                 return 1;
6906
6907         return kvm_skip_emulated_instruction(vcpu);
6908 }
6909
6910 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6911                             unsigned short port)
6912 {
6913         unsigned long val = kvm_rax_read(vcpu);
6914         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6915                                             size, port, &val, 1);
6916         if (ret)
6917                 return ret;
6918
6919         /*
6920          * Workaround userspace that relies on old KVM behavior of %rip being
6921          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6922          */
6923         if (port == 0x7e &&
6924             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6925                 vcpu->arch.complete_userspace_io =
6926                         complete_fast_pio_out_port_0x7e;
6927                 kvm_skip_emulated_instruction(vcpu);
6928         } else {
6929                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6930                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6931         }
6932         return 0;
6933 }
6934
6935 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6936 {
6937         unsigned long val;
6938
6939         /* We should only ever be called with arch.pio.count equal to 1 */
6940         BUG_ON(vcpu->arch.pio.count != 1);
6941
6942         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6943                 vcpu->arch.pio.count = 0;
6944                 return 1;
6945         }
6946
6947         /* For size less than 4 we merge, else we zero extend */
6948         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6949
6950         /*
6951          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6952          * the copy and tracing
6953          */
6954         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6955                                  vcpu->arch.pio.port, &val, 1);
6956         kvm_rax_write(vcpu, val);
6957
6958         return kvm_skip_emulated_instruction(vcpu);
6959 }
6960
6961 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6962                            unsigned short port)
6963 {
6964         unsigned long val;
6965         int ret;
6966
6967         /* For size less than 4 we merge, else we zero extend */
6968         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6969
6970         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6971                                        &val, 1);
6972         if (ret) {
6973                 kvm_rax_write(vcpu, val);
6974                 return ret;
6975         }
6976
6977         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6978         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6979
6980         return 0;
6981 }
6982
6983 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6984 {
6985         int ret;
6986
6987         if (in)
6988                 ret = kvm_fast_pio_in(vcpu, size, port);
6989         else
6990                 ret = kvm_fast_pio_out(vcpu, size, port);
6991         return ret && kvm_skip_emulated_instruction(vcpu);
6992 }
6993 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6994
6995 static int kvmclock_cpu_down_prep(unsigned int cpu)
6996 {
6997         __this_cpu_write(cpu_tsc_khz, 0);
6998         return 0;
6999 }
7000
7001 static void tsc_khz_changed(void *data)
7002 {
7003         struct cpufreq_freqs *freq = data;
7004         unsigned long khz = 0;
7005
7006         if (data)
7007                 khz = freq->new;
7008         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7009                 khz = cpufreq_quick_get(raw_smp_processor_id());
7010         if (!khz)
7011                 khz = tsc_khz;
7012         __this_cpu_write(cpu_tsc_khz, khz);
7013 }
7014
7015 #ifdef CONFIG_X86_64
7016 static void kvm_hyperv_tsc_notifier(void)
7017 {
7018         struct kvm *kvm;
7019         struct kvm_vcpu *vcpu;
7020         int cpu;
7021
7022         mutex_lock(&kvm_lock);
7023         list_for_each_entry(kvm, &vm_list, vm_list)
7024                 kvm_make_mclock_inprogress_request(kvm);
7025
7026         hyperv_stop_tsc_emulation();
7027
7028         /* TSC frequency always matches when on Hyper-V */
7029         for_each_present_cpu(cpu)
7030                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7031         kvm_max_guest_tsc_khz = tsc_khz;
7032
7033         list_for_each_entry(kvm, &vm_list, vm_list) {
7034                 struct kvm_arch *ka = &kvm->arch;
7035
7036                 spin_lock(&ka->pvclock_gtod_sync_lock);
7037
7038                 pvclock_update_vm_gtod_copy(kvm);
7039
7040                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7041                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7042
7043                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7044                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7045
7046                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7047         }
7048         mutex_unlock(&kvm_lock);
7049 }
7050 #endif
7051
7052 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7053 {
7054         struct kvm *kvm;
7055         struct kvm_vcpu *vcpu;
7056         int i, send_ipi = 0;
7057
7058         /*
7059          * We allow guests to temporarily run on slowing clocks,
7060          * provided we notify them after, or to run on accelerating
7061          * clocks, provided we notify them before.  Thus time never
7062          * goes backwards.
7063          *
7064          * However, we have a problem.  We can't atomically update
7065          * the frequency of a given CPU from this function; it is
7066          * merely a notifier, which can be called from any CPU.
7067          * Changing the TSC frequency at arbitrary points in time
7068          * requires a recomputation of local variables related to
7069          * the TSC for each VCPU.  We must flag these local variables
7070          * to be updated and be sure the update takes place with the
7071          * new frequency before any guests proceed.
7072          *
7073          * Unfortunately, the combination of hotplug CPU and frequency
7074          * change creates an intractable locking scenario; the order
7075          * of when these callouts happen is undefined with respect to
7076          * CPU hotplug, and they can race with each other.  As such,
7077          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7078          * undefined; you can actually have a CPU frequency change take
7079          * place in between the computation of X and the setting of the
7080          * variable.  To protect against this problem, all updates of
7081          * the per_cpu tsc_khz variable are done in an interrupt
7082          * protected IPI, and all callers wishing to update the value
7083          * must wait for a synchronous IPI to complete (which is trivial
7084          * if the caller is on the CPU already).  This establishes the
7085          * necessary total order on variable updates.
7086          *
7087          * Note that because a guest time update may take place
7088          * anytime after the setting of the VCPU's request bit, the
7089          * correct TSC value must be set before the request.  However,
7090          * to ensure the update actually makes it to any guest which
7091          * starts running in hardware virtualization between the set
7092          * and the acquisition of the spinlock, we must also ping the
7093          * CPU after setting the request bit.
7094          *
7095          */
7096
7097         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7098
7099         mutex_lock(&kvm_lock);
7100         list_for_each_entry(kvm, &vm_list, vm_list) {
7101                 kvm_for_each_vcpu(i, vcpu, kvm) {
7102                         if (vcpu->cpu != cpu)
7103                                 continue;
7104                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7105                         if (vcpu->cpu != raw_smp_processor_id())
7106                                 send_ipi = 1;
7107                 }
7108         }
7109         mutex_unlock(&kvm_lock);
7110
7111         if (freq->old < freq->new && send_ipi) {
7112                 /*
7113                  * We upscale the frequency.  Must make the guest
7114                  * doesn't see old kvmclock values while running with
7115                  * the new frequency, otherwise we risk the guest sees
7116                  * time go backwards.
7117                  *
7118                  * In case we update the frequency for another cpu
7119                  * (which might be in guest context) send an interrupt
7120                  * to kick the cpu out of guest context.  Next time
7121                  * guest context is entered kvmclock will be updated,
7122                  * so the guest will not see stale values.
7123                  */
7124                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7125         }
7126 }
7127
7128 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7129                                      void *data)
7130 {
7131         struct cpufreq_freqs *freq = data;
7132         int cpu;
7133
7134         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7135                 return 0;
7136         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7137                 return 0;
7138
7139         for_each_cpu(cpu, freq->policy->cpus)
7140                 __kvmclock_cpufreq_notifier(freq, cpu);
7141
7142         return 0;
7143 }
7144
7145 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7146         .notifier_call  = kvmclock_cpufreq_notifier
7147 };
7148
7149 static int kvmclock_cpu_online(unsigned int cpu)
7150 {
7151         tsc_khz_changed(NULL);
7152         return 0;
7153 }
7154
7155 static void kvm_timer_init(void)
7156 {
7157         max_tsc_khz = tsc_khz;
7158
7159         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7160 #ifdef CONFIG_CPU_FREQ
7161                 struct cpufreq_policy policy;
7162                 int cpu;
7163
7164                 memset(&policy, 0, sizeof(policy));
7165                 cpu = get_cpu();
7166                 cpufreq_get_policy(&policy, cpu);
7167                 if (policy.cpuinfo.max_freq)
7168                         max_tsc_khz = policy.cpuinfo.max_freq;
7169                 put_cpu();
7170 #endif
7171                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7172                                           CPUFREQ_TRANSITION_NOTIFIER);
7173         }
7174
7175         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7176                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7177 }
7178
7179 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7180 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7181
7182 int kvm_is_in_guest(void)
7183 {
7184         return __this_cpu_read(current_vcpu) != NULL;
7185 }
7186
7187 static int kvm_is_user_mode(void)
7188 {
7189         int user_mode = 3;
7190
7191         if (__this_cpu_read(current_vcpu))
7192                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7193
7194         return user_mode != 0;
7195 }
7196
7197 static unsigned long kvm_get_guest_ip(void)
7198 {
7199         unsigned long ip = 0;
7200
7201         if (__this_cpu_read(current_vcpu))
7202                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7203
7204         return ip;
7205 }
7206
7207 static void kvm_handle_intel_pt_intr(void)
7208 {
7209         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7210
7211         kvm_make_request(KVM_REQ_PMI, vcpu);
7212         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7213                         (unsigned long *)&vcpu->arch.pmu.global_status);
7214 }
7215
7216 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7217         .is_in_guest            = kvm_is_in_guest,
7218         .is_user_mode           = kvm_is_user_mode,
7219         .get_guest_ip           = kvm_get_guest_ip,
7220         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7221 };
7222
7223 #ifdef CONFIG_X86_64
7224 static void pvclock_gtod_update_fn(struct work_struct *work)
7225 {
7226         struct kvm *kvm;
7227
7228         struct kvm_vcpu *vcpu;
7229         int i;
7230
7231         mutex_lock(&kvm_lock);
7232         list_for_each_entry(kvm, &vm_list, vm_list)
7233                 kvm_for_each_vcpu(i, vcpu, kvm)
7234                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7235         atomic_set(&kvm_guest_has_master_clock, 0);
7236         mutex_unlock(&kvm_lock);
7237 }
7238
7239 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7240
7241 /*
7242  * Notification about pvclock gtod data update.
7243  */
7244 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7245                                void *priv)
7246 {
7247         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7248         struct timekeeper *tk = priv;
7249
7250         update_pvclock_gtod(tk);
7251
7252         /* disable master clock if host does not trust, or does not
7253          * use, TSC based clocksource.
7254          */
7255         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7256             atomic_read(&kvm_guest_has_master_clock) != 0)
7257                 queue_work(system_long_wq, &pvclock_gtod_work);
7258
7259         return 0;
7260 }
7261
7262 static struct notifier_block pvclock_gtod_notifier = {
7263         .notifier_call = pvclock_gtod_notify,
7264 };
7265 #endif
7266
7267 int kvm_arch_init(void *opaque)
7268 {
7269         int r;
7270         struct kvm_x86_ops *ops = opaque;
7271
7272         if (kvm_x86_ops) {
7273                 printk(KERN_ERR "kvm: already loaded the other module\n");
7274                 r = -EEXIST;
7275                 goto out;
7276         }
7277
7278         if (!ops->cpu_has_kvm_support()) {
7279                 printk(KERN_ERR "kvm: no hardware support\n");
7280                 r = -EOPNOTSUPP;
7281                 goto out;
7282         }
7283         if (ops->disabled_by_bios()) {
7284                 printk(KERN_ERR "kvm: disabled by bios\n");
7285                 r = -EOPNOTSUPP;
7286                 goto out;
7287         }
7288
7289         /*
7290          * KVM explicitly assumes that the guest has an FPU and
7291          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7292          * vCPU's FPU state as a fxregs_state struct.
7293          */
7294         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7295                 printk(KERN_ERR "kvm: inadequate fpu\n");
7296                 r = -EOPNOTSUPP;
7297                 goto out;
7298         }
7299
7300         r = -ENOMEM;
7301         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7302                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7303                                           NULL);
7304         if (!x86_fpu_cache) {
7305                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7306                 goto out;
7307         }
7308
7309         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7310         if (!shared_msrs) {
7311                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7312                 goto out_free_x86_fpu_cache;
7313         }
7314
7315         r = kvm_mmu_module_init();
7316         if (r)
7317                 goto out_free_percpu;
7318
7319         kvm_x86_ops = ops;
7320
7321         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7322                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7323                         PT_PRESENT_MASK, 0, sme_me_mask);
7324         kvm_timer_init();
7325
7326         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7327
7328         if (boot_cpu_has(X86_FEATURE_XSAVE))
7329                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7330
7331         kvm_lapic_init();
7332         if (pi_inject_timer == -1)
7333                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7334 #ifdef CONFIG_X86_64
7335         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7336
7337         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7338                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7339 #endif
7340
7341         return 0;
7342
7343 out_free_percpu:
7344         free_percpu(shared_msrs);
7345 out_free_x86_fpu_cache:
7346         kmem_cache_destroy(x86_fpu_cache);
7347 out:
7348         return r;
7349 }
7350
7351 void kvm_arch_exit(void)
7352 {
7353 #ifdef CONFIG_X86_64
7354         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7355                 clear_hv_tscchange_cb();
7356 #endif
7357         kvm_lapic_exit();
7358         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7359
7360         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7361                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7362                                             CPUFREQ_TRANSITION_NOTIFIER);
7363         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7364 #ifdef CONFIG_X86_64
7365         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7366 #endif
7367         kvm_x86_ops = NULL;
7368         kvm_mmu_module_exit();
7369         free_percpu(shared_msrs);
7370         kmem_cache_destroy(x86_fpu_cache);
7371 }
7372
7373 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7374 {
7375         ++vcpu->stat.halt_exits;
7376         if (lapic_in_kernel(vcpu)) {
7377                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7378                 return 1;
7379         } else {
7380                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7381                 return 0;
7382         }
7383 }
7384 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7385
7386 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7387 {
7388         int ret = kvm_skip_emulated_instruction(vcpu);
7389         /*
7390          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7391          * KVM_EXIT_DEBUG here.
7392          */
7393         return kvm_vcpu_halt(vcpu) && ret;
7394 }
7395 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7396
7397 #ifdef CONFIG_X86_64
7398 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7399                                 unsigned long clock_type)
7400 {
7401         struct kvm_clock_pairing clock_pairing;
7402         struct timespec64 ts;
7403         u64 cycle;
7404         int ret;
7405
7406         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7407                 return -KVM_EOPNOTSUPP;
7408
7409         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7410                 return -KVM_EOPNOTSUPP;
7411
7412         clock_pairing.sec = ts.tv_sec;
7413         clock_pairing.nsec = ts.tv_nsec;
7414         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7415         clock_pairing.flags = 0;
7416         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7417
7418         ret = 0;
7419         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7420                             sizeof(struct kvm_clock_pairing)))
7421                 ret = -KVM_EFAULT;
7422
7423         return ret;
7424 }
7425 #endif
7426
7427 /*
7428  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7429  *
7430  * @apicid - apicid of vcpu to be kicked.
7431  */
7432 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7433 {
7434         struct kvm_lapic_irq lapic_irq;
7435
7436         lapic_irq.shorthand = APIC_DEST_NOSHORT;
7437         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
7438         lapic_irq.level = 0;
7439         lapic_irq.dest_id = apicid;
7440         lapic_irq.msi_redir_hint = false;
7441
7442         lapic_irq.delivery_mode = APIC_DM_REMRD;
7443         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7444 }
7445
7446 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7447 {
7448         if (!lapic_in_kernel(vcpu)) {
7449                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7450                 return;
7451         }
7452         if (!vcpu->arch.apicv_active)
7453                 return;
7454
7455         vcpu->arch.apicv_active = false;
7456         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7457 }
7458
7459 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7460 {
7461         struct kvm_vcpu *target = NULL;
7462         struct kvm_apic_map *map;
7463
7464         rcu_read_lock();
7465         map = rcu_dereference(kvm->arch.apic_map);
7466
7467         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7468                 target = map->phys_map[dest_id]->vcpu;
7469
7470         rcu_read_unlock();
7471
7472         if (target && READ_ONCE(target->ready))
7473                 kvm_vcpu_yield_to(target);
7474 }
7475
7476 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7477 {
7478         unsigned long nr, a0, a1, a2, a3, ret;
7479         int op_64_bit;
7480
7481         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7482                 return kvm_hv_hypercall(vcpu);
7483
7484         nr = kvm_rax_read(vcpu);
7485         a0 = kvm_rbx_read(vcpu);
7486         a1 = kvm_rcx_read(vcpu);
7487         a2 = kvm_rdx_read(vcpu);
7488         a3 = kvm_rsi_read(vcpu);
7489
7490         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7491
7492         op_64_bit = is_64_bit_mode(vcpu);
7493         if (!op_64_bit) {
7494                 nr &= 0xFFFFFFFF;
7495                 a0 &= 0xFFFFFFFF;
7496                 a1 &= 0xFFFFFFFF;
7497                 a2 &= 0xFFFFFFFF;
7498                 a3 &= 0xFFFFFFFF;
7499         }
7500
7501         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7502                 ret = -KVM_EPERM;
7503                 goto out;
7504         }
7505
7506         switch (nr) {
7507         case KVM_HC_VAPIC_POLL_IRQ:
7508                 ret = 0;
7509                 break;
7510         case KVM_HC_KICK_CPU:
7511                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7512                 kvm_sched_yield(vcpu->kvm, a1);
7513                 ret = 0;
7514                 break;
7515 #ifdef CONFIG_X86_64
7516         case KVM_HC_CLOCK_PAIRING:
7517                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7518                 break;
7519 #endif
7520         case KVM_HC_SEND_IPI:
7521                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7522                 break;
7523         case KVM_HC_SCHED_YIELD:
7524                 kvm_sched_yield(vcpu->kvm, a0);
7525                 ret = 0;
7526                 break;
7527         default:
7528                 ret = -KVM_ENOSYS;
7529                 break;
7530         }
7531 out:
7532         if (!op_64_bit)
7533                 ret = (u32)ret;
7534         kvm_rax_write(vcpu, ret);
7535
7536         ++vcpu->stat.hypercalls;
7537         return kvm_skip_emulated_instruction(vcpu);
7538 }
7539 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7540
7541 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7542 {
7543         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7544         char instruction[3];
7545         unsigned long rip = kvm_rip_read(vcpu);
7546
7547         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7548
7549         return emulator_write_emulated(ctxt, rip, instruction, 3,
7550                 &ctxt->exception);
7551 }
7552
7553 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7554 {
7555         return vcpu->run->request_interrupt_window &&
7556                 likely(!pic_in_kernel(vcpu->kvm));
7557 }
7558
7559 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7560 {
7561         struct kvm_run *kvm_run = vcpu->run;
7562
7563         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7564         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7565         kvm_run->cr8 = kvm_get_cr8(vcpu);
7566         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7567         kvm_run->ready_for_interrupt_injection =
7568                 pic_in_kernel(vcpu->kvm) ||
7569                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7570 }
7571
7572 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7573 {
7574         int max_irr, tpr;
7575
7576         if (!kvm_x86_ops->update_cr8_intercept)
7577                 return;
7578
7579         if (!lapic_in_kernel(vcpu))
7580                 return;
7581
7582         if (vcpu->arch.apicv_active)
7583                 return;
7584
7585         if (!vcpu->arch.apic->vapic_addr)
7586                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7587         else
7588                 max_irr = -1;
7589
7590         if (max_irr != -1)
7591                 max_irr >>= 4;
7592
7593         tpr = kvm_lapic_get_cr8(vcpu);
7594
7595         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7596 }
7597
7598 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7599 {
7600         int r;
7601
7602         /* try to reinject previous events if any */
7603
7604         if (vcpu->arch.exception.injected)
7605                 kvm_x86_ops->queue_exception(vcpu);
7606         /*
7607          * Do not inject an NMI or interrupt if there is a pending
7608          * exception.  Exceptions and interrupts are recognized at
7609          * instruction boundaries, i.e. the start of an instruction.
7610          * Trap-like exceptions, e.g. #DB, have higher priority than
7611          * NMIs and interrupts, i.e. traps are recognized before an
7612          * NMI/interrupt that's pending on the same instruction.
7613          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7614          * priority, but are only generated (pended) during instruction
7615          * execution, i.e. a pending fault-like exception means the
7616          * fault occurred on the *previous* instruction and must be
7617          * serviced prior to recognizing any new events in order to
7618          * fully complete the previous instruction.
7619          */
7620         else if (!vcpu->arch.exception.pending) {
7621                 if (vcpu->arch.nmi_injected)
7622                         kvm_x86_ops->set_nmi(vcpu);
7623                 else if (vcpu->arch.interrupt.injected)
7624                         kvm_x86_ops->set_irq(vcpu);
7625         }
7626
7627         /*
7628          * Call check_nested_events() even if we reinjected a previous event
7629          * in order for caller to determine if it should require immediate-exit
7630          * from L2 to L1 due to pending L1 events which require exit
7631          * from L2 to L1.
7632          */
7633         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7634                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7635                 if (r != 0)
7636                         return r;
7637         }
7638
7639         /* try to inject new event if pending */
7640         if (vcpu->arch.exception.pending) {
7641                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7642                                         vcpu->arch.exception.has_error_code,
7643                                         vcpu->arch.exception.error_code);
7644
7645                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7646                 vcpu->arch.exception.pending = false;
7647                 vcpu->arch.exception.injected = true;
7648
7649                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7650                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7651                                              X86_EFLAGS_RF);
7652
7653                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7654                         /*
7655                          * This code assumes that nSVM doesn't use
7656                          * check_nested_events(). If it does, the
7657                          * DR6/DR7 changes should happen before L1
7658                          * gets a #VMEXIT for an intercepted #DB in
7659                          * L2.  (Under VMX, on the other hand, the
7660                          * DR6/DR7 changes should not happen in the
7661                          * event of a VM-exit to L1 for an intercepted
7662                          * #DB in L2.)
7663                          */
7664                         kvm_deliver_exception_payload(vcpu);
7665                         if (vcpu->arch.dr7 & DR7_GD) {
7666                                 vcpu->arch.dr7 &= ~DR7_GD;
7667                                 kvm_update_dr7(vcpu);
7668                         }
7669                 }
7670
7671                 kvm_x86_ops->queue_exception(vcpu);
7672         }
7673
7674         /* Don't consider new event if we re-injected an event */
7675         if (kvm_event_needs_reinjection(vcpu))
7676                 return 0;
7677
7678         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7679             kvm_x86_ops->smi_allowed(vcpu)) {
7680                 vcpu->arch.smi_pending = false;
7681                 ++vcpu->arch.smi_count;
7682                 enter_smm(vcpu);
7683         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7684                 --vcpu->arch.nmi_pending;
7685                 vcpu->arch.nmi_injected = true;
7686                 kvm_x86_ops->set_nmi(vcpu);
7687         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7688                 /*
7689                  * Because interrupts can be injected asynchronously, we are
7690                  * calling check_nested_events again here to avoid a race condition.
7691                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7692                  * proposal and current concerns.  Perhaps we should be setting
7693                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7694                  */
7695                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7696                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7697                         if (r != 0)
7698                                 return r;
7699                 }
7700                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7701                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7702                                             false);
7703                         kvm_x86_ops->set_irq(vcpu);
7704                 }
7705         }
7706
7707         return 0;
7708 }
7709
7710 static void process_nmi(struct kvm_vcpu *vcpu)
7711 {
7712         unsigned limit = 2;
7713
7714         /*
7715          * x86 is limited to one NMI running, and one NMI pending after it.
7716          * If an NMI is already in progress, limit further NMIs to just one.
7717          * Otherwise, allow two (and we'll inject the first one immediately).
7718          */
7719         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7720                 limit = 1;
7721
7722         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7723         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7724         kvm_make_request(KVM_REQ_EVENT, vcpu);
7725 }
7726
7727 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7728 {
7729         u32 flags = 0;
7730         flags |= seg->g       << 23;
7731         flags |= seg->db      << 22;
7732         flags |= seg->l       << 21;
7733         flags |= seg->avl     << 20;
7734         flags |= seg->present << 15;
7735         flags |= seg->dpl     << 13;
7736         flags |= seg->s       << 12;
7737         flags |= seg->type    << 8;
7738         return flags;
7739 }
7740
7741 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7742 {
7743         struct kvm_segment seg;
7744         int offset;
7745
7746         kvm_get_segment(vcpu, &seg, n);
7747         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7748
7749         if (n < 3)
7750                 offset = 0x7f84 + n * 12;
7751         else
7752                 offset = 0x7f2c + (n - 3) * 12;
7753
7754         put_smstate(u32, buf, offset + 8, seg.base);
7755         put_smstate(u32, buf, offset + 4, seg.limit);
7756         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7757 }
7758
7759 #ifdef CONFIG_X86_64
7760 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7761 {
7762         struct kvm_segment seg;
7763         int offset;
7764         u16 flags;
7765
7766         kvm_get_segment(vcpu, &seg, n);
7767         offset = 0x7e00 + n * 16;
7768
7769         flags = enter_smm_get_segment_flags(&seg) >> 8;
7770         put_smstate(u16, buf, offset, seg.selector);
7771         put_smstate(u16, buf, offset + 2, flags);
7772         put_smstate(u32, buf, offset + 4, seg.limit);
7773         put_smstate(u64, buf, offset + 8, seg.base);
7774 }
7775 #endif
7776
7777 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7778 {
7779         struct desc_ptr dt;
7780         struct kvm_segment seg;
7781         unsigned long val;
7782         int i;
7783
7784         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7785         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7786         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7787         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7788
7789         for (i = 0; i < 8; i++)
7790                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7791
7792         kvm_get_dr(vcpu, 6, &val);
7793         put_smstate(u32, buf, 0x7fcc, (u32)val);
7794         kvm_get_dr(vcpu, 7, &val);
7795         put_smstate(u32, buf, 0x7fc8, (u32)val);
7796
7797         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7798         put_smstate(u32, buf, 0x7fc4, seg.selector);
7799         put_smstate(u32, buf, 0x7f64, seg.base);
7800         put_smstate(u32, buf, 0x7f60, seg.limit);
7801         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7802
7803         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7804         put_smstate(u32, buf, 0x7fc0, seg.selector);
7805         put_smstate(u32, buf, 0x7f80, seg.base);
7806         put_smstate(u32, buf, 0x7f7c, seg.limit);
7807         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7808
7809         kvm_x86_ops->get_gdt(vcpu, &dt);
7810         put_smstate(u32, buf, 0x7f74, dt.address);
7811         put_smstate(u32, buf, 0x7f70, dt.size);
7812
7813         kvm_x86_ops->get_idt(vcpu, &dt);
7814         put_smstate(u32, buf, 0x7f58, dt.address);
7815         put_smstate(u32, buf, 0x7f54, dt.size);
7816
7817         for (i = 0; i < 6; i++)
7818                 enter_smm_save_seg_32(vcpu, buf, i);
7819
7820         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7821
7822         /* revision id */
7823         put_smstate(u32, buf, 0x7efc, 0x00020000);
7824         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7825 }
7826
7827 #ifdef CONFIG_X86_64
7828 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7829 {
7830         struct desc_ptr dt;
7831         struct kvm_segment seg;
7832         unsigned long val;
7833         int i;
7834
7835         for (i = 0; i < 16; i++)
7836                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7837
7838         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7839         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7840
7841         kvm_get_dr(vcpu, 6, &val);
7842         put_smstate(u64, buf, 0x7f68, val);
7843         kvm_get_dr(vcpu, 7, &val);
7844         put_smstate(u64, buf, 0x7f60, val);
7845
7846         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7847         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7848         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7849
7850         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7851
7852         /* revision id */
7853         put_smstate(u32, buf, 0x7efc, 0x00020064);
7854
7855         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7856
7857         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7858         put_smstate(u16, buf, 0x7e90, seg.selector);
7859         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7860         put_smstate(u32, buf, 0x7e94, seg.limit);
7861         put_smstate(u64, buf, 0x7e98, seg.base);
7862
7863         kvm_x86_ops->get_idt(vcpu, &dt);
7864         put_smstate(u32, buf, 0x7e84, dt.size);
7865         put_smstate(u64, buf, 0x7e88, dt.address);
7866
7867         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7868         put_smstate(u16, buf, 0x7e70, seg.selector);
7869         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7870         put_smstate(u32, buf, 0x7e74, seg.limit);
7871         put_smstate(u64, buf, 0x7e78, seg.base);
7872
7873         kvm_x86_ops->get_gdt(vcpu, &dt);
7874         put_smstate(u32, buf, 0x7e64, dt.size);
7875         put_smstate(u64, buf, 0x7e68, dt.address);
7876
7877         for (i = 0; i < 6; i++)
7878                 enter_smm_save_seg_64(vcpu, buf, i);
7879 }
7880 #endif
7881
7882 static void enter_smm(struct kvm_vcpu *vcpu)
7883 {
7884         struct kvm_segment cs, ds;
7885         struct desc_ptr dt;
7886         char buf[512];
7887         u32 cr0;
7888
7889         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7890         memset(buf, 0, 512);
7891 #ifdef CONFIG_X86_64
7892         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7893                 enter_smm_save_state_64(vcpu, buf);
7894         else
7895 #endif
7896                 enter_smm_save_state_32(vcpu, buf);
7897
7898         /*
7899          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7900          * vCPU state (e.g. leave guest mode) after we've saved the state into
7901          * the SMM state-save area.
7902          */
7903         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7904
7905         vcpu->arch.hflags |= HF_SMM_MASK;
7906         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7907
7908         if (kvm_x86_ops->get_nmi_mask(vcpu))
7909                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7910         else
7911                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7912
7913         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7914         kvm_rip_write(vcpu, 0x8000);
7915
7916         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7917         kvm_x86_ops->set_cr0(vcpu, cr0);
7918         vcpu->arch.cr0 = cr0;
7919
7920         kvm_x86_ops->set_cr4(vcpu, 0);
7921
7922         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7923         dt.address = dt.size = 0;
7924         kvm_x86_ops->set_idt(vcpu, &dt);
7925
7926         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7927
7928         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7929         cs.base = vcpu->arch.smbase;
7930
7931         ds.selector = 0;
7932         ds.base = 0;
7933
7934         cs.limit    = ds.limit = 0xffffffff;
7935         cs.type     = ds.type = 0x3;
7936         cs.dpl      = ds.dpl = 0;
7937         cs.db       = ds.db = 0;
7938         cs.s        = ds.s = 1;
7939         cs.l        = ds.l = 0;
7940         cs.g        = ds.g = 1;
7941         cs.avl      = ds.avl = 0;
7942         cs.present  = ds.present = 1;
7943         cs.unusable = ds.unusable = 0;
7944         cs.padding  = ds.padding = 0;
7945
7946         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7947         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7948         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7949         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7950         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7951         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7952
7953 #ifdef CONFIG_X86_64
7954         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7955                 kvm_x86_ops->set_efer(vcpu, 0);
7956 #endif
7957
7958         kvm_update_cpuid(vcpu);
7959         kvm_mmu_reset_context(vcpu);
7960 }
7961
7962 static void process_smi(struct kvm_vcpu *vcpu)
7963 {
7964         vcpu->arch.smi_pending = true;
7965         kvm_make_request(KVM_REQ_EVENT, vcpu);
7966 }
7967
7968 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
7969                                        unsigned long *vcpu_bitmap)
7970 {
7971         cpumask_var_t cpus;
7972
7973         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
7974
7975         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
7976                                     vcpu_bitmap, cpus);
7977
7978         free_cpumask_var(cpus);
7979 }
7980
7981 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7982 {
7983         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7984 }
7985
7986 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7987 {
7988         if (!kvm_apic_present(vcpu))
7989                 return;
7990
7991         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7992
7993         if (irqchip_split(vcpu->kvm))
7994                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7995         else {
7996                 if (vcpu->arch.apicv_active)
7997                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7998                 if (ioapic_in_kernel(vcpu->kvm))
7999                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8000         }
8001
8002         if (is_guest_mode(vcpu))
8003                 vcpu->arch.load_eoi_exitmap_pending = true;
8004         else
8005                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8006 }
8007
8008 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8009 {
8010         u64 eoi_exit_bitmap[4];
8011
8012         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8013                 return;
8014
8015         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8016                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8017         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8018 }
8019
8020 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8021                 unsigned long start, unsigned long end,
8022                 bool blockable)
8023 {
8024         unsigned long apic_address;
8025
8026         /*
8027          * The physical address of apic access page is stored in the VMCS.
8028          * Update it when it becomes invalid.
8029          */
8030         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8031         if (start <= apic_address && apic_address < end)
8032                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8033
8034         return 0;
8035 }
8036
8037 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8038 {
8039         struct page *page = NULL;
8040
8041         if (!lapic_in_kernel(vcpu))
8042                 return;
8043
8044         if (!kvm_x86_ops->set_apic_access_page_addr)
8045                 return;
8046
8047         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8048         if (is_error_page(page))
8049                 return;
8050         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
8051
8052         /*
8053          * Do not pin apic access page in memory, the MMU notifier
8054          * will call us again if it is migrated or swapped out.
8055          */
8056         put_page(page);
8057 }
8058
8059 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8060 {
8061         smp_send_reschedule(vcpu->cpu);
8062 }
8063 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8064
8065 /*
8066  * Returns 1 to let vcpu_run() continue the guest execution loop without
8067  * exiting to the userspace.  Otherwise, the value will be returned to the
8068  * userspace.
8069  */
8070 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8071 {
8072         int r;
8073         bool req_int_win =
8074                 dm_request_for_irq_injection(vcpu) &&
8075                 kvm_cpu_accept_dm_intr(vcpu);
8076         enum exit_fastpath_completion exit_fastpath = EXIT_FASTPATH_NONE;
8077
8078         bool req_immediate_exit = false;
8079
8080         if (kvm_request_pending(vcpu)) {
8081                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu)) {
8082                         if (unlikely(!kvm_x86_ops->get_vmcs12_pages(vcpu))) {
8083                                 r = 0;
8084                                 goto out;
8085                         }
8086                 }
8087                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8088                         kvm_mmu_unload(vcpu);
8089                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8090                         __kvm_migrate_timers(vcpu);
8091                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8092                         kvm_gen_update_masterclock(vcpu->kvm);
8093                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8094                         kvm_gen_kvmclock_update(vcpu);
8095                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8096                         r = kvm_guest_time_update(vcpu);
8097                         if (unlikely(r))
8098                                 goto out;
8099                 }
8100                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8101                         kvm_mmu_sync_roots(vcpu);
8102                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
8103                         kvm_mmu_load_cr3(vcpu);
8104                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
8105                         kvm_vcpu_flush_tlb(vcpu, true);
8106                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8107                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8108                         r = 0;
8109                         goto out;
8110                 }
8111                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8112                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8113                         vcpu->mmio_needed = 0;
8114                         r = 0;
8115                         goto out;
8116                 }
8117                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8118                         /* Page is swapped out. Do synthetic halt */
8119                         vcpu->arch.apf.halted = true;
8120                         r = 1;
8121                         goto out;
8122                 }
8123                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8124                         record_steal_time(vcpu);
8125                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8126                         process_smi(vcpu);
8127                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8128                         process_nmi(vcpu);
8129                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8130                         kvm_pmu_handle_event(vcpu);
8131                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8132                         kvm_pmu_deliver_pmi(vcpu);
8133                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8134                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8135                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8136                                      vcpu->arch.ioapic_handled_vectors)) {
8137                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8138                                 vcpu->run->eoi.vector =
8139                                                 vcpu->arch.pending_ioapic_eoi;
8140                                 r = 0;
8141                                 goto out;
8142                         }
8143                 }
8144                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8145                         vcpu_scan_ioapic(vcpu);
8146                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8147                         vcpu_load_eoi_exitmap(vcpu);
8148                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8149                         kvm_vcpu_reload_apic_access_page(vcpu);
8150                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8151                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8152                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8153                         r = 0;
8154                         goto out;
8155                 }
8156                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8157                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8158                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8159                         r = 0;
8160                         goto out;
8161                 }
8162                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8163                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8164                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8165                         r = 0;
8166                         goto out;
8167                 }
8168
8169                 /*
8170                  * KVM_REQ_HV_STIMER has to be processed after
8171                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8172                  * depend on the guest clock being up-to-date
8173                  */
8174                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8175                         kvm_hv_process_stimers(vcpu);
8176         }
8177
8178         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8179                 ++vcpu->stat.req_event;
8180                 kvm_apic_accept_events(vcpu);
8181                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8182                         r = 1;
8183                         goto out;
8184                 }
8185
8186                 if (inject_pending_event(vcpu, req_int_win) != 0)
8187                         req_immediate_exit = true;
8188                 else {
8189                         /* Enable SMI/NMI/IRQ window open exits if needed.
8190                          *
8191                          * SMIs have three cases:
8192                          * 1) They can be nested, and then there is nothing to
8193                          *    do here because RSM will cause a vmexit anyway.
8194                          * 2) There is an ISA-specific reason why SMI cannot be
8195                          *    injected, and the moment when this changes can be
8196                          *    intercepted.
8197                          * 3) Or the SMI can be pending because
8198                          *    inject_pending_event has completed the injection
8199                          *    of an IRQ or NMI from the previous vmexit, and
8200                          *    then we request an immediate exit to inject the
8201                          *    SMI.
8202                          */
8203                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8204                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8205                                         req_immediate_exit = true;
8206                         if (vcpu->arch.nmi_pending)
8207                                 kvm_x86_ops->enable_nmi_window(vcpu);
8208                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8209                                 kvm_x86_ops->enable_irq_window(vcpu);
8210                         WARN_ON(vcpu->arch.exception.pending);
8211                 }
8212
8213                 if (kvm_lapic_enabled(vcpu)) {
8214                         update_cr8_intercept(vcpu);
8215                         kvm_lapic_sync_to_vapic(vcpu);
8216                 }
8217         }
8218
8219         r = kvm_mmu_reload(vcpu);
8220         if (unlikely(r)) {
8221                 goto cancel_injection;
8222         }
8223
8224         preempt_disable();
8225
8226         kvm_x86_ops->prepare_guest_switch(vcpu);
8227
8228         /*
8229          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8230          * IPI are then delayed after guest entry, which ensures that they
8231          * result in virtual interrupt delivery.
8232          */
8233         local_irq_disable();
8234         vcpu->mode = IN_GUEST_MODE;
8235
8236         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8237
8238         /*
8239          * 1) We should set ->mode before checking ->requests.  Please see
8240          * the comment in kvm_vcpu_exiting_guest_mode().
8241          *
8242          * 2) For APICv, we should set ->mode before checking PID.ON. This
8243          * pairs with the memory barrier implicit in pi_test_and_set_on
8244          * (see vmx_deliver_posted_interrupt).
8245          *
8246          * 3) This also orders the write to mode from any reads to the page
8247          * tables done while the VCPU is running.  Please see the comment
8248          * in kvm_flush_remote_tlbs.
8249          */
8250         smp_mb__after_srcu_read_unlock();
8251
8252         /*
8253          * This handles the case where a posted interrupt was
8254          * notified with kvm_vcpu_kick.
8255          */
8256         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8257                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8258
8259         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8260             || need_resched() || signal_pending(current)) {
8261                 vcpu->mode = OUTSIDE_GUEST_MODE;
8262                 smp_wmb();
8263                 local_irq_enable();
8264                 preempt_enable();
8265                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8266                 r = 1;
8267                 goto cancel_injection;
8268         }
8269
8270         if (req_immediate_exit) {
8271                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8272                 kvm_x86_ops->request_immediate_exit(vcpu);
8273         }
8274
8275         trace_kvm_entry(vcpu->vcpu_id);
8276         guest_enter_irqoff();
8277
8278         /* The preempt notifier should have taken care of the FPU already.  */
8279         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8280
8281         if (unlikely(vcpu->arch.switch_db_regs)) {
8282                 set_debugreg(0, 7);
8283                 set_debugreg(vcpu->arch.eff_db[0], 0);
8284                 set_debugreg(vcpu->arch.eff_db[1], 1);
8285                 set_debugreg(vcpu->arch.eff_db[2], 2);
8286                 set_debugreg(vcpu->arch.eff_db[3], 3);
8287                 set_debugreg(vcpu->arch.dr6, 6);
8288                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8289         }
8290
8291         kvm_x86_ops->run(vcpu);
8292
8293         /*
8294          * Do this here before restoring debug registers on the host.  And
8295          * since we do this before handling the vmexit, a DR access vmexit
8296          * can (a) read the correct value of the debug registers, (b) set
8297          * KVM_DEBUGREG_WONT_EXIT again.
8298          */
8299         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8300                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8301                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8302                 kvm_update_dr0123(vcpu);
8303                 kvm_update_dr6(vcpu);
8304                 kvm_update_dr7(vcpu);
8305                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8306         }
8307
8308         /*
8309          * If the guest has used debug registers, at least dr7
8310          * will be disabled while returning to the host.
8311          * If we don't have active breakpoints in the host, we don't
8312          * care about the messed up debug address registers. But if
8313          * we have some of them active, restore the old state.
8314          */
8315         if (hw_breakpoint_active())
8316                 hw_breakpoint_restore();
8317
8318         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8319
8320         vcpu->mode = OUTSIDE_GUEST_MODE;
8321         smp_wmb();
8322
8323         kvm_x86_ops->handle_exit_irqoff(vcpu, &exit_fastpath);
8324
8325         /*
8326          * Consume any pending interrupts, including the possible source of
8327          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8328          * An instruction is required after local_irq_enable() to fully unblock
8329          * interrupts on processors that implement an interrupt shadow, the
8330          * stat.exits increment will do nicely.
8331          */
8332         kvm_before_interrupt(vcpu);
8333         local_irq_enable();
8334         ++vcpu->stat.exits;
8335         local_irq_disable();
8336         kvm_after_interrupt(vcpu);
8337
8338         guest_exit_irqoff();
8339         if (lapic_in_kernel(vcpu)) {
8340                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8341                 if (delta != S64_MIN) {
8342                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8343                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8344                 }
8345         }
8346
8347         local_irq_enable();
8348         preempt_enable();
8349
8350         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8351
8352         /*
8353          * Profile KVM exit RIPs:
8354          */
8355         if (unlikely(prof_on == KVM_PROFILING)) {
8356                 unsigned long rip = kvm_rip_read(vcpu);
8357                 profile_hit(KVM_PROFILING, (void *)rip);
8358         }
8359
8360         if (unlikely(vcpu->arch.tsc_always_catchup))
8361                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8362
8363         if (vcpu->arch.apic_attention)
8364                 kvm_lapic_sync_from_vapic(vcpu);
8365
8366         vcpu->arch.gpa_available = false;
8367         r = kvm_x86_ops->handle_exit(vcpu, exit_fastpath);
8368         return r;
8369
8370 cancel_injection:
8371         kvm_x86_ops->cancel_injection(vcpu);
8372         if (unlikely(vcpu->arch.apic_attention))
8373                 kvm_lapic_sync_from_vapic(vcpu);
8374 out:
8375         return r;
8376 }
8377
8378 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8379 {
8380         if (!kvm_arch_vcpu_runnable(vcpu) &&
8381             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8382                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8383                 kvm_vcpu_block(vcpu);
8384                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8385
8386                 if (kvm_x86_ops->post_block)
8387                         kvm_x86_ops->post_block(vcpu);
8388
8389                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8390                         return 1;
8391         }
8392
8393         kvm_apic_accept_events(vcpu);
8394         switch(vcpu->arch.mp_state) {
8395         case KVM_MP_STATE_HALTED:
8396                 vcpu->arch.pv.pv_unhalted = false;
8397                 vcpu->arch.mp_state =
8398                         KVM_MP_STATE_RUNNABLE;
8399                 /* fall through */
8400         case KVM_MP_STATE_RUNNABLE:
8401                 vcpu->arch.apf.halted = false;
8402                 break;
8403         case KVM_MP_STATE_INIT_RECEIVED:
8404                 break;
8405         default:
8406                 return -EINTR;
8407                 break;
8408         }
8409         return 1;
8410 }
8411
8412 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8413 {
8414         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8415                 kvm_x86_ops->check_nested_events(vcpu, false);
8416
8417         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8418                 !vcpu->arch.apf.halted);
8419 }
8420
8421 static int vcpu_run(struct kvm_vcpu *vcpu)
8422 {
8423         int r;
8424         struct kvm *kvm = vcpu->kvm;
8425
8426         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8427         vcpu->arch.l1tf_flush_l1d = true;
8428
8429         for (;;) {
8430                 if (kvm_vcpu_running(vcpu)) {
8431                         r = vcpu_enter_guest(vcpu);
8432                 } else {
8433                         r = vcpu_block(kvm, vcpu);
8434                 }
8435
8436                 if (r <= 0)
8437                         break;
8438
8439                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8440                 if (kvm_cpu_has_pending_timer(vcpu))
8441                         kvm_inject_pending_timer_irqs(vcpu);
8442
8443                 if (dm_request_for_irq_injection(vcpu) &&
8444                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8445                         r = 0;
8446                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8447                         ++vcpu->stat.request_irq_exits;
8448                         break;
8449                 }
8450
8451                 kvm_check_async_pf_completion(vcpu);
8452
8453                 if (signal_pending(current)) {
8454                         r = -EINTR;
8455                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8456                         ++vcpu->stat.signal_exits;
8457                         break;
8458                 }
8459                 if (need_resched()) {
8460                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8461                         cond_resched();
8462                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8463                 }
8464         }
8465
8466         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8467
8468         return r;
8469 }
8470
8471 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8472 {
8473         int r;
8474
8475         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8476         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8477         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8478         return r;
8479 }
8480
8481 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8482 {
8483         BUG_ON(!vcpu->arch.pio.count);
8484
8485         return complete_emulated_io(vcpu);
8486 }
8487
8488 /*
8489  * Implements the following, as a state machine:
8490  *
8491  * read:
8492  *   for each fragment
8493  *     for each mmio piece in the fragment
8494  *       write gpa, len
8495  *       exit
8496  *       copy data
8497  *   execute insn
8498  *
8499  * write:
8500  *   for each fragment
8501  *     for each mmio piece in the fragment
8502  *       write gpa, len
8503  *       copy data
8504  *       exit
8505  */
8506 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8507 {
8508         struct kvm_run *run = vcpu->run;
8509         struct kvm_mmio_fragment *frag;
8510         unsigned len;
8511
8512         BUG_ON(!vcpu->mmio_needed);
8513
8514         /* Complete previous fragment */
8515         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8516         len = min(8u, frag->len);
8517         if (!vcpu->mmio_is_write)
8518                 memcpy(frag->data, run->mmio.data, len);
8519
8520         if (frag->len <= 8) {
8521                 /* Switch to the next fragment. */
8522                 frag++;
8523                 vcpu->mmio_cur_fragment++;
8524         } else {
8525                 /* Go forward to the next mmio piece. */
8526                 frag->data += len;
8527                 frag->gpa += len;
8528                 frag->len -= len;
8529         }
8530
8531         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8532                 vcpu->mmio_needed = 0;
8533
8534                 /* FIXME: return into emulator if single-stepping.  */
8535                 if (vcpu->mmio_is_write)
8536                         return 1;
8537                 vcpu->mmio_read_completed = 1;
8538                 return complete_emulated_io(vcpu);
8539         }
8540
8541         run->exit_reason = KVM_EXIT_MMIO;
8542         run->mmio.phys_addr = frag->gpa;
8543         if (vcpu->mmio_is_write)
8544                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8545         run->mmio.len = min(8u, frag->len);
8546         run->mmio.is_write = vcpu->mmio_is_write;
8547         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8548         return 0;
8549 }
8550
8551 /* Swap (qemu) user FPU context for the guest FPU context. */
8552 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8553 {
8554         fpregs_lock();
8555
8556         /*
8557          * Reloading userspace's FPU is handled by kvm_arch_vcpu_load(), both
8558          * for direct calls from userspace (via vcpu_load()) and if this task
8559          * is preempted (via kvm_sched_in()) between vcpu_load() and now.
8560          */
8561         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8562
8563         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8564         /* PKRU is separately restored in kvm_x86_ops->run.  */
8565         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8566                                 ~XFEATURE_MASK_PKRU);
8567
8568         fpregs_mark_activate();
8569         fpregs_unlock();
8570
8571         trace_kvm_fpu(1);
8572 }
8573
8574 /* When vcpu_run ends, restore user space FPU context. */
8575 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8576 {
8577         fpregs_lock();
8578
8579         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8580         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8581
8582         fpregs_mark_activate();
8583         fpregs_unlock();
8584
8585         ++vcpu->stat.fpu_reload;
8586         trace_kvm_fpu(0);
8587 }
8588
8589 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8590 {
8591         int r;
8592
8593         vcpu_load(vcpu);
8594         kvm_sigset_activate(vcpu);
8595         kvm_load_guest_fpu(vcpu);
8596
8597         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8598                 if (kvm_run->immediate_exit) {
8599                         r = -EINTR;
8600                         goto out;
8601                 }
8602                 kvm_vcpu_block(vcpu);
8603                 kvm_apic_accept_events(vcpu);
8604                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8605                 r = -EAGAIN;
8606                 if (signal_pending(current)) {
8607                         r = -EINTR;
8608                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8609                         ++vcpu->stat.signal_exits;
8610                 }
8611                 goto out;
8612         }
8613
8614         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8615                 r = -EINVAL;
8616                 goto out;
8617         }
8618
8619         if (vcpu->run->kvm_dirty_regs) {
8620                 r = sync_regs(vcpu);
8621                 if (r != 0)
8622                         goto out;
8623         }
8624
8625         /* re-sync apic's tpr */
8626         if (!lapic_in_kernel(vcpu)) {
8627                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8628                         r = -EINVAL;
8629                         goto out;
8630                 }
8631         }
8632
8633         if (unlikely(vcpu->arch.complete_userspace_io)) {
8634                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8635                 vcpu->arch.complete_userspace_io = NULL;
8636                 r = cui(vcpu);
8637                 if (r <= 0)
8638                         goto out;
8639         } else
8640                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8641
8642         if (kvm_run->immediate_exit)
8643                 r = -EINTR;
8644         else
8645                 r = vcpu_run(vcpu);
8646
8647 out:
8648         kvm_put_guest_fpu(vcpu);
8649         if (vcpu->run->kvm_valid_regs)
8650                 store_regs(vcpu);
8651         post_kvm_run_save(vcpu);
8652         kvm_sigset_deactivate(vcpu);
8653
8654         vcpu_put(vcpu);
8655         return r;
8656 }
8657
8658 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8659 {
8660         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8661                 /*
8662                  * We are here if userspace calls get_regs() in the middle of
8663                  * instruction emulation. Registers state needs to be copied
8664                  * back from emulation context to vcpu. Userspace shouldn't do
8665                  * that usually, but some bad designed PV devices (vmware
8666                  * backdoor interface) need this to work
8667                  */
8668                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8669                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8670         }
8671         regs->rax = kvm_rax_read(vcpu);
8672         regs->rbx = kvm_rbx_read(vcpu);
8673         regs->rcx = kvm_rcx_read(vcpu);
8674         regs->rdx = kvm_rdx_read(vcpu);
8675         regs->rsi = kvm_rsi_read(vcpu);
8676         regs->rdi = kvm_rdi_read(vcpu);
8677         regs->rsp = kvm_rsp_read(vcpu);
8678         regs->rbp = kvm_rbp_read(vcpu);
8679 #ifdef CONFIG_X86_64
8680         regs->r8 = kvm_r8_read(vcpu);
8681         regs->r9 = kvm_r9_read(vcpu);
8682         regs->r10 = kvm_r10_read(vcpu);
8683         regs->r11 = kvm_r11_read(vcpu);
8684         regs->r12 = kvm_r12_read(vcpu);
8685         regs->r13 = kvm_r13_read(vcpu);
8686         regs->r14 = kvm_r14_read(vcpu);
8687         regs->r15 = kvm_r15_read(vcpu);
8688 #endif
8689
8690         regs->rip = kvm_rip_read(vcpu);
8691         regs->rflags = kvm_get_rflags(vcpu);
8692 }
8693
8694 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8695 {
8696         vcpu_load(vcpu);
8697         __get_regs(vcpu, regs);
8698         vcpu_put(vcpu);
8699         return 0;
8700 }
8701
8702 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8703 {
8704         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8705         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8706
8707         kvm_rax_write(vcpu, regs->rax);
8708         kvm_rbx_write(vcpu, regs->rbx);
8709         kvm_rcx_write(vcpu, regs->rcx);
8710         kvm_rdx_write(vcpu, regs->rdx);
8711         kvm_rsi_write(vcpu, regs->rsi);
8712         kvm_rdi_write(vcpu, regs->rdi);
8713         kvm_rsp_write(vcpu, regs->rsp);
8714         kvm_rbp_write(vcpu, regs->rbp);
8715 #ifdef CONFIG_X86_64
8716         kvm_r8_write(vcpu, regs->r8);
8717         kvm_r9_write(vcpu, regs->r9);
8718         kvm_r10_write(vcpu, regs->r10);
8719         kvm_r11_write(vcpu, regs->r11);
8720         kvm_r12_write(vcpu, regs->r12);
8721         kvm_r13_write(vcpu, regs->r13);
8722         kvm_r14_write(vcpu, regs->r14);
8723         kvm_r15_write(vcpu, regs->r15);
8724 #endif
8725
8726         kvm_rip_write(vcpu, regs->rip);
8727         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8728
8729         vcpu->arch.exception.pending = false;
8730
8731         kvm_make_request(KVM_REQ_EVENT, vcpu);
8732 }
8733
8734 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8735 {
8736         vcpu_load(vcpu);
8737         __set_regs(vcpu, regs);
8738         vcpu_put(vcpu);
8739         return 0;
8740 }
8741
8742 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8743 {
8744         struct kvm_segment cs;
8745
8746         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8747         *db = cs.db;
8748         *l = cs.l;
8749 }
8750 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8751
8752 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8753 {
8754         struct desc_ptr dt;
8755
8756         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8757         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8758         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8759         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8760         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8761         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8762
8763         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8764         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8765
8766         kvm_x86_ops->get_idt(vcpu, &dt);
8767         sregs->idt.limit = dt.size;
8768         sregs->idt.base = dt.address;
8769         kvm_x86_ops->get_gdt(vcpu, &dt);
8770         sregs->gdt.limit = dt.size;
8771         sregs->gdt.base = dt.address;
8772
8773         sregs->cr0 = kvm_read_cr0(vcpu);
8774         sregs->cr2 = vcpu->arch.cr2;
8775         sregs->cr3 = kvm_read_cr3(vcpu);
8776         sregs->cr4 = kvm_read_cr4(vcpu);
8777         sregs->cr8 = kvm_get_cr8(vcpu);
8778         sregs->efer = vcpu->arch.efer;
8779         sregs->apic_base = kvm_get_apic_base(vcpu);
8780
8781         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8782
8783         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8784                 set_bit(vcpu->arch.interrupt.nr,
8785                         (unsigned long *)sregs->interrupt_bitmap);
8786 }
8787
8788 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8789                                   struct kvm_sregs *sregs)
8790 {
8791         vcpu_load(vcpu);
8792         __get_sregs(vcpu, sregs);
8793         vcpu_put(vcpu);
8794         return 0;
8795 }
8796
8797 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8798                                     struct kvm_mp_state *mp_state)
8799 {
8800         vcpu_load(vcpu);
8801         if (kvm_mpx_supported())
8802                 kvm_load_guest_fpu(vcpu);
8803
8804         kvm_apic_accept_events(vcpu);
8805         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8806                                         vcpu->arch.pv.pv_unhalted)
8807                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8808         else
8809                 mp_state->mp_state = vcpu->arch.mp_state;
8810
8811         if (kvm_mpx_supported())
8812                 kvm_put_guest_fpu(vcpu);
8813         vcpu_put(vcpu);
8814         return 0;
8815 }
8816
8817 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8818                                     struct kvm_mp_state *mp_state)
8819 {
8820         int ret = -EINVAL;
8821
8822         vcpu_load(vcpu);
8823
8824         if (!lapic_in_kernel(vcpu) &&
8825             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8826                 goto out;
8827
8828         /*
8829          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
8830          * INIT state; latched init should be reported using
8831          * KVM_SET_VCPU_EVENTS, so reject it here.
8832          */
8833         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
8834             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8835              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8836                 goto out;
8837
8838         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8839                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8840                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8841         } else
8842                 vcpu->arch.mp_state = mp_state->mp_state;
8843         kvm_make_request(KVM_REQ_EVENT, vcpu);
8844
8845         ret = 0;
8846 out:
8847         vcpu_put(vcpu);
8848         return ret;
8849 }
8850
8851 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8852                     int reason, bool has_error_code, u32 error_code)
8853 {
8854         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8855         int ret;
8856
8857         init_emulate_ctxt(vcpu);
8858
8859         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8860                                    has_error_code, error_code);
8861         if (ret) {
8862                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8863                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
8864                 vcpu->run->internal.ndata = 0;
8865                 return 0;
8866         }
8867
8868         kvm_rip_write(vcpu, ctxt->eip);
8869         kvm_set_rflags(vcpu, ctxt->eflags);
8870         kvm_make_request(KVM_REQ_EVENT, vcpu);
8871         return 1;
8872 }
8873 EXPORT_SYMBOL_GPL(kvm_task_switch);
8874
8875 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8876 {
8877         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8878                 /*
8879                  * When EFER.LME and CR0.PG are set, the processor is in
8880                  * 64-bit mode (though maybe in a 32-bit code segment).
8881                  * CR4.PAE and EFER.LMA must be set.
8882                  */
8883                 if (!(sregs->cr4 & X86_CR4_PAE)
8884                     || !(sregs->efer & EFER_LMA))
8885                         return -EINVAL;
8886         } else {
8887                 /*
8888                  * Not in 64-bit mode: EFER.LMA is clear and the code
8889                  * segment cannot be 64-bit.
8890                  */
8891                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8892                         return -EINVAL;
8893         }
8894
8895         return kvm_valid_cr4(vcpu, sregs->cr4);
8896 }
8897
8898 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8899 {
8900         struct msr_data apic_base_msr;
8901         int mmu_reset_needed = 0;
8902         int cpuid_update_needed = 0;
8903         int pending_vec, max_bits, idx;
8904         struct desc_ptr dt;
8905         int ret = -EINVAL;
8906
8907         if (kvm_valid_sregs(vcpu, sregs))
8908                 goto out;
8909
8910         apic_base_msr.data = sregs->apic_base;
8911         apic_base_msr.host_initiated = true;
8912         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8913                 goto out;
8914
8915         dt.size = sregs->idt.limit;
8916         dt.address = sregs->idt.base;
8917         kvm_x86_ops->set_idt(vcpu, &dt);
8918         dt.size = sregs->gdt.limit;
8919         dt.address = sregs->gdt.base;
8920         kvm_x86_ops->set_gdt(vcpu, &dt);
8921
8922         vcpu->arch.cr2 = sregs->cr2;
8923         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8924         vcpu->arch.cr3 = sregs->cr3;
8925         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
8926
8927         kvm_set_cr8(vcpu, sregs->cr8);
8928
8929         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8930         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8931
8932         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8933         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8934         vcpu->arch.cr0 = sregs->cr0;
8935
8936         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8937         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8938                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8939         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8940         if (cpuid_update_needed)
8941                 kvm_update_cpuid(vcpu);
8942
8943         idx = srcu_read_lock(&vcpu->kvm->srcu);
8944         if (is_pae_paging(vcpu)) {
8945                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8946                 mmu_reset_needed = 1;
8947         }
8948         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8949
8950         if (mmu_reset_needed)
8951                 kvm_mmu_reset_context(vcpu);
8952
8953         max_bits = KVM_NR_INTERRUPTS;
8954         pending_vec = find_first_bit(
8955                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8956         if (pending_vec < max_bits) {
8957                 kvm_queue_interrupt(vcpu, pending_vec, false);
8958                 pr_debug("Set back pending irq %d\n", pending_vec);
8959         }
8960
8961         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8962         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8963         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8964         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8965         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8966         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8967
8968         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8969         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8970
8971         update_cr8_intercept(vcpu);
8972
8973         /* Older userspace won't unhalt the vcpu on reset. */
8974         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8975             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8976             !is_protmode(vcpu))
8977                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8978
8979         kvm_make_request(KVM_REQ_EVENT, vcpu);
8980
8981         ret = 0;
8982 out:
8983         return ret;
8984 }
8985
8986 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8987                                   struct kvm_sregs *sregs)
8988 {
8989         int ret;
8990
8991         vcpu_load(vcpu);
8992         ret = __set_sregs(vcpu, sregs);
8993         vcpu_put(vcpu);
8994         return ret;
8995 }
8996
8997 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8998                                         struct kvm_guest_debug *dbg)
8999 {
9000         unsigned long rflags;
9001         int i, r;
9002
9003         vcpu_load(vcpu);
9004
9005         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9006                 r = -EBUSY;
9007                 if (vcpu->arch.exception.pending)
9008                         goto out;
9009                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9010                         kvm_queue_exception(vcpu, DB_VECTOR);
9011                 else
9012                         kvm_queue_exception(vcpu, BP_VECTOR);
9013         }
9014
9015         /*
9016          * Read rflags as long as potentially injected trace flags are still
9017          * filtered out.
9018          */
9019         rflags = kvm_get_rflags(vcpu);
9020
9021         vcpu->guest_debug = dbg->control;
9022         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9023                 vcpu->guest_debug = 0;
9024
9025         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9026                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9027                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9028                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9029         } else {
9030                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9031                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9032         }
9033         kvm_update_dr7(vcpu);
9034
9035         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9036                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9037                         get_segment_base(vcpu, VCPU_SREG_CS);
9038
9039         /*
9040          * Trigger an rflags update that will inject or remove the trace
9041          * flags.
9042          */
9043         kvm_set_rflags(vcpu, rflags);
9044
9045         kvm_x86_ops->update_bp_intercept(vcpu);
9046
9047         r = 0;
9048
9049 out:
9050         vcpu_put(vcpu);
9051         return r;
9052 }
9053
9054 /*
9055  * Translate a guest virtual address to a guest physical address.
9056  */
9057 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9058                                     struct kvm_translation *tr)
9059 {
9060         unsigned long vaddr = tr->linear_address;
9061         gpa_t gpa;
9062         int idx;
9063
9064         vcpu_load(vcpu);
9065
9066         idx = srcu_read_lock(&vcpu->kvm->srcu);
9067         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9068         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9069         tr->physical_address = gpa;
9070         tr->valid = gpa != UNMAPPED_GVA;
9071         tr->writeable = 1;
9072         tr->usermode = 0;
9073
9074         vcpu_put(vcpu);
9075         return 0;
9076 }
9077
9078 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9079 {
9080         struct fxregs_state *fxsave;
9081
9082         vcpu_load(vcpu);
9083
9084         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9085         memcpy(fpu->fpr, fxsave->st_space, 128);
9086         fpu->fcw = fxsave->cwd;
9087         fpu->fsw = fxsave->swd;
9088         fpu->ftwx = fxsave->twd;
9089         fpu->last_opcode = fxsave->fop;
9090         fpu->last_ip = fxsave->rip;
9091         fpu->last_dp = fxsave->rdp;
9092         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9093
9094         vcpu_put(vcpu);
9095         return 0;
9096 }
9097
9098 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9099 {
9100         struct fxregs_state *fxsave;
9101
9102         vcpu_load(vcpu);
9103
9104         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9105
9106         memcpy(fxsave->st_space, fpu->fpr, 128);
9107         fxsave->cwd = fpu->fcw;
9108         fxsave->swd = fpu->fsw;
9109         fxsave->twd = fpu->ftwx;
9110         fxsave->fop = fpu->last_opcode;
9111         fxsave->rip = fpu->last_ip;
9112         fxsave->rdp = fpu->last_dp;
9113         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9114
9115         vcpu_put(vcpu);
9116         return 0;
9117 }
9118
9119 static void store_regs(struct kvm_vcpu *vcpu)
9120 {
9121         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9122
9123         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9124                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9125
9126         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9127                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9128
9129         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9130                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9131                                 vcpu, &vcpu->run->s.regs.events);
9132 }
9133
9134 static int sync_regs(struct kvm_vcpu *vcpu)
9135 {
9136         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9137                 return -EINVAL;
9138
9139         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9140                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9141                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9142         }
9143         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9144                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9145                         return -EINVAL;
9146                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9147         }
9148         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9149                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9150                                 vcpu, &vcpu->run->s.regs.events))
9151                         return -EINVAL;
9152                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9153         }
9154
9155         return 0;
9156 }
9157
9158 static void fx_init(struct kvm_vcpu *vcpu)
9159 {
9160         fpstate_init(&vcpu->arch.guest_fpu->state);
9161         if (boot_cpu_has(X86_FEATURE_XSAVES))
9162                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9163                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9164
9165         /*
9166          * Ensure guest xcr0 is valid for loading
9167          */
9168         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9169
9170         vcpu->arch.cr0 |= X86_CR0_ET;
9171 }
9172
9173 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9174 {
9175         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9176
9177         kvmclock_reset(vcpu);
9178
9179         kvm_x86_ops->vcpu_free(vcpu);
9180         free_cpumask_var(wbinvd_dirty_mask);
9181 }
9182
9183 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9184                                                 unsigned int id)
9185 {
9186         struct kvm_vcpu *vcpu;
9187
9188         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9189                 printk_once(KERN_WARNING
9190                 "kvm: SMP vm created on host with unstable TSC; "
9191                 "guest TSC will not be reliable\n");
9192
9193         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9194
9195         return vcpu;
9196 }
9197
9198 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9199 {
9200         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9201         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9202         kvm_vcpu_mtrr_init(vcpu);
9203         vcpu_load(vcpu);
9204         kvm_vcpu_reset(vcpu, false);
9205         kvm_init_mmu(vcpu, false);
9206         vcpu_put(vcpu);
9207         return 0;
9208 }
9209
9210 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9211 {
9212         struct msr_data msr;
9213         struct kvm *kvm = vcpu->kvm;
9214
9215         kvm_hv_vcpu_postcreate(vcpu);
9216
9217         if (mutex_lock_killable(&vcpu->mutex))
9218                 return;
9219         vcpu_load(vcpu);
9220         msr.data = 0x0;
9221         msr.index = MSR_IA32_TSC;
9222         msr.host_initiated = true;
9223         kvm_write_tsc(vcpu, &msr);
9224         vcpu_put(vcpu);
9225
9226         /* poll control enabled by default */
9227         vcpu->arch.msr_kvm_poll_control = 1;
9228
9229         mutex_unlock(&vcpu->mutex);
9230
9231         if (!kvmclock_periodic_sync)
9232                 return;
9233
9234         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9235                                         KVMCLOCK_SYNC_PERIOD);
9236 }
9237
9238 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9239 {
9240         vcpu->arch.apf.msr_val = 0;
9241
9242         vcpu_load(vcpu);
9243         kvm_mmu_unload(vcpu);
9244         vcpu_put(vcpu);
9245
9246         kvm_x86_ops->vcpu_free(vcpu);
9247 }
9248
9249 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9250 {
9251         kvm_lapic_reset(vcpu, init_event);
9252
9253         vcpu->arch.hflags = 0;
9254
9255         vcpu->arch.smi_pending = 0;
9256         vcpu->arch.smi_count = 0;
9257         atomic_set(&vcpu->arch.nmi_queued, 0);
9258         vcpu->arch.nmi_pending = 0;
9259         vcpu->arch.nmi_injected = false;
9260         kvm_clear_interrupt_queue(vcpu);
9261         kvm_clear_exception_queue(vcpu);
9262         vcpu->arch.exception.pending = false;
9263
9264         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9265         kvm_update_dr0123(vcpu);
9266         vcpu->arch.dr6 = DR6_INIT;
9267         kvm_update_dr6(vcpu);
9268         vcpu->arch.dr7 = DR7_FIXED_1;
9269         kvm_update_dr7(vcpu);
9270
9271         vcpu->arch.cr2 = 0;
9272
9273         kvm_make_request(KVM_REQ_EVENT, vcpu);
9274         vcpu->arch.apf.msr_val = 0;
9275         vcpu->arch.st.msr_val = 0;
9276
9277         kvmclock_reset(vcpu);
9278
9279         kvm_clear_async_pf_completion_queue(vcpu);
9280         kvm_async_pf_hash_reset(vcpu);
9281         vcpu->arch.apf.halted = false;
9282
9283         if (kvm_mpx_supported()) {
9284                 void *mpx_state_buffer;
9285
9286                 /*
9287                  * To avoid have the INIT path from kvm_apic_has_events() that be
9288                  * called with loaded FPU and does not let userspace fix the state.
9289                  */
9290                 if (init_event)
9291                         kvm_put_guest_fpu(vcpu);
9292                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9293                                         XFEATURE_BNDREGS);
9294                 if (mpx_state_buffer)
9295                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9296                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9297                                         XFEATURE_BNDCSR);
9298                 if (mpx_state_buffer)
9299                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9300                 if (init_event)
9301                         kvm_load_guest_fpu(vcpu);
9302         }
9303
9304         if (!init_event) {
9305                 kvm_pmu_reset(vcpu);
9306                 vcpu->arch.smbase = 0x30000;
9307
9308                 vcpu->arch.msr_misc_features_enables = 0;
9309
9310                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9311         }
9312
9313         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9314         vcpu->arch.regs_avail = ~0;
9315         vcpu->arch.regs_dirty = ~0;
9316
9317         vcpu->arch.ia32_xss = 0;
9318
9319         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9320 }
9321
9322 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9323 {
9324         struct kvm_segment cs;
9325
9326         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9327         cs.selector = vector << 8;
9328         cs.base = vector << 12;
9329         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9330         kvm_rip_write(vcpu, 0);
9331 }
9332
9333 int kvm_arch_hardware_enable(void)
9334 {
9335         struct kvm *kvm;
9336         struct kvm_vcpu *vcpu;
9337         int i;
9338         int ret;
9339         u64 local_tsc;
9340         u64 max_tsc = 0;
9341         bool stable, backwards_tsc = false;
9342
9343         kvm_shared_msr_cpu_online();
9344         ret = kvm_x86_ops->hardware_enable();
9345         if (ret != 0)
9346                 return ret;
9347
9348         local_tsc = rdtsc();
9349         stable = !kvm_check_tsc_unstable();
9350         list_for_each_entry(kvm, &vm_list, vm_list) {
9351                 kvm_for_each_vcpu(i, vcpu, kvm) {
9352                         if (!stable && vcpu->cpu == smp_processor_id())
9353                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9354                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9355                                 backwards_tsc = true;
9356                                 if (vcpu->arch.last_host_tsc > max_tsc)
9357                                         max_tsc = vcpu->arch.last_host_tsc;
9358                         }
9359                 }
9360         }
9361
9362         /*
9363          * Sometimes, even reliable TSCs go backwards.  This happens on
9364          * platforms that reset TSC during suspend or hibernate actions, but
9365          * maintain synchronization.  We must compensate.  Fortunately, we can
9366          * detect that condition here, which happens early in CPU bringup,
9367          * before any KVM threads can be running.  Unfortunately, we can't
9368          * bring the TSCs fully up to date with real time, as we aren't yet far
9369          * enough into CPU bringup that we know how much real time has actually
9370          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9371          * variables that haven't been updated yet.
9372          *
9373          * So we simply find the maximum observed TSC above, then record the
9374          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9375          * the adjustment will be applied.  Note that we accumulate
9376          * adjustments, in case multiple suspend cycles happen before some VCPU
9377          * gets a chance to run again.  In the event that no KVM threads get a
9378          * chance to run, we will miss the entire elapsed period, as we'll have
9379          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9380          * loose cycle time.  This isn't too big a deal, since the loss will be
9381          * uniform across all VCPUs (not to mention the scenario is extremely
9382          * unlikely). It is possible that a second hibernate recovery happens
9383          * much faster than a first, causing the observed TSC here to be
9384          * smaller; this would require additional padding adjustment, which is
9385          * why we set last_host_tsc to the local tsc observed here.
9386          *
9387          * N.B. - this code below runs only on platforms with reliable TSC,
9388          * as that is the only way backwards_tsc is set above.  Also note
9389          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9390          * have the same delta_cyc adjustment applied if backwards_tsc
9391          * is detected.  Note further, this adjustment is only done once,
9392          * as we reset last_host_tsc on all VCPUs to stop this from being
9393          * called multiple times (one for each physical CPU bringup).
9394          *
9395          * Platforms with unreliable TSCs don't have to deal with this, they
9396          * will be compensated by the logic in vcpu_load, which sets the TSC to
9397          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9398          * guarantee that they stay in perfect synchronization.
9399          */
9400         if (backwards_tsc) {
9401                 u64 delta_cyc = max_tsc - local_tsc;
9402                 list_for_each_entry(kvm, &vm_list, vm_list) {
9403                         kvm->arch.backwards_tsc_observed = true;
9404                         kvm_for_each_vcpu(i, vcpu, kvm) {
9405                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9406                                 vcpu->arch.last_host_tsc = local_tsc;
9407                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9408                         }
9409
9410                         /*
9411                          * We have to disable TSC offset matching.. if you were
9412                          * booting a VM while issuing an S4 host suspend....
9413                          * you may have some problem.  Solving this issue is
9414                          * left as an exercise to the reader.
9415                          */
9416                         kvm->arch.last_tsc_nsec = 0;
9417                         kvm->arch.last_tsc_write = 0;
9418                 }
9419
9420         }
9421         return 0;
9422 }
9423
9424 void kvm_arch_hardware_disable(void)
9425 {
9426         kvm_x86_ops->hardware_disable();
9427         drop_user_return_notifiers();
9428 }
9429
9430 int kvm_arch_hardware_setup(void)
9431 {
9432         int r;
9433
9434         r = kvm_x86_ops->hardware_setup();
9435         if (r != 0)
9436                 return r;
9437
9438         cr4_reserved_bits = kvm_host_cr4_reserved_bits(&boot_cpu_data);
9439
9440         if (kvm_has_tsc_control) {
9441                 /*
9442                  * Make sure the user can only configure tsc_khz values that
9443                  * fit into a signed integer.
9444                  * A min value is not calculated because it will always
9445                  * be 1 on all machines.
9446                  */
9447                 u64 max = min(0x7fffffffULL,
9448                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9449                 kvm_max_guest_tsc_khz = max;
9450
9451                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9452         }
9453
9454         if (boot_cpu_has(X86_FEATURE_XSAVES))
9455                 rdmsrl(MSR_IA32_XSS, host_xss);
9456
9457         kvm_init_msr_list();
9458         return 0;
9459 }
9460
9461 void kvm_arch_hardware_unsetup(void)
9462 {
9463         kvm_x86_ops->hardware_unsetup();
9464 }
9465
9466 int kvm_arch_check_processor_compat(void)
9467 {
9468         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
9469
9470         WARN_ON(!irqs_disabled());
9471
9472         if (kvm_host_cr4_reserved_bits(c) != cr4_reserved_bits)
9473                 return -EIO;
9474
9475         return kvm_x86_ops->check_processor_compatibility();
9476 }
9477
9478 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9479 {
9480         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9481 }
9482 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9483
9484 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9485 {
9486         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9487 }
9488
9489 struct static_key kvm_no_apic_vcpu __read_mostly;
9490 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9491
9492 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9493 {
9494         struct page *page;
9495         int r;
9496
9497         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9498         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9499                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9500         else
9501                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9502
9503         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9504         if (!page) {
9505                 r = -ENOMEM;
9506                 goto fail;
9507         }
9508         vcpu->arch.pio_data = page_address(page);
9509
9510         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9511
9512         r = kvm_mmu_create(vcpu);
9513         if (r < 0)
9514                 goto fail_free_pio_data;
9515
9516         if (irqchip_in_kernel(vcpu->kvm)) {
9517                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu->kvm);
9518                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9519                 if (r < 0)
9520                         goto fail_mmu_destroy;
9521         } else
9522                 static_key_slow_inc(&kvm_no_apic_vcpu);
9523
9524         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9525                                        GFP_KERNEL_ACCOUNT);
9526         if (!vcpu->arch.mce_banks) {
9527                 r = -ENOMEM;
9528                 goto fail_free_lapic;
9529         }
9530         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9531
9532         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9533                                 GFP_KERNEL_ACCOUNT)) {
9534                 r = -ENOMEM;
9535                 goto fail_free_mce_banks;
9536         }
9537
9538         fx_init(vcpu);
9539
9540         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9541
9542         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9543
9544         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9545
9546         kvm_async_pf_hash_reset(vcpu);
9547         kvm_pmu_init(vcpu);
9548
9549         vcpu->arch.pending_external_vector = -1;
9550         vcpu->arch.preempted_in_kernel = false;
9551
9552         kvm_hv_vcpu_init(vcpu);
9553
9554         return 0;
9555
9556 fail_free_mce_banks:
9557         kfree(vcpu->arch.mce_banks);
9558 fail_free_lapic:
9559         kvm_free_lapic(vcpu);
9560 fail_mmu_destroy:
9561         kvm_mmu_destroy(vcpu);
9562 fail_free_pio_data:
9563         free_page((unsigned long)vcpu->arch.pio_data);
9564 fail:
9565         return r;
9566 }
9567
9568 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9569 {
9570         int idx;
9571
9572         kvm_hv_vcpu_uninit(vcpu);
9573         kvm_pmu_destroy(vcpu);
9574         kfree(vcpu->arch.mce_banks);
9575         kvm_free_lapic(vcpu);
9576         idx = srcu_read_lock(&vcpu->kvm->srcu);
9577         kvm_mmu_destroy(vcpu);
9578         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9579         free_page((unsigned long)vcpu->arch.pio_data);
9580         if (!lapic_in_kernel(vcpu))
9581                 static_key_slow_dec(&kvm_no_apic_vcpu);
9582 }
9583
9584 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9585 {
9586         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
9587
9588         vcpu->arch.l1tf_flush_l1d = true;
9589         if (pmu->version && unlikely(pmu->event_count)) {
9590                 pmu->need_cleanup = true;
9591                 kvm_make_request(KVM_REQ_PMU, vcpu);
9592         }
9593         kvm_x86_ops->sched_in(vcpu, cpu);
9594 }
9595
9596 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9597 {
9598         if (type)
9599                 return -EINVAL;
9600
9601         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9602         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9603         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9604         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
9605         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9606         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9607
9608         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9609         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9610         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9611         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9612                 &kvm->arch.irq_sources_bitmap);
9613
9614         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9615         mutex_init(&kvm->arch.apic_map_lock);
9616         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9617
9618         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9619         pvclock_update_vm_gtod_copy(kvm);
9620
9621         kvm->arch.guest_can_read_msr_platform_info = true;
9622
9623         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9624         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9625
9626         kvm_hv_init_vm(kvm);
9627         kvm_page_track_init(kvm);
9628         kvm_mmu_init_vm(kvm);
9629
9630         return kvm_x86_ops->vm_init(kvm);
9631 }
9632
9633 int kvm_arch_post_init_vm(struct kvm *kvm)
9634 {
9635         return kvm_mmu_post_init_vm(kvm);
9636 }
9637
9638 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9639 {
9640         vcpu_load(vcpu);
9641         kvm_mmu_unload(vcpu);
9642         vcpu_put(vcpu);
9643 }
9644
9645 static void kvm_free_vcpus(struct kvm *kvm)
9646 {
9647         unsigned int i;
9648         struct kvm_vcpu *vcpu;
9649
9650         /*
9651          * Unpin any mmu pages first.
9652          */
9653         kvm_for_each_vcpu(i, vcpu, kvm) {
9654                 kvm_clear_async_pf_completion_queue(vcpu);
9655                 kvm_unload_vcpu_mmu(vcpu);
9656         }
9657         kvm_for_each_vcpu(i, vcpu, kvm)
9658                 kvm_arch_vcpu_free(vcpu);
9659
9660         mutex_lock(&kvm->lock);
9661         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9662                 kvm->vcpus[i] = NULL;
9663
9664         atomic_set(&kvm->online_vcpus, 0);
9665         mutex_unlock(&kvm->lock);
9666 }
9667
9668 void kvm_arch_sync_events(struct kvm *kvm)
9669 {
9670         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9671         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9672         kvm_free_pit(kvm);
9673 }
9674
9675 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9676 {
9677         int i, r;
9678         unsigned long hva;
9679         struct kvm_memslots *slots = kvm_memslots(kvm);
9680         struct kvm_memory_slot *slot, old;
9681
9682         /* Called with kvm->slots_lock held.  */
9683         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9684                 return -EINVAL;
9685
9686         slot = id_to_memslot(slots, id);
9687         if (size) {
9688                 if (slot->npages)
9689                         return -EEXIST;
9690
9691                 /*
9692                  * MAP_SHARED to prevent internal slot pages from being moved
9693                  * by fork()/COW.
9694                  */
9695                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9696                               MAP_SHARED | MAP_ANONYMOUS, 0);
9697                 if (IS_ERR((void *)hva))
9698                         return PTR_ERR((void *)hva);
9699         } else {
9700                 if (!slot->npages)
9701                         return 0;
9702
9703                 hva = 0;
9704         }
9705
9706         old = *slot;
9707         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9708                 struct kvm_userspace_memory_region m;
9709
9710                 m.slot = id | (i << 16);
9711                 m.flags = 0;
9712                 m.guest_phys_addr = gpa;
9713                 m.userspace_addr = hva;
9714                 m.memory_size = size;
9715                 r = __kvm_set_memory_region(kvm, &m);
9716                 if (r < 0)
9717                         return r;
9718         }
9719
9720         if (!size)
9721                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9722
9723         return 0;
9724 }
9725 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9726
9727 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9728 {
9729         int r;
9730
9731         mutex_lock(&kvm->slots_lock);
9732         r = __x86_set_memory_region(kvm, id, gpa, size);
9733         mutex_unlock(&kvm->slots_lock);
9734
9735         return r;
9736 }
9737 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9738
9739 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
9740 {
9741         kvm_mmu_pre_destroy_vm(kvm);
9742 }
9743
9744 void kvm_arch_destroy_vm(struct kvm *kvm)
9745 {
9746         if (current->mm == kvm->mm) {
9747                 /*
9748                  * Free memory regions allocated on behalf of userspace,
9749                  * unless the the memory map has changed due to process exit
9750                  * or fd copying.
9751                  */
9752                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9753                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9754                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9755         }
9756         if (kvm_x86_ops->vm_destroy)
9757                 kvm_x86_ops->vm_destroy(kvm);
9758         kvm_pic_destroy(kvm);
9759         kvm_ioapic_destroy(kvm);
9760         kvm_free_vcpus(kvm);
9761         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9762         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9763         kvm_mmu_uninit_vm(kvm);
9764         kvm_page_track_cleanup(kvm);
9765         kvm_hv_destroy_vm(kvm);
9766 }
9767
9768 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9769                            struct kvm_memory_slot *dont)
9770 {
9771         int i;
9772
9773         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9774                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9775                         kvfree(free->arch.rmap[i]);
9776                         free->arch.rmap[i] = NULL;
9777                 }
9778                 if (i == 0)
9779                         continue;
9780
9781                 if (!dont || free->arch.lpage_info[i - 1] !=
9782                              dont->arch.lpage_info[i - 1]) {
9783                         kvfree(free->arch.lpage_info[i - 1]);
9784                         free->arch.lpage_info[i - 1] = NULL;
9785                 }
9786         }
9787
9788         kvm_page_track_free_memslot(free, dont);
9789 }
9790
9791 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9792                             unsigned long npages)
9793 {
9794         int i;
9795
9796         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9797                 struct kvm_lpage_info *linfo;
9798                 unsigned long ugfn;
9799                 int lpages;
9800                 int level = i + 1;
9801
9802                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9803                                       slot->base_gfn, level) + 1;
9804
9805                 slot->arch.rmap[i] =
9806                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9807                                  GFP_KERNEL_ACCOUNT);
9808                 if (!slot->arch.rmap[i])
9809                         goto out_free;
9810                 if (i == 0)
9811                         continue;
9812
9813                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9814                 if (!linfo)
9815                         goto out_free;
9816
9817                 slot->arch.lpage_info[i - 1] = linfo;
9818
9819                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9820                         linfo[0].disallow_lpage = 1;
9821                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9822                         linfo[lpages - 1].disallow_lpage = 1;
9823                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9824                 /*
9825                  * If the gfn and userspace address are not aligned wrt each
9826                  * other, or if explicitly asked to, disable large page
9827                  * support for this slot
9828                  */
9829                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9830                     !kvm_largepages_enabled()) {
9831                         unsigned long j;
9832
9833                         for (j = 0; j < lpages; ++j)
9834                                 linfo[j].disallow_lpage = 1;
9835                 }
9836         }
9837
9838         if (kvm_page_track_create_memslot(slot, npages))
9839                 goto out_free;
9840
9841         return 0;
9842
9843 out_free:
9844         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9845                 kvfree(slot->arch.rmap[i]);
9846                 slot->arch.rmap[i] = NULL;
9847                 if (i == 0)
9848                         continue;
9849
9850                 kvfree(slot->arch.lpage_info[i - 1]);
9851                 slot->arch.lpage_info[i - 1] = NULL;
9852         }
9853         return -ENOMEM;
9854 }
9855
9856 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9857 {
9858         /*
9859          * memslots->generation has been incremented.
9860          * mmio generation may have reached its maximum value.
9861          */
9862         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9863 }
9864
9865 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9866                                 struct kvm_memory_slot *memslot,
9867                                 const struct kvm_userspace_memory_region *mem,
9868                                 enum kvm_mr_change change)
9869 {
9870         return 0;
9871 }
9872
9873 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9874                                      struct kvm_memory_slot *new)
9875 {
9876         /* Still write protect RO slot */
9877         if (new->flags & KVM_MEM_READONLY) {
9878                 kvm_mmu_slot_remove_write_access(kvm, new);
9879                 return;
9880         }
9881
9882         /*
9883          * Call kvm_x86_ops dirty logging hooks when they are valid.
9884          *
9885          * kvm_x86_ops->slot_disable_log_dirty is called when:
9886          *
9887          *  - KVM_MR_CREATE with dirty logging is disabled
9888          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9889          *
9890          * The reason is, in case of PML, we need to set D-bit for any slots
9891          * with dirty logging disabled in order to eliminate unnecessary GPA
9892          * logging in PML buffer (and potential PML buffer full VMEXIT). This
9893          * guarantees leaving PML enabled during guest's lifetime won't have
9894          * any additional overhead from PML when guest is running with dirty
9895          * logging disabled for memory slots.
9896          *
9897          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9898          * to dirty logging mode.
9899          *
9900          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9901          *
9902          * In case of write protect:
9903          *
9904          * Write protect all pages for dirty logging.
9905          *
9906          * All the sptes including the large sptes which point to this
9907          * slot are set to readonly. We can not create any new large
9908          * spte on this slot until the end of the logging.
9909          *
9910          * See the comments in fast_page_fault().
9911          */
9912         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9913                 if (kvm_x86_ops->slot_enable_log_dirty)
9914                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9915                 else
9916                         kvm_mmu_slot_remove_write_access(kvm, new);
9917         } else {
9918                 if (kvm_x86_ops->slot_disable_log_dirty)
9919                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9920         }
9921 }
9922
9923 void kvm_arch_commit_memory_region(struct kvm *kvm,
9924                                 const struct kvm_userspace_memory_region *mem,
9925                                 const struct kvm_memory_slot *old,
9926                                 const struct kvm_memory_slot *new,
9927                                 enum kvm_mr_change change)
9928 {
9929         if (!kvm->arch.n_requested_mmu_pages)
9930                 kvm_mmu_change_mmu_pages(kvm,
9931                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9932
9933         /*
9934          * Dirty logging tracks sptes in 4k granularity, meaning that large
9935          * sptes have to be split.  If live migration is successful, the guest
9936          * in the source machine will be destroyed and large sptes will be
9937          * created in the destination. However, if the guest continues to run
9938          * in the source machine (for example if live migration fails), small
9939          * sptes will remain around and cause bad performance.
9940          *
9941          * Scan sptes if dirty logging has been stopped, dropping those
9942          * which can be collapsed into a single large-page spte.  Later
9943          * page faults will create the large-page sptes.
9944          *
9945          * There is no need to do this in any of the following cases:
9946          * CREATE:      No dirty mappings will already exist.
9947          * MOVE/DELETE: The old mappings will already have been cleaned up by
9948          *              kvm_arch_flush_shadow_memslot()
9949          */
9950         if (change == KVM_MR_FLAGS_ONLY &&
9951                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9952                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9953                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9954
9955         /*
9956          * Set up write protection and/or dirty logging for the new slot.
9957          *
9958          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9959          * been zapped so no dirty logging staff is needed for old slot. For
9960          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9961          * new and it's also covered when dealing with the new slot.
9962          *
9963          * FIXME: const-ify all uses of struct kvm_memory_slot.
9964          */
9965         if (change != KVM_MR_DELETE)
9966                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9967 }
9968
9969 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9970 {
9971         kvm_mmu_zap_all(kvm);
9972 }
9973
9974 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9975                                    struct kvm_memory_slot *slot)
9976 {
9977         kvm_page_track_flush_slot(kvm, slot);
9978 }
9979
9980 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9981 {
9982         return (is_guest_mode(vcpu) &&
9983                         kvm_x86_ops->guest_apic_has_interrupt &&
9984                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9985 }
9986
9987 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9988 {
9989         if (!list_empty_careful(&vcpu->async_pf.done))
9990                 return true;
9991
9992         if (kvm_apic_has_events(vcpu))
9993                 return true;
9994
9995         if (vcpu->arch.pv.pv_unhalted)
9996                 return true;
9997
9998         if (vcpu->arch.exception.pending)
9999                 return true;
10000
10001         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10002             (vcpu->arch.nmi_pending &&
10003              kvm_x86_ops->nmi_allowed(vcpu)))
10004                 return true;
10005
10006         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10007             (vcpu->arch.smi_pending && !is_smm(vcpu)))
10008                 return true;
10009
10010         if (kvm_arch_interrupt_allowed(vcpu) &&
10011             (kvm_cpu_has_interrupt(vcpu) ||
10012             kvm_guest_apic_has_interrupt(vcpu)))
10013                 return true;
10014
10015         if (kvm_hv_has_stimer_pending(vcpu))
10016                 return true;
10017
10018         return false;
10019 }
10020
10021 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10022 {
10023         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10024 }
10025
10026 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10027 {
10028         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10029                 return true;
10030
10031         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10032                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10033                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10034                 return true;
10035
10036         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
10037                 return true;
10038
10039         return false;
10040 }
10041
10042 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10043 {
10044         return vcpu->arch.preempted_in_kernel;
10045 }
10046
10047 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10048 {
10049         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10050 }
10051
10052 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10053 {
10054         return kvm_x86_ops->interrupt_allowed(vcpu);
10055 }
10056
10057 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10058 {
10059         if (is_64_bit_mode(vcpu))
10060                 return kvm_rip_read(vcpu);
10061         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10062                      kvm_rip_read(vcpu));
10063 }
10064 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10065
10066 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10067 {
10068         return kvm_get_linear_rip(vcpu) == linear_rip;
10069 }
10070 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10071
10072 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10073 {
10074         unsigned long rflags;
10075
10076         rflags = kvm_x86_ops->get_rflags(vcpu);
10077         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10078                 rflags &= ~X86_EFLAGS_TF;
10079         return rflags;
10080 }
10081 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10082
10083 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10084 {
10085         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10086             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10087                 rflags |= X86_EFLAGS_TF;
10088         kvm_x86_ops->set_rflags(vcpu, rflags);
10089 }
10090
10091 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10092 {
10093         __kvm_set_rflags(vcpu, rflags);
10094         kvm_make_request(KVM_REQ_EVENT, vcpu);
10095 }
10096 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10097
10098 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10099 {
10100         int r;
10101
10102         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10103               work->wakeup_all)
10104                 return;
10105
10106         r = kvm_mmu_reload(vcpu);
10107         if (unlikely(r))
10108                 return;
10109
10110         if (!vcpu->arch.mmu->direct_map &&
10111               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
10112                 return;
10113
10114         vcpu->arch.mmu->page_fault(vcpu, work->cr2_or_gpa, 0, true);
10115 }
10116
10117 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10118 {
10119         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10120 }
10121
10122 static inline u32 kvm_async_pf_next_probe(u32 key)
10123 {
10124         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
10125 }
10126
10127 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10128 {
10129         u32 key = kvm_async_pf_hash_fn(gfn);
10130
10131         while (vcpu->arch.apf.gfns[key] != ~0)
10132                 key = kvm_async_pf_next_probe(key);
10133
10134         vcpu->arch.apf.gfns[key] = gfn;
10135 }
10136
10137 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10138 {
10139         int i;
10140         u32 key = kvm_async_pf_hash_fn(gfn);
10141
10142         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
10143                      (vcpu->arch.apf.gfns[key] != gfn &&
10144                       vcpu->arch.apf.gfns[key] != ~0); i++)
10145                 key = kvm_async_pf_next_probe(key);
10146
10147         return key;
10148 }
10149
10150 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10151 {
10152         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10153 }
10154
10155 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10156 {
10157         u32 i, j, k;
10158
10159         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10160         while (true) {
10161                 vcpu->arch.apf.gfns[i] = ~0;
10162                 do {
10163                         j = kvm_async_pf_next_probe(j);
10164                         if (vcpu->arch.apf.gfns[j] == ~0)
10165                                 return;
10166                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10167                         /*
10168                          * k lies cyclically in ]i,j]
10169                          * |    i.k.j |
10170                          * |....j i.k.| or  |.k..j i...|
10171                          */
10172                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10173                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10174                 i = j;
10175         }
10176 }
10177
10178 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
10179 {
10180
10181         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
10182                                       sizeof(val));
10183 }
10184
10185 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
10186 {
10187
10188         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
10189                                       sizeof(u32));
10190 }
10191
10192 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10193 {
10194         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10195                 return false;
10196
10197         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
10198             (vcpu->arch.apf.send_user_only &&
10199              kvm_x86_ops->get_cpl(vcpu) == 0))
10200                 return false;
10201
10202         return true;
10203 }
10204
10205 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10206 {
10207         if (unlikely(!lapic_in_kernel(vcpu) ||
10208                      kvm_event_needs_reinjection(vcpu) ||
10209                      vcpu->arch.exception.pending))
10210                 return false;
10211
10212         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10213                 return false;
10214
10215         /*
10216          * If interrupts are off we cannot even use an artificial
10217          * halt state.
10218          */
10219         return kvm_x86_ops->interrupt_allowed(vcpu);
10220 }
10221
10222 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10223                                      struct kvm_async_pf *work)
10224 {
10225         struct x86_exception fault;
10226
10227         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10228         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10229
10230         if (kvm_can_deliver_async_pf(vcpu) &&
10231             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10232                 fault.vector = PF_VECTOR;
10233                 fault.error_code_valid = true;
10234                 fault.error_code = 0;
10235                 fault.nested_page_fault = false;
10236                 fault.address = work->arch.token;
10237                 fault.async_page_fault = true;
10238                 kvm_inject_page_fault(vcpu, &fault);
10239         } else {
10240                 /*
10241                  * It is not possible to deliver a paravirtualized asynchronous
10242                  * page fault, but putting the guest in an artificial halt state
10243                  * can be beneficial nevertheless: if an interrupt arrives, we
10244                  * can deliver it timely and perhaps the guest will schedule
10245                  * another process.  When the instruction that triggered a page
10246                  * fault is retried, hopefully the page will be ready in the host.
10247                  */
10248                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10249         }
10250 }
10251
10252 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10253                                  struct kvm_async_pf *work)
10254 {
10255         struct x86_exception fault;
10256         u32 val;
10257
10258         if (work->wakeup_all)
10259                 work->arch.token = ~0; /* broadcast wakeup */
10260         else
10261                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10262         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10263
10264         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10265             !apf_get_user(vcpu, &val)) {
10266                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10267                     vcpu->arch.exception.pending &&
10268                     vcpu->arch.exception.nr == PF_VECTOR &&
10269                     !apf_put_user(vcpu, 0)) {
10270                         vcpu->arch.exception.injected = false;
10271                         vcpu->arch.exception.pending = false;
10272                         vcpu->arch.exception.nr = 0;
10273                         vcpu->arch.exception.has_error_code = false;
10274                         vcpu->arch.exception.error_code = 0;
10275                         vcpu->arch.exception.has_payload = false;
10276                         vcpu->arch.exception.payload = 0;
10277                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10278                         fault.vector = PF_VECTOR;
10279                         fault.error_code_valid = true;
10280                         fault.error_code = 0;
10281                         fault.nested_page_fault = false;
10282                         fault.address = work->arch.token;
10283                         fault.async_page_fault = true;
10284                         kvm_inject_page_fault(vcpu, &fault);
10285                 }
10286         }
10287         vcpu->arch.apf.halted = false;
10288         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10289 }
10290
10291 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10292 {
10293         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10294                 return true;
10295         else
10296                 return kvm_can_do_async_pf(vcpu);
10297 }
10298
10299 void kvm_arch_start_assignment(struct kvm *kvm)
10300 {
10301         atomic_inc(&kvm->arch.assigned_device_count);
10302 }
10303 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10304
10305 void kvm_arch_end_assignment(struct kvm *kvm)
10306 {
10307         atomic_dec(&kvm->arch.assigned_device_count);
10308 }
10309 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10310
10311 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10312 {
10313         return atomic_read(&kvm->arch.assigned_device_count);
10314 }
10315 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10316
10317 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10318 {
10319         atomic_inc(&kvm->arch.noncoherent_dma_count);
10320 }
10321 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10322
10323 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10324 {
10325         atomic_dec(&kvm->arch.noncoherent_dma_count);
10326 }
10327 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10328
10329 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10330 {
10331         return atomic_read(&kvm->arch.noncoherent_dma_count);
10332 }
10333 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10334
10335 bool kvm_arch_has_irq_bypass(void)
10336 {
10337         return true;
10338 }
10339
10340 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10341                                       struct irq_bypass_producer *prod)
10342 {
10343         struct kvm_kernel_irqfd *irqfd =
10344                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10345
10346         irqfd->producer = prod;
10347
10348         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10349                                            prod->irq, irqfd->gsi, 1);
10350 }
10351
10352 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10353                                       struct irq_bypass_producer *prod)
10354 {
10355         int ret;
10356         struct kvm_kernel_irqfd *irqfd =
10357                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10358
10359         WARN_ON(irqfd->producer != prod);
10360         irqfd->producer = NULL;
10361
10362         /*
10363          * When producer of consumer is unregistered, we change back to
10364          * remapped mode, so we can re-use the current implementation
10365          * when the irq is masked/disabled or the consumer side (KVM
10366          * int this case doesn't want to receive the interrupts.
10367         */
10368         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10369         if (ret)
10370                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10371                        " fails: %d\n", irqfd->consumer.token, ret);
10372 }
10373
10374 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10375                                    uint32_t guest_irq, bool set)
10376 {
10377         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10378 }
10379
10380 bool kvm_vector_hashing_enabled(void)
10381 {
10382         return vector_hashing;
10383 }
10384 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10385
10386 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10387 {
10388         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10389 }
10390 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10391
10392
10393 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10394 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10395 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10396 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10397 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10398 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10399 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10400 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10401 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10402 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10403 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10404 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);