1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt control channel messages
6 * Copyright (C) 2017, Intel Corporation
12 #include <linux/types.h>
13 #include <linux/uuid.h>
23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 TB_CFG_ERROR_LINK_ERROR = 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP = 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
34 struct tb_cfg_header {
36 u32 unknown:10; /* highest order bit is set on replies */
40 /* additional header for read/write packets */
41 struct tb_cfg_address {
42 u32 offset:13; /* in dwords */
43 u32 length:6; /* in dwords */
45 enum tb_cfg_space space:2;
46 u32 seq:2; /* sequence number */
50 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
52 struct tb_cfg_header header;
53 struct tb_cfg_address addr;
56 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
57 struct cfg_write_pkg {
58 struct tb_cfg_header header;
59 struct tb_cfg_address addr;
60 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
63 /* TB_CFG_PKG_ERROR */
64 struct cfg_error_pkg {
65 struct tb_cfg_header header;
66 enum tb_cfg_error error:4;
69 u32 zero2:2; /* Both should be zero, still they are different fields. */
73 /* TB_CFG_PKG_EVENT */
74 struct cfg_event_pkg {
75 struct tb_cfg_header header;
81 /* TB_CFG_PKG_RESET */
82 struct cfg_reset_pkg {
83 struct tb_cfg_header header;
86 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
88 struct tb_cfg_header header;
95 ICM_GET_TOPOLOGY = 0x1,
96 ICM_DRIVER_READY = 0x3,
97 ICM_APPROVE_DEVICE = 0x4,
98 ICM_CHALLENGE_DEVICE = 0x5,
99 ICM_ADD_DEVICE_KEY = 0x6,
101 ICM_APPROVE_XDOMAIN = 0x10,
102 ICM_DISCONNECT_XDOMAIN = 0x11,
103 ICM_PREBOOT_ACL = 0x18,
106 enum icm_event_code {
107 ICM_EVENT_DEVICE_CONNECTED = 3,
108 ICM_EVENT_DEVICE_DISCONNECTED = 4,
109 ICM_EVENT_XDOMAIN_CONNECTED = 6,
110 ICM_EVENT_XDOMAIN_DISCONNECTED = 7,
113 struct icm_pkg_header {
120 #define ICM_FLAGS_ERROR BIT(0)
121 #define ICM_FLAGS_NO_KEY BIT(1)
122 #define ICM_FLAGS_SLEVEL_SHIFT 3
123 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
124 #define ICM_FLAGS_WRITE BIT(7)
126 struct icm_pkg_driver_ready {
127 struct icm_pkg_header hdr;
130 /* Falcon Ridge only messages */
132 struct icm_fr_pkg_driver_ready_response {
133 struct icm_pkg_header hdr;
139 #define ICM_FR_SLEVEL_MASK 0xf
141 /* Falcon Ridge & Alpine Ridge common messages */
143 struct icm_fr_pkg_get_topology {
144 struct icm_pkg_header hdr;
147 #define ICM_GET_TOPOLOGY_PACKETS 14
149 struct icm_fr_pkg_get_topology_response {
150 struct icm_pkg_header hdr;
155 u8 drom_i2c_address_index;
159 u32 port_hop_info[16];
162 #define ICM_SWITCH_USED BIT(0)
163 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
164 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
166 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
167 #define ICM_PORT_INDEX_SHIFT 24
168 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
170 struct icm_fr_event_device_connected {
171 struct icm_pkg_header hdr;
179 #define ICM_LINK_INFO_LINK_MASK 0x7
180 #define ICM_LINK_INFO_DEPTH_SHIFT 4
181 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
182 #define ICM_LINK_INFO_APPROVED BIT(8)
183 #define ICM_LINK_INFO_REJECTED BIT(9)
184 #define ICM_LINK_INFO_BOOT BIT(10)
186 struct icm_fr_pkg_approve_device {
187 struct icm_pkg_header hdr;
194 struct icm_fr_event_device_disconnected {
195 struct icm_pkg_header hdr;
200 struct icm_fr_event_xdomain_connected {
201 struct icm_pkg_header hdr;
212 struct icm_fr_event_xdomain_disconnected {
213 struct icm_pkg_header hdr;
219 struct icm_fr_pkg_add_device_key {
220 struct icm_pkg_header hdr;
228 struct icm_fr_pkg_add_device_key_response {
229 struct icm_pkg_header hdr;
236 struct icm_fr_pkg_challenge_device {
237 struct icm_pkg_header hdr;
245 struct icm_fr_pkg_challenge_device_response {
246 struct icm_pkg_header hdr;
255 struct icm_fr_pkg_approve_xdomain {
256 struct icm_pkg_header hdr;
266 struct icm_fr_pkg_approve_xdomain_response {
267 struct icm_pkg_header hdr;
277 /* Alpine Ridge only messages */
279 struct icm_ar_pkg_driver_ready_response {
280 struct icm_pkg_header hdr;
286 #define ICM_AR_FLAGS_RTD3 BIT(6)
288 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
289 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
290 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
291 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
293 struct icm_ar_pkg_get_route {
294 struct icm_pkg_header hdr;
299 struct icm_ar_pkg_get_route_response {
300 struct icm_pkg_header hdr;
307 struct icm_ar_boot_acl_entry {
312 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
314 struct icm_ar_pkg_preboot_acl {
315 struct icm_pkg_header hdr;
316 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
319 struct icm_ar_pkg_preboot_acl_response {
320 struct icm_pkg_header hdr;
321 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
324 /* Titan Ridge messages */
326 struct icm_tr_pkg_driver_ready_response {
327 struct icm_pkg_header hdr;
335 #define ICM_TR_FLAGS_RTD3 BIT(6)
337 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
338 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
339 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
341 struct icm_tr_event_device_connected {
342 struct icm_pkg_header hdr;
352 struct icm_tr_event_device_disconnected {
353 struct icm_pkg_header hdr;
358 struct icm_tr_event_xdomain_connected {
359 struct icm_pkg_header hdr;
370 struct icm_tr_event_xdomain_disconnected {
371 struct icm_pkg_header hdr;
377 struct icm_tr_pkg_approve_device {
378 struct icm_pkg_header hdr;
386 struct icm_tr_pkg_add_device_key {
387 struct icm_pkg_header hdr;
396 struct icm_tr_pkg_challenge_device {
397 struct icm_pkg_header hdr;
406 struct icm_tr_pkg_approve_xdomain {
407 struct icm_pkg_header hdr;
417 struct icm_tr_pkg_disconnect_xdomain {
418 struct icm_pkg_header hdr;
426 struct icm_tr_pkg_challenge_device_response {
427 struct icm_pkg_header hdr;
437 struct icm_tr_pkg_add_device_key_response {
438 struct icm_pkg_header hdr;
446 struct icm_tr_pkg_approve_xdomain_response {
447 struct icm_pkg_header hdr;
457 struct icm_tr_pkg_disconnect_xdomain_response {
458 struct icm_pkg_header hdr;
466 /* XDomain messages */
468 struct tb_xdomain_header {
474 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
475 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
476 #define TB_XDOMAIN_SN_SHIFT 27
479 UUID_REQUEST_OLD = 1,
483 PROPERTIES_CHANGED_REQUEST,
484 PROPERTIES_CHANGED_RESPONSE,
489 struct tb_xdp_header {
490 struct tb_xdomain_header xd_hdr;
496 struct tb_xdp_header hdr;
499 struct tb_xdp_uuid_response {
500 struct tb_xdp_header hdr;
506 struct tb_xdp_properties {
507 struct tb_xdp_header hdr;
514 struct tb_xdp_properties_response {
515 struct tb_xdp_header hdr;
525 * Max length of data array single XDomain property response is allowed
528 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
529 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
531 /* Maximum size of the total property block in dwords we allow */
532 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
534 struct tb_xdp_properties_changed {
535 struct tb_xdp_header hdr;
539 struct tb_xdp_properties_changed_response {
540 struct tb_xdp_header hdr;
545 ERROR_UNKNOWN_PACKET,
546 ERROR_UNKNOWN_DOMAIN,
551 struct tb_xdp_error_response {
552 struct tb_xdp_header hdr;