1 /* ADC driver for AXP20X and AXP22X PMICs
3 * Copyright (c) 2016 Free Electrons NextThing Co.
6 * This program is free software; you can redistribute it and/or modify it under
7 * the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation.
11 #include <linux/completion.h>
12 #include <linux/interrupt.h>
14 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 #include <linux/thermal.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/driver.h>
24 #include <linux/iio/machine.h>
25 #include <linux/mfd/axp20x.h>
27 #define AXP20X_ADC_EN1_MASK GENMASK(7, 0)
29 #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7))
30 #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0))
32 #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0)
33 #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1)
34 #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0))
35 #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1)
37 #define AXP20X_ADC_RATE_MASK GENMASK(7, 6)
38 #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4)
39 #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK)
40 #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK)
41 #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK)
42 #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x)
43 #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK)
44 #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x))
46 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \
50 .channel = _channel, \
52 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
53 BIT(IIO_CHAN_INFO_SCALE), \
54 .datasheet_name = _name, \
57 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \
61 .channel = _channel, \
63 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
64 BIT(IIO_CHAN_INFO_SCALE) |\
65 BIT(IIO_CHAN_INFO_OFFSET),\
66 .datasheet_name = _name, \
71 struct axp20x_adc_iio {
72 struct regmap *regmap;
73 struct axp_data *data;
76 enum axp20x_adc_channel_v {
86 enum axp20x_adc_channel_i {
90 AXP20X_BATT_DISCHRG_I,
93 enum axp22x_adc_channel_v {
98 enum axp22x_adc_channel_i {
99 AXP22X_BATT_CHRG_I = 1,
100 AXP22X_BATT_DISCHRG_I,
103 enum axp813_adc_channel_v {
109 static struct iio_map axp20x_maps[] = {
111 .consumer_dev_name = "axp20x-usb-power-supply",
112 .consumer_channel = "vbus_v",
113 .adc_channel_label = "vbus_v",
115 .consumer_dev_name = "axp20x-usb-power-supply",
116 .consumer_channel = "vbus_i",
117 .adc_channel_label = "vbus_i",
119 .consumer_dev_name = "axp20x-ac-power-supply",
120 .consumer_channel = "acin_v",
121 .adc_channel_label = "acin_v",
123 .consumer_dev_name = "axp20x-ac-power-supply",
124 .consumer_channel = "acin_i",
125 .adc_channel_label = "acin_i",
127 .consumer_dev_name = "axp20x-battery-power-supply",
128 .consumer_channel = "batt_v",
129 .adc_channel_label = "batt_v",
131 .consumer_dev_name = "axp20x-battery-power-supply",
132 .consumer_channel = "batt_chrg_i",
133 .adc_channel_label = "batt_chrg_i",
135 .consumer_dev_name = "axp20x-battery-power-supply",
136 .consumer_channel = "batt_dischrg_i",
137 .adc_channel_label = "batt_dischrg_i",
138 }, { /* sentinel */ }
141 static struct iio_map axp22x_maps[] = {
143 .consumer_dev_name = "axp20x-battery-power-supply",
144 .consumer_channel = "batt_v",
145 .adc_channel_label = "batt_v",
147 .consumer_dev_name = "axp20x-battery-power-supply",
148 .consumer_channel = "batt_chrg_i",
149 .adc_channel_label = "batt_chrg_i",
151 .consumer_dev_name = "axp20x-battery-power-supply",
152 .consumer_channel = "batt_dischrg_i",
153 .adc_channel_label = "batt_dischrg_i",
154 }, { /* sentinel */ }
158 * Channels are mapped by physical system. Their channels share the same index.
159 * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw.
160 * The only exception is for the battery. batt_v will be in_voltage6_raw and
161 * charge current in_current6_raw and discharge current will be in_current7_raw.
163 static const struct iio_chan_spec axp20x_adc_channels[] = {
164 AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE,
165 AXP20X_ACIN_V_ADC_H),
166 AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT,
167 AXP20X_ACIN_I_ADC_H),
168 AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE,
169 AXP20X_VBUS_V_ADC_H),
170 AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT,
171 AXP20X_VBUS_I_ADC_H),
174 .address = AXP20X_TEMP_ADC_H,
175 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
176 BIT(IIO_CHAN_INFO_SCALE) |
177 BIT(IIO_CHAN_INFO_OFFSET),
178 .datasheet_name = "pmic_temp",
180 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
181 AXP20X_GPIO0_V_ADC_H),
182 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE,
183 AXP20X_GPIO1_V_ADC_H),
184 AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE,
185 AXP20X_IPSOUT_V_HIGH_H),
186 AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE,
188 AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
189 AXP20X_BATT_CHRG_I_H),
190 AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
191 AXP20X_BATT_DISCHRG_I_H),
194 static const struct iio_chan_spec axp22x_adc_channels[] = {
197 .address = AXP22X_PMIC_TEMP_H,
198 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
199 BIT(IIO_CHAN_INFO_SCALE) |
200 BIT(IIO_CHAN_INFO_OFFSET),
201 .datasheet_name = "pmic_temp",
203 AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE,
205 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
206 AXP20X_BATT_CHRG_I_H),
207 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
208 AXP20X_BATT_DISCHRG_I_H),
211 static const struct iio_chan_spec axp813_adc_channels[] = {
214 .address = AXP22X_PMIC_TEMP_H,
215 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
216 BIT(IIO_CHAN_INFO_SCALE) |
217 BIT(IIO_CHAN_INFO_OFFSET),
218 .datasheet_name = "pmic_temp",
220 AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE,
222 AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE,
224 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT,
225 AXP20X_BATT_CHRG_I_H),
226 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT,
227 AXP20X_BATT_DISCHRG_I_H),
230 static int axp20x_adc_raw(struct iio_dev *indio_dev,
231 struct iio_chan_spec const *chan, int *val)
233 struct axp20x_adc_iio *info = iio_priv(indio_dev);
237 * N.B.: Unlike the Chinese datasheets tell, the charging current is
238 * stored on 12 bits, not 13 bits. Only discharging current is on 13
241 if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I)
246 *val = axp20x_read_variable_width(info->regmap, chan->address, size);
253 static int axp22x_adc_raw(struct iio_dev *indio_dev,
254 struct iio_chan_spec const *chan, int *val)
256 struct axp20x_adc_iio *info = iio_priv(indio_dev);
260 * N.B.: Unlike the Chinese datasheets tell, the charging current is
261 * stored on 12 bits, not 13 bits. Only discharging current is on 13
264 if (chan->type == IIO_CURRENT && chan->channel == AXP22X_BATT_DISCHRG_I)
269 *val = axp20x_read_variable_width(info->regmap, chan->address, size);
276 static int axp813_adc_raw(struct iio_dev *indio_dev,
277 struct iio_chan_spec const *chan, int *val)
279 struct axp20x_adc_iio *info = iio_priv(indio_dev);
281 *val = axp20x_read_variable_width(info->regmap, chan->address, 12);
288 static int axp20x_adc_scale_voltage(int channel, int *val, int *val2)
295 return IIO_VAL_INT_PLUS_MICRO;
301 return IIO_VAL_INT_PLUS_MICRO;
306 return IIO_VAL_INT_PLUS_MICRO;
308 case AXP20X_IPSOUT_V:
311 return IIO_VAL_INT_PLUS_MICRO;
318 static int axp813_adc_scale_voltage(int channel, int *val, int *val2)
324 return IIO_VAL_INT_PLUS_MICRO;
329 return IIO_VAL_INT_PLUS_MICRO;
336 static int axp20x_adc_scale_current(int channel, int *val, int *val2)
342 return IIO_VAL_INT_PLUS_MICRO;
347 return IIO_VAL_INT_PLUS_MICRO;
349 case AXP20X_BATT_DISCHRG_I:
350 case AXP20X_BATT_CHRG_I:
353 return IIO_VAL_INT_PLUS_MICRO;
360 static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val,
363 switch (chan->type) {
365 return axp20x_adc_scale_voltage(chan->channel, val, val2);
368 return axp20x_adc_scale_current(chan->channel, val, val2);
379 static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val,
382 switch (chan->type) {
384 if (chan->channel != AXP22X_BATT_V)
389 return IIO_VAL_INT_PLUS_MICRO;
394 return IIO_VAL_INT_PLUS_MICRO;
405 static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val,
408 switch (chan->type) {
410 return axp813_adc_scale_voltage(chan->channel, val, val2);
425 static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel,
428 struct axp20x_adc_iio *info = iio_priv(indio_dev);
431 ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val);
437 *val &= AXP20X_GPIO10_IN_RANGE_GPIO0;
441 *val &= AXP20X_GPIO10_IN_RANGE_GPIO1;
448 *val = *val ? 700000 : 0;
453 static int axp20x_adc_offset(struct iio_dev *indio_dev,
454 struct iio_chan_spec const *chan, int *val)
456 switch (chan->type) {
458 return axp20x_adc_offset_voltage(indio_dev, chan->channel, val);
469 static int axp20x_read_raw(struct iio_dev *indio_dev,
470 struct iio_chan_spec const *chan, int *val,
471 int *val2, long mask)
474 case IIO_CHAN_INFO_OFFSET:
475 return axp20x_adc_offset(indio_dev, chan, val);
477 case IIO_CHAN_INFO_SCALE:
478 return axp20x_adc_scale(chan, val, val2);
480 case IIO_CHAN_INFO_RAW:
481 return axp20x_adc_raw(indio_dev, chan, val);
488 static int axp22x_read_raw(struct iio_dev *indio_dev,
489 struct iio_chan_spec const *chan, int *val,
490 int *val2, long mask)
493 case IIO_CHAN_INFO_OFFSET:
497 case IIO_CHAN_INFO_SCALE:
498 return axp22x_adc_scale(chan, val, val2);
500 case IIO_CHAN_INFO_RAW:
501 return axp22x_adc_raw(indio_dev, chan, val);
508 static int axp813_read_raw(struct iio_dev *indio_dev,
509 struct iio_chan_spec const *chan, int *val,
510 int *val2, long mask)
513 case IIO_CHAN_INFO_OFFSET:
517 case IIO_CHAN_INFO_SCALE:
518 return axp813_adc_scale(chan, val, val2);
520 case IIO_CHAN_INFO_RAW:
521 return axp813_adc_raw(indio_dev, chan, val);
528 static int axp20x_write_raw(struct iio_dev *indio_dev,
529 struct iio_chan_spec const *chan, int val, int val2,
532 struct axp20x_adc_iio *info = iio_priv(indio_dev);
533 unsigned int reg, regval;
536 * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets
537 * for (independently) GPIO0 and GPIO1 when in ADC mode.
539 if (mask != IIO_CHAN_INFO_OFFSET)
542 if (val != 0 && val != 700000)
547 switch (chan->channel) {
549 reg = AXP20X_GPIO10_IN_RANGE_GPIO0;
550 regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(val);
554 reg = AXP20X_GPIO10_IN_RANGE_GPIO1;
555 regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(val);
562 return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg,
566 static const struct iio_info axp20x_adc_iio_info = {
567 .read_raw = axp20x_read_raw,
568 .write_raw = axp20x_write_raw,
571 static const struct iio_info axp22x_adc_iio_info = {
572 .read_raw = axp22x_read_raw,
575 static const struct iio_info axp813_adc_iio_info = {
576 .read_raw = axp813_read_raw,
579 static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate)
581 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
582 AXP20X_ADC_RATE_MASK,
583 AXP20X_ADC_RATE_HZ(rate));
586 static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate)
588 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE,
589 AXP20X_ADC_RATE_MASK,
590 AXP22X_ADC_RATE_HZ(rate));
593 static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate)
595 return regmap_update_bits(info->regmap, AXP813_ADC_RATE,
596 AXP813_ADC_RATE_MASK,
597 AXP813_ADC_RATE_HZ(rate));
601 const struct iio_info *iio_info;
603 struct iio_chan_spec const *channels;
604 unsigned long adc_en1_mask;
605 int (*adc_rate)(struct axp20x_adc_iio *info,
608 struct iio_map *maps;
611 static const struct axp_data axp20x_data = {
612 .iio_info = &axp20x_adc_iio_info,
613 .num_channels = ARRAY_SIZE(axp20x_adc_channels),
614 .channels = axp20x_adc_channels,
615 .adc_en1_mask = AXP20X_ADC_EN1_MASK,
616 .adc_rate = axp20x_adc_rate,
621 static const struct axp_data axp22x_data = {
622 .iio_info = &axp22x_adc_iio_info,
623 .num_channels = ARRAY_SIZE(axp22x_adc_channels),
624 .channels = axp22x_adc_channels,
625 .adc_en1_mask = AXP22X_ADC_EN1_MASK,
626 .adc_rate = axp22x_adc_rate,
631 static const struct axp_data axp813_data = {
632 .iio_info = &axp813_adc_iio_info,
633 .num_channels = ARRAY_SIZE(axp813_adc_channels),
634 .channels = axp813_adc_channels,
635 .adc_en1_mask = AXP22X_ADC_EN1_MASK,
636 .adc_rate = axp813_adc_rate,
641 static const struct of_device_id axp20x_adc_of_match[] = {
642 { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, },
643 { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, },
644 { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, },
647 MODULE_DEVICE_TABLE(of, axp20x_adc_of_match);
649 static const struct platform_device_id axp20x_adc_id_match[] = {
650 { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, },
651 { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, },
652 { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, },
655 MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match);
657 static int axp20x_probe(struct platform_device *pdev)
659 struct axp20x_adc_iio *info;
660 struct iio_dev *indio_dev;
661 struct axp20x_dev *axp20x_dev;
664 axp20x_dev = dev_get_drvdata(pdev->dev.parent);
666 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
670 info = iio_priv(indio_dev);
671 platform_set_drvdata(pdev, indio_dev);
673 info->regmap = axp20x_dev->regmap;
674 indio_dev->dev.parent = &pdev->dev;
675 indio_dev->dev.of_node = pdev->dev.of_node;
676 indio_dev->modes = INDIO_DIRECT_MODE;
678 if (!pdev->dev.of_node) {
679 const struct platform_device_id *id;
681 id = platform_get_device_id(pdev);
682 info->data = (struct axp_data *)id->driver_data;
684 struct device *dev = &pdev->dev;
686 info->data = (struct axp_data *)of_device_get_match_data(dev);
689 indio_dev->name = platform_get_device_id(pdev)->name;
690 indio_dev->info = info->data->iio_info;
691 indio_dev->num_channels = info->data->num_channels;
692 indio_dev->channels = info->data->channels;
694 /* Enable the ADCs on IP */
695 regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask);
697 if (info->data->adc_en2)
698 /* Enable GPIO0/1 and internal temperature ADCs */
699 regmap_update_bits(info->regmap, AXP20X_ADC_EN2,
700 AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK);
702 /* Configure ADCs rate */
703 info->data->adc_rate(info, 100);
705 ret = iio_map_array_register(indio_dev, info->data->maps);
707 dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret);
711 ret = iio_device_register(indio_dev);
713 dev_err(&pdev->dev, "could not register the device\n");
720 iio_map_array_unregister(indio_dev);
723 regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
725 if (info->data->adc_en2)
726 regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
731 static int axp20x_remove(struct platform_device *pdev)
733 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
734 struct axp20x_adc_iio *info = iio_priv(indio_dev);
736 iio_device_unregister(indio_dev);
737 iio_map_array_unregister(indio_dev);
739 regmap_write(info->regmap, AXP20X_ADC_EN1, 0);
741 if (info->data->adc_en2)
742 regmap_write(info->regmap, AXP20X_ADC_EN2, 0);
747 static struct platform_driver axp20x_adc_driver = {
749 .name = "axp20x-adc",
750 .of_match_table = of_match_ptr(axp20x_adc_of_match),
752 .id_table = axp20x_adc_id_match,
753 .probe = axp20x_probe,
754 .remove = axp20x_remove,
757 module_platform_driver(axp20x_adc_driver);
759 MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs");
761 MODULE_LICENSE("GPL");