1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding
4 * pinctrl-bindings.txt for MediaTek SoC.
6 * Copyright (C) 2017-2018 MediaTek Inc.
11 #include <linux/gpio/driver.h>
12 #include "pinctrl-moore.h"
14 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
16 /* Custom pinconf parameters */
17 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
18 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
19 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
20 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
22 static const struct pinconf_generic_params mtk_custom_bindings[] = {
23 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
24 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
25 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
26 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
29 #ifdef CONFIG_DEBUG_FS
30 static const struct pin_config_item mtk_conf_items[] = {
31 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
32 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
33 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
34 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
38 static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
39 unsigned int selector, unsigned int group)
41 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
42 struct function_desc *func;
43 struct group_desc *grp;
46 func = pinmux_generic_get_function(pctldev, selector);
50 grp = pinctrl_generic_get_group(pctldev, group);
54 dev_dbg(pctldev->dev, "enable function %s group %s\n",
55 func->name, grp->name);
57 for (i = 0; i < grp->num_pins; i++) {
58 const struct mtk_pin_desc *desc;
59 int *pin_modes = grp->data;
60 int pin = grp->pins[i];
62 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
66 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
73 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
74 struct pinctrl_gpio_range *range,
77 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
78 const struct mtk_pin_desc *desc;
80 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
84 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
88 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
89 struct pinctrl_gpio_range *range,
90 unsigned int pin, bool input)
92 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
93 const struct mtk_pin_desc *desc;
95 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
99 /* hardware would take 0 as input direction */
100 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
103 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
104 unsigned int pin, unsigned long *config)
106 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
107 u32 param = pinconf_to_config_param(*config);
108 int val, val2, err, reg, ret = 1;
109 const struct mtk_pin_desc *desc;
111 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
116 case PIN_CONFIG_BIAS_DISABLE:
117 if (hw->soc->bias_disable_get) {
118 err = hw->soc->bias_disable_get(hw, desc, &ret);
125 case PIN_CONFIG_BIAS_PULL_UP:
126 if (hw->soc->bias_get) {
127 err = hw->soc->bias_get(hw, desc, 1, &ret);
134 case PIN_CONFIG_BIAS_PULL_DOWN:
135 if (hw->soc->bias_get) {
136 err = hw->soc->bias_get(hw, desc, 0, &ret);
143 case PIN_CONFIG_SLEW_RATE:
144 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val);
152 case PIN_CONFIG_INPUT_ENABLE:
153 case PIN_CONFIG_OUTPUT_ENABLE:
154 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
158 /* HW takes input mode as zero; output mode as non-zero */
159 if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
160 (!val && param == PIN_CONFIG_OUTPUT_ENABLE))
164 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
165 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
169 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2);
177 case PIN_CONFIG_DRIVE_STRENGTH:
178 if (hw->soc->drive_get) {
179 err = hw->soc->drive_get(hw, desc, &ret);
186 case MTK_PIN_CONFIG_TDSEL:
187 case MTK_PIN_CONFIG_RDSEL:
188 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
189 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
191 err = mtk_hw_get_value(hw, desc, reg, &val);
198 case MTK_PIN_CONFIG_PU_ADV:
199 case MTK_PIN_CONFIG_PD_ADV:
200 if (hw->soc->adv_pull_get) {
203 pullup = param == MTK_PIN_CONFIG_PU_ADV;
204 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
215 *config = pinconf_to_config_packed(param, ret);
220 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
221 unsigned long *configs, unsigned int num_configs)
223 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
224 const struct mtk_pin_desc *desc;
228 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
232 for (cfg = 0; cfg < num_configs; cfg++) {
233 param = pinconf_to_config_param(configs[cfg]);
234 arg = pinconf_to_config_argument(configs[cfg]);
237 case PIN_CONFIG_BIAS_DISABLE:
238 if (hw->soc->bias_disable_set) {
239 err = hw->soc->bias_disable_set(hw, desc);
246 case PIN_CONFIG_BIAS_PULL_UP:
247 if (hw->soc->bias_set) {
248 err = hw->soc->bias_set(hw, desc, 1);
255 case PIN_CONFIG_BIAS_PULL_DOWN:
256 if (hw->soc->bias_set) {
257 err = hw->soc->bias_set(hw, desc, 0);
264 case PIN_CONFIG_OUTPUT_ENABLE:
265 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
270 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
275 case PIN_CONFIG_INPUT_ENABLE:
277 if (hw->soc->ies_present) {
278 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES,
282 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
287 case PIN_CONFIG_SLEW_RATE:
288 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR,
294 case PIN_CONFIG_OUTPUT:
295 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
300 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
305 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
306 /* arg = 1: Input mode & SMT enable ;
307 * arg = 0: Output mode & SMT disable
310 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
315 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
320 case PIN_CONFIG_DRIVE_STRENGTH:
321 if (hw->soc->drive_set) {
322 err = hw->soc->drive_set(hw, desc, arg);
329 case MTK_PIN_CONFIG_TDSEL:
330 case MTK_PIN_CONFIG_RDSEL:
331 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
332 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
334 err = mtk_hw_set_value(hw, desc, reg, arg);
338 case MTK_PIN_CONFIG_PU_ADV:
339 case MTK_PIN_CONFIG_PD_ADV:
340 if (hw->soc->adv_pull_set) {
343 pullup = param == MTK_PIN_CONFIG_PU_ADV;
344 err = hw->soc->adv_pull_set(hw, desc, pullup,
360 static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev,
361 unsigned int group, unsigned long *config)
363 const unsigned int *pins;
364 unsigned int i, npins, old = 0;
367 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
371 for (i = 0; i < npins; i++) {
372 if (mtk_pinconf_get(pctldev, pins[i], config))
375 /* configs do not match between two pins */
376 if (i && old != *config)
385 static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev,
386 unsigned int group, unsigned long *configs,
387 unsigned int num_configs)
389 const unsigned int *pins;
390 unsigned int i, npins;
393 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
397 for (i = 0; i < npins; i++) {
398 ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs);
406 static const struct pinctrl_ops mtk_pctlops = {
407 .get_groups_count = pinctrl_generic_get_group_count,
408 .get_group_name = pinctrl_generic_get_group_name,
409 .get_group_pins = pinctrl_generic_get_group_pins,
410 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
411 .dt_free_map = pinconf_generic_dt_free_map,
414 static const struct pinmux_ops mtk_pmxops = {
415 .get_functions_count = pinmux_generic_get_function_count,
416 .get_function_name = pinmux_generic_get_function_name,
417 .get_function_groups = pinmux_generic_get_function_groups,
418 .set_mux = mtk_pinmux_set_mux,
419 .gpio_request_enable = mtk_pinmux_gpio_request_enable,
420 .gpio_set_direction = mtk_pinmux_gpio_set_direction,
424 static const struct pinconf_ops mtk_confops = {
426 .pin_config_get = mtk_pinconf_get,
427 .pin_config_set = mtk_pinconf_set,
428 .pin_config_group_get = mtk_pinconf_group_get,
429 .pin_config_group_set = mtk_pinconf_group_set,
430 .pin_config_config_dbg_show = pinconf_generic_dump_config,
433 static struct pinctrl_desc mtk_desc = {
434 .name = PINCTRL_PINCTRL_DEV,
435 .pctlops = &mtk_pctlops,
436 .pmxops = &mtk_pmxops,
437 .confops = &mtk_confops,
438 .owner = THIS_MODULE,
441 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
443 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
444 const struct mtk_pin_desc *desc;
447 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
451 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
458 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
460 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
461 const struct mtk_pin_desc *desc;
463 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
465 dev_err(hw->dev, "Failed to set gpio %d\n", gpio);
469 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
472 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
474 return pinctrl_gpio_direction_input(chip->base + gpio);
477 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
480 mtk_gpio_set(chip, gpio, value);
482 return pinctrl_gpio_direction_output(chip->base + gpio);
485 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
487 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
488 const struct mtk_pin_desc *desc;
493 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
495 if (desc->eint.eint_n == (u16)EINT_NA)
498 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
501 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
502 unsigned long config)
504 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
505 const struct mtk_pin_desc *desc;
508 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
513 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
514 desc->eint.eint_n == (u16)EINT_NA)
517 debounce = pinconf_to_config_argument(config);
519 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
522 static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np)
524 struct gpio_chip *chip = &hw->chip;
527 chip->label = PINCTRL_PINCTRL_DEV;
528 chip->parent = hw->dev;
529 chip->request = gpiochip_generic_request;
530 chip->free = gpiochip_generic_free;
531 chip->direction_input = mtk_gpio_direction_input;
532 chip->direction_output = mtk_gpio_direction_output;
533 chip->get = mtk_gpio_get;
534 chip->set = mtk_gpio_set;
535 chip->to_irq = mtk_gpio_to_irq;
536 chip->set_config = mtk_gpio_set_config;
538 chip->ngpio = hw->soc->npins;
540 chip->of_gpio_n_cells = 2;
542 ret = gpiochip_add_data(chip, hw);
546 /* Just for backward compatible for these old pinctrl nodes without
547 * "gpio-ranges" property. Otherwise, called directly from a
548 * DeviceTree-supported pinctrl driver is DEPRECATED.
549 * Please see Section 2.1 of
550 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
551 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
553 if (!of_find_property(np, "gpio-ranges", NULL)) {
554 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0,
557 gpiochip_remove(chip);
565 static int mtk_build_groups(struct mtk_pinctrl *hw)
569 for (i = 0; i < hw->soc->ngrps; i++) {
570 const struct group_desc *group = hw->soc->grps + i;
572 err = pinctrl_generic_add_group(hw->pctrl, group->name,
573 group->pins, group->num_pins,
576 dev_err(hw->dev, "Failed to register group %s\n",
585 static int mtk_build_functions(struct mtk_pinctrl *hw)
589 for (i = 0; i < hw->soc->nfuncs ; i++) {
590 const struct function_desc *func = hw->soc->funcs + i;
592 err = pinmux_generic_add_function(hw->pctrl, func->name,
594 func->num_group_names,
597 dev_err(hw->dev, "Failed to register function %s\n",
606 int mtk_moore_pinctrl_probe(struct platform_device *pdev,
607 const struct mtk_pin_soc *soc)
609 struct pinctrl_pin_desc *pins;
610 struct mtk_pinctrl *hw;
613 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
618 hw->dev = &pdev->dev;
620 if (!hw->soc->nbase_names) {
622 "SoC should be assigned at least one register base\n");
626 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
627 sizeof(*hw->base), GFP_KERNEL);
631 for (i = 0; i < hw->soc->nbase_names; i++) {
632 hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
633 hw->soc->base_names[i]);
634 if (IS_ERR(hw->base[i]))
635 return PTR_ERR(hw->base[i]);
638 hw->nbase = hw->soc->nbase_names;
640 spin_lock_init(&hw->lock);
642 /* Copy from internal struct mtk_pin_desc to register to the core */
643 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
648 for (i = 0; i < hw->soc->npins; i++) {
649 pins[i].number = hw->soc->pins[i].number;
650 pins[i].name = hw->soc->pins[i].name;
653 /* Setup pins descriptions per SoC types */
654 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
655 mtk_desc.npins = hw->soc->npins;
656 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
657 mtk_desc.custom_params = mtk_custom_bindings;
658 #ifdef CONFIG_DEBUG_FS
659 mtk_desc.custom_conf_items = mtk_conf_items;
662 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
667 /* Setup groups descriptions per SoC types */
668 err = mtk_build_groups(hw);
670 dev_err(&pdev->dev, "Failed to build groups\n");
674 /* Setup functions descriptions per SoC types */
675 err = mtk_build_functions(hw);
677 dev_err(&pdev->dev, "Failed to build functions\n");
681 /* For able to make pinctrl_claim_hogs, we must not enable pinctrl
682 * until all groups and functions are being added one.
684 err = pinctrl_enable(hw->pctrl);
688 err = mtk_build_eint(hw, pdev);
691 "Failed to add EINT, but pinctrl still can work\n");
693 /* Build gpiochip should be after pinctrl_enable is done */
694 err = mtk_build_gpiochip(hw, pdev->dev.of_node);
696 dev_err(&pdev->dev, "Failed to add gpio_chip\n");
700 platform_set_drvdata(pdev, hw);