drivers/counter/stm32-lptimer-cnt.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * STM32 Low-Power Timer Encoder and Counter driver
   4  *
   5  * Copyright (C) STMicroelectronics 2017
   6  *
   7  * Author: Fabrice Gasnier <[email protected]>
   8  *
   9  * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
  10  *
  11  */
  12
  13 #include <linux/bitfield.h>
  14 #include <linux/counter.h>
  15 #include <linux/mfd/stm32-lptimer.h>
  16 #include <linux/mod_devicetable.h>
  17 #include <linux/module.h>
  18 #include <linux/pinctrl/consumer.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/types.h>
  21
  22 struct stm32_lptim_cnt {
  23         struct counter_device counter;
  24         struct device *dev;
  25         struct regmap *regmap;
  26         struct clk *clk;
  27         u32 ceiling;
  28         u32 polarity;
  29         u32 quadrature_mode;
  30         bool enabled;
  31 };
  32
  33 static int stm32_lptim_is_enabled(struct stm32_lptim_cnt *priv)
  34 {
  35         u32 val;
  36         int ret;
  37
  38         ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val);
  39         if (ret)
  40                 return ret;
  41
  42         return FIELD_GET(STM32_LPTIM_ENABLE, val);
  43 }
  44
  45 static int stm32_lptim_set_enable_state(struct stm32_lptim_cnt *priv,
  46                                         int enable)
  47 {
  48         int ret;
  49         u32 val;
  50
  51         val = FIELD_PREP(STM32_LPTIM_ENABLE, enable);
  52         ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val);
  53         if (ret)
  54                 return ret;
  55
  56         if (!enable) {
  57                 clk_disable(priv->clk);
  58                 priv->enabled = false;
  59                 return 0;
  60         }
  61
  62         /* LP timer must be enabled before writing CMP & ARR */
  63         ret = regmap_write(priv->regmap, STM32_LPTIM_ARR, priv->ceiling);
  64         if (ret)
  65                 return ret;
  66
  67         ret = regmap_write(priv->regmap, STM32_LPTIM_CMP, 0);
  68         if (ret)
  69                 return ret;
  70
  71         /* ensure CMP & ARR registers are properly written */
  72         ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,
  73                                        (val & STM32_LPTIM_CMPOK_ARROK),
  74                                        100, 1000);
  75         if (ret)
  76                 return ret;
  77
  78         ret = regmap_write(priv->regmap, STM32_LPTIM_ICR,
  79                            STM32_LPTIM_CMPOKCF_ARROKCF);
  80         if (ret)
  81                 return ret;
  82
  83         ret = clk_enable(priv->clk);
  84         if (ret) {
  85                 regmap_write(priv->regmap, STM32_LPTIM_CR, 0);
  86                 return ret;
  87         }
  88         priv->enabled = true;
  89
  90         /* Start LP timer in continuous mode */
  91         return regmap_update_bits(priv->regmap, STM32_LPTIM_CR,
  92                                   STM32_LPTIM_CNTSTRT, STM32_LPTIM_CNTSTRT);
  93 }
  94
  95 static int stm32_lptim_setup(struct stm32_lptim_cnt *priv, int enable)
  96 {
  97         u32 mask = STM32_LPTIM_ENC | STM32_LPTIM_COUNTMODE |
  98                    STM32_LPTIM_CKPOL | STM32_LPTIM_PRESC;
  99         u32 val;
 100
 101         /* Setup LP timer encoder/counter and polarity, without prescaler */
 102         if (priv->quadrature_mode)
 103                 val = enable ? STM32_LPTIM_ENC : 0;
 104         else
 105                 val = enable ? STM32_LPTIM_COUNTMODE : 0;
 106         val |= FIELD_PREP(STM32_LPTIM_CKPOL, enable ? priv->polarity : 0);
 107
 108         return regmap_update_bits(priv->regmap, STM32_LPTIM_CFGR, mask, val);
 109 }
 110
 111 /*
 112  * In non-quadrature mode, device counts up on active edge.
 113  * In quadrature mode, encoder counting scenarios are as follows:
 114  * +---------+----------+--------------------+--------------------+
 115  * | Active  | Level on |      IN1 signal    |     IN2 signal     |
 116  * | edge    | opposite +----------+---------+----------+---------+
 117  * |         | signal   |  Rising  | Falling |  Rising  | Falling |
 118  * +---------+----------+----------+---------+----------+---------+
 119  * | Rising  | High ->  |   Down   |    -    |   Up     |    -    |
 120  * | edge    | Low  ->  |   Up     |    -    |   Down   |    -    |
 121  * +---------+----------+----------+---------+----------+---------+
 122  * | Falling | High ->  |    -     |   Up    |    -     |   Down  |
 123  * | edge    | Low  ->  |    -     |   Down  |    -     |   Up    |
 124  * +---------+----------+----------+---------+----------+---------+
 125  * | Both    | High ->  |   Down   |   Up    |   Up     |   Down  |
 126  * | edges   | Low  ->  |   Up     |   Down  |   Down   |   Up    |
 127  * +---------+----------+----------+---------+----------+---------+
 128  */
 129 static const enum counter_function stm32_lptim_cnt_functions[] = {
 130         COUNTER_FUNCTION_INCREASE,
 131         COUNTER_FUNCTION_QUADRATURE_X4,
 132 };
 133
 134 static const enum counter_synapse_action stm32_lptim_cnt_synapse_actions[] = {
 135         COUNTER_SYNAPSE_ACTION_RISING_EDGE,
 136         COUNTER_SYNAPSE_ACTION_FALLING_EDGE,
 137         COUNTER_SYNAPSE_ACTION_BOTH_EDGES,
 138         COUNTER_SYNAPSE_ACTION_NONE,
 139 };
 140
 141 static int stm32_lptim_cnt_read(struct counter_device *counter,
 142                                 struct counter_count *count, u64 *val)
 143 {
 144         struct stm32_lptim_cnt *const priv = counter->priv;
 145         u32 cnt;
 146         int ret;
 147
 148         ret = regmap_read(priv->regmap, STM32_LPTIM_CNT, &cnt);
 149         if (ret)
 150                 return ret;
 151
 152         *val = cnt;
 153
 154         return 0;
 155 }
 156
 157 static int stm32_lptim_cnt_function_read(struct counter_device *counter,
 158                                          struct counter_count *count,
 159                                          enum counter_function *function)
 160 {
 161         struct stm32_lptim_cnt *const priv = counter->priv;
 162
 163         if (!priv->quadrature_mode) {
 164                 *function = COUNTER_FUNCTION_INCREASE;
 165                 return 0;
 166         }
 167
 168         if (priv->polarity == STM32_LPTIM_CKPOL_BOTH_EDGES) {
 169                 *function = COUNTER_FUNCTION_QUADRATURE_X4;
 170                 return 0;
 171         }
 172
 173         return -EINVAL;
 174 }
 175
 176 static int stm32_lptim_cnt_function_write(struct counter_device *counter,
 177                                           struct counter_count *count,
 178                                           enum counter_function function)
 179 {
 180         struct stm32_lptim_cnt *const priv = counter->priv;
 181
 182         if (stm32_lptim_is_enabled(priv))
 183                 return -EBUSY;
 184
 185         switch (function) {
 186         case COUNTER_FUNCTION_INCREASE:
 187                 priv->quadrature_mode = 0;
 188                 return 0;
 189         case COUNTER_FUNCTION_QUADRATURE_X4:
 190                 priv->quadrature_mode = 1;
 191                 priv->polarity = STM32_LPTIM_CKPOL_BOTH_EDGES;
 192                 return 0;
 193         default:
 194                 /* should never reach this path */
 195                 return -EINVAL;
 196         }
 197 }
 198
 199 static int stm32_lptim_cnt_enable_read(struct counter_device *counter,
 200                                        struct counter_count *count,
 201                                        u8 *enable)
 202 {
 203         struct stm32_lptim_cnt *const priv = counter->priv;
 204         int ret;
 205
 206         ret = stm32_lptim_is_enabled(priv);
 207         if (ret < 0)
 208                 return ret;
 209
 210         *enable = ret;
 211
 212         return 0;
 213 }
 214
 215 static int stm32_lptim_cnt_enable_write(struct counter_device *counter,
 216                                         struct counter_count *count,
 217                                         u8 enable)
 218 {
 219         struct stm32_lptim_cnt *const priv = counter->priv;
 220         int ret;
 221
 222         /* Check nobody uses the timer, or already disabled/enabled */
 223         ret = stm32_lptim_is_enabled(priv);
 224         if ((ret < 0) || (!ret && !enable))
 225                 return ret;
 226         if (enable && ret)
 227                 return -EBUSY;
 228
 229         ret = stm32_lptim_setup(priv, enable);
 230         if (ret)
 231                 return ret;
 232
 233         ret = stm32_lptim_set_enable_state(priv, enable);
 234         if (ret)
 235                 return ret;
 236
 237         return 0;
 238 }
 239
 240 static int stm32_lptim_cnt_ceiling_read(struct counter_device *counter,
 241                                         struct counter_count *count,
 242                                         u64 *ceiling)
 243 {
 244         struct stm32_lptim_cnt *const priv = counter->priv;
 245
 246         *ceiling = priv->ceiling;
 247
 248         return 0;
 249 }
 250
 251 static int stm32_lptim_cnt_ceiling_write(struct counter_device *counter,
 252                                          struct counter_count *count,
 253                                          u64 ceiling)
 254 {
 255         struct stm32_lptim_cnt *const priv = counter->priv;
 256
 257         if (stm32_lptim_is_enabled(priv))
 258                 return -EBUSY;
 259
 260         if (ceiling > STM32_LPTIM_MAX_ARR)
 261                 return -ERANGE;
 262
 263         priv->ceiling = ceiling;
 264
 265         return 0;
 266 }
 267
 268 static struct counter_comp stm32_lptim_cnt_ext[] = {
 269         COUNTER_COMP_ENABLE(stm32_lptim_cnt_enable_read,
 270                             stm32_lptim_cnt_enable_write),
 271         COUNTER_COMP_CEILING(stm32_lptim_cnt_ceiling_read,
 272                              stm32_lptim_cnt_ceiling_write),
 273 };
 274
 275 static int stm32_lptim_cnt_action_read(struct counter_device *counter,
 276                                        struct counter_count *count,
 277                                        struct counter_synapse *synapse,
 278                                        enum counter_synapse_action *action)
 279 {
 280         struct stm32_lptim_cnt *const priv = counter->priv;
 281         enum counter_function function;
 282         int err;
 283
 284         err = stm32_lptim_cnt_function_read(counter, count, &function);
 285         if (err)
 286                 return err;
 287
 288         switch (function) {
 289         case COUNTER_FUNCTION_INCREASE:
 290                 /* LP Timer acts as up-counter on input 1 */
 291                 if (synapse->signal->id != count->synapses[0].signal->id) {
 292                         *action = COUNTER_SYNAPSE_ACTION_NONE;
 293                         return 0;
 294                 }
 295
 296                 switch (priv->polarity) {
 297                 case STM32_LPTIM_CKPOL_RISING_EDGE:
 298                         *action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;
 299                         return 0;
 300                 case STM32_LPTIM_CKPOL_FALLING_EDGE:
 301                         *action = COUNTER_SYNAPSE_ACTION_FALLING_EDGE;
 302                         return 0;
 303                 case STM32_LPTIM_CKPOL_BOTH_EDGES:
 304                         *action = COUNTER_SYNAPSE_ACTION_BOTH_EDGES;
 305                         return 0;
 306                 default:
 307                         /* should never reach this path */
 308                         return -EINVAL;
 309                 }
 310         case COUNTER_FUNCTION_QUADRATURE_X4:
 311                 *action = COUNTER_SYNAPSE_ACTION_BOTH_EDGES;
 312                 return 0;
 313         default:
 314                 /* should never reach this path */
 315                 return -EINVAL;
 316         }
 317 }
 318
 319 static int stm32_lptim_cnt_action_write(struct counter_device *counter,
 320                                         struct counter_count *count,
 321                                         struct counter_synapse *synapse,
 322                                         enum counter_synapse_action action)
 323 {
 324         struct stm32_lptim_cnt *const priv = counter->priv;
 325         enum counter_function function;
 326         int err;
 327
 328         if (stm32_lptim_is_enabled(priv))
 329                 return -EBUSY;
 330
 331         err = stm32_lptim_cnt_function_read(counter, count, &function);
 332         if (err)
 333                 return err;
 334
 335         /* only set polarity when in counter mode (on input 1) */
 336         if (function != COUNTER_FUNCTION_INCREASE
 337             || synapse->signal->id != count->synapses[0].signal->id)
 338                 return -EINVAL;
 339
 340         switch (action) {
 341         case COUNTER_SYNAPSE_ACTION_RISING_EDGE:
 342                 priv->polarity = STM32_LPTIM_CKPOL_RISING_EDGE;
 343                 return 0;
 344         case COUNTER_SYNAPSE_ACTION_FALLING_EDGE:
 345                 priv->polarity = STM32_LPTIM_CKPOL_FALLING_EDGE;
 346                 return 0;
 347         case COUNTER_SYNAPSE_ACTION_BOTH_EDGES:
 348                 priv->polarity = STM32_LPTIM_CKPOL_BOTH_EDGES;
 349                 return 0;
 350         default:
 351                 return -EINVAL;
 352         }
 353 }
 354
 355 static const struct counter_ops stm32_lptim_cnt_ops = {
 356         .count_read = stm32_lptim_cnt_read,
 357         .function_read = stm32_lptim_cnt_function_read,
 358         .function_write = stm32_lptim_cnt_function_write,
 359         .action_read = stm32_lptim_cnt_action_read,
 360         .action_write = stm32_lptim_cnt_action_write,
 361 };
 362
 363 static struct counter_signal stm32_lptim_cnt_signals[] = {
 364         {
 365                 .id = 0,
 366                 .name = "Channel 1 Quadrature A"
 367         },
 368         {
 369                 .id = 1,
 370                 .name = "Channel 1 Quadrature B"
 371         }
 372 };
 373
 374 static struct counter_synapse stm32_lptim_cnt_synapses[] = {
 375         {
 376                 .actions_list = stm32_lptim_cnt_synapse_actions,
 377                 .num_actions = ARRAY_SIZE(stm32_lptim_cnt_synapse_actions),
 378                 .signal = &stm32_lptim_cnt_signals[0]
 379         },
 380         {
 381                 .actions_list = stm32_lptim_cnt_synapse_actions,
 382                 .num_actions = ARRAY_SIZE(stm32_lptim_cnt_synapse_actions),
 383                 .signal = &stm32_lptim_cnt_signals[1]
 384         }
 385 };
 386
 387 /* LP timer with encoder */
 388 static struct counter_count stm32_lptim_enc_counts = {
 389         .id = 0,
 390         .name = "LPTimer Count",
 391         .functions_list = stm32_lptim_cnt_functions,
 392         .num_functions = ARRAY_SIZE(stm32_lptim_cnt_functions),
 393         .synapses = stm32_lptim_cnt_synapses,
 394         .num_synapses = ARRAY_SIZE(stm32_lptim_cnt_synapses),
 395         .ext = stm32_lptim_cnt_ext,
 396         .num_ext = ARRAY_SIZE(stm32_lptim_cnt_ext)
 397 };
 398
 399 /* LP timer without encoder (counter only) */
 400 static struct counter_count stm32_lptim_in1_counts = {
 401         .id = 0,
 402         .name = "LPTimer Count",
 403         .functions_list = stm32_lptim_cnt_functions,
 404         .num_functions = 1,
 405         .synapses = stm32_lptim_cnt_synapses,
 406         .num_synapses = 1,
 407         .ext = stm32_lptim_cnt_ext,
 408         .num_ext = ARRAY_SIZE(stm32_lptim_cnt_ext)
 409 };
 410
 411 static int stm32_lptim_cnt_probe(struct platform_device *pdev)
 412 {
 413         struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent);
 414         struct stm32_lptim_cnt *priv;
 415
 416         if (IS_ERR_OR_NULL(ddata))
 417                 return -EINVAL;
 418
 419         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 420         if (!priv)
 421                 return -ENOMEM;
 422
 423         priv->dev = &pdev->dev;
 424         priv->regmap = ddata->regmap;
 425         priv->clk = ddata->clk;
 426         priv->ceiling = STM32_LPTIM_MAX_ARR;
 427
 428         /* Initialize Counter device */
 429         priv->counter.name = dev_name(&pdev->dev);
 430         priv->counter.parent = &pdev->dev;
 431         priv->counter.ops = &stm32_lptim_cnt_ops;
 432         if (ddata->has_encoder) {
 433                 priv->counter.counts = &stm32_lptim_enc_counts;
 434                 priv->counter.num_signals = ARRAY_SIZE(stm32_lptim_cnt_signals);
 435         } else {
 436                 priv->counter.counts = &stm32_lptim_in1_counts;
 437                 priv->counter.num_signals = 1;
 438         }
 439         priv->counter.num_counts = 1;
 440         priv->counter.signals = stm32_lptim_cnt_signals;
 441         priv->counter.priv = priv;
 442
 443         platform_set_drvdata(pdev, priv);
 444
 445         return devm_counter_register(&pdev->dev, &priv->counter);
 446 }
 447
 448 #ifdef CONFIG_PM_SLEEP
 449 static int stm32_lptim_cnt_suspend(struct device *dev)
 450 {
 451         struct stm32_lptim_cnt *priv = dev_get_drvdata(dev);
 452         int ret;
 453
 454         /* Only take care of enabled counter: don't disturb other MFD child */
 455         if (priv->enabled) {
 456                 ret = stm32_lptim_setup(priv, 0);
 457                 if (ret)
 458                         return ret;
 459
 460                 ret = stm32_lptim_set_enable_state(priv, 0);
 461                 if (ret)
 462                         return ret;
 463
 464                 /* Force enable state for later resume */
 465                 priv->enabled = true;
 466         }
 467
 468         return pinctrl_pm_select_sleep_state(dev);
 469 }
 470
 471 static int stm32_lptim_cnt_resume(struct device *dev)
 472 {
 473         struct stm32_lptim_cnt *priv = dev_get_drvdata(dev);
 474         int ret;
 475
 476         ret = pinctrl_pm_select_default_state(dev);
 477         if (ret)
 478                 return ret;
 479
 480         if (priv->enabled) {
 481                 priv->enabled = false;
 482                 ret = stm32_lptim_setup(priv, 1);
 483                 if (ret)
 484                         return ret;
 485
 486                 ret = stm32_lptim_set_enable_state(priv, 1);
 487                 if (ret)
 488                         return ret;
 489         }
 490
 491         return 0;
 492 }
 493 #endif
 494
 495 static SIMPLE_DEV_PM_OPS(stm32_lptim_cnt_pm_ops, stm32_lptim_cnt_suspend,
 496                          stm32_lptim_cnt_resume);
 497
 498 static const struct of_device_id stm32_lptim_cnt_of_match[] = {
 499         { .compatible = "st,stm32-lptimer-counter", },
 500         {},
 501 };
 502 MODULE_DEVICE_TABLE(of, stm32_lptim_cnt_of_match);
 503
 504 static struct platform_driver stm32_lptim_cnt_driver = {
 505         .probe = stm32_lptim_cnt_probe,
 506         .driver = {
 507                 .name = "stm32-lptimer-counter",
 508                 .of_match_table = stm32_lptim_cnt_of_match,
 509                 .pm = &stm32_lptim_cnt_pm_ops,
 510         },
 511 };
 512 module_platform_driver(stm32_lptim_cnt_driver);
 513
 514 MODULE_AUTHOR("Fabrice Gasnier <[email protected]>");
 515 MODULE_ALIAS("platform:stm32-lptimer-counter");
 516 MODULE_DESCRIPTION("STMicroelectronics STM32 LPTIM counter driver");
 517 MODULE_LICENSE("GPL v2");