1 /* SPDX-License-Identifier: GPL-2.0-only */
2 #ifndef _ASM_X86_APIC_H
3 #define _ASM_X86_APIC_H
5 #include <linux/cpumask.h>
6 #include <linux/static_call.h>
8 #include <asm/alternative.h>
9 #include <asm/cpufeature.h>
10 #include <asm/apicdef.h>
11 #include <linux/atomic.h>
12 #include <asm/fixmap.h>
13 #include <asm/mpspec.h>
15 #include <asm/hardirq.h>
17 #define ARCH_APICTIMER_STOPS_ON_C3 1
23 #define APIC_VERBOSE 1
26 /* Macros for apic_extnmi which controls external NMI masking */
27 #define APIC_EXTNMI_BSP 0 /* Default */
28 #define APIC_EXTNMI_ALL 1
29 #define APIC_EXTNMI_NONE 2
32 * Define the default level of output to be very little
33 * This can be turned up by using apic=verbose for more
34 * information and apic=debug for _lots_ of information.
35 * apic_verbosity is defined in apic.c
37 #define apic_printk(v, s, a...) do { \
38 if ((v) <= apic_verbosity) \
43 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
44 extern void x86_32_probe_apic(void);
46 static inline void x86_32_probe_apic(void) { }
49 #ifdef CONFIG_X86_LOCAL_APIC
51 extern int apic_verbosity;
52 extern int local_apic_timer_c2_ok;
54 extern bool apic_is_disabled;
55 extern unsigned int lapic_timer_period;
57 extern int cpuid_to_apicid[];
59 extern enum apic_intr_mode_id apic_intr_mode;
60 enum apic_intr_mode_id {
63 APIC_VIRTUAL_WIRE_NO_CONFIG,
65 APIC_SYMMETRIC_IO_NO_ROUTING
69 * With 82489DX we can't rely on apic feature bit
70 * retrieved via cpuid but still have to deal with
71 * such an apic chip so we assume that SMP configuration
72 * is found from MP table (64bit case uses ACPI mostly
73 * which set smp presence flag as well so we are safe
74 * to use this helper too).
76 static inline bool apic_from_smp_config(void)
78 return smp_found_config && !apic_is_disabled;
82 * Basic functions accessing APICs.
84 #ifdef CONFIG_PARAVIRT
85 #include <asm/paravirt.h>
88 static inline void native_apic_mem_write(u32 reg, u32 v)
90 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
92 alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP,
93 ASM_OUTPUT2("=r" (v), "=m" (*addr)),
94 ASM_OUTPUT2("0" (v), "m" (*addr)));
97 static inline u32 native_apic_mem_read(u32 reg)
99 return *((volatile u32 *)(APIC_BASE + reg));
102 static inline void native_apic_mem_eoi(void)
104 native_apic_mem_write(APIC_EOI, APIC_EOI_ACK);
107 extern void native_apic_icr_write(u32 low, u32 id);
108 extern u64 native_apic_icr_read(void);
110 static inline bool apic_is_x2apic_enabled(void)
114 if (rdmsrl_safe(MSR_IA32_APICBASE, &msr))
116 return msr & X2APIC_ENABLE;
119 extern void enable_IR_x2apic(void);
121 extern int get_physical_broadcast(void);
123 extern int lapic_get_maxlvt(void);
124 extern void clear_local_APIC(void);
125 extern void disconnect_bsp_APIC(int virt_wire_setup);
126 extern void disable_local_APIC(void);
127 extern void apic_soft_disable(void);
128 extern void lapic_shutdown(void);
129 extern void sync_Arb_IDs(void);
130 extern void init_bsp_APIC(void);
131 extern void apic_intr_mode_select(void);
132 extern void apic_intr_mode_init(void);
133 extern void init_apic_mappings(void);
134 void register_lapic_address(unsigned long address);
135 extern void setup_boot_APIC_clock(void);
136 extern void setup_secondary_APIC_clock(void);
137 extern void lapic_update_tsc_freq(void);
140 static inline bool apic_force_enable(unsigned long addr)
145 extern bool apic_force_enable(unsigned long addr);
148 extern void apic_ap_setup(void);
151 * On 32bit this is mach-xxx local
154 extern int apic_is_clustered_box(void);
156 static inline int apic_is_clustered_box(void)
162 extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask);
163 extern void lapic_assign_system_vectors(void);
164 extern void lapic_assign_legacy_vector(unsigned int isairq, bool replace);
165 extern void lapic_update_legacy_vectors(void);
166 extern void lapic_online(void);
167 extern void lapic_offline(void);
168 extern bool apic_needs_pit(void);
170 extern void apic_send_IPI_allbutself(unsigned int vector);
172 #else /* !CONFIG_X86_LOCAL_APIC */
173 static inline void lapic_shutdown(void) { }
174 #define local_apic_timer_c2_ok 1
175 static inline void init_apic_mappings(void) { }
176 static inline void disable_local_APIC(void) { }
177 # define setup_boot_APIC_clock x86_init_noop
178 # define setup_secondary_APIC_clock x86_init_noop
179 static inline void lapic_update_tsc_freq(void) { }
180 static inline void init_bsp_APIC(void) { }
181 static inline void apic_intr_mode_select(void) { }
182 static inline void apic_intr_mode_init(void) { }
183 static inline void lapic_assign_system_vectors(void) { }
184 static inline void lapic_assign_legacy_vector(unsigned int i, bool r) { }
185 static inline bool apic_needs_pit(void) { return true; }
186 #endif /* !CONFIG_X86_LOCAL_APIC */
188 #ifdef CONFIG_X86_X2APIC
189 static inline void native_apic_msr_write(u32 reg, u32 v)
191 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
195 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
198 static inline void native_apic_msr_eoi(void)
200 __wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);
203 static inline u32 native_apic_msr_read(u32 reg)
210 rdmsrl(APIC_BASE_MSR + (reg >> 4), msr);
214 static inline void native_x2apic_icr_write(u32 low, u32 id)
216 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
219 static inline u64 native_x2apic_icr_read(void)
223 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
227 extern int x2apic_mode;
228 extern int x2apic_phys;
229 extern void __init x2apic_set_max_apicid(u32 apicid);
230 extern void x2apic_setup(void);
231 static inline int x2apic_enabled(void)
233 return boot_cpu_has(X86_FEATURE_X2APIC) && apic_is_x2apic_enabled();
236 #define x2apic_supported() (boot_cpu_has(X86_FEATURE_X2APIC))
237 #else /* !CONFIG_X86_X2APIC */
238 static inline void x2apic_setup(void) { }
239 static inline int x2apic_enabled(void) { return 0; }
240 static inline u32 native_apic_msr_read(u32 reg) { BUG(); }
241 #define x2apic_mode (0)
242 #define x2apic_supported() (0)
243 #endif /* !CONFIG_X86_X2APIC */
244 extern void __init check_x2apic(void);
249 * Copyright 2004 James Cleverdon, IBM.
251 * Generic APIC sub-arch data struct.
253 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
254 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
258 /* Hotpath functions first */
260 void (*native_eoi)(void);
261 void (*write)(u32 reg, u32 v);
262 u32 (*read)(u32 reg);
264 /* IPI related functions */
265 void (*wait_icr_idle)(void);
266 u32 (*safe_wait_icr_idle)(void);
268 void (*send_IPI)(int cpu, int vector);
269 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
270 void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec);
271 void (*send_IPI_allbutself)(int vector);
272 void (*send_IPI_all)(int vector);
273 void (*send_IPI_self)(int vector);
275 enum apic_delivery_modes delivery_mode;
278 dest_mode_logical : 1,
279 x2apic_set_max_apicid : 1;
281 u32 (*calc_dest_apicid)(unsigned int cpu);
283 /* ICR related functions */
284 u64 (*icr_read)(void);
285 void (*icr_write)(u32 low, u32 high);
287 /* The limit of the APIC ID space. */
290 /* Probe, setup and smpboot functions */
292 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
293 bool (*apic_id_registered)(void);
295 bool (*check_apicid_used)(physid_mask_t *map, int apicid);
296 void (*init_apic_ldr)(void);
297 void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap);
298 int (*cpu_present_to_apicid)(int mps_cpu);
299 int (*phys_pkg_id)(int cpuid_apic, int index_msb);
301 u32 (*get_apic_id)(unsigned long x);
302 u32 (*set_apic_id)(unsigned int id);
304 /* wakeup_secondary_cpu */
305 int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
306 /* wakeup secondary CPU using 64-bit wakeup point */
307 int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
312 struct apic_override {
314 void (*native_eoi)(void);
315 void (*write)(u32 reg, u32 v);
316 u32 (*read)(u32 reg);
317 void (*send_IPI)(int cpu, int vector);
318 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
319 void (*send_IPI_mask_allbutself)(const struct cpumask *msk, int vec);
320 void (*send_IPI_allbutself)(int vector);
321 void (*send_IPI_all)(int vector);
322 void (*send_IPI_self)(int vector);
323 u64 (*icr_read)(void);
324 void (*icr_write)(u32 low, u32 high);
325 int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
326 int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip);
330 * Pointer to the local APIC driver in use on this system (there's
331 * always just one such driver in use - the kernel decides via an
332 * early probing process which one it picks - and then sticks to it):
334 extern struct apic *apic;
337 * APIC drivers are probed based on how they are listed in the .apicdrivers
338 * section. So the order is important and enforced by the ordering
339 * of different apic driver files in the Makefile.
341 * For the files having two apic drivers, we use apic_drivers()
342 * to enforce the order with in them.
344 #define apic_driver(sym) \
345 static const struct apic *__apicdrivers_##sym __used \
346 __aligned(sizeof(struct apic *)) \
347 __section(".apicdrivers") = { &sym }
349 #define apic_drivers(sym1, sym2) \
350 static struct apic *__apicdrivers_##sym1##sym2[2] __used \
351 __aligned(sizeof(struct apic *)) \
352 __section(".apicdrivers") = { &sym1, &sym2 }
354 extern struct apic *__apicdrivers[], *__apicdrivers_end[];
357 * APIC functionality to boot other CPUs - only used on SMP:
360 extern int lapic_can_unplug_cpu(void);
363 #ifdef CONFIG_X86_LOCAL_APIC
364 extern struct apic_override __x86_apic_override;
366 void __init apic_setup_apic_calls(void);
367 void __init apic_install_driver(struct apic *driver);
369 #define apic_update_callback(_callback, _fn) { \
370 __x86_apic_override._callback = _fn; \
371 apic->_callback = _fn; \
372 static_call_update(apic_call_##_callback, _fn); \
373 pr_info("APIC: %s() replaced with %ps()\n", #_callback, _fn); \
376 #define DECLARE_APIC_CALL(__cb) \
377 DECLARE_STATIC_CALL(apic_call_##__cb, *apic->__cb)
379 DECLARE_APIC_CALL(eoi);
380 DECLARE_APIC_CALL(native_eoi);
381 DECLARE_APIC_CALL(icr_read);
382 DECLARE_APIC_CALL(icr_write);
383 DECLARE_APIC_CALL(read);
384 DECLARE_APIC_CALL(send_IPI);
385 DECLARE_APIC_CALL(send_IPI_mask);
386 DECLARE_APIC_CALL(send_IPI_mask_allbutself);
387 DECLARE_APIC_CALL(send_IPI_allbutself);
388 DECLARE_APIC_CALL(send_IPI_all);
389 DECLARE_APIC_CALL(send_IPI_self);
390 DECLARE_APIC_CALL(wait_icr_idle);
391 DECLARE_APIC_CALL(wakeup_secondary_cpu);
392 DECLARE_APIC_CALL(wakeup_secondary_cpu_64);
393 DECLARE_APIC_CALL(write);
395 static __always_inline u32 apic_read(u32 reg)
397 return static_call(apic_call_read)(reg);
400 static __always_inline void apic_write(u32 reg, u32 val)
402 static_call(apic_call_write)(reg, val);
405 static __always_inline void apic_eoi(void)
407 static_call(apic_call_eoi)();
410 static __always_inline void apic_native_eoi(void)
412 static_call(apic_call_native_eoi)();
415 static __always_inline u64 apic_icr_read(void)
417 return static_call(apic_call_icr_read)();
420 static __always_inline void apic_icr_write(u32 low, u32 high)
422 static_call(apic_call_icr_write)(low, high);
425 static __always_inline void __apic_send_IPI(int cpu, int vector)
427 static_call(apic_call_send_IPI)(cpu, vector);
430 static __always_inline void __apic_send_IPI_mask(const struct cpumask *mask, int vector)
432 static_call_mod(apic_call_send_IPI_mask)(mask, vector);
435 static __always_inline void __apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
437 static_call(apic_call_send_IPI_mask_allbutself)(mask, vector);
440 static __always_inline void __apic_send_IPI_allbutself(int vector)
442 static_call(apic_call_send_IPI_allbutself)(vector);
445 static __always_inline void __apic_send_IPI_all(int vector)
447 static_call(apic_call_send_IPI_all)(vector);
450 static __always_inline void __apic_send_IPI_self(int vector)
452 static_call_mod(apic_call_send_IPI_self)(vector);
455 static __always_inline void apic_wait_icr_idle(void)
457 static_call_cond(apic_call_wait_icr_idle)();
460 static __always_inline u32 safe_apic_wait_icr_idle(void)
462 return apic->safe_wait_icr_idle ? apic->safe_wait_icr_idle() : 0;
465 static __always_inline bool apic_id_valid(u32 apic_id)
467 return apic_id <= apic->max_apic_id;
470 #else /* CONFIG_X86_LOCAL_APIC */
472 static inline u32 apic_read(u32 reg) { return 0; }
473 static inline void apic_write(u32 reg, u32 val) { }
474 static inline void apic_eoi(void) { }
475 static inline u64 apic_icr_read(void) { return 0; }
476 static inline void apic_icr_write(u32 low, u32 high) { }
477 static inline void apic_wait_icr_idle(void) { }
478 static inline u32 safe_apic_wait_icr_idle(void) { return 0; }
479 static inline void apic_set_eoi_cb(void (*eoi)(void)) {}
480 static inline void apic_native_eoi(void) { WARN_ON_ONCE(1); }
481 static inline void apic_setup_apic_calls(void) { }
483 #define apic_update_callback(_callback, _fn) do { } while (0)
485 #endif /* CONFIG_X86_LOCAL_APIC */
487 extern void apic_ack_irq(struct irq_data *data);
489 static inline bool lapic_vector_set_in_irr(unsigned int vector)
491 u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
493 return !!(irr & (1U << (vector % 32)));
496 static inline unsigned default_get_apic_id(unsigned long x)
498 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
500 if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID))
501 return (x >> 24) & 0xFF;
503 return (x >> 24) & 0x0F;
507 * Warm reset vector position:
509 #define TRAMPOLINE_PHYS_LOW 0x467
510 #define TRAMPOLINE_PHYS_HIGH 0x469
512 extern void generic_bigsmp_probe(void);
514 #ifdef CONFIG_X86_LOCAL_APIC
518 extern struct apic apic_noop;
520 static inline unsigned int read_apic_id(void)
522 unsigned int reg = apic_read(APIC_ID);
524 return apic->get_apic_id(reg);
528 typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip);
529 extern int default_acpi_madt_oem_check(char *, char *);
530 extern void x86_64_probe_apic(void);
532 static inline int default_acpi_madt_oem_check(char *a, char *b) { return 0; }
533 static inline void x86_64_probe_apic(void) { }
536 extern int default_apic_id_valid(u32 apicid);
538 extern u32 apic_default_calc_apicid(unsigned int cpu);
539 extern u32 apic_flat_calc_apicid(unsigned int cpu);
541 extern bool default_check_apicid_used(physid_mask_t *map, int apicid);
542 extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap);
543 extern int default_cpu_present_to_apicid(int mps_cpu);
545 #else /* CONFIG_X86_LOCAL_APIC */
547 static inline unsigned int read_apic_id(void) { return 0; }
549 #endif /* !CONFIG_X86_LOCAL_APIC */
552 void apic_smt_update(void);
554 static inline void apic_smt_update(void) { }
560 extern void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg,
563 extern void ioapic_zap_locks(void);
565 #endif /* _ASM_X86_APIC_H */