1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * This file contains common routines for dealing with free of page tables
4 * Along with common page table handling code
6 * Derived from arch/powerpc/mm/tlb_64.c:
11 * Copyright (C) 1996 Paul Mackerras
13 * Derived from "arch/i386/mm/init.c"
14 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
17 * Rework for PPC64 port.
20 #include <linux/kernel.h>
21 #include <linux/gfp.h>
23 #include <linux/percpu.h>
24 #include <linux/hardirq.h>
25 #include <linux/hugetlb.h>
26 #include <asm/tlbflush.h>
28 #include <asm/hugetlb.h>
29 #include <asm/pte-walk.h>
32 #define PGD_ALIGN (sizeof(pgd_t) * MAX_PTRS_PER_PGD)
34 #define PGD_ALIGN PAGE_SIZE
37 pgd_t swapper_pg_dir[MAX_PTRS_PER_PGD] __section(".bss..page_aligned") __aligned(PGD_ALIGN);
39 static inline int is_exec_fault(void)
41 return current->thread.regs && TRAP(current->thread.regs) == 0x400;
44 /* We only try to do i/d cache coherency on stuff that looks like
45 * reasonably "normal" PTEs. We currently require a PTE to be present
46 * and we avoid _PAGE_SPECIAL and cache inhibited pte. We also only do that
49 static inline int pte_looks_normal(pte_t pte)
52 if (pte_present(pte) && !pte_special(pte)) {
61 static struct folio *maybe_pte_to_folio(pte_t pte)
63 unsigned long pfn = pte_pfn(pte);
66 if (unlikely(!pfn_valid(pfn)))
68 page = pfn_to_page(pfn);
69 if (PageReserved(page))
71 return page_folio(page);
74 #ifdef CONFIG_PPC_BOOK3S
76 /* Server-style MMU handles coherency when hashing if HW exec permission
77 * is supposed per page (currently 64-bit only). If not, then, we always
78 * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
79 * support falls into the same category.
82 static pte_t set_pte_filter_hash(pte_t pte)
84 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
85 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
86 cpu_has_feature(CPU_FTR_NOEXECUTE))) {
87 struct folio *folio = maybe_pte_to_folio(pte);
90 if (!test_bit(PG_dcache_clean, &folio->flags)) {
91 flush_dcache_icache_folio(folio);
92 set_bit(PG_dcache_clean, &folio->flags);
98 #else /* CONFIG_PPC_BOOK3S */
100 static pte_t set_pte_filter_hash(pte_t pte) { return pte; }
102 #endif /* CONFIG_PPC_BOOK3S */
104 /* Embedded type MMU with HW exec support. This is a bit more complicated
105 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
106 * instead we "filter out" the exec permission for non clean pages.
108 static inline pte_t set_pte_filter(pte_t pte)
115 if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
116 return set_pte_filter_hash(pte);
118 /* No exec permission in the first place, move on */
119 if (!pte_exec(pte) || !pte_looks_normal(pte))
122 /* If you set _PAGE_EXEC on weird pages you're on your own */
123 folio = maybe_pte_to_folio(pte);
124 if (unlikely(!folio))
127 /* If the page clean, we move on */
128 if (test_bit(PG_dcache_clean, &folio->flags))
131 /* If it's an exec fault, we flush the cache and make it clean */
132 if (is_exec_fault()) {
133 flush_dcache_icache_folio(folio);
134 set_bit(PG_dcache_clean, &folio->flags);
138 /* Else, we filter out _PAGE_EXEC */
139 return pte_exprotect(pte);
142 static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
147 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64))
150 if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
153 /* So here, we only care about exec faults, as we use them
154 * to recover lost _PAGE_EXEC and perform I$/D$ coherency
155 * if necessary. Also if _PAGE_EXEC is already set, same deal,
158 if (dirty || pte_exec(pte) || !is_exec_fault())
161 #ifdef CONFIG_DEBUG_VM
162 /* So this is an exec fault, _PAGE_EXEC is not set. If it was
163 * an error we would have bailed out earlier in do_page_fault()
164 * but let's make sure of it
166 if (WARN_ON(!(vma->vm_flags & VM_EXEC)))
168 #endif /* CONFIG_DEBUG_VM */
170 /* If you set _PAGE_EXEC on weird pages you're on your own */
171 folio = maybe_pte_to_folio(pte);
172 if (unlikely(!folio))
175 /* If the page is already clean, we move on */
176 if (test_bit(PG_dcache_clean, &folio->flags))
179 /* Clean the page and set PG_dcache_clean */
180 flush_dcache_icache_folio(folio);
181 set_bit(PG_dcache_clean, &folio->flags);
184 return pte_mkexec(pte);
188 * set_pte stores a linux PTE into the linux page table.
190 void set_ptes(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
191 pte_t pte, unsigned int nr)
194 * Make sure hardware valid bit is not set. We don't do
195 * tlb flush for this update.
197 VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep));
199 /* Note: mm->context.id might not yet have been assigned as
200 * this context might not have been activated yet when this
203 pte = set_pte_filter(pte);
205 /* Perform the setting of the PTE */
206 arch_enter_lazy_mmu_mode();
208 __set_pte_at(mm, addr, ptep, pte, 0);
212 pte = __pte(pte_val(pte) + (1UL << PTE_RPN_SHIFT));
215 arch_leave_lazy_mmu_mode();
218 void unmap_kernel_page(unsigned long va)
220 pmd_t *pmdp = pmd_off_k(va);
221 pte_t *ptep = pte_offset_kernel(pmdp, va);
223 pte_clear(&init_mm, va, ptep);
224 flush_tlb_kernel_range(va, va + PAGE_SIZE);
228 * This is called when relaxing access to a PTE. It's also called in the page
229 * fault path when we don't hit any of the major fault cases, ie, a minor
230 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
231 * handled those two for us, we additionally deal with missing execute
232 * permission here on some processors
234 int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
235 pte_t *ptep, pte_t entry, int dirty)
238 entry = set_access_flags_filter(entry, vma, dirty);
239 changed = !pte_same(*(ptep), entry);
241 assert_pte_locked(vma->vm_mm, address);
242 __ptep_set_access_flags(vma, ptep, entry,
243 address, mmu_virtual_psize);
248 #ifdef CONFIG_HUGETLB_PAGE
249 int huge_ptep_set_access_flags(struct vm_area_struct *vma,
250 unsigned long addr, pte_t *ptep,
251 pte_t pte, int dirty)
253 #ifdef HUGETLB_NEED_PRELOAD
255 * The "return 1" forces a call of update_mmu_cache, which will write a
256 * TLB entry. Without this, platforms that don't do a write of the TLB
257 * entry in the TLB miss handler asm will fault ad infinitum.
259 ptep_set_access_flags(vma, addr, ptep, pte, dirty);
264 pte = set_access_flags_filter(pte, vma, dirty);
265 changed = !pte_same(*(ptep), pte);
268 #ifdef CONFIG_PPC_BOOK3S_64
269 struct hstate *h = hstate_vma(vma);
271 psize = hstate_get_psize(h);
272 #ifdef CONFIG_DEBUG_VM
273 assert_spin_locked(huge_pte_lockptr(h, vma->vm_mm, ptep));
278 * Not used on non book3s64 platforms.
279 * 8xx compares it with mmu_virtual_psize to
280 * know if it is a huge page or not.
282 psize = MMU_PAGE_COUNT;
284 __ptep_set_access_flags(vma, ptep, pte, addr, psize);
290 #if defined(CONFIG_PPC_8xx)
291 void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
292 pte_t pte, unsigned long sz)
294 pmd_t *pmd = pmd_off(mm, addr);
296 pte_basic_t *entry = (pte_basic_t *)ptep;
300 * Make sure hardware valid bit is not set. We don't do
301 * tlb flush for this update.
303 VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep));
305 pte = set_pte_filter(pte);
309 num = number_of_cells_per_pte(pmd, val, 1);
311 for (i = 0; i < num; i++, entry++, val += SZ_4K)
315 #endif /* CONFIG_HUGETLB_PAGE */
317 #ifdef CONFIG_DEBUG_VM
318 void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
329 pgd = mm->pgd + pgd_index(addr);
330 BUG_ON(pgd_none(*pgd));
331 p4d = p4d_offset(pgd, addr);
332 BUG_ON(p4d_none(*p4d));
333 pud = pud_offset(p4d, addr);
334 BUG_ON(pud_none(*pud));
335 pmd = pmd_offset(pud, addr);
337 * khugepaged to collapse normal pages to hugepage, first set
338 * pmd to none to force page fault/gup to take mmap_lock. After
339 * pmd is set to none, we do a pte_clear which does this assertion
340 * so if we find pmd none, return.
344 pte = pte_offset_map_nolock(mm, pmd, addr, &ptl);
346 assert_spin_locked(ptl);
349 #endif /* CONFIG_DEBUG_VM */
351 unsigned long vmalloc_to_phys(void *va)
353 unsigned long pfn = vmalloc_to_pfn(va);
356 return __pa(pfn_to_kaddr(pfn)) + offset_in_page(va);
358 EXPORT_SYMBOL_GPL(vmalloc_to_phys);
361 * We have 4 cases for pgds and pmds:
362 * (1) invalid (all zeroes)
363 * (2) pointer to next table, as normal; bottom 6 bits == 0
364 * (3) leaf pte for huge page _PAGE_PTE set
365 * (4) hugepd pointer, _PAGE_PTE = 0 and bits [2..6] indicate size of table
367 * So long as we atomically load page table pointers we are safe against teardown,
368 * we can follow the address down to the page and take a ref on it.
369 * This function need to be called with interrupts disabled. We use this variant
370 * when we have MSR[EE] = 0 but the paca->irq_soft_mask = IRQS_ENABLED
372 pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
373 bool *is_thp, unsigned *hpage_shift)
380 hugepd_t *hpdp = NULL;
390 * Always operate on the local stack value. This make sure the
391 * value don't get updated by a parallel THP split/collapse,
392 * page fault or a page unmap. The return pte_t * is still not
393 * stable. So should be checked there for above conditions.
394 * Top level is an exception because it is folded into p4d.
396 pgdp = pgdir + pgd_index(ea);
397 p4dp = p4d_offset(pgdp, ea);
398 p4d = READ_ONCE(*p4dp);
404 if (p4d_is_leaf(p4d)) {
405 ret_pte = (pte_t *)p4dp;
409 if (is_hugepd(__hugepd(p4d_val(p4d)))) {
410 hpdp = (hugepd_t *)&p4d;
415 * Even if we end up with an unmap, the pgtable will not
416 * be freed, because we do an rcu free and here we are
420 pudp = pud_offset(&p4d, ea);
421 pud = READ_ONCE(*pudp);
426 if (pud_is_leaf(pud)) {
427 ret_pte = (pte_t *)pudp;
431 if (is_hugepd(__hugepd(pud_val(pud)))) {
432 hpdp = (hugepd_t *)&pud;
437 pmdp = pmd_offset(&pud, ea);
438 pmd = READ_ONCE(*pmdp);
441 * A hugepage collapse is captured by this condition, see
442 * pmdp_collapse_flush.
447 #ifdef CONFIG_PPC_BOOK3S_64
449 * A hugepage split is captured by this condition, see
452 * Huge page modification can be caught here too.
454 if (pmd_is_serializing(pmd))
458 if (pmd_trans_huge(pmd) || pmd_devmap(pmd)) {
461 ret_pte = (pte_t *)pmdp;
465 if (pmd_is_leaf(pmd)) {
466 ret_pte = (pte_t *)pmdp;
470 if (is_hugepd(__hugepd(pmd_val(pmd)))) {
471 hpdp = (hugepd_t *)&pmd;
475 return pte_offset_kernel(&pmd, ea);
481 ret_pte = hugepte_offset(*hpdp, ea, pdshift);
482 pdshift = hugepd_shift(*hpdp);
485 *hpage_shift = pdshift;
488 EXPORT_SYMBOL_GPL(__find_linux_pte);
490 /* Note due to the way vm flags are laid out, the bits are XWR */
491 const pgprot_t protection_map[16] = {
492 [VM_NONE] = PAGE_NONE,
493 [VM_READ] = PAGE_READONLY,
494 [VM_WRITE] = PAGE_COPY,
495 [VM_WRITE | VM_READ] = PAGE_COPY,
496 [VM_EXEC] = PAGE_READONLY_X,
497 [VM_EXEC | VM_READ] = PAGE_READONLY_X,
498 [VM_EXEC | VM_WRITE] = PAGE_COPY_X,
499 [VM_EXEC | VM_WRITE | VM_READ] = PAGE_COPY_X,
500 [VM_SHARED] = PAGE_NONE,
501 [VM_SHARED | VM_READ] = PAGE_READONLY,
502 [VM_SHARED | VM_WRITE] = PAGE_SHARED,
503 [VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED,
504 [VM_SHARED | VM_EXEC] = PAGE_READONLY_X,
505 [VM_SHARED | VM_EXEC | VM_READ] = PAGE_READONLY_X,
506 [VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_SHARED_X,
507 [VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_SHARED_X
510 #ifndef CONFIG_PPC_BOOK3S_64
511 DECLARE_VM_GET_PAGE_PROT