1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2010
9 * AB8500 peripheral regulators
11 * AB8500 supports the following regulators:
12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
14 * AB8505 supports the following regulators:
15 * VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/err.h>
21 #include <linux/platform_device.h>
22 #include <linux/mfd/abx500.h>
23 #include <linux/mfd/abx500/ab8500.h>
25 #include <linux/regulator/of_regulator.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/machine.h>
28 #include <linux/regulator/ab8500.h>
29 #include <linux/slab.h>
32 * struct ab8500_shared_mode - is used when mode is shared between
34 * @shared_regulator: pointer to the other sharing regulator
35 * @lp_mode_req: low power mode requested by this regulator
37 struct ab8500_shared_mode {
38 struct ab8500_regulator_info *shared_regulator;
43 * struct ab8500_regulator_info - ab8500 regulator information
44 * @dev: device pointer
45 * @desc: regulator description
46 * @shared_mode: used when mode is shared between two regulators
47 * @load_lp_uA: maximum load in idle (low power) mode
48 * @update_bank: bank to control on/off
49 * @update_reg: register to control on/off
50 * @update_mask: mask to enable/disable and set mode of regulator
51 * @update_val: bits holding the regulator current mode
52 * @update_val_idle: bits to enable the regulator in idle (low power) mode
53 * @update_val_normal: bits to enable the regulator in normal (high power) mode
54 * @mode_bank: bank with location of mode register
55 * @mode_reg: mode register
56 * @mode_mask: mask for setting mode
57 * @mode_val_idle: mode setting for low power
58 * @mode_val_normal: mode setting for normal power
59 * @voltage_bank: bank to control regulator voltage
60 * @voltage_reg: register to control regulator voltage
61 * @voltage_mask: mask to control regulator voltage
63 struct ab8500_regulator_info {
65 struct regulator_desc desc;
66 struct ab8500_shared_mode *shared_mode;
90 /* voltage tables for the vauxn/vintcore supplies */
91 static const unsigned int ldo_vauxn_voltages[] = {
110 static const unsigned int ldo_vaux3_voltages[] = {
121 static const unsigned int ldo_vaux56_voltages[] = {
132 static const unsigned int ldo_vintcore_voltages[] = {
142 static const unsigned int fixed_1200000_voltage[] = {
146 static const unsigned int fixed_1800000_voltage[] = {
150 static const unsigned int fixed_2000000_voltage[] = {
154 static const unsigned int fixed_2050000_voltage[] = {
158 static const unsigned int ldo_vana_voltages[] = {
169 static const unsigned int ldo_vaudio_voltages[] = {
177 2600000, /* Duplicated in Vaudio and IsoUicc Control register. */
180 static DEFINE_MUTEX(shared_mode_mutex);
181 static struct ab8500_shared_mode ldo_anamic1_shared;
182 static struct ab8500_shared_mode ldo_anamic2_shared;
184 static int ab8500_regulator_enable(struct regulator_dev *rdev)
187 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
190 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
194 ret = abx500_mask_and_set_register_interruptible(info->dev,
195 info->update_bank, info->update_reg,
196 info->update_mask, info->update_val);
198 dev_err(rdev_get_dev(rdev),
199 "couldn't set enable bits for regulator\n");
203 dev_vdbg(rdev_get_dev(rdev),
204 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
205 info->desc.name, info->update_bank, info->update_reg,
206 info->update_mask, info->update_val);
211 static int ab8500_regulator_disable(struct regulator_dev *rdev)
214 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
217 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
221 ret = abx500_mask_and_set_register_interruptible(info->dev,
222 info->update_bank, info->update_reg,
223 info->update_mask, 0x0);
225 dev_err(rdev_get_dev(rdev),
226 "couldn't set disable bits for regulator\n");
230 dev_vdbg(rdev_get_dev(rdev),
231 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
232 info->desc.name, info->update_bank, info->update_reg,
233 info->update_mask, 0x0);
238 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
241 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
245 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
249 ret = abx500_get_register_interruptible(info->dev,
250 info->update_bank, info->update_reg, ®val);
252 dev_err(rdev_get_dev(rdev),
253 "couldn't read 0x%x register\n", info->update_reg);
257 dev_vdbg(rdev_get_dev(rdev),
258 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
260 info->desc.name, info->update_bank, info->update_reg,
261 info->update_mask, regval);
263 if (regval & info->update_mask)
269 static unsigned int ab8500_regulator_get_optimum_mode(
270 struct regulator_dev *rdev, int input_uV,
271 int output_uV, int load_uA)
275 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
278 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
282 if (load_uA <= info->load_lp_uA)
283 mode = REGULATOR_MODE_IDLE;
285 mode = REGULATOR_MODE_NORMAL;
290 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
294 u8 bank, reg, mask, val;
295 bool lp_mode_req = false;
296 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
299 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
303 if (info->mode_mask) {
304 bank = info->mode_bank;
305 reg = info->mode_reg;
306 mask = info->mode_mask;
308 bank = info->update_bank;
309 reg = info->update_reg;
310 mask = info->update_mask;
313 if (info->shared_mode)
314 mutex_lock(&shared_mode_mutex);
317 case REGULATOR_MODE_NORMAL:
318 if (info->shared_mode)
322 val = info->mode_val_normal;
324 val = info->update_val_normal;
326 case REGULATOR_MODE_IDLE:
327 if (info->shared_mode) {
328 struct ab8500_regulator_info *shared_regulator;
330 shared_regulator = info->shared_mode->shared_regulator;
331 if (!shared_regulator->shared_mode->lp_mode_req) {
332 /* Other regulator prevent LP mode */
333 info->shared_mode->lp_mode_req = true;
341 val = info->mode_val_idle;
343 val = info->update_val_idle;
350 if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
351 ret = abx500_mask_and_set_register_interruptible(info->dev,
352 bank, reg, mask, val);
354 dev_err(rdev_get_dev(rdev),
355 "couldn't set regulator mode\n");
359 dev_vdbg(rdev_get_dev(rdev),
360 "%s-set_mode (bank, reg, mask, value): "
361 "0x%x, 0x%x, 0x%x, 0x%x\n",
362 info->desc.name, bank, reg,
366 if (!info->mode_mask)
367 info->update_val = val;
369 if (info->shared_mode)
370 info->shared_mode->lp_mode_req = lp_mode_req;
373 if (info->shared_mode)
374 mutex_unlock(&shared_mode_mutex);
379 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
381 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
388 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
392 /* Need special handling for shared mode */
393 if (info->shared_mode) {
394 if (info->shared_mode->lp_mode_req)
395 return REGULATOR_MODE_IDLE;
397 return REGULATOR_MODE_NORMAL;
400 if (info->mode_mask) {
401 /* Dedicated register for handling mode */
402 ret = abx500_get_register_interruptible(info->dev,
403 info->mode_bank, info->mode_reg, &val);
404 val = val & info->mode_mask;
406 val_normal = info->mode_val_normal;
407 val_idle = info->mode_val_idle;
409 /* Mode register same as enable register */
410 val = info->update_val;
411 val_normal = info->update_val_normal;
412 val_idle = info->update_val_idle;
415 if (val == val_normal)
416 ret = REGULATOR_MODE_NORMAL;
417 else if (val == val_idle)
418 ret = REGULATOR_MODE_IDLE;
425 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
427 int ret, voltage_shift;
428 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
432 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
436 voltage_shift = ffs(info->voltage_mask) - 1;
438 ret = abx500_get_register_interruptible(info->dev,
439 info->voltage_bank, info->voltage_reg, ®val);
441 dev_err(rdev_get_dev(rdev),
442 "couldn't read voltage reg for regulator\n");
446 dev_vdbg(rdev_get_dev(rdev),
447 "%s-get_voltage (bank, reg, mask, shift, value): "
448 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
449 info->desc.name, info->voltage_bank,
450 info->voltage_reg, info->voltage_mask,
451 voltage_shift, regval);
453 return (regval & info->voltage_mask) >> voltage_shift;
456 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
459 int ret, voltage_shift;
460 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
464 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
468 voltage_shift = ffs(info->voltage_mask) - 1;
470 /* set the registers for the request */
471 regval = (u8)selector << voltage_shift;
472 ret = abx500_mask_and_set_register_interruptible(info->dev,
473 info->voltage_bank, info->voltage_reg,
474 info->voltage_mask, regval);
476 dev_err(rdev_get_dev(rdev),
477 "couldn't set voltage reg for regulator\n");
479 dev_vdbg(rdev_get_dev(rdev),
480 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
482 info->desc.name, info->voltage_bank, info->voltage_reg,
483 info->voltage_mask, regval);
488 static const struct regulator_ops ab8500_regulator_volt_mode_ops = {
489 .enable = ab8500_regulator_enable,
490 .disable = ab8500_regulator_disable,
491 .is_enabled = ab8500_regulator_is_enabled,
492 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
493 .set_mode = ab8500_regulator_set_mode,
494 .get_mode = ab8500_regulator_get_mode,
495 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
496 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
497 .list_voltage = regulator_list_voltage_table,
500 static const struct regulator_ops ab8500_regulator_volt_ops = {
501 .enable = ab8500_regulator_enable,
502 .disable = ab8500_regulator_disable,
503 .is_enabled = ab8500_regulator_is_enabled,
504 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
505 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
506 .list_voltage = regulator_list_voltage_table,
509 static const struct regulator_ops ab8500_regulator_mode_ops = {
510 .enable = ab8500_regulator_enable,
511 .disable = ab8500_regulator_disable,
512 .is_enabled = ab8500_regulator_is_enabled,
513 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
514 .set_mode = ab8500_regulator_set_mode,
515 .get_mode = ab8500_regulator_get_mode,
516 .list_voltage = regulator_list_voltage_table,
519 static const struct regulator_ops ab8500_regulator_ops = {
520 .enable = ab8500_regulator_enable,
521 .disable = ab8500_regulator_disable,
522 .is_enabled = ab8500_regulator_is_enabled,
523 .list_voltage = regulator_list_voltage_table,
526 static const struct regulator_ops ab8500_regulator_anamic_mode_ops = {
527 .enable = ab8500_regulator_enable,
528 .disable = ab8500_regulator_disable,
529 .is_enabled = ab8500_regulator_is_enabled,
530 .set_mode = ab8500_regulator_set_mode,
531 .get_mode = ab8500_regulator_get_mode,
532 .list_voltage = regulator_list_voltage_table,
535 /* AB8500 regulator information */
536 static struct ab8500_regulator_info
537 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
539 * Variable Voltage Regulators
540 * name, min mV, max mV,
541 * update bank, reg, mask, enable val
542 * volt bank, reg, mask
544 [AB8500_LDO_AUX1] = {
547 .ops = &ab8500_regulator_volt_mode_ops,
548 .type = REGULATOR_VOLTAGE,
549 .id = AB8500_LDO_AUX1,
550 .owner = THIS_MODULE,
551 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
552 .volt_table = ldo_vauxn_voltages,
554 .supply_name = "vin",
561 .update_val_idle = 0x03,
562 .update_val_normal = 0x01,
563 .voltage_bank = 0x04,
565 .voltage_mask = 0x0f,
567 [AB8500_LDO_AUX2] = {
570 .ops = &ab8500_regulator_volt_mode_ops,
571 .type = REGULATOR_VOLTAGE,
572 .id = AB8500_LDO_AUX2,
573 .owner = THIS_MODULE,
574 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
575 .volt_table = ldo_vauxn_voltages,
577 .supply_name = "vin",
584 .update_val_idle = 0x0c,
585 .update_val_normal = 0x04,
586 .voltage_bank = 0x04,
588 .voltage_mask = 0x0f,
590 [AB8500_LDO_AUX3] = {
593 .ops = &ab8500_regulator_volt_mode_ops,
594 .type = REGULATOR_VOLTAGE,
595 .id = AB8500_LDO_AUX3,
596 .owner = THIS_MODULE,
597 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
598 .volt_table = ldo_vaux3_voltages,
600 .supply_name = "vin",
607 .update_val_idle = 0x03,
608 .update_val_normal = 0x01,
609 .voltage_bank = 0x04,
611 .voltage_mask = 0x07,
613 [AB8500_LDO_INTCORE] = {
615 .name = "LDO-INTCORE",
616 .ops = &ab8500_regulator_volt_mode_ops,
617 .type = REGULATOR_VOLTAGE,
618 .id = AB8500_LDO_INTCORE,
619 .owner = THIS_MODULE,
620 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
621 .volt_table = ldo_vintcore_voltages,
629 .update_val_idle = 0x44,
630 .update_val_normal = 0x04,
631 .voltage_bank = 0x03,
633 .voltage_mask = 0x38,
637 * Fixed Voltage Regulators
639 * update bank, reg, mask, enable val
641 [AB8500_LDO_TVOUT] = {
644 .ops = &ab8500_regulator_mode_ops,
645 .type = REGULATOR_VOLTAGE,
646 .id = AB8500_LDO_TVOUT,
647 .owner = THIS_MODULE,
649 .volt_table = fixed_2000000_voltage,
657 .update_val_idle = 0x82,
658 .update_val_normal = 0x02,
660 [AB8500_LDO_AUDIO] = {
663 .ops = &ab8500_regulator_ops,
664 .type = REGULATOR_VOLTAGE,
665 .id = AB8500_LDO_AUDIO,
666 .owner = THIS_MODULE,
669 .volt_table = fixed_2000000_voltage,
676 [AB8500_LDO_ANAMIC1] = {
678 .name = "LDO-ANAMIC1",
679 .ops = &ab8500_regulator_ops,
680 .type = REGULATOR_VOLTAGE,
681 .id = AB8500_LDO_ANAMIC1,
682 .owner = THIS_MODULE,
685 .volt_table = fixed_2050000_voltage,
692 [AB8500_LDO_ANAMIC2] = {
694 .name = "LDO-ANAMIC2",
695 .ops = &ab8500_regulator_ops,
696 .type = REGULATOR_VOLTAGE,
697 .id = AB8500_LDO_ANAMIC2,
698 .owner = THIS_MODULE,
701 .volt_table = fixed_2050000_voltage,
708 [AB8500_LDO_DMIC] = {
711 .ops = &ab8500_regulator_ops,
712 .type = REGULATOR_VOLTAGE,
713 .id = AB8500_LDO_DMIC,
714 .owner = THIS_MODULE,
717 .volt_table = fixed_1800000_voltage,
726 * Regulators with fixed voltage and normal/idle modes
731 .ops = &ab8500_regulator_mode_ops,
732 .type = REGULATOR_VOLTAGE,
733 .id = AB8500_LDO_ANA,
734 .owner = THIS_MODULE,
737 .volt_table = fixed_1200000_voltage,
744 .update_val_idle = 0x0c,
745 .update_val_normal = 0x04,
749 /* AB8505 regulator information */
750 static struct ab8500_regulator_info
751 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
753 * Variable Voltage Regulators
754 * name, min mV, max mV,
755 * update bank, reg, mask, enable val
756 * volt bank, reg, mask
758 [AB8505_LDO_AUX1] = {
761 .ops = &ab8500_regulator_volt_mode_ops,
762 .type = REGULATOR_VOLTAGE,
763 .id = AB8505_LDO_AUX1,
764 .owner = THIS_MODULE,
765 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
766 .volt_table = ldo_vauxn_voltages,
773 .update_val_idle = 0x03,
774 .update_val_normal = 0x01,
775 .voltage_bank = 0x04,
777 .voltage_mask = 0x0f,
779 [AB8505_LDO_AUX2] = {
782 .ops = &ab8500_regulator_volt_mode_ops,
783 .type = REGULATOR_VOLTAGE,
784 .id = AB8505_LDO_AUX2,
785 .owner = THIS_MODULE,
786 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
787 .volt_table = ldo_vauxn_voltages,
794 .update_val_idle = 0x0c,
795 .update_val_normal = 0x04,
796 .voltage_bank = 0x04,
798 .voltage_mask = 0x0f,
800 [AB8505_LDO_AUX3] = {
803 .ops = &ab8500_regulator_volt_mode_ops,
804 .type = REGULATOR_VOLTAGE,
805 .id = AB8505_LDO_AUX3,
806 .owner = THIS_MODULE,
807 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
808 .volt_table = ldo_vaux3_voltages,
815 .update_val_idle = 0x03,
816 .update_val_normal = 0x01,
817 .voltage_bank = 0x04,
819 .voltage_mask = 0x07,
821 [AB8505_LDO_AUX4] = {
824 .ops = &ab8500_regulator_volt_mode_ops,
825 .type = REGULATOR_VOLTAGE,
826 .id = AB8505_LDO_AUX4,
827 .owner = THIS_MODULE,
828 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
829 .volt_table = ldo_vauxn_voltages,
832 /* values for Vaux4Regu register */
837 .update_val_idle = 0x03,
838 .update_val_normal = 0x01,
839 /* values for Vaux4SEL register */
840 .voltage_bank = 0x04,
842 .voltage_mask = 0x0f,
844 [AB8505_LDO_AUX5] = {
847 .ops = &ab8500_regulator_volt_mode_ops,
848 .type = REGULATOR_VOLTAGE,
849 .id = AB8505_LDO_AUX5,
850 .owner = THIS_MODULE,
851 .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
852 .volt_table = ldo_vaux56_voltages,
855 /* values for CtrlVaux5 register */
860 .update_val_idle = 0x18,
861 .update_val_normal = 0x10,
862 .voltage_bank = 0x01,
864 .voltage_mask = 0x07,
866 [AB8505_LDO_AUX6] = {
869 .ops = &ab8500_regulator_volt_mode_ops,
870 .type = REGULATOR_VOLTAGE,
871 .id = AB8505_LDO_AUX6,
872 .owner = THIS_MODULE,
873 .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages),
874 .volt_table = ldo_vaux56_voltages,
877 /* values for CtrlVaux6 register */
882 .update_val_idle = 0x18,
883 .update_val_normal = 0x10,
884 .voltage_bank = 0x01,
886 .voltage_mask = 0x07,
888 [AB8505_LDO_INTCORE] = {
890 .name = "LDO-INTCORE",
891 .ops = &ab8500_regulator_volt_mode_ops,
892 .type = REGULATOR_VOLTAGE,
893 .id = AB8505_LDO_INTCORE,
894 .owner = THIS_MODULE,
895 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
896 .volt_table = ldo_vintcore_voltages,
903 .update_val_idle = 0x44,
904 .update_val_normal = 0x04,
905 .voltage_bank = 0x03,
907 .voltage_mask = 0x38,
911 * Fixed Voltage Regulators
913 * update bank, reg, mask, enable val
918 .ops = &ab8500_regulator_mode_ops,
919 .type = REGULATOR_VOLTAGE,
920 .id = AB8505_LDO_ADC,
921 .owner = THIS_MODULE,
923 .volt_table = fixed_2000000_voltage,
924 .enable_time = 10000,
931 .update_val_idle = 0x82,
932 .update_val_normal = 0x02,
934 [AB8505_LDO_AUDIO] = {
937 .ops = &ab8500_regulator_volt_ops,
938 .type = REGULATOR_VOLTAGE,
939 .id = AB8505_LDO_AUDIO,
940 .owner = THIS_MODULE,
941 .n_voltages = ARRAY_SIZE(ldo_vaudio_voltages),
942 .volt_table = ldo_vaudio_voltages,
948 .voltage_bank = 0x01,
950 .voltage_mask = 0x70,
952 [AB8505_LDO_ANAMIC1] = {
954 .name = "LDO-ANAMIC1",
955 .ops = &ab8500_regulator_anamic_mode_ops,
956 .type = REGULATOR_VOLTAGE,
957 .id = AB8505_LDO_ANAMIC1,
958 .owner = THIS_MODULE,
960 .volt_table = fixed_2050000_voltage,
962 .shared_mode = &ldo_anamic1_shared,
970 .mode_val_idle = 0x04,
971 .mode_val_normal = 0x00,
973 [AB8505_LDO_ANAMIC2] = {
975 .name = "LDO-ANAMIC2",
976 .ops = &ab8500_regulator_anamic_mode_ops,
977 .type = REGULATOR_VOLTAGE,
978 .id = AB8505_LDO_ANAMIC2,
979 .owner = THIS_MODULE,
981 .volt_table = fixed_2050000_voltage,
983 .shared_mode = &ldo_anamic2_shared,
991 .mode_val_idle = 0x04,
992 .mode_val_normal = 0x00,
994 [AB8505_LDO_AUX8] = {
997 .ops = &ab8500_regulator_ops,
998 .type = REGULATOR_VOLTAGE,
999 .id = AB8505_LDO_AUX8,
1000 .owner = THIS_MODULE,
1002 .volt_table = fixed_1800000_voltage,
1004 .update_bank = 0x03,
1006 .update_mask = 0x04,
1010 * Regulators with fixed voltage and normal/idle modes
1012 [AB8505_LDO_ANA] = {
1015 .ops = &ab8500_regulator_volt_mode_ops,
1016 .type = REGULATOR_VOLTAGE,
1017 .id = AB8505_LDO_ANA,
1018 .owner = THIS_MODULE,
1019 .n_voltages = ARRAY_SIZE(ldo_vana_voltages),
1020 .volt_table = ldo_vana_voltages,
1023 .update_bank = 0x04,
1025 .update_mask = 0x0c,
1027 .update_val_idle = 0x0c,
1028 .update_val_normal = 0x04,
1029 .voltage_bank = 0x04,
1030 .voltage_reg = 0x29,
1031 .voltage_mask = 0x7,
1035 static struct ab8500_shared_mode ldo_anamic1_shared = {
1036 .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1039 static struct ab8500_shared_mode ldo_anamic2_shared = {
1040 .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1043 struct ab8500_reg_init {
1049 #define REG_INIT(_id, _bank, _addr, _mask) \
1056 /* AB8500 register init */
1057 static struct ab8500_reg_init ab8500_reg_init[] = {
1059 * 0x30, VanaRequestCtrl
1060 * 0xc0, VextSupply1RequestCtrl
1062 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0),
1064 * 0x03, VextSupply2RequestCtrl
1065 * 0x0c, VextSupply3RequestCtrl
1066 * 0x30, Vaux1RequestCtrl
1067 * 0xc0, Vaux2RequestCtrl
1069 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
1071 * 0x03, Vaux3RequestCtrl
1074 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
1076 * 0x08, VanaSysClkReq1HPValid
1077 * 0x20, Vaux1SysClkReq1HPValid
1078 * 0x40, Vaux2SysClkReq1HPValid
1079 * 0x80, Vaux3SysClkReq1HPValid
1081 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1083 * 0x10, VextSupply1SysClkReq1HPValid
1084 * 0x20, VextSupply2SysClkReq1HPValid
1085 * 0x40, VextSupply3SysClkReq1HPValid
1087 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1089 * 0x08, VanaHwHPReq1Valid
1090 * 0x20, Vaux1HwHPReq1Valid
1091 * 0x40, Vaux2HwHPReq1Valid
1092 * 0x80, Vaux3HwHPReq1Valid
1094 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
1096 * 0x01, VextSupply1HwHPReq1Valid
1097 * 0x02, VextSupply2HwHPReq1Valid
1098 * 0x04, VextSupply3HwHPReq1Valid
1100 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
1102 * 0x08, VanaHwHPReq2Valid
1103 * 0x20, Vaux1HwHPReq2Valid
1104 * 0x40, Vaux2HwHPReq2Valid
1105 * 0x80, Vaux3HwHPReq2Valid
1107 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
1109 * 0x01, VextSupply1HwHPReq2Valid
1110 * 0x02, VextSupply2HwHPReq2Valid
1111 * 0x04, VextSupply3HwHPReq2Valid
1113 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
1115 * 0x20, VanaSwHPReqValid
1116 * 0x80, Vaux1SwHPReqValid
1118 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
1120 * 0x01, Vaux2SwHPReqValid
1121 * 0x02, Vaux3SwHPReqValid
1122 * 0x04, VextSupply1SwHPReqValid
1123 * 0x08, VextSupply2SwHPReqValid
1124 * 0x10, VextSupply3SwHPReqValid
1126 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
1128 * 0x02, SysClkReq2Valid1
1129 * 0x04, SysClkReq3Valid1
1130 * 0x08, SysClkReq4Valid1
1131 * 0x10, SysClkReq5Valid1
1132 * 0x20, SysClkReq6Valid1
1133 * 0x40, SysClkReq7Valid1
1134 * 0x80, SysClkReq8Valid1
1136 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
1138 * 0x02, SysClkReq2Valid2
1139 * 0x04, SysClkReq3Valid2
1140 * 0x08, SysClkReq4Valid2
1141 * 0x10, SysClkReq5Valid2
1142 * 0x20, SysClkReq6Valid2
1143 * 0x40, SysClkReq7Valid2
1144 * 0x80, SysClkReq8Valid2
1146 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
1149 * 0x04, Vintcore12Ena
1150 * 0x38, Vintcore12Sel
1151 * 0x40, Vintcore12LP
1154 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
1161 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
1163 * 0x01, Vamic1_dzout
1164 * 0x02, Vamic2_dzout
1166 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
1168 * 0x03, VpllRegu (NOTE! PRCMU register bits)
1171 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
1174 * 0x02, VrefDDRSleepMode
1176 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
1178 * 0x03, VextSupply1Regu
1179 * 0x0c, VextSupply2Regu
1180 * 0x30, VextSupply3Regu
1181 * 0x40, ExtSupply2Bypass
1182 * 0x80, ExtSupply3Bypass
1184 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
1189 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
1193 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
1197 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
1201 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
1205 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
1207 * 0x01, VextSupply12LP
1209 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
1214 * 0x20, Vintcore12Disch
1218 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
1221 * 0x04, VdmicPullDownEna
1224 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
1227 /* AB8505 register init */
1228 static struct ab8500_reg_init ab8505_reg_init[] = {
1230 * 0x03, VarmRequestCtrl
1231 * 0x0c, VsmpsCRequestCtrl
1232 * 0x30, VsmpsARequestCtrl
1233 * 0xc0, VsmpsBRequestCtrl
1235 REG_INIT(AB8505_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
1237 * 0x03, VsafeRequestCtrl
1238 * 0x0c, VpllRequestCtrl
1239 * 0x30, VanaRequestCtrl
1241 REG_INIT(AB8505_REGUREQUESTCTRL2, 0x03, 0x04, 0x3f),
1243 * 0x30, Vaux1RequestCtrl
1244 * 0xc0, Vaux2RequestCtrl
1246 REG_INIT(AB8505_REGUREQUESTCTRL3, 0x03, 0x05, 0xf0),
1248 * 0x03, Vaux3RequestCtrl
1251 REG_INIT(AB8505_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
1253 * 0x01, VsmpsASysClkReq1HPValid
1254 * 0x02, VsmpsBSysClkReq1HPValid
1255 * 0x04, VsafeSysClkReq1HPValid
1256 * 0x08, VanaSysClkReq1HPValid
1257 * 0x10, VpllSysClkReq1HPValid
1258 * 0x20, Vaux1SysClkReq1HPValid
1259 * 0x40, Vaux2SysClkReq1HPValid
1260 * 0x80, Vaux3SysClkReq1HPValid
1262 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1264 * 0x01, VsmpsCSysClkReq1HPValid
1265 * 0x02, VarmSysClkReq1HPValid
1266 * 0x04, VbbSysClkReq1HPValid
1267 * 0x08, VsmpsMSysClkReq1HPValid
1269 REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1271 * 0x01, VsmpsAHwHPReq1Valid
1272 * 0x02, VsmpsBHwHPReq1Valid
1273 * 0x04, VsafeHwHPReq1Valid
1274 * 0x08, VanaHwHPReq1Valid
1275 * 0x10, VpllHwHPReq1Valid
1276 * 0x20, Vaux1HwHPReq1Valid
1277 * 0x40, Vaux2HwHPReq1Valid
1278 * 0x80, Vaux3HwHPReq1Valid
1280 REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
1282 * 0x08, VsmpsMHwHPReq1Valid
1284 REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08),
1286 * 0x01, VsmpsAHwHPReq2Valid
1287 * 0x02, VsmpsBHwHPReq2Valid
1288 * 0x04, VsafeHwHPReq2Valid
1289 * 0x08, VanaHwHPReq2Valid
1290 * 0x10, VpllHwHPReq2Valid
1291 * 0x20, Vaux1HwHPReq2Valid
1292 * 0x40, Vaux2HwHPReq2Valid
1293 * 0x80, Vaux3HwHPReq2Valid
1295 REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
1297 * 0x08, VsmpsMHwHPReq2Valid
1299 REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08),
1301 * 0x01, VsmpsCSwHPReqValid
1302 * 0x02, VarmSwHPReqValid
1303 * 0x04, VsmpsASwHPReqValid
1304 * 0x08, VsmpsBSwHPReqValid
1305 * 0x10, VsafeSwHPReqValid
1306 * 0x20, VanaSwHPReqValid
1307 * 0x40, VpllSwHPReqValid
1308 * 0x80, Vaux1SwHPReqValid
1310 REG_INIT(AB8505_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
1312 * 0x01, Vaux2SwHPReqValid
1313 * 0x02, Vaux3SwHPReqValid
1314 * 0x20, VsmpsMSwHPReqValid
1316 REG_INIT(AB8505_REGUSWHPREQVALID2, 0x03, 0x0e, 0x23),
1318 * 0x02, SysClkReq2Valid1
1319 * 0x04, SysClkReq3Valid1
1320 * 0x08, SysClkReq4Valid1
1322 REG_INIT(AB8505_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0x0e),
1324 * 0x02, SysClkReq2Valid2
1325 * 0x04, SysClkReq3Valid2
1326 * 0x08, SysClkReq4Valid2
1328 REG_INIT(AB8505_REGUSYSCLKREQVALID2, 0x03, 0x10, 0x0e),
1330 * 0x01, Vaux4SwHPReqValid
1331 * 0x02, Vaux4HwHPReq2Valid
1332 * 0x04, Vaux4HwHPReq1Valid
1333 * 0x08, Vaux4SysClkReq1HPValid
1335 REG_INIT(AB8505_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f),
1338 * 0x04, VintCore12Ena
1339 * 0x38, VintCore12Sel
1340 * 0x40, VintCore12LP
1343 REG_INIT(AB8505_REGUMISC1, 0x03, 0x80, 0xfe),
1350 REG_INIT(AB8505_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
1352 * 0x01, Vamic1_dzout
1353 * 0x02, Vamic2_dzout
1355 REG_INIT(AB8505_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
1358 * 0x0c, VsmpsASelCtrl
1359 * 0x10, VsmpsAAutoMode
1360 * 0x20, VsmpsAPWMMode
1362 REG_INIT(AB8505_VSMPSAREGU, 0x04, 0x03, 0x3f),
1365 * 0x0c, VsmpsBSelCtrl
1366 * 0x10, VsmpsBAutoMode
1367 * 0x20, VsmpsBPWMMode
1369 REG_INIT(AB8505_VSMPSBREGU, 0x04, 0x04, 0x3f),
1372 * 0x0c, VsafeSelCtrl
1373 * 0x10, VsafeAutoMode
1374 * 0x20, VsafePWMMode
1376 REG_INIT(AB8505_VSAFEREGU, 0x04, 0x05, 0x3f),
1378 * 0x03, VpllRegu (NOTE! PRCMU register bits)
1381 REG_INIT(AB8505_VPLLVANAREGU, 0x04, 0x06, 0x0f),
1383 * 0x03, VextSupply1Regu
1384 * 0x0c, VextSupply2Regu
1385 * 0x30, VextSupply3Regu
1386 * 0x40, ExtSupply2Bypass
1387 * 0x80, ExtSupply3Bypass
1389 REG_INIT(AB8505_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
1394 REG_INIT(AB8505_VAUX12REGU, 0x04, 0x09, 0x0f),
1398 REG_INIT(AB8505_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
1402 REG_INIT(AB8505_VSMPSASEL1, 0x04, 0x13, 0x3f),
1406 REG_INIT(AB8505_VSMPSASEL2, 0x04, 0x14, 0x3f),
1410 REG_INIT(AB8505_VSMPSASEL3, 0x04, 0x15, 0x3f),
1414 REG_INIT(AB8505_VSMPSBSEL1, 0x04, 0x17, 0x3f),
1418 REG_INIT(AB8505_VSMPSBSEL2, 0x04, 0x18, 0x3f),
1422 REG_INIT(AB8505_VSMPSBSEL3, 0x04, 0x19, 0x3f),
1426 REG_INIT(AB8505_VSAFESEL1, 0x04, 0x1b, 0x7f),
1430 REG_INIT(AB8505_VSAFESEL2, 0x04, 0x1c, 0x7f),
1434 REG_INIT(AB8505_VSAFESEL3, 0x04, 0x1d, 0x7f),
1438 REG_INIT(AB8505_VAUX1SEL, 0x04, 0x1f, 0x0f),
1442 REG_INIT(AB8505_VAUX2SEL, 0x04, 0x20, 0x0f),
1447 REG_INIT(AB8505_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
1449 * 0x03, Vaux4RequestCtrl
1451 REG_INIT(AB8505_VAUX4REQCTRL, 0x04, 0x2d, 0x03),
1455 REG_INIT(AB8505_VAUX4REGU, 0x04, 0x2e, 0x03),
1459 REG_INIT(AB8505_VAUX4SEL, 0x04, 0x2f, 0x0f),
1464 * 0x20, Vintcore12Disch
1468 REG_INIT(AB8505_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
1471 * 0x04, VdmicPullDownEna
1474 REG_INIT(AB8505_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
1478 REG_INIT(AB8505_REGUCTRLDISCH3, 0x04, 0x48, 0x01),
1484 * 0x40, Vaux5DisSfst
1485 * 0x80, Vaux5DisPulld
1487 REG_INIT(AB8505_CTRLVAUX5, 0x01, 0x55, 0xff),
1492 * 0x80, Vaux6DisPulld
1494 REG_INIT(AB8505_CTRLVAUX6, 0x01, 0x56, 0x9f),
1497 static struct of_regulator_match ab8500_regulator_match[] = {
1498 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
1499 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
1500 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
1501 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1502 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
1503 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
1504 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1505 { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1506 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
1507 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
1510 static struct of_regulator_match ab8505_regulator_match[] = {
1511 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8505_LDO_AUX1, },
1512 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8505_LDO_AUX2, },
1513 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8505_LDO_AUX3, },
1514 { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8505_LDO_AUX4, },
1515 { .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8505_LDO_AUX5, },
1516 { .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8505_LDO_AUX6, },
1517 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1518 { .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, },
1519 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8505_LDO_AUDIO, },
1520 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
1521 { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
1522 { .name = "ab8500_ldo_aux8", .driver_data = (void *) AB8505_LDO_AUX8, },
1523 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8505_LDO_ANA, },
1527 struct ab8500_regulator_info *info;
1529 struct ab8500_reg_init *init;
1531 struct of_regulator_match *match;
1535 static void abx500_get_regulator_info(struct ab8500 *ab8500)
1537 if (is_ab8505(ab8500)) {
1538 abx500_regulator.info = ab8505_regulator_info;
1539 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
1540 abx500_regulator.init = ab8505_reg_init;
1541 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
1542 abx500_regulator.match = ab8505_regulator_match;
1543 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
1545 abx500_regulator.info = ab8500_regulator_info;
1546 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
1547 abx500_regulator.init = ab8500_reg_init;
1548 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
1549 abx500_regulator.match = ab8500_regulator_match;
1550 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
1554 static int ab8500_regulator_register(struct platform_device *pdev,
1555 struct regulator_init_data *init_data,
1556 int id, struct device_node *np)
1558 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1559 struct ab8500_regulator_info *info = NULL;
1560 struct regulator_config config = { };
1561 struct regulator_dev *rdev;
1563 /* assign per-regulator data */
1564 info = &abx500_regulator.info[id];
1565 info->dev = &pdev->dev;
1567 config.dev = &pdev->dev;
1568 config.init_data = init_data;
1569 config.driver_data = info;
1570 config.of_node = np;
1572 /* fix for hardware before ab8500v2.0 */
1573 if (is_ab8500_1p1_or_earlier(ab8500)) {
1574 if (info->desc.id == AB8500_LDO_AUX3) {
1575 info->desc.n_voltages =
1576 ARRAY_SIZE(ldo_vauxn_voltages);
1577 info->desc.volt_table = ldo_vauxn_voltages;
1578 info->voltage_mask = 0xf;
1582 /* register regulator with framework */
1583 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
1585 dev_err(&pdev->dev, "failed to register regulator %s\n",
1587 return PTR_ERR(rdev);
1593 static int ab8500_regulator_probe(struct platform_device *pdev)
1595 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1596 struct device_node *np = pdev->dev.of_node;
1597 struct of_regulator_match *match;
1601 dev_err(&pdev->dev, "null mfd parent\n");
1605 abx500_get_regulator_info(ab8500);
1607 err = of_regulator_match(&pdev->dev, np,
1608 abx500_regulator.match,
1609 abx500_regulator.match_size);
1612 "Error parsing regulator init data: %d\n", err);
1616 match = abx500_regulator.match;
1617 for (i = 0; i < abx500_regulator.info_size; i++) {
1618 err = ab8500_regulator_register(pdev, match[i].init_data, i,
1627 static struct platform_driver ab8500_regulator_driver = {
1628 .probe = ab8500_regulator_probe,
1630 .name = "ab8500-regulator",
1634 static int __init ab8500_regulator_init(void)
1638 ret = platform_driver_register(&ab8500_regulator_driver);
1640 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1644 subsys_initcall(ab8500_regulator_init);
1646 static void __exit ab8500_regulator_exit(void)
1648 platform_driver_unregister(&ab8500_regulator_driver);
1650 module_exit(ab8500_regulator_exit);
1652 MODULE_LICENSE("GPL v2");
1656 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1657 MODULE_ALIAS("platform:ab8500-regulator");