drivers/regulator/ab8500.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) ST-Ericsson SA 2010
   4  *
   5  * Authors: Sundar Iyer <[email protected]> for ST-Ericsson
   6  *          Bengt Jonsson <[email protected]> for ST-Ericsson
   7  *          Daniel Willerud <[email protected]> for ST-Ericsson
   8  *
   9  * AB8500 peripheral regulators
  10  *
  11  * AB8500 supports the following regulators:
  12  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  13  *
  14  * AB8505 supports the following regulators:
  15  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  16  */
  17 #include <linux/init.h>
  18 #include <linux/kernel.h>
  19 #include <linux/module.h>
  20 #include <linux/err.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/mfd/abx500.h>
  23 #include <linux/mfd/abx500/ab8500.h>
  24 #include <linux/of.h>
  25 #include <linux/regulator/of_regulator.h>
  26 #include <linux/regulator/driver.h>
  27 #include <linux/regulator/machine.h>
  28 #include <linux/regulator/ab8500.h>
  29 #include <linux/slab.h>
  30
  31 /**
  32  * struct ab8500_shared_mode - is used when mode is shared between
  33  * two regulators.
  34  * @shared_regulator: pointer to the other sharing regulator
  35  * @lp_mode_req: low power mode requested by this regulator
  36  */
  37 struct ab8500_shared_mode {
  38         struct ab8500_regulator_info *shared_regulator;
  39         bool lp_mode_req;
  40 };
  41
  42 /**
  43  * struct ab8500_regulator_info - ab8500 regulator information
  44  * @dev: device pointer
  45  * @desc: regulator description
  46  * @shared_mode: used when mode is shared between two regulators
  47  * @load_lp_uA: maximum load in idle (low power) mode
  48  * @update_bank: bank to control on/off
  49  * @update_reg: register to control on/off
  50  * @update_mask: mask to enable/disable and set mode of regulator
  51  * @update_val: bits holding the regulator current mode
  52  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  53  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  54  * @mode_bank: bank with location of mode register
  55  * @mode_reg: mode register
  56  * @mode_mask: mask for setting mode
  57  * @mode_val_idle: mode setting for low power
  58  * @mode_val_normal: mode setting for normal power
  59  * @voltage_bank: bank to control regulator voltage
  60  * @voltage_reg: register to control regulator voltage
  61  * @voltage_mask: mask to control regulator voltage
  62  */
  63 struct ab8500_regulator_info {
  64         struct device           *dev;
  65         struct regulator_desc   desc;
  66         struct ab8500_shared_mode *shared_mode;
  67         int load_lp_uA;
  68         u8 update_bank;
  69         u8 update_reg;
  70         u8 update_mask;
  71         u8 update_val;
  72         u8 update_val_idle;
  73         u8 update_val_normal;
  74         u8 mode_bank;
  75         u8 mode_reg;
  76         u8 mode_mask;
  77         u8 mode_val_idle;
  78         u8 mode_val_normal;
  79         u8 voltage_bank;
  80         u8 voltage_reg;
  81         u8 voltage_mask;
  82         struct {
  83                 u8 voltage_limit;
  84                 u8 voltage_bank;
  85                 u8 voltage_reg;
  86                 u8 voltage_mask;
  87         } expand_register;
  88 };
  89
  90 /* voltage tables for the vauxn/vintcore supplies */
  91 static const unsigned int ldo_vauxn_voltages[] = {
  92         1100000,
  93         1200000,
  94         1300000,
  95         1400000,
  96         1500000,
  97         1800000,
  98         1850000,
  99         1900000,
 100         2500000,
 101         2650000,
 102         2700000,
 103         2750000,
 104         2800000,
 105         2900000,
 106         3000000,
 107         3300000,
 108 };
 109
 110 static const unsigned int ldo_vaux3_voltages[] = {
 111         1200000,
 112         1500000,
 113         1800000,
 114         2100000,
 115         2500000,
 116         2750000,
 117         2790000,
 118         2910000,
 119 };
 120
 121 static const unsigned int ldo_vaux56_voltages[] = {
 122         1800000,
 123         1050000,
 124         1100000,
 125         1200000,
 126         1500000,
 127         2200000,
 128         2500000,
 129         2790000,
 130 };
 131
 132 static const unsigned int ldo_vintcore_voltages[] = {
 133         1200000,
 134         1225000,
 135         1250000,
 136         1275000,
 137         1300000,
 138         1325000,
 139         1350000,
 140 };
 141
 142 static const unsigned int fixed_1200000_voltage[] = {
 143         1200000,
 144 };
 145
 146 static const unsigned int fixed_1800000_voltage[] = {
 147         1800000,
 148 };
 149
 150 static const unsigned int fixed_2000000_voltage[] = {
 151         2000000,
 152 };
 153
 154 static const unsigned int fixed_2050000_voltage[] = {
 155         2050000,
 156 };
 157
 158 static const unsigned int ldo_vana_voltages[] = {
 159         1050000,
 160         1075000,
 161         1100000,
 162         1125000,
 163         1150000,
 164         1175000,
 165         1200000,
 166         1225000,
 167 };
 168
 169 static const unsigned int ldo_vaudio_voltages[] = {
 170         2000000,
 171         2100000,
 172         2200000,
 173         2300000,
 174         2400000,
 175         2500000,
 176         2600000,
 177         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 178 };
 179
 180 static DEFINE_MUTEX(shared_mode_mutex);
 181 static struct ab8500_shared_mode ldo_anamic1_shared;
 182 static struct ab8500_shared_mode ldo_anamic2_shared;
 183
 184 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 185 {
 186         int ret;
 187         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 188
 189         if (info == NULL) {
 190                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 191                 return -EINVAL;
 192         }
 193
 194         ret = abx500_mask_and_set_register_interruptible(info->dev,
 195                 info->update_bank, info->update_reg,
 196                 info->update_mask, info->update_val);
 197         if (ret < 0) {
 198                 dev_err(rdev_get_dev(rdev),
 199                         "couldn't set enable bits for regulator\n");
 200                 return ret;
 201         }
 202
 203         dev_vdbg(rdev_get_dev(rdev),
 204                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 205                 info->desc.name, info->update_bank, info->update_reg,
 206                 info->update_mask, info->update_val);
 207
 208         return ret;
 209 }
 210
 211 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 212 {
 213         int ret;
 214         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 215
 216         if (info == NULL) {
 217                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 218                 return -EINVAL;
 219         }
 220
 221         ret = abx500_mask_and_set_register_interruptible(info->dev,
 222                 info->update_bank, info->update_reg,
 223                 info->update_mask, 0x0);
 224         if (ret < 0) {
 225                 dev_err(rdev_get_dev(rdev),
 226                         "couldn't set disable bits for regulator\n");
 227                 return ret;
 228         }
 229
 230         dev_vdbg(rdev_get_dev(rdev),
 231                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 232                 info->desc.name, info->update_bank, info->update_reg,
 233                 info->update_mask, 0x0);
 234
 235         return ret;
 236 }
 237
 238 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 239 {
 240         int ret;
 241         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 242         u8 regval;
 243
 244         if (info == NULL) {
 245                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 246                 return -EINVAL;
 247         }
 248
 249         ret = abx500_get_register_interruptible(info->dev,
 250                 info->update_bank, info->update_reg, &regval);
 251         if (ret < 0) {
 252                 dev_err(rdev_get_dev(rdev),
 253                         "couldn't read 0x%x register\n", info->update_reg);
 254                 return ret;
 255         }
 256
 257         dev_vdbg(rdev_get_dev(rdev),
 258                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 259                 " 0x%x\n",
 260                 info->desc.name, info->update_bank, info->update_reg,
 261                 info->update_mask, regval);
 262
 263         if (regval & info->update_mask)
 264                 return 1;
 265         else
 266                 return 0;
 267 }
 268
 269 static unsigned int ab8500_regulator_get_optimum_mode(
 270                 struct regulator_dev *rdev, int input_uV,
 271                 int output_uV, int load_uA)
 272 {
 273         unsigned int mode;
 274
 275         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 276
 277         if (info == NULL) {
 278                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 279                 return -EINVAL;
 280         }
 281
 282         if (load_uA <= info->load_lp_uA)
 283                 mode = REGULATOR_MODE_IDLE;
 284         else
 285                 mode = REGULATOR_MODE_NORMAL;
 286
 287         return mode;
 288 }
 289
 290 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 291                                      unsigned int mode)
 292 {
 293         int ret = 0;
 294         u8 bank, reg, mask, val;
 295         bool lp_mode_req = false;
 296         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 297
 298         if (info == NULL) {
 299                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 300                 return -EINVAL;
 301         }
 302
 303         if (info->mode_mask) {
 304                 bank = info->mode_bank;
 305                 reg = info->mode_reg;
 306                 mask = info->mode_mask;
 307         } else {
 308                 bank = info->update_bank;
 309                 reg = info->update_reg;
 310                 mask = info->update_mask;
 311         }
 312
 313         if (info->shared_mode)
 314                 mutex_lock(&shared_mode_mutex);
 315
 316         switch (mode) {
 317         case REGULATOR_MODE_NORMAL:
 318                 if (info->shared_mode)
 319                         lp_mode_req = false;
 320
 321                 if (info->mode_mask)
 322                         val = info->mode_val_normal;
 323                 else
 324                         val = info->update_val_normal;
 325                 break;
 326         case REGULATOR_MODE_IDLE:
 327                 if (info->shared_mode) {
 328                         struct ab8500_regulator_info *shared_regulator;
 329
 330                         shared_regulator = info->shared_mode->shared_regulator;
 331                         if (!shared_regulator->shared_mode->lp_mode_req) {
 332                                 /* Other regulator prevent LP mode */
 333                                 info->shared_mode->lp_mode_req = true;
 334                                 goto out_unlock;
 335                         }
 336
 337                         lp_mode_req = true;
 338                 }
 339
 340                 if (info->mode_mask)
 341                         val = info->mode_val_idle;
 342                 else
 343                         val = info->update_val_idle;
 344                 break;
 345         default:
 346                 ret = -EINVAL;
 347                 goto out_unlock;
 348         }
 349
 350         if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
 351                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 352                         bank, reg, mask, val);
 353                 if (ret < 0) {
 354                         dev_err(rdev_get_dev(rdev),
 355                                 "couldn't set regulator mode\n");
 356                         goto out_unlock;
 357                 }
 358
 359                 dev_vdbg(rdev_get_dev(rdev),
 360                         "%s-set_mode (bank, reg, mask, value): "
 361                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 362                         info->desc.name, bank, reg,
 363                         mask, val);
 364         }
 365
 366         if (!info->mode_mask)
 367                 info->update_val = val;
 368
 369         if (info->shared_mode)
 370                 info->shared_mode->lp_mode_req = lp_mode_req;
 371
 372 out_unlock:
 373         if (info->shared_mode)
 374                 mutex_unlock(&shared_mode_mutex);
 375
 376         return ret;
 377 }
 378
 379 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 380 {
 381         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 382         int ret;
 383         u8 val;
 384         u8 val_normal;
 385         u8 val_idle;
 386
 387         if (info == NULL) {
 388                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 389                 return -EINVAL;
 390         }
 391
 392         /* Need special handling for shared mode */
 393         if (info->shared_mode) {
 394                 if (info->shared_mode->lp_mode_req)
 395                         return REGULATOR_MODE_IDLE;
 396                 else
 397                         return REGULATOR_MODE_NORMAL;
 398         }
 399
 400         if (info->mode_mask) {
 401                 /* Dedicated register for handling mode */
 402                 ret = abx500_get_register_interruptible(info->dev,
 403                 info->mode_bank, info->mode_reg, &val);
 404                 val = val & info->mode_mask;
 405
 406                 val_normal = info->mode_val_normal;
 407                 val_idle = info->mode_val_idle;
 408         } else {
 409                 /* Mode register same as enable register */
 410                 val = info->update_val;
 411                 val_normal = info->update_val_normal;
 412                 val_idle = info->update_val_idle;
 413         }
 414
 415         if (val == val_normal)
 416                 ret = REGULATOR_MODE_NORMAL;
 417         else if (val == val_idle)
 418                 ret = REGULATOR_MODE_IDLE;
 419         else
 420                 ret = -EINVAL;
 421
 422         return ret;
 423 }
 424
 425 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 426 {
 427         int ret, voltage_shift;
 428         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 429         u8 regval;
 430
 431         if (info == NULL) {
 432                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 433                 return -EINVAL;
 434         }
 435
 436         voltage_shift = ffs(info->voltage_mask) - 1;
 437
 438         ret = abx500_get_register_interruptible(info->dev,
 439                         info->voltage_bank, info->voltage_reg, &regval);
 440         if (ret < 0) {
 441                 dev_err(rdev_get_dev(rdev),
 442                         "couldn't read voltage reg for regulator\n");
 443                 return ret;
 444         }
 445
 446         dev_vdbg(rdev_get_dev(rdev),
 447                 "%s-get_voltage (bank, reg, mask, shift, value): "
 448                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 449                 info->desc.name, info->voltage_bank,
 450                 info->voltage_reg, info->voltage_mask,
 451                 voltage_shift, regval);
 452
 453         return (regval & info->voltage_mask) >> voltage_shift;
 454 }
 455
 456 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 457                                             unsigned selector)
 458 {
 459         int ret, voltage_shift;
 460         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 461         u8 regval;
 462
 463         if (info == NULL) {
 464                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 465                 return -EINVAL;
 466         }
 467
 468         voltage_shift = ffs(info->voltage_mask) - 1;
 469
 470         /* set the registers for the request */
 471         regval = (u8)selector << voltage_shift;
 472         ret = abx500_mask_and_set_register_interruptible(info->dev,
 473                         info->voltage_bank, info->voltage_reg,
 474                         info->voltage_mask, regval);
 475         if (ret < 0)
 476                 dev_err(rdev_get_dev(rdev),
 477                 "couldn't set voltage reg for regulator\n");
 478
 479         dev_vdbg(rdev_get_dev(rdev),
 480                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 481                 " 0x%x\n",
 482                 info->desc.name, info->voltage_bank, info->voltage_reg,
 483                 info->voltage_mask, regval);
 484
 485         return ret;
 486 }
 487
 488 static const struct regulator_ops ab8500_regulator_volt_mode_ops = {
 489         .enable                 = ab8500_regulator_enable,
 490         .disable                = ab8500_regulator_disable,
 491         .is_enabled             = ab8500_regulator_is_enabled,
 492         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 493         .set_mode               = ab8500_regulator_set_mode,
 494         .get_mode               = ab8500_regulator_get_mode,
 495         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 496         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 497         .list_voltage           = regulator_list_voltage_table,
 498 };
 499
 500 static const struct regulator_ops ab8500_regulator_volt_ops = {
 501         .enable         = ab8500_regulator_enable,
 502         .disable        = ab8500_regulator_disable,
 503         .is_enabled     = ab8500_regulator_is_enabled,
 504         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 505         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 506         .list_voltage   = regulator_list_voltage_table,
 507 };
 508
 509 static const struct regulator_ops ab8500_regulator_mode_ops = {
 510         .enable                 = ab8500_regulator_enable,
 511         .disable                = ab8500_regulator_disable,
 512         .is_enabled             = ab8500_regulator_is_enabled,
 513         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 514         .set_mode               = ab8500_regulator_set_mode,
 515         .get_mode               = ab8500_regulator_get_mode,
 516         .list_voltage           = regulator_list_voltage_table,
 517 };
 518
 519 static const struct regulator_ops ab8500_regulator_ops = {
 520         .enable                 = ab8500_regulator_enable,
 521         .disable                = ab8500_regulator_disable,
 522         .is_enabled             = ab8500_regulator_is_enabled,
 523         .list_voltage           = regulator_list_voltage_table,
 524 };
 525
 526 static const struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 527         .enable         = ab8500_regulator_enable,
 528         .disable        = ab8500_regulator_disable,
 529         .is_enabled     = ab8500_regulator_is_enabled,
 530         .set_mode       = ab8500_regulator_set_mode,
 531         .get_mode       = ab8500_regulator_get_mode,
 532         .list_voltage   = regulator_list_voltage_table,
 533 };
 534
 535 /* AB8500 regulator information */
 536 static struct ab8500_regulator_info
 537                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 538         /*
 539          * Variable Voltage Regulators
 540          *   name, min mV, max mV,
 541          *   update bank, reg, mask, enable val
 542          *   volt bank, reg, mask
 543          */
 544         [AB8500_LDO_AUX1] = {
 545                 .desc = {
 546                         .name           = "LDO-AUX1",
 547                         .ops            = &ab8500_regulator_volt_mode_ops,
 548                         .type           = REGULATOR_VOLTAGE,
 549                         .id             = AB8500_LDO_AUX1,
 550                         .owner          = THIS_MODULE,
 551                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 552                         .volt_table     = ldo_vauxn_voltages,
 553                         .enable_time    = 200,
 554                         .supply_name    = "vin",
 555                 },
 556                 .load_lp_uA             = 5000,
 557                 .update_bank            = 0x04,
 558                 .update_reg             = 0x09,
 559                 .update_mask            = 0x03,
 560                 .update_val             = 0x01,
 561                 .update_val_idle        = 0x03,
 562                 .update_val_normal      = 0x01,
 563                 .voltage_bank           = 0x04,
 564                 .voltage_reg            = 0x1f,
 565                 .voltage_mask           = 0x0f,
 566         },
 567         [AB8500_LDO_AUX2] = {
 568                 .desc = {
 569                         .name           = "LDO-AUX2",
 570                         .ops            = &ab8500_regulator_volt_mode_ops,
 571                         .type           = REGULATOR_VOLTAGE,
 572                         .id             = AB8500_LDO_AUX2,
 573                         .owner          = THIS_MODULE,
 574                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 575                         .volt_table     = ldo_vauxn_voltages,
 576                         .enable_time    = 200,
 577                         .supply_name    = "vin",
 578                 },
 579                 .load_lp_uA             = 5000,
 580                 .update_bank            = 0x04,
 581                 .update_reg             = 0x09,
 582                 .update_mask            = 0x0c,
 583                 .update_val             = 0x04,
 584                 .update_val_idle        = 0x0c,
 585                 .update_val_normal      = 0x04,
 586                 .voltage_bank           = 0x04,
 587                 .voltage_reg            = 0x20,
 588                 .voltage_mask           = 0x0f,
 589         },
 590         [AB8500_LDO_AUX3] = {
 591                 .desc = {
 592                         .name           = "LDO-AUX3",
 593                         .ops            = &ab8500_regulator_volt_mode_ops,
 594                         .type           = REGULATOR_VOLTAGE,
 595                         .id             = AB8500_LDO_AUX3,
 596                         .owner          = THIS_MODULE,
 597                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 598                         .volt_table     = ldo_vaux3_voltages,
 599                         .enable_time    = 450,
 600                         .supply_name    = "vin",
 601                 },
 602                 .load_lp_uA             = 5000,
 603                 .update_bank            = 0x04,
 604                 .update_reg             = 0x0a,
 605                 .update_mask            = 0x03,
 606                 .update_val             = 0x01,
 607                 .update_val_idle        = 0x03,
 608                 .update_val_normal      = 0x01,
 609                 .voltage_bank           = 0x04,
 610                 .voltage_reg            = 0x21,
 611                 .voltage_mask           = 0x07,
 612         },
 613         [AB8500_LDO_INTCORE] = {
 614                 .desc = {
 615                         .name           = "LDO-INTCORE",
 616                         .ops            = &ab8500_regulator_volt_mode_ops,
 617                         .type           = REGULATOR_VOLTAGE,
 618                         .id             = AB8500_LDO_INTCORE,
 619                         .owner          = THIS_MODULE,
 620                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 621                         .volt_table     = ldo_vintcore_voltages,
 622                         .enable_time    = 750,
 623                 },
 624                 .load_lp_uA             = 5000,
 625                 .update_bank            = 0x03,
 626                 .update_reg             = 0x80,
 627                 .update_mask            = 0x44,
 628                 .update_val             = 0x44,
 629                 .update_val_idle        = 0x44,
 630                 .update_val_normal      = 0x04,
 631                 .voltage_bank           = 0x03,
 632                 .voltage_reg            = 0x80,
 633                 .voltage_mask           = 0x38,
 634         },
 635
 636         /*
 637          * Fixed Voltage Regulators
 638          *   name, fixed mV,
 639          *   update bank, reg, mask, enable val
 640          */
 641         [AB8500_LDO_TVOUT] = {
 642                 .desc = {
 643                         .name           = "LDO-TVOUT",
 644                         .ops            = &ab8500_regulator_mode_ops,
 645                         .type           = REGULATOR_VOLTAGE,
 646                         .id             = AB8500_LDO_TVOUT,
 647                         .owner          = THIS_MODULE,
 648                         .n_voltages     = 1,
 649                         .volt_table     = fixed_2000000_voltage,
 650                         .enable_time    = 500,
 651                 },
 652                 .load_lp_uA             = 1000,
 653                 .update_bank            = 0x03,
 654                 .update_reg             = 0x80,
 655                 .update_mask            = 0x82,
 656                 .update_val             = 0x02,
 657                 .update_val_idle        = 0x82,
 658                 .update_val_normal      = 0x02,
 659         },
 660         [AB8500_LDO_AUDIO] = {
 661                 .desc = {
 662                         .name           = "LDO-AUDIO",
 663                         .ops            = &ab8500_regulator_ops,
 664                         .type           = REGULATOR_VOLTAGE,
 665                         .id             = AB8500_LDO_AUDIO,
 666                         .owner          = THIS_MODULE,
 667                         .n_voltages     = 1,
 668                         .enable_time    = 140,
 669                         .volt_table     = fixed_2000000_voltage,
 670                 },
 671                 .update_bank            = 0x03,
 672                 .update_reg             = 0x83,
 673                 .update_mask            = 0x02,
 674                 .update_val             = 0x02,
 675         },
 676         [AB8500_LDO_ANAMIC1] = {
 677                 .desc = {
 678                         .name           = "LDO-ANAMIC1",
 679                         .ops            = &ab8500_regulator_ops,
 680                         .type           = REGULATOR_VOLTAGE,
 681                         .id             = AB8500_LDO_ANAMIC1,
 682                         .owner          = THIS_MODULE,
 683                         .n_voltages     = 1,
 684                         .enable_time    = 500,
 685                         .volt_table     = fixed_2050000_voltage,
 686                 },
 687                 .update_bank            = 0x03,
 688                 .update_reg             = 0x83,
 689                 .update_mask            = 0x08,
 690                 .update_val             = 0x08,
 691         },
 692         [AB8500_LDO_ANAMIC2] = {
 693                 .desc = {
 694                         .name           = "LDO-ANAMIC2",
 695                         .ops            = &ab8500_regulator_ops,
 696                         .type           = REGULATOR_VOLTAGE,
 697                         .id             = AB8500_LDO_ANAMIC2,
 698                         .owner          = THIS_MODULE,
 699                         .n_voltages     = 1,
 700                         .enable_time    = 500,
 701                         .volt_table     = fixed_2050000_voltage,
 702                 },
 703                 .update_bank            = 0x03,
 704                 .update_reg             = 0x83,
 705                 .update_mask            = 0x10,
 706                 .update_val             = 0x10,
 707         },
 708         [AB8500_LDO_DMIC] = {
 709                 .desc = {
 710                         .name           = "LDO-DMIC",
 711                         .ops            = &ab8500_regulator_ops,
 712                         .type           = REGULATOR_VOLTAGE,
 713                         .id             = AB8500_LDO_DMIC,
 714                         .owner          = THIS_MODULE,
 715                         .n_voltages     = 1,
 716                         .enable_time    = 420,
 717                         .volt_table     = fixed_1800000_voltage,
 718                 },
 719                 .update_bank            = 0x03,
 720                 .update_reg             = 0x83,
 721                 .update_mask            = 0x04,
 722                 .update_val             = 0x04,
 723         },
 724
 725         /*
 726          * Regulators with fixed voltage and normal/idle modes
 727          */
 728         [AB8500_LDO_ANA] = {
 729                 .desc = {
 730                         .name           = "LDO-ANA",
 731                         .ops            = &ab8500_regulator_mode_ops,
 732                         .type           = REGULATOR_VOLTAGE,
 733                         .id             = AB8500_LDO_ANA,
 734                         .owner          = THIS_MODULE,
 735                         .n_voltages     = 1,
 736                         .enable_time    = 140,
 737                         .volt_table     = fixed_1200000_voltage,
 738                 },
 739                 .load_lp_uA             = 1000,
 740                 .update_bank            = 0x04,
 741                 .update_reg             = 0x06,
 742                 .update_mask            = 0x0c,
 743                 .update_val             = 0x04,
 744                 .update_val_idle        = 0x0c,
 745                 .update_val_normal      = 0x04,
 746         },
 747 };
 748
 749 /* AB8505 regulator information */
 750 static struct ab8500_regulator_info
 751                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 752         /*
 753          * Variable Voltage Regulators
 754          *   name, min mV, max mV,
 755          *   update bank, reg, mask, enable val
 756          *   volt bank, reg, mask
 757          */
 758         [AB8505_LDO_AUX1] = {
 759                 .desc = {
 760                         .name           = "LDO-AUX1",
 761                         .ops            = &ab8500_regulator_volt_mode_ops,
 762                         .type           = REGULATOR_VOLTAGE,
 763                         .id             = AB8505_LDO_AUX1,
 764                         .owner          = THIS_MODULE,
 765                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 766                         .volt_table     = ldo_vauxn_voltages,
 767                 },
 768                 .load_lp_uA             = 5000,
 769                 .update_bank            = 0x04,
 770                 .update_reg             = 0x09,
 771                 .update_mask            = 0x03,
 772                 .update_val             = 0x01,
 773                 .update_val_idle        = 0x03,
 774                 .update_val_normal      = 0x01,
 775                 .voltage_bank           = 0x04,
 776                 .voltage_reg            = 0x1f,
 777                 .voltage_mask           = 0x0f,
 778         },
 779         [AB8505_LDO_AUX2] = {
 780                 .desc = {
 781                         .name           = "LDO-AUX2",
 782                         .ops            = &ab8500_regulator_volt_mode_ops,
 783                         .type           = REGULATOR_VOLTAGE,
 784                         .id             = AB8505_LDO_AUX2,
 785                         .owner          = THIS_MODULE,
 786                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 787                         .volt_table     = ldo_vauxn_voltages,
 788                 },
 789                 .load_lp_uA             = 5000,
 790                 .update_bank            = 0x04,
 791                 .update_reg             = 0x09,
 792                 .update_mask            = 0x0c,
 793                 .update_val             = 0x04,
 794                 .update_val_idle        = 0x0c,
 795                 .update_val_normal      = 0x04,
 796                 .voltage_bank           = 0x04,
 797                 .voltage_reg            = 0x20,
 798                 .voltage_mask           = 0x0f,
 799         },
 800         [AB8505_LDO_AUX3] = {
 801                 .desc = {
 802                         .name           = "LDO-AUX3",
 803                         .ops            = &ab8500_regulator_volt_mode_ops,
 804                         .type           = REGULATOR_VOLTAGE,
 805                         .id             = AB8505_LDO_AUX3,
 806                         .owner          = THIS_MODULE,
 807                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 808                         .volt_table     = ldo_vaux3_voltages,
 809                 },
 810                 .load_lp_uA             = 5000,
 811                 .update_bank            = 0x04,
 812                 .update_reg             = 0x0a,
 813                 .update_mask            = 0x03,
 814                 .update_val             = 0x01,
 815                 .update_val_idle        = 0x03,
 816                 .update_val_normal      = 0x01,
 817                 .voltage_bank           = 0x04,
 818                 .voltage_reg            = 0x21,
 819                 .voltage_mask           = 0x07,
 820         },
 821         [AB8505_LDO_AUX4] = {
 822                 .desc = {
 823                         .name           = "LDO-AUX4",
 824                         .ops            = &ab8500_regulator_volt_mode_ops,
 825                         .type           = REGULATOR_VOLTAGE,
 826                         .id             = AB8505_LDO_AUX4,
 827                         .owner          = THIS_MODULE,
 828                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 829                         .volt_table     = ldo_vauxn_voltages,
 830                 },
 831                 .load_lp_uA             = 5000,
 832                 /* values for Vaux4Regu register */
 833                 .update_bank            = 0x04,
 834                 .update_reg             = 0x2e,
 835                 .update_mask            = 0x03,
 836                 .update_val             = 0x01,
 837                 .update_val_idle        = 0x03,
 838                 .update_val_normal      = 0x01,
 839                 /* values for Vaux4SEL register */
 840                 .voltage_bank           = 0x04,
 841                 .voltage_reg            = 0x2f,
 842                 .voltage_mask           = 0x0f,
 843         },
 844         [AB8505_LDO_AUX5] = {
 845                 .desc = {
 846                         .name           = "LDO-AUX5",
 847                         .ops            = &ab8500_regulator_volt_mode_ops,
 848                         .type           = REGULATOR_VOLTAGE,
 849                         .id             = AB8505_LDO_AUX5,
 850                         .owner          = THIS_MODULE,
 851                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 852                         .volt_table     = ldo_vaux56_voltages,
 853                 },
 854                 .load_lp_uA             = 2000,
 855                 /* values for CtrlVaux5 register */
 856                 .update_bank            = 0x01,
 857                 .update_reg             = 0x55,
 858                 .update_mask            = 0x18,
 859                 .update_val             = 0x10,
 860                 .update_val_idle        = 0x18,
 861                 .update_val_normal      = 0x10,
 862                 .voltage_bank           = 0x01,
 863                 .voltage_reg            = 0x55,
 864                 .voltage_mask           = 0x07,
 865         },
 866         [AB8505_LDO_AUX6] = {
 867                 .desc = {
 868                         .name           = "LDO-AUX6",
 869                         .ops            = &ab8500_regulator_volt_mode_ops,
 870                         .type           = REGULATOR_VOLTAGE,
 871                         .id             = AB8505_LDO_AUX6,
 872                         .owner          = THIS_MODULE,
 873                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 874                         .volt_table     = ldo_vaux56_voltages,
 875                 },
 876                 .load_lp_uA             = 2000,
 877                 /* values for CtrlVaux6 register */
 878                 .update_bank            = 0x01,
 879                 .update_reg             = 0x56,
 880                 .update_mask            = 0x18,
 881                 .update_val             = 0x10,
 882                 .update_val_idle        = 0x18,
 883                 .update_val_normal      = 0x10,
 884                 .voltage_bank           = 0x01,
 885                 .voltage_reg            = 0x56,
 886                 .voltage_mask           = 0x07,
 887         },
 888         [AB8505_LDO_INTCORE] = {
 889                 .desc = {
 890                         .name           = "LDO-INTCORE",
 891                         .ops            = &ab8500_regulator_volt_mode_ops,
 892                         .type           = REGULATOR_VOLTAGE,
 893                         .id             = AB8505_LDO_INTCORE,
 894                         .owner          = THIS_MODULE,
 895                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 896                         .volt_table     = ldo_vintcore_voltages,
 897                 },
 898                 .load_lp_uA             = 5000,
 899                 .update_bank            = 0x03,
 900                 .update_reg             = 0x80,
 901                 .update_mask            = 0x44,
 902                 .update_val             = 0x04,
 903                 .update_val_idle        = 0x44,
 904                 .update_val_normal      = 0x04,
 905                 .voltage_bank           = 0x03,
 906                 .voltage_reg            = 0x80,
 907                 .voltage_mask           = 0x38,
 908         },
 909
 910         /*
 911          * Fixed Voltage Regulators
 912          *   name, fixed mV,
 913          *   update bank, reg, mask, enable val
 914          */
 915         [AB8505_LDO_ADC] = {
 916                 .desc = {
 917                         .name           = "LDO-ADC",
 918                         .ops            = &ab8500_regulator_mode_ops,
 919                         .type           = REGULATOR_VOLTAGE,
 920                         .id             = AB8505_LDO_ADC,
 921                         .owner          = THIS_MODULE,
 922                         .n_voltages     = 1,
 923                         .volt_table     = fixed_2000000_voltage,
 924                         .enable_time    = 10000,
 925                 },
 926                 .load_lp_uA             = 1000,
 927                 .update_bank            = 0x03,
 928                 .update_reg             = 0x80,
 929                 .update_mask            = 0x82,
 930                 .update_val             = 0x02,
 931                 .update_val_idle        = 0x82,
 932                 .update_val_normal      = 0x02,
 933         },
 934         [AB8505_LDO_AUDIO] = {
 935                 .desc = {
 936                         .name           = "LDO-AUDIO",
 937                         .ops            = &ab8500_regulator_volt_ops,
 938                         .type           = REGULATOR_VOLTAGE,
 939                         .id             = AB8505_LDO_AUDIO,
 940                         .owner          = THIS_MODULE,
 941                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
 942                         .volt_table     = ldo_vaudio_voltages,
 943                 },
 944                 .update_bank            = 0x03,
 945                 .update_reg             = 0x83,
 946                 .update_mask            = 0x02,
 947                 .update_val             = 0x02,
 948                 .voltage_bank           = 0x01,
 949                 .voltage_reg            = 0x57,
 950                 .voltage_mask           = 0x70,
 951         },
 952         [AB8505_LDO_ANAMIC1] = {
 953                 .desc = {
 954                         .name           = "LDO-ANAMIC1",
 955                         .ops            = &ab8500_regulator_anamic_mode_ops,
 956                         .type           = REGULATOR_VOLTAGE,
 957                         .id             = AB8505_LDO_ANAMIC1,
 958                         .owner          = THIS_MODULE,
 959                         .n_voltages     = 1,
 960                         .volt_table     = fixed_2050000_voltage,
 961                 },
 962                 .shared_mode            = &ldo_anamic1_shared,
 963                 .update_bank            = 0x03,
 964                 .update_reg             = 0x83,
 965                 .update_mask            = 0x08,
 966                 .update_val             = 0x08,
 967                 .mode_bank              = 0x01,
 968                 .mode_reg               = 0x54,
 969                 .mode_mask              = 0x04,
 970                 .mode_val_idle          = 0x04,
 971                 .mode_val_normal        = 0x00,
 972         },
 973         [AB8505_LDO_ANAMIC2] = {
 974                 .desc = {
 975                         .name           = "LDO-ANAMIC2",
 976                         .ops            = &ab8500_regulator_anamic_mode_ops,
 977                         .type           = REGULATOR_VOLTAGE,
 978                         .id             = AB8505_LDO_ANAMIC2,
 979                         .owner          = THIS_MODULE,
 980                         .n_voltages     = 1,
 981                         .volt_table     = fixed_2050000_voltage,
 982                 },
 983                 .shared_mode            = &ldo_anamic2_shared,
 984                 .update_bank            = 0x03,
 985                 .update_reg             = 0x83,
 986                 .update_mask            = 0x10,
 987                 .update_val             = 0x10,
 988                 .mode_bank              = 0x01,
 989                 .mode_reg               = 0x54,
 990                 .mode_mask              = 0x04,
 991                 .mode_val_idle          = 0x04,
 992                 .mode_val_normal        = 0x00,
 993         },
 994         [AB8505_LDO_AUX8] = {
 995                 .desc = {
 996                         .name           = "LDO-AUX8",
 997                         .ops            = &ab8500_regulator_ops,
 998                         .type           = REGULATOR_VOLTAGE,
 999                         .id             = AB8505_LDO_AUX8,
1000                         .owner          = THIS_MODULE,
1001                         .n_voltages     = 1,
1002                         .volt_table     = fixed_1800000_voltage,
1003                 },
1004                 .update_bank            = 0x03,
1005                 .update_reg             = 0x83,
1006                 .update_mask            = 0x04,
1007                 .update_val             = 0x04,
1008         },
1009         /*
1010          * Regulators with fixed voltage and normal/idle modes
1011          */
1012         [AB8505_LDO_ANA] = {
1013                 .desc = {
1014                         .name           = "LDO-ANA",
1015                         .ops            = &ab8500_regulator_volt_mode_ops,
1016                         .type           = REGULATOR_VOLTAGE,
1017                         .id             = AB8505_LDO_ANA,
1018                         .owner          = THIS_MODULE,
1019                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1020                         .volt_table     = ldo_vana_voltages,
1021                 },
1022                 .load_lp_uA             = 1000,
1023                 .update_bank            = 0x04,
1024                 .update_reg             = 0x06,
1025                 .update_mask            = 0x0c,
1026                 .update_val             = 0x04,
1027                 .update_val_idle        = 0x0c,
1028                 .update_val_normal      = 0x04,
1029                 .voltage_bank           = 0x04,
1030                 .voltage_reg            = 0x29,
1031                 .voltage_mask           = 0x7,
1032         },
1033 };
1034
1035 static struct ab8500_shared_mode ldo_anamic1_shared = {
1036         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1037 };
1038
1039 static struct ab8500_shared_mode ldo_anamic2_shared = {
1040         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1041 };
1042
1043 struct ab8500_reg_init {
1044         u8 bank;
1045         u8 addr;
1046         u8 mask;
1047 };
1048
1049 #define REG_INIT(_id, _bank, _addr, _mask)      \
1050         [_id] = {                               \
1051                 .bank = _bank,                  \
1052                 .addr = _addr,                  \
1053                 .mask = _mask,                  \
1054         }
1055
1056 /* AB8500 register init */
1057 static struct ab8500_reg_init ab8500_reg_init[] = {
1058         /*
1059          * 0x30, VanaRequestCtrl
1060          * 0xc0, VextSupply1RequestCtrl
1061          */
1062         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1063         /*
1064          * 0x03, VextSupply2RequestCtrl
1065          * 0x0c, VextSupply3RequestCtrl
1066          * 0x30, Vaux1RequestCtrl
1067          * 0xc0, Vaux2RequestCtrl
1068          */
1069         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1070         /*
1071          * 0x03, Vaux3RequestCtrl
1072          * 0x04, SwHPReq
1073          */
1074         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1075         /*
1076          * 0x08, VanaSysClkReq1HPValid
1077          * 0x20, Vaux1SysClkReq1HPValid
1078          * 0x40, Vaux2SysClkReq1HPValid
1079          * 0x80, Vaux3SysClkReq1HPValid
1080          */
1081         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1082         /*
1083          * 0x10, VextSupply1SysClkReq1HPValid
1084          * 0x20, VextSupply2SysClkReq1HPValid
1085          * 0x40, VextSupply3SysClkReq1HPValid
1086          */
1087         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1088         /*
1089          * 0x08, VanaHwHPReq1Valid
1090          * 0x20, Vaux1HwHPReq1Valid
1091          * 0x40, Vaux2HwHPReq1Valid
1092          * 0x80, Vaux3HwHPReq1Valid
1093          */
1094         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1095         /*
1096          * 0x01, VextSupply1HwHPReq1Valid
1097          * 0x02, VextSupply2HwHPReq1Valid
1098          * 0x04, VextSupply3HwHPReq1Valid
1099          */
1100         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1101         /*
1102          * 0x08, VanaHwHPReq2Valid
1103          * 0x20, Vaux1HwHPReq2Valid
1104          * 0x40, Vaux2HwHPReq2Valid
1105          * 0x80, Vaux3HwHPReq2Valid
1106          */
1107         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1108         /*
1109          * 0x01, VextSupply1HwHPReq2Valid
1110          * 0x02, VextSupply2HwHPReq2Valid
1111          * 0x04, VextSupply3HwHPReq2Valid
1112          */
1113         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1114         /*
1115          * 0x20, VanaSwHPReqValid
1116          * 0x80, Vaux1SwHPReqValid
1117          */
1118         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1119         /*
1120          * 0x01, Vaux2SwHPReqValid
1121          * 0x02, Vaux3SwHPReqValid
1122          * 0x04, VextSupply1SwHPReqValid
1123          * 0x08, VextSupply2SwHPReqValid
1124          * 0x10, VextSupply3SwHPReqValid
1125          */
1126         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1127         /*
1128          * 0x02, SysClkReq2Valid1
1129          * 0x04, SysClkReq3Valid1
1130          * 0x08, SysClkReq4Valid1
1131          * 0x10, SysClkReq5Valid1
1132          * 0x20, SysClkReq6Valid1
1133          * 0x40, SysClkReq7Valid1
1134          * 0x80, SysClkReq8Valid1
1135          */
1136         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1137         /*
1138          * 0x02, SysClkReq2Valid2
1139          * 0x04, SysClkReq3Valid2
1140          * 0x08, SysClkReq4Valid2
1141          * 0x10, SysClkReq5Valid2
1142          * 0x20, SysClkReq6Valid2
1143          * 0x40, SysClkReq7Valid2
1144          * 0x80, SysClkReq8Valid2
1145          */
1146         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1147         /*
1148          * 0x02, VTVoutEna
1149          * 0x04, Vintcore12Ena
1150          * 0x38, Vintcore12Sel
1151          * 0x40, Vintcore12LP
1152          * 0x80, VTVoutLP
1153          */
1154         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1155         /*
1156          * 0x02, VaudioEna
1157          * 0x04, VdmicEna
1158          * 0x08, Vamic1Ena
1159          * 0x10, Vamic2Ena
1160          */
1161         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1162         /*
1163          * 0x01, Vamic1_dzout
1164          * 0x02, Vamic2_dzout
1165          */
1166         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1167         /*
1168          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1169          * 0x0c, VanaRegu
1170          */
1171         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1172         /*
1173          * 0x01, VrefDDREna
1174          * 0x02, VrefDDRSleepMode
1175          */
1176         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1177         /*
1178          * 0x03, VextSupply1Regu
1179          * 0x0c, VextSupply2Regu
1180          * 0x30, VextSupply3Regu
1181          * 0x40, ExtSupply2Bypass
1182          * 0x80, ExtSupply3Bypass
1183          */
1184         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1185         /*
1186          * 0x03, Vaux1Regu
1187          * 0x0c, Vaux2Regu
1188          */
1189         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1190         /*
1191          * 0x03, Vaux3Regu
1192          */
1193         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1194         /*
1195          * 0x0f, Vaux1Sel
1196          */
1197         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1198         /*
1199          * 0x0f, Vaux2Sel
1200          */
1201         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1202         /*
1203          * 0x07, Vaux3Sel
1204          */
1205         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1206         /*
1207          * 0x01, VextSupply12LP
1208          */
1209         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1210         /*
1211          * 0x04, Vaux1Disch
1212          * 0x08, Vaux2Disch
1213          * 0x10, Vaux3Disch
1214          * 0x20, Vintcore12Disch
1215          * 0x40, VTVoutDisch
1216          * 0x80, VaudioDisch
1217          */
1218         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1219         /*
1220          * 0x02, VanaDisch
1221          * 0x04, VdmicPullDownEna
1222          * 0x10, VdmicDisch
1223          */
1224         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1225 };
1226
1227 /* AB8505 register init */
1228 static struct ab8500_reg_init ab8505_reg_init[] = {
1229         /*
1230          * 0x03, VarmRequestCtrl
1231          * 0x0c, VsmpsCRequestCtrl
1232          * 0x30, VsmpsARequestCtrl
1233          * 0xc0, VsmpsBRequestCtrl
1234          */
1235         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1236         /*
1237          * 0x03, VsafeRequestCtrl
1238          * 0x0c, VpllRequestCtrl
1239          * 0x30, VanaRequestCtrl
1240          */
1241         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1242         /*
1243          * 0x30, Vaux1RequestCtrl
1244          * 0xc0, Vaux2RequestCtrl
1245          */
1246         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1247         /*
1248          * 0x03, Vaux3RequestCtrl
1249          * 0x04, SwHPReq
1250          */
1251         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1252         /*
1253          * 0x01, VsmpsASysClkReq1HPValid
1254          * 0x02, VsmpsBSysClkReq1HPValid
1255          * 0x04, VsafeSysClkReq1HPValid
1256          * 0x08, VanaSysClkReq1HPValid
1257          * 0x10, VpllSysClkReq1HPValid
1258          * 0x20, Vaux1SysClkReq1HPValid
1259          * 0x40, Vaux2SysClkReq1HPValid
1260          * 0x80, Vaux3SysClkReq1HPValid
1261          */
1262         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1263         /*
1264          * 0x01, VsmpsCSysClkReq1HPValid
1265          * 0x02, VarmSysClkReq1HPValid
1266          * 0x04, VbbSysClkReq1HPValid
1267          * 0x08, VsmpsMSysClkReq1HPValid
1268          */
1269         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1270         /*
1271          * 0x01, VsmpsAHwHPReq1Valid
1272          * 0x02, VsmpsBHwHPReq1Valid
1273          * 0x04, VsafeHwHPReq1Valid
1274          * 0x08, VanaHwHPReq1Valid
1275          * 0x10, VpllHwHPReq1Valid
1276          * 0x20, Vaux1HwHPReq1Valid
1277          * 0x40, Vaux2HwHPReq1Valid
1278          * 0x80, Vaux3HwHPReq1Valid
1279          */
1280         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1281         /*
1282          * 0x08, VsmpsMHwHPReq1Valid
1283          */
1284         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
1285         /*
1286          * 0x01, VsmpsAHwHPReq2Valid
1287          * 0x02, VsmpsBHwHPReq2Valid
1288          * 0x04, VsafeHwHPReq2Valid
1289          * 0x08, VanaHwHPReq2Valid
1290          * 0x10, VpllHwHPReq2Valid
1291          * 0x20, Vaux1HwHPReq2Valid
1292          * 0x40, Vaux2HwHPReq2Valid
1293          * 0x80, Vaux3HwHPReq2Valid
1294          */
1295         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1296         /*
1297          * 0x08, VsmpsMHwHPReq2Valid
1298          */
1299         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
1300         /*
1301          * 0x01, VsmpsCSwHPReqValid
1302          * 0x02, VarmSwHPReqValid
1303          * 0x04, VsmpsASwHPReqValid
1304          * 0x08, VsmpsBSwHPReqValid
1305          * 0x10, VsafeSwHPReqValid
1306          * 0x20, VanaSwHPReqValid
1307          * 0x40, VpllSwHPReqValid
1308          * 0x80, Vaux1SwHPReqValid
1309          */
1310         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
1311         /*
1312          * 0x01, Vaux2SwHPReqValid
1313          * 0x02, Vaux3SwHPReqValid
1314          * 0x20, VsmpsMSwHPReqValid
1315          */
1316         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
1317         /*
1318          * 0x02, SysClkReq2Valid1
1319          * 0x04, SysClkReq3Valid1
1320          * 0x08, SysClkReq4Valid1
1321          */
1322         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1323         /*
1324          * 0x02, SysClkReq2Valid2
1325          * 0x04, SysClkReq3Valid2
1326          * 0x08, SysClkReq4Valid2
1327          */
1328         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1329         /*
1330          * 0x01, Vaux4SwHPReqValid
1331          * 0x02, Vaux4HwHPReq2Valid
1332          * 0x04, Vaux4HwHPReq1Valid
1333          * 0x08, Vaux4SysClkReq1HPValid
1334          */
1335         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
1336         /*
1337          * 0x02, VadcEna
1338          * 0x04, VintCore12Ena
1339          * 0x38, VintCore12Sel
1340          * 0x40, VintCore12LP
1341          * 0x80, VadcLP
1342          */
1343         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
1344         /*
1345          * 0x02, VaudioEna
1346          * 0x04, VdmicEna
1347          * 0x08, Vamic1Ena
1348          * 0x10, Vamic2Ena
1349          */
1350         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1351         /*
1352          * 0x01, Vamic1_dzout
1353          * 0x02, Vamic2_dzout
1354          */
1355         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1356         /*
1357          * 0x03, VsmpsARegu
1358          * 0x0c, VsmpsASelCtrl
1359          * 0x10, VsmpsAAutoMode
1360          * 0x20, VsmpsAPWMMode
1361          */
1362         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
1363         /*
1364          * 0x03, VsmpsBRegu
1365          * 0x0c, VsmpsBSelCtrl
1366          * 0x10, VsmpsBAutoMode
1367          * 0x20, VsmpsBPWMMode
1368          */
1369         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
1370         /*
1371          * 0x03, VsafeRegu
1372          * 0x0c, VsafeSelCtrl
1373          * 0x10, VsafeAutoMode
1374          * 0x20, VsafePWMMode
1375          */
1376         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
1377         /*
1378          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1379          * 0x0c, VanaRegu
1380          */
1381         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1382         /*
1383          * 0x03, VextSupply1Regu
1384          * 0x0c, VextSupply2Regu
1385          * 0x30, VextSupply3Regu
1386          * 0x40, ExtSupply2Bypass
1387          * 0x80, ExtSupply3Bypass
1388          */
1389         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1390         /*
1391          * 0x03, Vaux1Regu
1392          * 0x0c, Vaux2Regu
1393          */
1394         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
1395         /*
1396          * 0x0f, Vaux3Regu
1397          */
1398         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
1399         /*
1400          * 0x3f, VsmpsASel1
1401          */
1402         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
1403         /*
1404          * 0x3f, VsmpsASel2
1405          */
1406         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
1407         /*
1408          * 0x3f, VsmpsASel3
1409          */
1410         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
1411         /*
1412          * 0x3f, VsmpsBSel1
1413          */
1414         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
1415         /*
1416          * 0x3f, VsmpsBSel2
1417          */
1418         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
1419         /*
1420          * 0x3f, VsmpsBSel3
1421          */
1422         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
1423         /*
1424          * 0x7f, VsafeSel1
1425          */
1426         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
1427         /*
1428          * 0x3f, VsafeSel2
1429          */
1430         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
1431         /*
1432          * 0x3f, VsafeSel3
1433          */
1434         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
1435         /*
1436          * 0x0f, Vaux1Sel
1437          */
1438         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
1439         /*
1440          * 0x0f, Vaux2Sel
1441          */
1442         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
1443         /*
1444          * 0x07, Vaux3Sel
1445          * 0x30, VRF1Sel
1446          */
1447         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
1448         /*
1449          * 0x03, Vaux4RequestCtrl
1450          */
1451         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
1452         /*
1453          * 0x03, Vaux4Regu
1454          */
1455         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
1456         /*
1457          * 0x0f, Vaux4Sel
1458          */
1459         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
1460         /*
1461          * 0x04, Vaux1Disch
1462          * 0x08, Vaux2Disch
1463          * 0x10, Vaux3Disch
1464          * 0x20, Vintcore12Disch
1465          * 0x40, VTVoutDisch
1466          * 0x80, VaudioDisch
1467          */
1468         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1469         /*
1470          * 0x02, VanaDisch
1471          * 0x04, VdmicPullDownEna
1472          * 0x10, VdmicDisch
1473          */
1474         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1475         /*
1476          * 0x01, Vaux4Disch
1477          */
1478         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
1479         /*
1480          * 0x07, Vaux5Sel
1481          * 0x08, Vaux5LP
1482          * 0x10, Vaux5Ena
1483          * 0x20, Vaux5Disch
1484          * 0x40, Vaux5DisSfst
1485          * 0x80, Vaux5DisPulld
1486          */
1487         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
1488         /*
1489          * 0x07, Vaux6Sel
1490          * 0x08, Vaux6LP
1491          * 0x10, Vaux6Ena
1492          * 0x80, Vaux6DisPulld
1493          */
1494         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
1495 };
1496
1497 static struct of_regulator_match ab8500_regulator_match[] = {
1498         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
1499         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
1500         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
1501         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1502         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
1503         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
1504         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1505         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1506         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
1507         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
1508 };
1509
1510 static struct of_regulator_match ab8505_regulator_match[] = {
1511         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
1512         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
1513         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
1514         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
1515         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
1516         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
1517         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1518         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
1519         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
1520         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
1521         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
1522         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
1523         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
1524 };
1525
1526 static struct {
1527         struct ab8500_regulator_info *info;
1528         int info_size;
1529         struct ab8500_reg_init *init;
1530         int init_size;
1531         struct of_regulator_match *match;
1532         int match_size;
1533 } abx500_regulator;
1534
1535 static void abx500_get_regulator_info(struct ab8500 *ab8500)
1536 {
1537         if (is_ab8505(ab8500)) {
1538                 abx500_regulator.info = ab8505_regulator_info;
1539                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
1540                 abx500_regulator.init = ab8505_reg_init;
1541                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
1542                 abx500_regulator.match = ab8505_regulator_match;
1543                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
1544         } else {
1545                 abx500_regulator.info = ab8500_regulator_info;
1546                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
1547                 abx500_regulator.init = ab8500_reg_init;
1548                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
1549                 abx500_regulator.match = ab8500_regulator_match;
1550                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
1551         }
1552 }
1553
1554 static int ab8500_regulator_register(struct platform_device *pdev,
1555                                      struct regulator_init_data *init_data,
1556                                      int id, struct device_node *np)
1557 {
1558         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1559         struct ab8500_regulator_info *info = NULL;
1560         struct regulator_config config = { };
1561         struct regulator_dev *rdev;
1562
1563         /* assign per-regulator data */
1564         info = &abx500_regulator.info[id];
1565         info->dev = &pdev->dev;
1566
1567         config.dev = &pdev->dev;
1568         config.init_data = init_data;
1569         config.driver_data = info;
1570         config.of_node = np;
1571
1572         /* fix for hardware before ab8500v2.0 */
1573         if (is_ab8500_1p1_or_earlier(ab8500)) {
1574                 if (info->desc.id == AB8500_LDO_AUX3) {
1575                         info->desc.n_voltages =
1576                                 ARRAY_SIZE(ldo_vauxn_voltages);
1577                         info->desc.volt_table = ldo_vauxn_voltages;
1578                         info->voltage_mask = 0xf;
1579                 }
1580         }
1581
1582         /* register regulator with framework */
1583         rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
1584         if (IS_ERR(rdev)) {
1585                 dev_err(&pdev->dev, "failed to register regulator %s\n",
1586                         info->desc.name);
1587                 return PTR_ERR(rdev);
1588         }
1589
1590         return 0;
1591 }
1592
1593 static int ab8500_regulator_probe(struct platform_device *pdev)
1594 {
1595         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1596         struct device_node *np = pdev->dev.of_node;
1597         struct of_regulator_match *match;
1598         int err, i;
1599
1600         if (!ab8500) {
1601                 dev_err(&pdev->dev, "null mfd parent\n");
1602                 return -EINVAL;
1603         }
1604
1605         abx500_get_regulator_info(ab8500);
1606
1607         err = of_regulator_match(&pdev->dev, np,
1608                                  abx500_regulator.match,
1609                                  abx500_regulator.match_size);
1610         if (err < 0) {
1611                 dev_err(&pdev->dev,
1612                         "Error parsing regulator init data: %d\n", err);
1613                 return err;
1614         }
1615
1616         match = abx500_regulator.match;
1617         for (i = 0; i < abx500_regulator.info_size; i++) {
1618                 err = ab8500_regulator_register(pdev, match[i].init_data, i,
1619                                                 match[i].of_node);
1620                 if (err)
1621                         return err;
1622         }
1623
1624         return 0;
1625 }
1626
1627 static struct platform_driver ab8500_regulator_driver = {
1628         .probe = ab8500_regulator_probe,
1629         .driver         = {
1630                 .name   = "ab8500-regulator",
1631         },
1632 };
1633
1634 static int __init ab8500_regulator_init(void)
1635 {
1636         int ret;
1637
1638         ret = platform_driver_register(&ab8500_regulator_driver);
1639         if (ret != 0)
1640                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1641
1642         return ret;
1643 }
1644 subsys_initcall(ab8500_regulator_init);
1645
1646 static void __exit ab8500_regulator_exit(void)
1647 {
1648         platform_driver_unregister(&ab8500_regulator_driver);
1649 }
1650 module_exit(ab8500_regulator_exit);
1651
1652 MODULE_LICENSE("GPL v2");
1653 MODULE_AUTHOR("Sundar Iyer <[email protected]>");
1654 MODULE_AUTHOR("Bengt Jonsson <[email protected]>");
1655 MODULE_AUTHOR("Daniel Willerud <[email protected]>");
1656 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1657 MODULE_ALIAS("platform:ab8500-regulator");