1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
9 #ifndef __SOUND_SOC_INTEL_AVS_MSGS_H
10 #define __SOUND_SOC_INTEL_AVS_MSGS_H
14 #define AVS_MAILBOX_SIZE 4096
21 enum avs_msg_direction {
26 enum avs_global_msg_type {
27 AVS_GLB_ROM_CONTROL = 1,
28 AVS_GLB_LOAD_MULTIPLE_MODULES = 15,
29 AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16,
30 AVS_GLB_CREATE_PIPELINE = 17,
31 AVS_GLB_DELETE_PIPELINE = 18,
32 AVS_GLB_SET_PIPELINE_STATE = 19,
33 AVS_GLB_GET_PIPELINE_STATE = 20,
34 AVS_GLB_LOAD_LIBRARY = 24,
35 AVS_GLB_NOTIFICATION = 27,
38 union avs_global_msg {
45 u32 global_msg_type:5;
51 u32 rom_ctrl_msg_type:9;
59 /* pipeline management */
68 } ppl; /* generic ppl request */
85 /* pipeline management */
87 u32 lp:1; /* low power flag */
89 u32 attributes:16; /* additional scheduling flags */
101 enum avs_module_msg_type {
102 AVS_MOD_INIT_INSTANCE = 0,
103 AVS_MOD_LARGE_CONFIG_GET = 3,
104 AVS_MOD_LARGE_CONFIG_SET = 4,
108 AVS_MOD_SET_D0IX = 8,
109 AVS_MOD_DELETE_INSTANCE = 11,
112 union avs_module_msg {
120 u32 module_msg_type:5;
128 u32 param_block_size:16;
129 u32 ppl_instance_id:8;
134 u32 data_off_size:20;
135 u32 large_param_id:8;
140 u32 dst_module_id:16;
141 u32 dst_instance_id:8;
153 #define AVS_IPC_NOT_SUPPORTED 15
155 union avs_reply_msg {
162 u32 global_msg_type:5;
173 /* pipeline management */
177 /* module management */
179 u32 data_off_size:20;
180 u32 large_param_id:8;
188 enum avs_notify_msg_type {
189 AVS_NOTIFY_PHRASE_DETECTED = 4,
190 AVS_NOTIFY_RESOURCE_EVENT = 5,
191 AVS_NOTIFY_LOG_BUFFER_STATUS = 6,
192 AVS_NOTIFY_FW_READY = 8,
193 AVS_NOTIFY_EXCEPTION_CAUGHT = 10,
194 AVS_NOTIFY_MODULE_EVENT = 12,
197 union avs_notify_msg {
204 u32 notify_msg_type:8;
205 u32 global_msg_type:5;
218 u32 stack_dump_size:16;
224 #define AVS_MSG(hdr) { .val = hdr }
226 #define AVS_GLOBAL_REQUEST(msg_type) \
228 .global_msg_type = AVS_GLB_##msg_type, \
229 .msg_direction = AVS_MSG_REQUEST, \
230 .msg_target = AVS_FW_GEN_MSG, \
233 #define AVS_MODULE_REQUEST(msg_type) \
235 .module_msg_type = AVS_MOD_##msg_type, \
236 .msg_direction = AVS_MSG_REQUEST, \
237 .msg_target = AVS_MOD_MSG, \
240 #define AVS_NOTIFICATION(msg_type) \
242 .notify_msg_type = AVS_NOTIFY_##msg_type,\
243 .global_msg_type = AVS_GLB_NOTIFICATION,\
244 .msg_direction = AVS_MSG_REPLY, \
245 .msg_target = AVS_FW_GEN_MSG, \
248 #define avs_msg_is_reply(hdr) \
250 union avs_reply_msg __msg = AVS_MSG(hdr); \
251 __msg.msg_direction == AVS_MSG_REPLY && \
252 __msg.global_msg_type != AVS_GLB_NOTIFICATION; \
255 /* Notification types */
257 struct avs_notify_voice_data {
262 struct avs_notify_res_data {
270 struct avs_notify_mod_data {
271 u32 module_instance_id;
278 enum avs_rom_control_msg_type {
279 AVS_ROM_SET_BOOT_CONFIG = 0,
282 int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge);
284 /* Code loading messages */
285 int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
286 int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids);
287 int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id);
289 /* Pipeline management messages */
290 enum avs_pipeline_state {
291 AVS_PPL_STATE_INVALID,
292 AVS_PPL_STATE_UNINITIALIZED,
294 AVS_PPL_STATE_PAUSED,
295 AVS_PPL_STATE_RUNNING,
298 int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
299 u8 instance_id, bool lp, u16 attributes);
300 int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id);
301 int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id,
302 enum avs_pipeline_state state);
303 int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id,
304 enum avs_pipeline_state *state);
306 /* Module management messages */
307 int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id,
308 u8 ppl_id, u8 core_id, u8 domain,
309 void *param, u32 param_size);
310 int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id);
311 int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id,
312 u16 dst_module_id, u8 dst_instance_id,
313 u8 dst_queue, u8 src_queue);
314 int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id,
315 u16 dst_module_id, u8 dst_instance_id,
316 u8 dst_queue, u8 src_queue);
317 int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id,
318 u8 instance_id, u8 param_id,
319 u8 *request, size_t request_size);
320 int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id,
321 u8 param_id, u8 *request_data, size_t request_size,
322 u8 **reply_data, size_t *reply_size);
324 /* DSP cores and domains power management messages */
325 struct avs_dxstate_info {
326 u32 core_mask; /* which cores are subject for power transition */
327 u32 dx_mask; /* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */
330 int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup);
331 int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming);
333 /* Base-firmware runtime parameters */
335 #define AVS_BASEFW_MOD_ID 0
336 #define AVS_BASEFW_INST_ID 0
338 enum avs_basefw_runtime_param {
339 AVS_BASEFW_ENABLE_LOGS = 6,
340 AVS_BASEFW_FIRMWARE_CONFIG = 7,
341 AVS_BASEFW_HARDWARE_CONFIG = 8,
342 AVS_BASEFW_MODULES_INFO = 9,
343 AVS_BASEFW_LIBRARIES_INFO = 16,
344 AVS_BASEFW_SYSTEM_TIME = 20,
347 enum avs_log_enable {
352 enum avs_skl_log_priority {
353 AVS_SKL_LOG_CRITICAL = 1,
360 struct skl_log_state {
365 struct skl_log_state_info {
367 struct skl_log_state logs_core[];
370 struct apl_log_state_info {
371 u32 aging_timer_period;
372 u32 fifo_full_timer_period;
374 struct skl_log_state logs_core[];
377 int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size);
379 struct avs_fw_version {
386 enum avs_fw_cfg_params {
387 AVS_FW_CFG_FW_VERSION = 0,
388 AVS_FW_CFG_MEMORY_RECLAIMED,
389 AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ,
390 AVS_FW_CFG_FAST_CLOCK_FREQ_HZ,
391 AVS_FW_CFG_DMA_BUFFER_CONFIG,
392 AVS_FW_CFG_ALH_SUPPORT_LEVEL,
393 AVS_FW_CFG_IPC_DL_MAILBOX_BYTES,
394 AVS_FW_CFG_IPC_UL_MAILBOX_BYTES,
395 AVS_FW_CFG_TRACE_LOG_BYTES,
396 AVS_FW_CFG_MAX_PPL_COUNT,
397 AVS_FW_CFG_MAX_ASTATE_COUNT,
398 AVS_FW_CFG_MAX_MODULE_PIN_COUNT,
399 AVS_FW_CFG_MODULES_COUNT,
400 AVS_FW_CFG_MAX_MOD_INST_COUNT,
401 AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT,
402 AVS_FW_CFG_LL_PRI_COUNT,
403 AVS_FW_CFG_MAX_DP_TASKS_COUNT,
404 AVS_FW_CFG_MAX_LIBS_COUNT,
405 AVS_FW_CFG_SCHEDULER_CONFIG,
406 AVS_FW_CFG_XTAL_FREQ_HZ,
407 AVS_FW_CFG_CLOCKS_CONFIG,
409 AVS_FW_CFG_POWER_GATING_POLICY,
410 AVS_FW_CFG_ASSERT_MODE,
414 struct avs_fw_version fw_version;
415 u32 memory_reclaimed;
416 u32 slow_clock_freq_hz;
417 u32 fast_clock_freq_hz;
419 u32 ipc_dl_mailbox_bytes;
420 u32 ipc_ul_mailbox_bytes;
423 u32 max_astate_count;
424 u32 max_module_pin_count;
426 u32 max_mod_inst_count;
427 u32 max_ll_tasks_per_pri_count;
429 u32 max_dp_tasks_count;
432 u32 power_gating_policy;
435 int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg);
437 enum avs_hw_cfg_params {
439 AVS_HW_CFG_DSP_CORES,
440 AVS_HW_CFG_MEM_PAGE_BYTES,
441 AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES,
443 AVS_HW_CFG_GPDMA_CAPS,
444 AVS_HW_CFG_GATEWAY_COUNT,
445 AVS_HW_CFG_HP_EBB_COUNT,
446 AVS_HW_CFG_LP_EBB_COUNT,
447 AVS_HW_CFG_EBB_SIZE_BYTES,
450 enum avs_iface_version {
451 AVS_AVS_VER_1_5 = 0x10005,
452 AVS_AVS_VER_1_8 = 0x10008,
455 enum avs_i2s_version {
456 AVS_I2S_VER_15_SKYLAKE = 0x00000,
457 AVS_I2S_VER_15_BROXTON = 0x10000,
458 AVS_I2S_VER_15_BROXTON_P = 0x20000,
459 AVS_I2S_VER_18_KBL_CNL = 0x30000,
462 struct avs_i2s_caps {
472 u32 total_phys_mem_pages;
473 struct avs_i2s_caps i2s_caps;
480 int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg);
482 #define AVS_MODULE_LOAD_TYPE_BUILTIN 0
483 #define AVS_MODULE_LOAD_TYPE_LOADABLE 1
484 #define AVS_MODULE_STATE_LOADED BIT(0)
486 struct avs_module_type {
495 union avs_segment_flags {
511 struct avs_segment_desc {
512 union avs_segment_flags flags;
517 struct avs_module_entry {
522 struct avs_module_type type;
528 u16 instance_max_count;
529 u16 instance_bss_size;
530 struct avs_segment_desc segments[3];
533 struct avs_mods_info {
535 struct avs_module_entry entries[];
538 static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry)
540 return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN ||
541 mentry->state_flags & AVS_MODULE_STATE_LOADED;
544 int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info);
546 struct avs_sys_time {
551 int avs_ipc_set_system_time(struct avs_dev *adev);
553 /* Module configuration */
555 #define AVS_MIXIN_MOD_UUID \
556 GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09)
558 #define AVS_MIXOUT_MOD_UUID \
559 GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0)
561 #define AVS_COPIER_MOD_UUID \
562 GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA)
564 #define AVS_PEAKVOL_MOD_UUID \
565 GUID_INIT(0x8A171323, 0x94A3, 0x4E1D, 0xAF, 0xE9, 0xFE, 0x5D, 0xBA, 0xa4, 0xC3, 0x93)
567 #define AVS_GAIN_MOD_UUID \
568 GUID_INIT(0x61BCA9A8, 0x18D0, 0x4A18, 0x8E, 0x7B, 0x26, 0x39, 0x21, 0x98, 0x04, 0xB7)
570 #define AVS_KPBUFF_MOD_UUID \
571 GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6)
573 #define AVS_MICSEL_MOD_UUID \
574 GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A)
576 #define AVS_MUX_MOD_UUID \
577 GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69)
579 #define AVS_UPDWMIX_MOD_UUID \
580 GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35)
582 #define AVS_SRCINTC_MOD_UUID \
583 GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE)
585 #define AVS_PROBE_MOD_UUID \
586 GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF)
588 #define AVS_AEC_MOD_UUID \
589 GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05)
591 #define AVS_ASRC_MOD_UUID \
592 GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4)
594 #define AVS_INTELWOV_MOD_UUID \
595 GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7)
598 enum avs_channel_index {
599 AVS_CHANNEL_LEFT = 0,
600 AVS_CHANNEL_RIGHT = 1,
601 AVS_CHANNEL_CENTER = 2,
602 AVS_CHANNEL_LEFT_SURROUND = 3,
603 AVS_CHANNEL_CENTER_SURROUND = 3,
604 AVS_CHANNEL_RIGHT_SURROUND = 4,
606 AVS_CHANNEL_INVALID = 0xF,
609 enum avs_channel_config {
610 AVS_CHANNEL_CONFIG_MONO = 0,
611 AVS_CHANNEL_CONFIG_STEREO = 1,
612 AVS_CHANNEL_CONFIG_2_1 = 2,
613 AVS_CHANNEL_CONFIG_3_0 = 3,
614 AVS_CHANNEL_CONFIG_3_1 = 4,
615 AVS_CHANNEL_CONFIG_QUATRO = 5,
616 AVS_CHANNEL_CONFIG_4_0 = 6,
617 AVS_CHANNEL_CONFIG_5_0 = 7,
618 AVS_CHANNEL_CONFIG_5_1 = 8,
619 AVS_CHANNEL_CONFIG_DUAL_MONO = 9,
620 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10,
621 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11,
622 AVS_CHANNEL_CONFIG_4_CHANNEL = 12,
623 AVS_CHANNEL_CONFIG_INVALID
626 enum avs_interleaving {
627 AVS_INTERLEAVING_PER_CHANNEL = 0,
628 AVS_INTERLEAVING_PER_SAMPLE = 1,
631 enum avs_sample_type {
632 AVS_SAMPLE_TYPE_INT_MSB = 0,
633 AVS_SAMPLE_TYPE_INT_LSB = 1,
634 AVS_SAMPLE_TYPE_INT_SIGNED = 2,
635 AVS_SAMPLE_TYPE_INT_UNSIGNED = 3,
636 AVS_SAMPLE_TYPE_FLOAT = 4,
639 #define AVS_CHANNELS_MAX 8
640 #define AVS_ALL_CHANNELS_MASK UINT_MAX
642 struct avs_audio_format {
649 u32 valid_bit_depth:8;
654 struct avs_modcfg_base {
659 struct avs_audio_format audio_fmt;
662 struct avs_pin_format {
665 struct avs_audio_format audio_fmt;
668 struct avs_modcfg_ext {
669 struct avs_modcfg_base base;
673 /* input pin formats followed by output ones */
674 struct avs_pin_format pin_fmts[];
678 AVS_DMA_HDA_HOST_OUTPUT = 0,
679 AVS_DMA_HDA_HOST_INPUT = 1,
680 AVS_DMA_HDA_LINK_OUTPUT = 8,
681 AVS_DMA_HDA_LINK_INPUT = 9,
682 AVS_DMA_DMIC_LINK_INPUT = 11,
683 AVS_DMA_I2S_LINK_OUTPUT = 12,
684 AVS_DMA_I2S_LINK_INPUT = 13,
687 union avs_virtual_index {
700 union avs_connector_node_id {
709 #define INVALID_PIPELINE_ID 0xFF
710 #define INVALID_NODE_ID \
711 ((union avs_connector_node_id) { UINT_MAX })
713 union avs_gtw_attributes {
716 u32 lp_buffer_alloc:1;
721 struct avs_copier_gtw_cfg {
722 union avs_connector_node_id node_id;
726 union avs_gtw_attributes attrs;
731 struct avs_copier_cfg {
732 struct avs_modcfg_base base;
733 struct avs_audio_format out_fmt;
735 struct avs_copier_gtw_cfg gtw_cfg;
738 struct avs_volume_cfg {
742 u32 reserved; /* alignment */
746 struct avs_peakvol_cfg {
747 struct avs_modcfg_base base;
748 struct avs_volume_cfg vols[];
751 struct avs_micsel_cfg {
752 struct avs_modcfg_base base;
753 struct avs_audio_format out_fmt;
757 struct avs_modcfg_base base;
758 struct avs_audio_format ref_fmt;
759 struct avs_audio_format out_fmt;
762 struct avs_updown_mixer_cfg {
763 struct avs_modcfg_base base;
764 u32 out_channel_config;
765 u32 coefficients_select;
766 s32 coefficients[AVS_CHANNELS_MAX];
771 struct avs_modcfg_base base;
775 struct avs_probe_gtw_cfg {
776 union avs_connector_node_id node_id;
780 struct avs_probe_cfg {
781 struct avs_modcfg_base base;
782 struct avs_probe_gtw_cfg gtw_cfg;
786 struct avs_modcfg_base base;
787 struct avs_audio_format ref_fmt;
788 struct avs_audio_format out_fmt;
792 struct avs_asrc_cfg {
793 struct avs_modcfg_base base;
798 u32 disable_jitter_buffer:1;
803 struct avs_modcfg_base base;
807 /* Module runtime parameters */
809 enum avs_copier_runtime_param {
810 AVS_COPIER_SET_SINK_FORMAT = 2,
813 struct avs_copier_sink_format {
815 struct avs_audio_format src_fmt;
816 struct avs_audio_format sink_fmt;
819 int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id,
820 u8 instance_id, u32 sink_id,
821 const struct avs_audio_format *src_fmt,
822 const struct avs_audio_format *sink_fmt);
824 enum avs_peakvol_runtime_param {
825 AVS_PEAKVOL_VOLUME = 0,
828 enum avs_audio_curve_type {
829 AVS_AUDIO_CURVE_NONE = 0,
830 AVS_AUDIO_CURVE_WINDOWS_FADE = 1,
833 int avs_ipc_peakvol_set_volume(struct avs_dev *adev, u16 module_id, u8 instance_id,
834 struct avs_volume_cfg *vol);
835 int avs_ipc_peakvol_get_volume(struct avs_dev *adev, u16 module_id, u8 instance_id,
836 struct avs_volume_cfg **vols, size_t *num_vols);
838 #define AVS_PROBE_INST_ID 0
840 enum avs_probe_runtime_param {
841 AVS_PROBE_INJECTION_DMA = 1,
842 AVS_PROBE_INJECTION_DMA_DETACH,
844 AVS_PROBE_POINTS_DISCONNECT,
847 struct avs_probe_dma {
848 union avs_connector_node_id node_id;
852 enum avs_probe_type {
853 AVS_PROBE_TYPE_INPUT = 0,
854 AVS_PROBE_TYPE_OUTPUT,
855 AVS_PROBE_TYPE_INTERNAL
858 union avs_probe_point_id {
868 enum avs_connection_purpose {
869 AVS_CONNECTION_PURPOSE_EXTRACT = 0,
870 AVS_CONNECTION_PURPOSE_INJECT,
871 AVS_CONNECTION_PURPOSE_INJECT_REEXTRACT,
874 struct avs_probe_point_desc {
875 union avs_probe_point_id id;
877 union avs_connector_node_id node_id;
880 int avs_ipc_probe_get_dma(struct avs_dev *adev, struct avs_probe_dma **dmas, size_t *num_dmas);
881 int avs_ipc_probe_attach_dma(struct avs_dev *adev, struct avs_probe_dma *dmas, size_t num_dmas);
882 int avs_ipc_probe_detach_dma(struct avs_dev *adev, union avs_connector_node_id *node_ids,
883 size_t num_node_ids);
884 int avs_ipc_probe_get_points(struct avs_dev *adev, struct avs_probe_point_desc **descs,
886 int avs_ipc_probe_connect_points(struct avs_dev *adev, struct avs_probe_point_desc *descs,
888 int avs_ipc_probe_disconnect_points(struct avs_dev *adev, union avs_probe_point_id *ids,
891 #endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */