drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
   4  */
   5
   6 #include <drm/drm_edid.h>
   7
   8 #include "dpu_writeback.h"
   9
  10 static int dpu_wb_conn_get_modes(struct drm_connector *connector)
  11 {
  12         struct drm_device *dev = connector->dev;
  13         struct msm_drm_private *priv = dev->dev_private;
  14         struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
  15
  16         /*
  17          * We should ideally be limiting the modes only to the maxlinewidth but
  18          * on some chipsets this will allow even 4k modes to be added which will
  19          * fail the per SSPP bandwidth checks. So, till we have dual-SSPP support
  20          * and source split support added lets limit the modes based on max_mixer_width
  21          * as 4K modes can then be supported.
  22          */
  23         return drm_add_modes_noedid(connector, dpu_kms->catalog->caps->max_mixer_width,
  24                         dev->mode_config.max_height);
  25 }
  26
  27 static const struct drm_connector_funcs dpu_wb_conn_funcs = {
  28         .reset = drm_atomic_helper_connector_reset,
  29         .fill_modes = drm_helper_probe_single_connector_modes,
  30         .destroy = drm_connector_cleanup,
  31         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  32         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  33 };
  34
  35 static int dpu_wb_conn_prepare_job(struct drm_writeback_connector *connector,
  36                 struct drm_writeback_job *job)
  37 {
  38
  39         struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(connector);
  40
  41         if (!job->fb)
  42                 return 0;
  43
  44         dpu_encoder_prepare_wb_job(dpu_wb_conn->wb_enc, job);
  45
  46         return 0;
  47 }
  48
  49 static void dpu_wb_conn_cleanup_job(struct drm_writeback_connector *connector,
  50                 struct drm_writeback_job *job)
  51 {
  52         struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(connector);
  53
  54         if (!job->fb)
  55                 return;
  56
  57         dpu_encoder_cleanup_wb_job(dpu_wb_conn->wb_enc, job);
  58 }
  59
  60 static const struct drm_connector_helper_funcs dpu_wb_conn_helper_funcs = {
  61         .get_modes = dpu_wb_conn_get_modes,
  62         .prepare_writeback_job = dpu_wb_conn_prepare_job,
  63         .cleanup_writeback_job = dpu_wb_conn_cleanup_job,
  64 };
  65
  66 int dpu_writeback_init(struct drm_device *dev, struct drm_encoder *enc,
  67                 const u32 *format_list, u32 num_formats)
  68 {
  69         struct dpu_wb_connector *dpu_wb_conn;
  70         int rc = 0;
  71
  72         dpu_wb_conn = devm_kzalloc(dev->dev, sizeof(*dpu_wb_conn), GFP_KERNEL);
  73         if (!dpu_wb_conn)
  74                 return -ENOMEM;
  75
  76         drm_connector_helper_add(&dpu_wb_conn->base.base, &dpu_wb_conn_helper_funcs);
  77
  78         /* DPU initializes the encoder and sets it up completely for writeback
  79          * cases and hence should use the new API drm_writeback_connector_init_with_encoder
  80          * to initialize the writeback connector
  81          */
  82         rc = drm_writeback_connector_init_with_encoder(dev, &dpu_wb_conn->base, enc,
  83                         &dpu_wb_conn_funcs, format_list, num_formats);
  84
  85         if (!rc)
  86                 dpu_wb_conn->wb_enc = enc;
  87
  88         return rc;
  89 }