drivers/gpu/drm/i915/gt/intel_llc.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright © 2019 Intel Corporation
   4  */
   5
   6 #include <asm/tsc.h>
   7 #include <linux/cpufreq.h>
   8
   9 #include "i915_drv.h"
  10 #include "i915_reg.h"
  11 #include "intel_gt.h"
  12 #include "intel_llc.h"
  13 #include "intel_mchbar_regs.h"
  14 #include "intel_pcode.h"
  15 #include "intel_rps.h"
  16
  17 struct ia_constants {
  18         unsigned int min_gpu_freq;
  19         unsigned int max_gpu_freq;
  20
  21         unsigned int min_ring_freq;
  22         unsigned int max_ia_freq;
  23 };
  24
  25 static struct intel_gt *llc_to_gt(struct intel_llc *llc)
  26 {
  27         return container_of(llc, struct intel_gt, llc);
  28 }
  29
  30 static unsigned int cpu_max_MHz(void)
  31 {
  32         struct cpufreq_policy *policy;
  33         unsigned int max_khz;
  34
  35         policy = cpufreq_cpu_get(0);
  36         if (policy) {
  37                 max_khz = policy->cpuinfo.max_freq;
  38                 cpufreq_cpu_put(policy);
  39         } else {
  40                 /*
  41                  * Default to measured freq if none found, PCU will ensure we
  42                  * don't go over
  43                  */
  44                 max_khz = tsc_khz;
  45         }
  46
  47         return max_khz / 1000;
  48 }
  49
  50 static bool get_ia_constants(struct intel_llc *llc,
  51                              struct ia_constants *consts)
  52 {
  53         struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
  54         struct intel_rps *rps = &llc_to_gt(llc)->rps;
  55
  56         if (!HAS_LLC(i915) || IS_DGFX(i915))
  57                 return false;
  58
  59         consts->max_ia_freq = cpu_max_MHz();
  60
  61         consts->min_ring_freq =
  62                 intel_uncore_read(llc_to_gt(llc)->uncore, DCLK) & 0xf;
  63         /* convert DDR frequency from units of 266.6MHz to bandwidth */
  64         consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3);
  65
  66         consts->min_gpu_freq = intel_rps_get_min_raw_freq(rps);
  67         consts->max_gpu_freq = intel_rps_get_max_raw_freq(rps);
  68
  69         return true;
  70 }
  71
  72 static void calc_ia_freq(struct intel_llc *llc,
  73                          unsigned int gpu_freq,
  74                          const struct ia_constants *consts,
  75                          unsigned int *out_ia_freq,
  76                          unsigned int *out_ring_freq)
  77 {
  78         struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
  79         const int diff = consts->max_gpu_freq - gpu_freq;
  80         unsigned int ia_freq = 0, ring_freq = 0;
  81
  82         if (GRAPHICS_VER(i915) >= 9) {
  83                 /*
  84                  * ring_freq = 2 * GT. ring_freq is in 100MHz units
  85                  * No floor required for ring frequency on SKL.
  86                  */
  87                 ring_freq = gpu_freq;
  88         } else if (GRAPHICS_VER(i915) >= 8) {
  89                 /* max(2 * GT, DDR). NB: GT is 50MHz units */
  90                 ring_freq = max(consts->min_ring_freq, gpu_freq);
  91         } else if (IS_HASWELL(i915)) {
  92                 ring_freq = mult_frac(gpu_freq, 5, 4);
  93                 ring_freq = max(consts->min_ring_freq, ring_freq);
  94                 /* leave ia_freq as the default, chosen by cpufreq */
  95         } else {
  96                 const int min_freq = 15;
  97                 const int scale = 180;
  98
  99                 /*
 100                  * On older processors, there is no separate ring
 101                  * clock domain, so in order to boost the bandwidth
 102                  * of the ring, we need to upclock the CPU (ia_freq).
 103                  *
 104                  * For GPU frequencies less than 750MHz,
 105                  * just use the lowest ring freq.
 106                  */
 107                 if (gpu_freq < min_freq)
 108                         ia_freq = 800;
 109                 else
 110                         ia_freq = consts->max_ia_freq - diff * scale / 2;
 111                 ia_freq = DIV_ROUND_CLOSEST(ia_freq, 100);
 112         }
 113
 114         *out_ia_freq = ia_freq;
 115         *out_ring_freq = ring_freq;
 116 }
 117
 118 static void gen6_update_ring_freq(struct intel_llc *llc)
 119 {
 120         struct ia_constants consts;
 121         unsigned int gpu_freq;
 122
 123         if (!get_ia_constants(llc, &consts))
 124                 return;
 125
 126         /*
 127          * Although this is unlikely on any platform during initialization,
 128          * let's ensure we don't get accidentally into infinite loop
 129          */
 130         if (consts.max_gpu_freq <= consts.min_gpu_freq)
 131                 return;
 132         /*
 133          * For each potential GPU frequency, load a ring frequency we'd like
 134          * to use for memory access.  We do this by specifying the IA frequency
 135          * the PCU should use as a reference to determine the ring frequency.
 136          */
 137         for (gpu_freq = consts.max_gpu_freq;
 138              gpu_freq >= consts.min_gpu_freq;
 139              gpu_freq--) {
 140                 unsigned int ia_freq, ring_freq;
 141
 142                 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq);
 143                 snb_pcode_write(llc_to_gt(llc)->uncore, GEN6_PCODE_WRITE_MIN_FREQ_TABLE,
 144                                 ia_freq << GEN6_PCODE_FREQ_IA_RATIO_SHIFT |
 145                                 ring_freq << GEN6_PCODE_FREQ_RING_RATIO_SHIFT |
 146                                 gpu_freq);
 147         }
 148 }
 149
 150 void intel_llc_enable(struct intel_llc *llc)
 151 {
 152         gen6_update_ring_freq(llc);
 153 }
 154
 155 void intel_llc_disable(struct intel_llc *llc)
 156 {
 157         /* Currently there is no HW configuration to be done to disable. */
 158 }
 159
 160 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 161 #include "selftest_llc.c"
 162 #endif