drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright © 2022 Intel Corporation
   4  */
   5
   6 #include <drm/drm_device.h>
   7 #include <linux/sysfs.h>
   8 #include <linux/printk.h>
   9
  10 #include "i915_drv.h"
  11 #include "i915_reg.h"
  12 #include "i915_sysfs.h"
  13 #include "intel_gt.h"
  14 #include "intel_gt_print.h"
  15 #include "intel_gt_regs.h"
  16 #include "intel_gt_sysfs.h"
  17 #include "intel_gt_sysfs_pm.h"
  18 #include "intel_pcode.h"
  19 #include "intel_rc6.h"
  20 #include "intel_rps.h"
  21
  22 enum intel_gt_sysfs_op {
  23         INTEL_GT_SYSFS_MIN = 0,
  24         INTEL_GT_SYSFS_MAX,
  25 };
  26
  27 static int
  28 sysfs_gt_attribute_w_func(struct kobject *kobj, struct attribute *attr,
  29                           int (func)(struct intel_gt *gt, u32 val), u32 val)
  30 {
  31         struct intel_gt *gt;
  32         int ret;
  33
  34         if (!is_object_gt(kobj)) {
  35                 int i;
  36                 struct device *dev = kobj_to_dev(kobj);
  37                 struct drm_i915_private *i915 = kdev_minor_to_i915(dev);
  38
  39                 for_each_gt(gt, i915, i) {
  40                         ret = func(gt, val);
  41                         if (ret)
  42                                 break;
  43                 }
  44         } else {
  45                 gt = intel_gt_sysfs_get_drvdata(kobj, attr->name);
  46                 ret = func(gt, val);
  47         }
  48
  49         return ret;
  50 }
  51
  52 static u32
  53 sysfs_gt_attribute_r_func(struct kobject *kobj, struct attribute *attr,
  54                           u32 (func)(struct intel_gt *gt),
  55                           enum intel_gt_sysfs_op op)
  56 {
  57         struct intel_gt *gt;
  58         u32 ret;
  59
  60         ret = (op == INTEL_GT_SYSFS_MAX) ? 0 : (u32) -1;
  61
  62         if (!is_object_gt(kobj)) {
  63                 int i;
  64                 struct device *dev = kobj_to_dev(kobj);
  65                 struct drm_i915_private *i915 = kdev_minor_to_i915(dev);
  66
  67                 for_each_gt(gt, i915, i) {
  68                         u32 val = func(gt);
  69
  70                         switch (op) {
  71                         case INTEL_GT_SYSFS_MIN:
  72                                 if (val < ret)
  73                                         ret = val;
  74                                 break;
  75
  76                         case INTEL_GT_SYSFS_MAX:
  77                                 if (val > ret)
  78                                         ret = val;
  79                                 break;
  80                         }
  81                 }
  82         } else {
  83                 gt = intel_gt_sysfs_get_drvdata(kobj, attr->name);
  84                 ret = func(gt);
  85         }
  86
  87         return ret;
  88 }
  89
  90 /* RC6 interfaces will show the minimum RC6 residency value */
  91 #define sysfs_gt_attribute_r_min_func(d, a, f) \
  92                 sysfs_gt_attribute_r_func(d, a, f, INTEL_GT_SYSFS_MIN)
  93
  94 /* Frequency interfaces will show the maximum frequency value */
  95 #define sysfs_gt_attribute_r_max_func(d, a, f) \
  96                 sysfs_gt_attribute_r_func(d, a, f, INTEL_GT_SYSFS_MAX)
  97
  98 #define INTEL_GT_SYSFS_SHOW(_name, _attr_type)                                                  \
  99         static ssize_t _name##_show_common(struct kobject *kobj,                                \
 100                                            struct attribute *attr, char *buff)                  \
 101         {                                                                                       \
 102                 u32 val = sysfs_gt_attribute_r_##_attr_type##_func(kobj, attr,                  \
 103                                                                    __##_name##_show);           \
 104                                                                                                 \
 105                 return sysfs_emit(buff, "%u\n", val);                                           \
 106         }                                                                                       \
 107         static ssize_t _name##_show(struct kobject *kobj,                                       \
 108                                     struct kobj_attribute *attr, char *buff)                    \
 109         {                                                                                       \
 110                 return _name ##_show_common(kobj, &attr->attr, buff);                           \
 111         }                                                                                       \
 112         static ssize_t _name##_dev_show(struct device *dev,                                     \
 113                                         struct device_attribute *attr, char *buff)              \
 114         {                                                                                       \
 115                 return _name##_show_common(&dev->kobj, &attr->attr, buff);                      \
 116         }
 117
 118 #define INTEL_GT_SYSFS_STORE(_name, _func)                                              \
 119         static ssize_t _name##_store_common(struct kobject *kobj,                       \
 120                                             struct attribute *attr,                     \
 121                                             const char *buff, size_t count)             \
 122         {                                                                               \
 123                 int ret;                                                                \
 124                 u32 val;                                                                \
 125                                                                                         \
 126                 ret = kstrtou32(buff, 0, &val);                                         \
 127                 if (ret)                                                                \
 128                         return ret;                                                     \
 129                                                                                         \
 130                 ret = sysfs_gt_attribute_w_func(kobj, attr, _func, val);                \
 131                                                                                         \
 132                 return ret ?: count;                                                    \
 133         }                                                                               \
 134         static ssize_t _name##_store(struct kobject *kobj,                              \
 135                                      struct kobj_attribute *attr, const char *buff,     \
 136                                      size_t count)                                      \
 137         {                                                                               \
 138                 return _name##_store_common(kobj, &attr->attr, buff, count);            \
 139         }                                                                               \
 140         static ssize_t _name##_dev_store(struct device *dev,                            \
 141                                          struct device_attribute *attr,                 \
 142                                          const char *buff, size_t count)                \
 143         {                                                                               \
 144                 return _name##_store_common(&dev->kobj, &attr->attr, buff, count);      \
 145         }
 146
 147 #define INTEL_GT_SYSFS_SHOW_MAX(_name) INTEL_GT_SYSFS_SHOW(_name, max)
 148 #define INTEL_GT_SYSFS_SHOW_MIN(_name) INTEL_GT_SYSFS_SHOW(_name, min)
 149
 150 #define INTEL_GT_ATTR_RW(_name) \
 151         static struct kobj_attribute attr_##_name = __ATTR_RW(_name)
 152
 153 #define INTEL_GT_ATTR_RO(_name) \
 154         static struct kobj_attribute attr_##_name = __ATTR_RO(_name)
 155
 156 #define INTEL_GT_DUAL_ATTR_RW(_name) \
 157         static struct device_attribute dev_attr_##_name = __ATTR(_name, 0644,           \
 158                                                                  _name##_dev_show,      \
 159                                                                  _name##_dev_store);    \
 160         INTEL_GT_ATTR_RW(_name)
 161
 162 #define INTEL_GT_DUAL_ATTR_RO(_name) \
 163         static struct device_attribute dev_attr_##_name = __ATTR(_name, 0444,           \
 164                                                                  _name##_dev_show,      \
 165                                                                  NULL);                 \
 166         INTEL_GT_ATTR_RO(_name)
 167
 168 static u32 get_residency(struct intel_gt *gt, enum intel_rc6_res_type id)
 169 {
 170         intel_wakeref_t wakeref;
 171         u64 res = 0;
 172
 173         with_intel_runtime_pm(gt->uncore->rpm, wakeref)
 174                 res = intel_rc6_residency_us(&gt->rc6, id);
 175
 176         return DIV_ROUND_CLOSEST_ULL(res, 1000);
 177 }
 178
 179 static u8 get_rc6_mask(struct intel_gt *gt)
 180 {
 181         u8 mask = 0;
 182
 183         if (HAS_RC6(gt->i915))
 184                 mask |= BIT(0);
 185         if (HAS_RC6p(gt->i915))
 186                 mask |= BIT(1);
 187         if (HAS_RC6pp(gt->i915))
 188                 mask |= BIT(2);
 189
 190         return mask;
 191 }
 192
 193 static ssize_t rc6_enable_show(struct kobject *kobj,
 194                                struct kobj_attribute *attr,
 195                                char *buff)
 196 {
 197         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 198
 199         return sysfs_emit(buff, "%x\n", get_rc6_mask(gt));
 200 }
 201
 202 static ssize_t rc6_enable_dev_show(struct device *dev,
 203                                    struct device_attribute *attr,
 204                                    char *buff)
 205 {
 206         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(&dev->kobj, attr->attr.name);
 207
 208         return sysfs_emit(buff, "%x\n", get_rc6_mask(gt));
 209 }
 210
 211 static u32 __rc6_residency_ms_show(struct intel_gt *gt)
 212 {
 213         return get_residency(gt, INTEL_RC6_RES_RC6);
 214 }
 215
 216 static u32 __rc6p_residency_ms_show(struct intel_gt *gt)
 217 {
 218         return get_residency(gt, INTEL_RC6_RES_RC6p);
 219 }
 220
 221 static u32 __rc6pp_residency_ms_show(struct intel_gt *gt)
 222 {
 223         return get_residency(gt, INTEL_RC6_RES_RC6pp);
 224 }
 225
 226 static u32 __media_rc6_residency_ms_show(struct intel_gt *gt)
 227 {
 228         return get_residency(gt, INTEL_RC6_RES_VLV_MEDIA);
 229 }
 230
 231 INTEL_GT_SYSFS_SHOW_MIN(rc6_residency_ms);
 232 INTEL_GT_SYSFS_SHOW_MIN(rc6p_residency_ms);
 233 INTEL_GT_SYSFS_SHOW_MIN(rc6pp_residency_ms);
 234 INTEL_GT_SYSFS_SHOW_MIN(media_rc6_residency_ms);
 235
 236 INTEL_GT_DUAL_ATTR_RO(rc6_enable);
 237 INTEL_GT_DUAL_ATTR_RO(rc6_residency_ms);
 238 INTEL_GT_DUAL_ATTR_RO(rc6p_residency_ms);
 239 INTEL_GT_DUAL_ATTR_RO(rc6pp_residency_ms);
 240 INTEL_GT_DUAL_ATTR_RO(media_rc6_residency_ms);
 241
 242 static struct attribute *rc6_attrs[] = {
 243         &attr_rc6_enable.attr,
 244         &attr_rc6_residency_ms.attr,
 245         NULL
 246 };
 247
 248 static struct attribute *rc6p_attrs[] = {
 249         &attr_rc6p_residency_ms.attr,
 250         &attr_rc6pp_residency_ms.attr,
 251         NULL
 252 };
 253
 254 static struct attribute *media_rc6_attrs[] = {
 255         &attr_media_rc6_residency_ms.attr,
 256         NULL
 257 };
 258
 259 static struct attribute *rc6_dev_attrs[] = {
 260         &dev_attr_rc6_enable.attr,
 261         &dev_attr_rc6_residency_ms.attr,
 262         NULL
 263 };
 264
 265 static struct attribute *rc6p_dev_attrs[] = {
 266         &dev_attr_rc6p_residency_ms.attr,
 267         &dev_attr_rc6pp_residency_ms.attr,
 268         NULL
 269 };
 270
 271 static struct attribute *media_rc6_dev_attrs[] = {
 272         &dev_attr_media_rc6_residency_ms.attr,
 273         NULL
 274 };
 275
 276 static const struct attribute_group rc6_attr_group[] = {
 277         { .attrs = rc6_attrs, },
 278         { .name = power_group_name, .attrs = rc6_dev_attrs, },
 279 };
 280
 281 static const struct attribute_group rc6p_attr_group[] = {
 282         { .attrs = rc6p_attrs, },
 283         { .name = power_group_name, .attrs = rc6p_dev_attrs, },
 284 };
 285
 286 static const struct attribute_group media_rc6_attr_group[] = {
 287         { .attrs = media_rc6_attrs, },
 288         { .name = power_group_name, .attrs = media_rc6_dev_attrs, },
 289 };
 290
 291 static int __intel_gt_sysfs_create_group(struct kobject *kobj,
 292                                          const struct attribute_group *grp)
 293 {
 294         return is_object_gt(kobj) ?
 295                sysfs_create_group(kobj, &grp[0]) :
 296                sysfs_merge_group(kobj, &grp[1]);
 297 }
 298
 299 static void intel_sysfs_rc6_init(struct intel_gt *gt, struct kobject *kobj)
 300 {
 301         int ret;
 302
 303         if (!IS_ENABLED(CONFIG_PM) || !HAS_RC6(gt->i915))
 304                 return;
 305
 306         ret = __intel_gt_sysfs_create_group(kobj, rc6_attr_group);
 307         if (ret)
 308                 gt_warn(gt, "failed to create RC6 sysfs files (%pe)\n", ERR_PTR(ret));
 309
 310         /*
 311          * cannot use the is_visible() attribute because
 312          * the upper object inherits from the parent group.
 313          */
 314         if (HAS_RC6p(gt->i915)) {
 315                 ret = __intel_gt_sysfs_create_group(kobj, rc6p_attr_group);
 316                 if (ret)
 317                         gt_warn(gt, "failed to create RC6p sysfs files (%pe)\n", ERR_PTR(ret));
 318         }
 319
 320         if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) {
 321                 ret = __intel_gt_sysfs_create_group(kobj, media_rc6_attr_group);
 322                 if (ret)
 323                         gt_warn(gt, "failed to create media RC6 sysfs files (%pe)\n", ERR_PTR(ret));
 324         }
 325 }
 326
 327 static u32 __act_freq_mhz_show(struct intel_gt *gt)
 328 {
 329         return intel_rps_read_actual_frequency(&gt->rps);
 330 }
 331
 332 static u32 __cur_freq_mhz_show(struct intel_gt *gt)
 333 {
 334         return intel_rps_get_requested_frequency(&gt->rps);
 335 }
 336
 337 static u32 __boost_freq_mhz_show(struct intel_gt *gt)
 338 {
 339         return intel_rps_get_boost_frequency(&gt->rps);
 340 }
 341
 342 static int __boost_freq_mhz_store(struct intel_gt *gt, u32 val)
 343 {
 344         return intel_rps_set_boost_frequency(&gt->rps, val);
 345 }
 346
 347 static u32 __RP0_freq_mhz_show(struct intel_gt *gt)
 348 {
 349         return intel_rps_get_rp0_frequency(&gt->rps);
 350 }
 351
 352 static u32 __RPn_freq_mhz_show(struct intel_gt *gt)
 353 {
 354         return intel_rps_get_rpn_frequency(&gt->rps);
 355 }
 356
 357 static u32 __RP1_freq_mhz_show(struct intel_gt *gt)
 358 {
 359         return intel_rps_get_rp1_frequency(&gt->rps);
 360 }
 361
 362 static u32 __max_freq_mhz_show(struct intel_gt *gt)
 363 {
 364         return intel_rps_get_max_frequency(&gt->rps);
 365 }
 366
 367 static int __set_max_freq(struct intel_gt *gt, u32 val)
 368 {
 369         return intel_rps_set_max_frequency(&gt->rps, val);
 370 }
 371
 372 static u32 __min_freq_mhz_show(struct intel_gt *gt)
 373 {
 374         return intel_rps_get_min_frequency(&gt->rps);
 375 }
 376
 377 static int __set_min_freq(struct intel_gt *gt, u32 val)
 378 {
 379         return intel_rps_set_min_frequency(&gt->rps, val);
 380 }
 381
 382 static u32 __vlv_rpe_freq_mhz_show(struct intel_gt *gt)
 383 {
 384         struct intel_rps *rps = &gt->rps;
 385
 386         return intel_gpu_freq(rps, rps->efficient_freq);
 387 }
 388
 389 INTEL_GT_SYSFS_SHOW_MAX(act_freq_mhz);
 390 INTEL_GT_SYSFS_SHOW_MAX(boost_freq_mhz);
 391 INTEL_GT_SYSFS_SHOW_MAX(cur_freq_mhz);
 392 INTEL_GT_SYSFS_SHOW_MAX(RP0_freq_mhz);
 393 INTEL_GT_SYSFS_SHOW_MAX(RP1_freq_mhz);
 394 INTEL_GT_SYSFS_SHOW_MAX(RPn_freq_mhz);
 395 INTEL_GT_SYSFS_SHOW_MAX(max_freq_mhz);
 396 INTEL_GT_SYSFS_SHOW_MIN(min_freq_mhz);
 397 INTEL_GT_SYSFS_SHOW_MAX(vlv_rpe_freq_mhz);
 398 INTEL_GT_SYSFS_STORE(boost_freq_mhz, __boost_freq_mhz_store);
 399 INTEL_GT_SYSFS_STORE(max_freq_mhz, __set_max_freq);
 400 INTEL_GT_SYSFS_STORE(min_freq_mhz, __set_min_freq);
 401
 402 #define INTEL_GT_RPS_SYSFS_ATTR(_name, _mode, _show, _store, _show_dev, _store_dev)             \
 403         static struct device_attribute dev_attr_gt_##_name = __ATTR(gt_##_name, _mode,          \
 404                                                                     _show_dev, _store_dev);     \
 405         static struct kobj_attribute attr_rps_##_name = __ATTR(rps_##_name, _mode,              \
 406                                                                _show, _store)
 407
 408 #define INTEL_GT_RPS_SYSFS_ATTR_RO(_name)                                               \
 409                 INTEL_GT_RPS_SYSFS_ATTR(_name, 0444, _name##_show, NULL,                \
 410                                         _name##_dev_show, NULL)
 411 #define INTEL_GT_RPS_SYSFS_ATTR_RW(_name)                                               \
 412                 INTEL_GT_RPS_SYSFS_ATTR(_name, 0644, _name##_show, _name##_store,       \
 413                                         _name##_dev_show, _name##_dev_store)
 414
 415 /* The below macros generate static structures */
 416 INTEL_GT_RPS_SYSFS_ATTR_RO(act_freq_mhz);
 417 INTEL_GT_RPS_SYSFS_ATTR_RO(cur_freq_mhz);
 418 INTEL_GT_RPS_SYSFS_ATTR_RW(boost_freq_mhz);
 419 INTEL_GT_RPS_SYSFS_ATTR_RO(RP0_freq_mhz);
 420 INTEL_GT_RPS_SYSFS_ATTR_RO(RP1_freq_mhz);
 421 INTEL_GT_RPS_SYSFS_ATTR_RO(RPn_freq_mhz);
 422 INTEL_GT_RPS_SYSFS_ATTR_RW(max_freq_mhz);
 423 INTEL_GT_RPS_SYSFS_ATTR_RW(min_freq_mhz);
 424 INTEL_GT_RPS_SYSFS_ATTR_RO(vlv_rpe_freq_mhz);
 425
 426 #define GEN6_ATTR(p, s) { \
 427                 &p##attr_##s##_act_freq_mhz.attr, \
 428                 &p##attr_##s##_cur_freq_mhz.attr, \
 429                 &p##attr_##s##_boost_freq_mhz.attr, \
 430                 &p##attr_##s##_max_freq_mhz.attr, \
 431                 &p##attr_##s##_min_freq_mhz.attr, \
 432                 &p##attr_##s##_RP0_freq_mhz.attr, \
 433                 &p##attr_##s##_RP1_freq_mhz.attr, \
 434                 &p##attr_##s##_RPn_freq_mhz.attr, \
 435                 NULL, \
 436         }
 437
 438 #define GEN6_RPS_ATTR GEN6_ATTR(, rps)
 439 #define GEN6_GT_ATTR  GEN6_ATTR(dev_, gt)
 440
 441 static const struct attribute * const gen6_rps_attrs[] = GEN6_RPS_ATTR;
 442 static const struct attribute * const gen6_gt_attrs[]  = GEN6_GT_ATTR;
 443
 444 static ssize_t punit_req_freq_mhz_show(struct kobject *kobj,
 445                                        struct kobj_attribute *attr,
 446                                        char *buff)
 447 {
 448         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 449         u32 preq = intel_rps_read_punit_req_frequency(&gt->rps);
 450
 451         return sysfs_emit(buff, "%u\n", preq);
 452 }
 453
 454 static ssize_t slpc_ignore_eff_freq_show(struct kobject *kobj,
 455                                          struct kobj_attribute *attr,
 456                                          char *buff)
 457 {
 458         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 459         struct intel_guc_slpc *slpc = &gt->uc.guc.slpc;
 460
 461         return sysfs_emit(buff, "%u\n", slpc->ignore_eff_freq);
 462 }
 463
 464 static ssize_t slpc_ignore_eff_freq_store(struct kobject *kobj,
 465                                           struct kobj_attribute *attr,
 466                                           const char *buff, size_t count)
 467 {
 468         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 469         struct intel_guc_slpc *slpc = &gt->uc.guc.slpc;
 470         int err;
 471         u32 val;
 472
 473         err = kstrtou32(buff, 0, &val);
 474         if (err)
 475                 return err;
 476
 477         err = intel_guc_slpc_set_ignore_eff_freq(slpc, val);
 478         return err ?: count;
 479 }
 480
 481 struct intel_gt_bool_throttle_attr {
 482         struct attribute attr;
 483         ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
 484                         char *buf);
 485         i915_reg_t (*reg32)(struct intel_gt *gt);
 486         u32 mask;
 487 };
 488
 489 static ssize_t throttle_reason_bool_show(struct kobject *kobj,
 490                                          struct kobj_attribute *attr,
 491                                          char *buff)
 492 {
 493         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 494         struct intel_gt_bool_throttle_attr *t_attr =
 495                                 (struct intel_gt_bool_throttle_attr *) attr;
 496         bool val = rps_read_mask_mmio(&gt->rps, t_attr->reg32(gt), t_attr->mask);
 497
 498         return sysfs_emit(buff, "%u\n", val);
 499 }
 500
 501 #define INTEL_GT_RPS_BOOL_ATTR_RO(sysfs_func__, mask__) \
 502 struct intel_gt_bool_throttle_attr attr_##sysfs_func__ = { \
 503         .attr = { .name = __stringify(sysfs_func__), .mode = 0444 }, \
 504         .show = throttle_reason_bool_show, \
 505         .reg32 = intel_gt_perf_limit_reasons_reg, \
 506         .mask = mask__, \
 507 }
 508
 509 INTEL_GT_ATTR_RO(punit_req_freq_mhz);
 510 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_status, GT0_PERF_LIMIT_REASONS_MASK);
 511 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_pl1, POWER_LIMIT_1_MASK);
 512 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_pl2, POWER_LIMIT_2_MASK);
 513 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_pl4, POWER_LIMIT_4_MASK);
 514 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_thermal, THERMAL_LIMIT_MASK);
 515 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_prochot, PROCHOT_MASK);
 516 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_ratl, RATL_MASK);
 517 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_vr_thermalert, VR_THERMALERT_MASK);
 518 static INTEL_GT_RPS_BOOL_ATTR_RO(throttle_reason_vr_tdc, VR_TDC_MASK);
 519
 520 static const struct attribute *throttle_reason_attrs[] = {
 521         &attr_throttle_reason_status.attr,
 522         &attr_throttle_reason_pl1.attr,
 523         &attr_throttle_reason_pl2.attr,
 524         &attr_throttle_reason_pl4.attr,
 525         &attr_throttle_reason_thermal.attr,
 526         &attr_throttle_reason_prochot.attr,
 527         &attr_throttle_reason_ratl.attr,
 528         &attr_throttle_reason_vr_thermalert.attr,
 529         &attr_throttle_reason_vr_tdc.attr,
 530         NULL
 531 };
 532
 533 /*
 534  * Scaling for multipliers (aka frequency factors).
 535  * The format of the value in the register is u8.8.
 536  *
 537  * The presentation to userspace is inspired by the perf event framework.
 538  * See:
 539  *   Documentation/ABI/testing/sysfs-bus-event_source-devices-events
 540  * for description of:
 541  *   /sys/bus/event_source/devices/<pmu>/events/<event>.scale
 542  *
 543  * Summary: Expose two sysfs files for each multiplier.
 544  *
 545  * 1. File <attr> contains a raw hardware value.
 546  * 2. File <attr>.scale contains the multiplicative scale factor to be
 547  *    used by userspace to compute the actual value.
 548  *
 549  * So userspace knows that to get the frequency_factor it multiplies the
 550  * provided value by the specified scale factor and vice-versa.
 551  *
 552  * That way there is no precision loss in the kernel interface and API
 553  * is future proof should one day the hardware register change to u16.u16,
 554  * on some platform. (Or any other fixed point representation.)
 555  *
 556  * Example:
 557  * File <attr> contains the value 2.5, represented as u8.8 0x0280, which
 558  * is comprised of:
 559  * - an integer part of 2
 560  * - a fractional part of 0x80 (representing 0x80 / 2^8 == 0x80 / 256).
 561  * File <attr>.scale contains a string representation of floating point
 562  * value 0.00390625 (which is (1 / 256)).
 563  * Userspace computes the actual value:
 564  *   0x0280 * 0.00390625 -> 2.5
 565  * or converts an actual value to the value to be written into <attr>:
 566  *   2.5 / 0.00390625 -> 0x0280
 567  */
 568
 569 #define U8_8_VAL_MASK           0xffff
 570 #define U8_8_SCALE_TO_VALUE     "0.00390625"
 571
 572 static ssize_t freq_factor_scale_show(struct kobject *kobj,
 573                                       struct kobj_attribute *attr,
 574                                       char *buff)
 575 {
 576         return sysfs_emit(buff, "%s\n", U8_8_SCALE_TO_VALUE);
 577 }
 578
 579 static u32 media_ratio_mode_to_factor(u32 mode)
 580 {
 581         /* 0 -> 0, 1 -> 256, 2 -> 128 */
 582         return !mode ? mode : 256 / mode;
 583 }
 584
 585 static ssize_t media_freq_factor_show(struct kobject *kobj,
 586                                       struct kobj_attribute *attr,
 587                                       char *buff)
 588 {
 589         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 590         struct intel_guc_slpc *slpc = &gt->uc.guc.slpc;
 591         intel_wakeref_t wakeref;
 592         u32 mode;
 593
 594         /*
 595          * Retrieve media_ratio_mode from GEN6_RPNSWREQ bit 13 set by
 596          * GuC. GEN6_RPNSWREQ:13 value 0 represents 1:2 and 1 represents 1:1
 597          */
 598         if (IS_XEHPSDV(gt->i915) &&
 599             slpc->media_ratio_mode == SLPC_MEDIA_RATIO_MODE_DYNAMIC_CONTROL) {
 600                 /*
 601                  * For XEHPSDV dynamic mode GEN6_RPNSWREQ:13 does not contain
 602                  * the media_ratio_mode, just return the cached media ratio
 603                  */
 604                 mode = slpc->media_ratio_mode;
 605         } else {
 606                 with_intel_runtime_pm(gt->uncore->rpm, wakeref)
 607                         mode = intel_uncore_read(gt->uncore, GEN6_RPNSWREQ);
 608                 mode = REG_FIELD_GET(GEN12_MEDIA_FREQ_RATIO, mode) ?
 609                         SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_ONE :
 610                         SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_TWO;
 611         }
 612
 613         return sysfs_emit(buff, "%u\n", media_ratio_mode_to_factor(mode));
 614 }
 615
 616 static ssize_t media_freq_factor_store(struct kobject *kobj,
 617                                        struct kobj_attribute *attr,
 618                                        const char *buff, size_t count)
 619 {
 620         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 621         struct intel_guc_slpc *slpc = &gt->uc.guc.slpc;
 622         u32 factor, mode;
 623         int err;
 624
 625         err = kstrtou32(buff, 0, &factor);
 626         if (err)
 627                 return err;
 628
 629         for (mode = SLPC_MEDIA_RATIO_MODE_DYNAMIC_CONTROL;
 630              mode <= SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_TWO; mode++)
 631                 if (factor == media_ratio_mode_to_factor(mode))
 632                         break;
 633
 634         if (mode > SLPC_MEDIA_RATIO_MODE_FIXED_ONE_TO_TWO)
 635                 return -EINVAL;
 636
 637         err = intel_guc_slpc_set_media_ratio_mode(slpc, mode);
 638         if (!err) {
 639                 slpc->media_ratio_mode = mode;
 640                 DRM_DEBUG("Set slpc->media_ratio_mode to %d", mode);
 641         }
 642         return err ?: count;
 643 }
 644
 645 static ssize_t media_RP0_freq_mhz_show(struct kobject *kobj,
 646                                        struct kobj_attribute *attr,
 647                                        char *buff)
 648 {
 649         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 650         u32 val;
 651         int err;
 652
 653         err = snb_pcode_read_p(gt->uncore, XEHP_PCODE_FREQUENCY_CONFIG,
 654                                PCODE_MBOX_FC_SC_READ_FUSED_P0,
 655                                PCODE_MBOX_DOMAIN_MEDIAFF, &val);
 656
 657         if (err)
 658                 return err;
 659
 660         /* Fused media RP0 read from pcode is in units of 50 MHz */
 661         val *= GT_FREQUENCY_MULTIPLIER;
 662
 663         return sysfs_emit(buff, "%u\n", val);
 664 }
 665
 666 static ssize_t media_RPn_freq_mhz_show(struct kobject *kobj,
 667                                        struct kobj_attribute *attr,
 668                                        char *buff)
 669 {
 670         struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name);
 671         u32 val;
 672         int err;
 673
 674         err = snb_pcode_read_p(gt->uncore, XEHP_PCODE_FREQUENCY_CONFIG,
 675                                PCODE_MBOX_FC_SC_READ_FUSED_PN,
 676                                PCODE_MBOX_DOMAIN_MEDIAFF, &val);
 677
 678         if (err)
 679                 return err;
 680
 681         /* Fused media RPn read from pcode is in units of 50 MHz */
 682         val *= GT_FREQUENCY_MULTIPLIER;
 683
 684         return sysfs_emit(buff, "%u\n", val);
 685 }
 686
 687 INTEL_GT_ATTR_RW(media_freq_factor);
 688 static struct kobj_attribute attr_media_freq_factor_scale =
 689         __ATTR(media_freq_factor.scale, 0444, freq_factor_scale_show, NULL);
 690 INTEL_GT_ATTR_RO(media_RP0_freq_mhz);
 691 INTEL_GT_ATTR_RO(media_RPn_freq_mhz);
 692
 693 INTEL_GT_ATTR_RW(slpc_ignore_eff_freq);
 694
 695 static const struct attribute *media_perf_power_attrs[] = {
 696         &attr_media_freq_factor.attr,
 697         &attr_media_freq_factor_scale.attr,
 698         &attr_media_RP0_freq_mhz.attr,
 699         &attr_media_RPn_freq_mhz.attr,
 700         NULL
 701 };
 702
 703 static ssize_t
 704 default_min_freq_mhz_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
 705 {
 706         struct intel_gt *gt = kobj_to_gt(kobj->parent);
 707
 708         return sysfs_emit(buf, "%u\n", gt->defaults.min_freq);
 709 }
 710
 711 static struct kobj_attribute default_min_freq_mhz =
 712 __ATTR(rps_min_freq_mhz, 0444, default_min_freq_mhz_show, NULL);
 713
 714 static ssize_t
 715 default_max_freq_mhz_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
 716 {
 717         struct intel_gt *gt = kobj_to_gt(kobj->parent);
 718
 719         return sysfs_emit(buf, "%u\n", gt->defaults.max_freq);
 720 }
 721
 722 static struct kobj_attribute default_max_freq_mhz =
 723 __ATTR(rps_max_freq_mhz, 0444, default_max_freq_mhz_show, NULL);
 724
 725 static const struct attribute * const rps_defaults_attrs[] = {
 726         &default_min_freq_mhz.attr,
 727         &default_max_freq_mhz.attr,
 728         NULL
 729 };
 730
 731 static int intel_sysfs_rps_init(struct intel_gt *gt, struct kobject *kobj)
 732 {
 733         const struct attribute * const *attrs;
 734         struct attribute *vlv_attr;
 735         int ret;
 736
 737         if (GRAPHICS_VER(gt->i915) < 6)
 738                 return 0;
 739
 740         if (is_object_gt(kobj)) {
 741                 attrs = gen6_rps_attrs;
 742                 vlv_attr = &attr_rps_vlv_rpe_freq_mhz.attr;
 743         } else {
 744                 attrs = gen6_gt_attrs;
 745                 vlv_attr = &dev_attr_gt_vlv_rpe_freq_mhz.attr;
 746         }
 747
 748         ret = sysfs_create_files(kobj, attrs);
 749         if (ret)
 750                 return ret;
 751
 752         if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915))
 753                 ret = sysfs_create_file(kobj, vlv_attr);
 754
 755         return ret;
 756 }
 757
 758 void intel_gt_sysfs_pm_init(struct intel_gt *gt, struct kobject *kobj)
 759 {
 760         int ret;
 761
 762         intel_sysfs_rc6_init(gt, kobj);
 763
 764         ret = intel_sysfs_rps_init(gt, kobj);
 765         if (ret)
 766                 gt_warn(gt, "failed to create RPS sysfs files (%pe)", ERR_PTR(ret));
 767
 768         /* end of the legacy interfaces */
 769         if (!is_object_gt(kobj))
 770                 return;
 771
 772         ret = sysfs_create_file(kobj, &attr_punit_req_freq_mhz.attr);
 773         if (ret)
 774                 gt_warn(gt, "failed to create punit_req_freq_mhz sysfs (%pe)", ERR_PTR(ret));
 775
 776         if (intel_uc_uses_guc_slpc(&gt->uc)) {
 777                 ret = sysfs_create_file(kobj, &attr_slpc_ignore_eff_freq.attr);
 778                 if (ret)
 779                         gt_warn(gt, "failed to create ignore_eff_freq sysfs (%pe)", ERR_PTR(ret));
 780         }
 781
 782         if (i915_mmio_reg_valid(intel_gt_perf_limit_reasons_reg(gt))) {
 783                 ret = sysfs_create_files(kobj, throttle_reason_attrs);
 784                 if (ret)
 785                         gt_warn(gt, "failed to create throttle sysfs files (%pe)", ERR_PTR(ret));
 786         }
 787
 788         if (HAS_MEDIA_RATIO_MODE(gt->i915) && intel_uc_uses_guc_slpc(&gt->uc)) {
 789                 ret = sysfs_create_files(kobj, media_perf_power_attrs);
 790                 if (ret)
 791                         gt_warn(gt, "failed to create media_perf_power_attrs sysfs (%pe)\n",
 792                                 ERR_PTR(ret));
 793         }
 794
 795         ret = sysfs_create_files(gt->sysfs_defaults, rps_defaults_attrs);
 796         if (ret)
 797                 gt_warn(gt, "failed to add rps defaults (%pe)\n", ERR_PTR(ret));
 798 }