2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
26 #include <drm/display/drm_dp_dual_mode_helper.h>
27 #include <drm/display/drm_hdmi_helper.h>
28 #include <drm/drm_atomic_helper.h>
29 #include <drm/drm_edid.h>
33 #include "intel_display_types.h"
35 #include "intel_lspcon.h"
36 #include "intel_hdmi.h"
38 /* LSPCON OUI Vendor ID(signatures) */
39 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
40 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
42 #define DPCD_MCA_LSPCON_HDR_STATUS 0x70003
43 #define DPCD_PARADE_LSPCON_HDR_STATUS 0x00511
45 /* AUX addresses to write MCA AVI IF */
46 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
47 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
48 #define LSPCON_MCA_AVI_IF_KICKOFF (1 << 0)
49 #define LSPCON_MCA_AVI_IF_HANDLED (1 << 1)
51 /* AUX addresses to write Parade AVI IF */
52 #define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516
53 #define LSPCON_PARADE_AVI_IF_CTRL 0x51E
54 #define LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7)
55 #define LSPCON_PARADE_AVI_IF_DATA_SIZE 32
57 static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon)
59 struct intel_digital_port *dig_port =
60 container_of(lspcon, struct intel_digital_port, lspcon);
65 static const char *lspcon_mode_name(enum drm_lspcon_mode mode)
68 case DRM_LSPCON_MODE_PCON:
70 case DRM_LSPCON_MODE_LS:
72 case DRM_LSPCON_MODE_INVALID:
80 static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
82 struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
83 struct drm_i915_private *i915 = dp_to_i915(dp);
84 struct drm_dp_dpcd_ident *ident;
87 if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) {
88 drm_err(&i915->drm, "Can't read description\n");
92 ident = &dp->desc.ident;
93 vendor_oui = (ident->oui[0] << 16) | (ident->oui[1] << 8) |
97 case LSPCON_VENDOR_MCA_OUI:
98 lspcon->vendor = LSPCON_VENDOR_MCA;
99 drm_dbg_kms(&i915->drm, "Vendor: Mega Chips\n");
102 case LSPCON_VENDOR_PARADE_OUI:
103 lspcon->vendor = LSPCON_VENDOR_PARADE;
104 drm_dbg_kms(&i915->drm, "Vendor: Parade Tech\n");
108 drm_err(&i915->drm, "Invalid/Unknown vendor OUI\n");
115 static u32 get_hdr_status_reg(struct intel_lspcon *lspcon)
117 if (lspcon->vendor == LSPCON_VENDOR_MCA)
118 return DPCD_MCA_LSPCON_HDR_STATUS;
120 return DPCD_PARADE_LSPCON_HDR_STATUS;
123 void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
125 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
126 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
130 ret = drm_dp_dpcd_read(&intel_dp->aux, get_hdr_status_reg(lspcon),
134 drm_dbg_kms(&i915->drm, "HDR capability detection failed\n");
135 lspcon->hdr_supported = false;
136 } else if (hdr_caps & 0x1) {
137 drm_dbg_kms(&i915->drm, "LSPCON capable of HDR\n");
138 lspcon->hdr_supported = true;
142 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
144 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
145 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
146 enum drm_lspcon_mode current_mode;
147 struct i2c_adapter *adapter = &intel_dp->aux.ddc;
149 if (drm_lspcon_get_mode(intel_dp->aux.drm_dev, adapter, ¤t_mode)) {
150 drm_dbg_kms(&i915->drm, "Error reading LSPCON mode\n");
151 return DRM_LSPCON_MODE_INVALID;
156 static enum drm_lspcon_mode lspcon_wait_mode(struct intel_lspcon *lspcon,
157 enum drm_lspcon_mode mode)
159 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
160 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
161 enum drm_lspcon_mode current_mode;
163 current_mode = lspcon_get_current_mode(lspcon);
164 if (current_mode == mode)
167 drm_dbg_kms(&i915->drm, "Waiting for LSPCON mode %s to settle\n",
168 lspcon_mode_name(mode));
170 wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400);
171 if (current_mode != mode)
172 drm_err(&i915->drm, "LSPCON mode hasn't settled\n");
175 drm_dbg_kms(&i915->drm, "Current LSPCON mode %s\n",
176 lspcon_mode_name(current_mode));
181 static int lspcon_change_mode(struct intel_lspcon *lspcon,
182 enum drm_lspcon_mode mode)
184 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
185 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
187 enum drm_lspcon_mode current_mode;
188 struct i2c_adapter *adapter = &intel_dp->aux.ddc;
190 err = drm_lspcon_get_mode(intel_dp->aux.drm_dev, adapter, ¤t_mode);
192 drm_err(&i915->drm, "Error reading LSPCON mode\n");
196 if (current_mode == mode) {
197 drm_dbg_kms(&i915->drm, "Current mode = desired LSPCON mode\n");
201 err = drm_lspcon_set_mode(intel_dp->aux.drm_dev, adapter, mode);
203 drm_err(&i915->drm, "LSPCON mode change failed\n");
208 drm_dbg_kms(&i915->drm, "LSPCON mode changed done\n");
212 static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon)
214 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
215 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
218 if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV,
220 drm_dbg_kms(&i915->drm, "Native AUX CH down\n");
224 drm_dbg_kms(&i915->drm, "Native AUX CH up, DPCD version: %d.%d\n",
225 rev >> 4, rev & 0xf);
230 static bool lspcon_probe(struct intel_lspcon *lspcon)
233 enum drm_dp_dual_mode_type adaptor_type;
234 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
235 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
236 struct i2c_adapter *adapter = &intel_dp->aux.ddc;
237 enum drm_lspcon_mode expected_mode;
239 expected_mode = lspcon_wake_native_aux_ch(lspcon) ?
240 DRM_LSPCON_MODE_PCON : DRM_LSPCON_MODE_LS;
242 /* Lets probe the adaptor and check its type */
243 for (retry = 0; retry < 6; retry++) {
245 usleep_range(500, 1000);
247 adaptor_type = drm_dp_dual_mode_detect(intel_dp->aux.drm_dev, adapter);
248 if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON)
252 if (adaptor_type != DRM_DP_DUAL_MODE_LSPCON) {
253 drm_dbg_kms(&i915->drm, "No LSPCON detected, found %s\n",
254 drm_dp_get_dual_mode_type_name(adaptor_type));
258 /* Yay ... got a LSPCON device */
259 drm_dbg_kms(&i915->drm, "LSPCON detected\n");
260 lspcon->mode = lspcon_wait_mode(lspcon, expected_mode);
263 * In the SW state machine, lets Put LSPCON in PCON mode only.
264 * In this way, it will work with both HDMI 1.4 sinks as well as HDMI
267 if (lspcon->mode != DRM_LSPCON_MODE_PCON) {
268 if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON) < 0) {
269 drm_err(&i915->drm, "LSPCON mode change to PCON failed\n");
276 static void lspcon_resume_in_pcon_wa(struct intel_lspcon *lspcon)
278 struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
279 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
280 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
281 unsigned long start = jiffies;
284 if (intel_digital_port_connected(&dig_port->base)) {
285 drm_dbg_kms(&i915->drm, "LSPCON recovering in PCON mode after %u ms\n",
286 jiffies_to_msecs(jiffies - start));
290 if (time_after(jiffies, start + msecs_to_jiffies(1000)))
293 usleep_range(10000, 15000);
296 drm_dbg_kms(&i915->drm, "LSPCON DP descriptor mismatch after resume\n");
299 static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux)
305 /* Check if LSPCON FW is ready for data */
306 for (retry = 0; retry < 5; retry++) {
308 usleep_range(200, 300);
310 ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
313 drm_err(aux->drm_dev, "Failed to read AVI IF control\n");
317 if ((avi_if_ctrl & LSPCON_PARADE_AVI_IF_KICKOFF) == 0)
321 drm_err(aux->drm_dev, "Parade FW not ready to accept AVI IF\n");
325 static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
334 while (block_count < 4) {
335 if (!lspcon_parade_fw_ready(aux)) {
336 drm_dbg_kms(aux->drm_dev, "LSPCON FW not ready, block %d\n",
341 reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
342 data = avi_buf + block_count * 8;
343 ret = drm_dp_dpcd_write(aux, reg, data, 8);
345 drm_err(aux->drm_dev, "Failed to write AVI IF block %d\n",
351 * Once a block of data is written, we have to inform the FW
352 * about this by writing into avi infoframe control register:
353 * - set the kickoff bit[7] to 1
354 * - write the block no. to bits[1:0]
356 reg = LSPCON_PARADE_AVI_IF_CTRL;
357 avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
358 ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
360 drm_err(aux->drm_dev, "Failed to update (0x%x), block %d\n",
368 drm_dbg_kms(aux->drm_dev, "Wrote AVI IF blocks successfully\n");
372 static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,
376 u8 avi_if[LSPCON_PARADE_AVI_IF_DATA_SIZE] = {1, };
379 * Parade's frames contains 32 bytes of data, divided
381 * Token byte (first byte of first frame, must be non-zero)
382 * HB0 to HB2 from AVI IF (3 bytes header)
383 * PB0 to PB27 from AVI IF (28 bytes data)
384 * So it should look like this
385 * first block: | <token> <HB0-HB2> <DB0-DB3> |
386 * next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>|
389 if (len > LSPCON_PARADE_AVI_IF_DATA_SIZE - 1) {
390 drm_err(aux->drm_dev, "Invalid length of infoframes\n");
394 memcpy(&avi_if[1], frame, len);
396 if (!_lspcon_parade_write_infoframe_blocks(aux, avi_if)) {
397 drm_dbg_kms(aux->drm_dev, "Failed to write infoframe blocks\n");
404 static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
405 const u8 *buffer, ssize_t len)
411 const u8 *data = buffer;
413 reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
415 /* DPCD write for AVI IF can fail on a slow FW day, so retry */
416 for (retry = 0; retry < 5; retry++) {
417 ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
420 } else if (retry < 4) {
424 drm_err(aux->drm_dev, "DPCD write failed at:0x%x\n", reg);
428 val++; reg++; data++;
432 reg = LSPCON_MCA_AVI_IF_CTRL;
433 ret = drm_dp_dpcd_read(aux, reg, &val, 1);
435 drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
439 /* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
440 val &= ~LSPCON_MCA_AVI_IF_HANDLED;
441 val |= LSPCON_MCA_AVI_IF_KICKOFF;
443 ret = drm_dp_dpcd_write(aux, reg, &val, 1);
445 drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
450 ret = drm_dp_dpcd_read(aux, reg, &val, 1);
452 drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
456 if (val == LSPCON_MCA_AVI_IF_HANDLED)
457 drm_dbg_kms(aux->drm_dev, "AVI IF handled by FW\n");
462 void lspcon_write_infoframe(struct intel_encoder *encoder,
463 const struct intel_crtc_state *crtc_state,
465 const void *frame, ssize_t len)
468 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
469 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
470 struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
473 case HDMI_INFOFRAME_TYPE_AVI:
474 if (lspcon->vendor == LSPCON_VENDOR_MCA)
475 ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
478 ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
481 case HDMI_PACKET_TYPE_GAMUT_METADATA:
482 drm_dbg_kms(&i915->drm, "Update HDR metadata for lspcon\n");
483 /* It uses the legacy hsw implementation for the same */
484 hsw_write_infoframe(encoder, crtc_state, type, frame, len);
491 drm_err(&i915->drm, "Failed to write infoframes\n");
496 void lspcon_read_infoframe(struct intel_encoder *encoder,
497 const struct intel_crtc_state *crtc_state,
499 void *frame, ssize_t len)
501 /* FIXME implement for AVI Infoframe as well */
502 if (type == HDMI_PACKET_TYPE_GAMUT_METADATA)
503 hsw_read_infoframe(encoder, crtc_state, type,
507 void lspcon_set_infoframes(struct intel_encoder *encoder,
509 const struct intel_crtc_state *crtc_state,
510 const struct drm_connector_state *conn_state)
513 union hdmi_infoframe frame;
514 u8 buf[VIDEO_DIP_DATA_SIZE];
515 struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
516 struct intel_lspcon *lspcon = &dig_port->lspcon;
517 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
518 const struct drm_display_mode *adjusted_mode =
519 &crtc_state->hw.adjusted_mode;
521 if (!lspcon->active) {
522 drm_err(&i915->drm, "Writing infoframes while LSPCON disabled ?\n");
526 /* FIXME precompute infoframes */
528 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
529 conn_state->connector,
532 drm_err(&i915->drm, "couldn't fill AVI infoframe\n");
537 * Currently there is no interface defined to
538 * check user preference between RGB/YCBCR444
539 * or YCBCR420. So the only possible case for
540 * YCBCR444 usage is driving YCBCR420 output
541 * with LSPCON, when pipe is configured for
542 * YCBCR444 output and LSPCON takes care of
545 if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444)
546 frame.avi.colorspace = HDMI_COLORSPACE_YUV420;
548 frame.avi.colorspace = HDMI_COLORSPACE_RGB;
550 /* Set the Colorspace as per the HDMI spec */
551 drm_hdmi_avi_infoframe_colorimetry(&frame.avi, conn_state);
553 /* nonsense combination */
554 drm_WARN_ON(encoder->base.dev, crtc_state->limited_color_range &&
555 crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB);
557 if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB) {
558 drm_hdmi_avi_infoframe_quant_range(&frame.avi,
559 conn_state->connector,
561 crtc_state->limited_color_range ?
562 HDMI_QUANTIZATION_RANGE_LIMITED :
563 HDMI_QUANTIZATION_RANGE_FULL);
565 frame.avi.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
566 frame.avi.ycc_quantization_range = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
569 drm_hdmi_avi_infoframe_content_type(&frame.avi, conn_state);
571 ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
573 drm_err(&i915->drm, "Failed to pack AVI IF\n");
577 dig_port->write_infoframe(encoder, crtc_state, HDMI_INFOFRAME_TYPE_AVI,
581 static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
585 u16 reg = LSPCON_MCA_AVI_IF_CTRL;
587 ret = drm_dp_dpcd_read(aux, reg, &val, 1);
589 drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
593 return val & LSPCON_MCA_AVI_IF_KICKOFF;
596 static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
600 u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
602 ret = drm_dp_dpcd_read(aux, reg, &val, 1);
604 drm_err(aux->drm_dev, "DPCD read failed, address 0x%x\n", reg);
608 return val & LSPCON_PARADE_AVI_IF_KICKOFF;
611 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
612 const struct intel_crtc_state *pipe_config)
614 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
615 struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
616 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
617 bool infoframes_enabled;
621 if (lspcon->vendor == LSPCON_VENDOR_MCA)
622 infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
624 infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
626 if (infoframes_enabled)
627 val |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
629 if (lspcon->hdr_supported) {
630 tmp = intel_de_read(dev_priv,
631 HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
632 mask = VIDEO_DIP_ENABLE_GMP_HSW;
635 val |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
641 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
643 lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
646 bool lspcon_init(struct intel_digital_port *dig_port)
648 struct intel_dp *intel_dp = &dig_port->dp;
649 struct intel_lspcon *lspcon = &dig_port->lspcon;
650 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
651 struct drm_connector *connector = &intel_dp->attached_connector->base;
653 lspcon->active = false;
654 lspcon->mode = DRM_LSPCON_MODE_INVALID;
656 if (!lspcon_probe(lspcon)) {
657 drm_err(&i915->drm, "Failed to probe lspcon\n");
661 if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd) != 0) {
662 drm_err(&i915->drm, "LSPCON DPCD read failed\n");
666 if (!lspcon_detect_vendor(lspcon)) {
667 drm_err(&i915->drm, "LSPCON vendor detection failed\n");
671 connector->ycbcr_420_allowed = true;
672 lspcon->active = true;
673 drm_dbg_kms(&i915->drm, "Success: LSPCON init\n");
677 u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder,
678 const struct intel_crtc_state *pipe_config)
680 struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
682 return dig_port->infoframes_enabled(encoder, pipe_config);
685 void lspcon_resume(struct intel_digital_port *dig_port)
687 struct intel_lspcon *lspcon = &dig_port->lspcon;
688 struct drm_device *dev = dig_port->base.base.dev;
689 struct drm_i915_private *i915 = to_i915(dev);
690 enum drm_lspcon_mode expected_mode;
692 if (!intel_bios_encoder_is_lspcon(dig_port->base.devdata))
695 if (!lspcon->active) {
696 if (!lspcon_init(dig_port)) {
697 drm_err(&i915->drm, "LSPCON init failed on port %c\n",
698 port_name(dig_port->base.port));
703 if (lspcon_wake_native_aux_ch(lspcon)) {
704 expected_mode = DRM_LSPCON_MODE_PCON;
705 lspcon_resume_in_pcon_wa(lspcon);
707 expected_mode = DRM_LSPCON_MODE_LS;
710 if (lspcon_wait_mode(lspcon, expected_mode) == DRM_LSPCON_MODE_PCON)
713 if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON))
714 drm_err(&i915->drm, "LSPCON resume failed\n");
716 drm_dbg_kms(&i915->drm, "LSPCON resume success\n");