1 // SPDX-License-Identifier: MIT
3 * Copyright © 2020 Intel Corporation
6 #include <linux/string_helpers.h>
8 #include <drm/drm_debugfs.h>
9 #include <drm/drm_fourcc.h>
12 #include "i915_debugfs.h"
15 #include "intel_crtc.h"
17 #include "intel_crtc_state_dump.h"
18 #include "intel_display_debugfs.h"
19 #include "intel_display_power.h"
20 #include "intel_display_power_well.h"
21 #include "intel_display_types.h"
22 #include "intel_dmc.h"
24 #include "intel_dp_mst.h"
25 #include "intel_drrs.h"
26 #include "intel_fbc.h"
27 #include "intel_fbdev.h"
28 #include "intel_hdcp.h"
29 #include "intel_hdmi.h"
30 #include "intel_hotplug.h"
31 #include "intel_panel.h"
32 #include "intel_psr.h"
33 #include "intel_psr_regs.h"
36 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
38 return to_i915(node->minor->dev);
41 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
43 struct drm_i915_private *dev_priv = node_to_i915(m->private);
45 seq_printf(m, "FB tracking busy bits: 0x%08x\n",
46 dev_priv->display.fb_tracking.busy_bits);
48 seq_printf(m, "FB tracking flip bits: 0x%08x\n",
49 dev_priv->display.fb_tracking.flip_bits);
54 static int i915_sr_status(struct seq_file *m, void *unused)
56 struct drm_i915_private *dev_priv = node_to_i915(m->private);
57 intel_wakeref_t wakeref;
58 bool sr_enabled = false;
60 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
62 if (DISPLAY_VER(dev_priv) >= 9)
63 /* no global SR status; inspect per-plane WM */;
64 else if (HAS_PCH_SPLIT(dev_priv))
65 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
66 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
67 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
68 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
69 else if (IS_I915GM(dev_priv))
70 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
71 else if (IS_PINEVIEW(dev_priv))
72 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
73 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
74 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
76 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
78 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
83 static int i915_opregion(struct seq_file *m, void *unused)
85 struct drm_i915_private *i915 = node_to_i915(m->private);
86 struct intel_opregion *opregion = &i915->display.opregion;
89 seq_write(m, opregion->header, OPREGION_SIZE);
94 static int i915_vbt(struct seq_file *m, void *unused)
96 struct drm_i915_private *i915 = node_to_i915(m->private);
97 struct intel_opregion *opregion = &i915->display.opregion;
100 seq_write(m, opregion->vbt, opregion->vbt_size);
105 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
107 struct drm_i915_private *dev_priv = node_to_i915(m->private);
108 struct intel_framebuffer *fbdev_fb = NULL;
109 struct drm_framebuffer *drm_fb;
111 #ifdef CONFIG_DRM_FBDEV_EMULATION
112 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
114 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
115 fbdev_fb->base.width,
116 fbdev_fb->base.height,
117 fbdev_fb->base.format->depth,
118 fbdev_fb->base.format->cpp[0] * 8,
119 fbdev_fb->base.modifier,
120 drm_framebuffer_read_refcount(&fbdev_fb->base));
121 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base));
126 mutex_lock(&dev_priv->drm.mode_config.fb_lock);
127 drm_for_each_fb(drm_fb, &dev_priv->drm) {
128 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
132 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
135 fb->base.format->depth,
136 fb->base.format->cpp[0] * 8,
138 drm_framebuffer_read_refcount(&fb->base));
139 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base));
142 mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
147 static int i915_power_domain_info(struct seq_file *m, void *unused)
149 struct drm_i915_private *i915 = node_to_i915(m->private);
151 intel_display_power_debug(i915, m);
156 static void intel_seq_print_mode(struct seq_file *m, int tabs,
157 const struct drm_display_mode *mode)
161 for (i = 0; i < tabs; i++)
164 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
167 static void intel_encoder_info(struct seq_file *m,
168 struct intel_crtc *crtc,
169 struct intel_encoder *encoder)
171 struct drm_i915_private *dev_priv = node_to_i915(m->private);
172 struct drm_connector_list_iter conn_iter;
173 struct drm_connector *connector;
175 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
176 encoder->base.base.id, encoder->base.name);
178 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
179 drm_for_each_connector_iter(connector, &conn_iter) {
180 const struct drm_connector_state *conn_state =
183 if (conn_state->best_encoder != &encoder->base)
186 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
187 connector->base.id, connector->name);
189 drm_connector_list_iter_end(&conn_iter);
192 static void intel_panel_info(struct seq_file *m,
193 struct intel_connector *connector)
195 const struct drm_display_mode *fixed_mode;
197 if (list_empty(&connector->panel.fixed_modes))
200 seq_puts(m, "\tfixed modes:\n");
202 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
203 intel_seq_print_mode(m, 2, fixed_mode);
206 static void intel_hdcp_info(struct seq_file *m,
207 struct intel_connector *intel_connector)
209 bool hdcp_cap, hdcp2_cap;
211 if (!intel_connector->hdcp.shim) {
212 seq_puts(m, "No Connector Support");
216 hdcp_cap = intel_hdcp_capable(intel_connector);
217 hdcp2_cap = intel_hdcp2_capable(intel_connector);
220 seq_puts(m, "HDCP1.4 ");
222 seq_puts(m, "HDCP2.2 ");
224 if (!hdcp_cap && !hdcp2_cap)
231 static void intel_dp_info(struct seq_file *m,
232 struct intel_connector *intel_connector)
234 struct intel_encoder *intel_encoder = intel_attached_encoder(intel_connector);
235 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
236 const struct drm_property_blob *edid = intel_connector->base.edid_blob_ptr;
238 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
239 seq_printf(m, "\taudio support: %s\n",
240 str_yes_no(intel_connector->base.display_info.has_audio));
242 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
243 edid ? edid->data : NULL, &intel_dp->aux);
246 static void intel_dp_mst_info(struct seq_file *m,
247 struct intel_connector *connector)
249 bool has_audio = connector->base.display_info.has_audio;
251 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
254 static void intel_hdmi_info(struct seq_file *m,
255 struct intel_connector *connector)
257 bool has_audio = connector->base.display_info.has_audio;
259 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
262 static void intel_connector_info(struct seq_file *m,
263 struct drm_connector *connector)
265 struct intel_connector *intel_connector = to_intel_connector(connector);
266 const struct drm_connector_state *conn_state = connector->state;
267 struct intel_encoder *encoder =
268 to_intel_encoder(conn_state->best_encoder);
269 const struct drm_display_mode *mode;
271 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
272 connector->base.id, connector->name,
273 drm_get_connector_status_name(connector->status));
275 if (connector->status == connector_status_disconnected)
278 seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
279 connector->display_info.width_mm,
280 connector->display_info.height_mm);
281 seq_printf(m, "\tsubpixel order: %s\n",
282 drm_get_subpixel_order_name(connector->display_info.subpixel_order));
283 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
288 switch (connector->connector_type) {
289 case DRM_MODE_CONNECTOR_DisplayPort:
290 case DRM_MODE_CONNECTOR_eDP:
291 if (encoder->type == INTEL_OUTPUT_DP_MST)
292 intel_dp_mst_info(m, intel_connector);
294 intel_dp_info(m, intel_connector);
296 case DRM_MODE_CONNECTOR_HDMIA:
297 if (encoder->type == INTEL_OUTPUT_HDMI ||
298 encoder->type == INTEL_OUTPUT_DDI)
299 intel_hdmi_info(m, intel_connector);
305 seq_puts(m, "\tHDCP version: ");
306 intel_hdcp_info(m, intel_connector);
308 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
310 intel_panel_info(m, intel_connector);
312 seq_printf(m, "\tmodes:\n");
313 list_for_each_entry(mode, &connector->modes, head)
314 intel_seq_print_mode(m, 2, mode);
317 static const char *plane_type(enum drm_plane_type type)
320 case DRM_PLANE_TYPE_OVERLAY:
322 case DRM_PLANE_TYPE_PRIMARY:
324 case DRM_PLANE_TYPE_CURSOR:
327 * Deliberately omitting default: to generate compiler warnings
328 * when a new drm_plane_type gets added.
335 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
338 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
339 * will print them all to visualize if the values are misused
341 snprintf(buf, bufsize,
342 "%s%s%s%s%s%s(0x%08x)",
343 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
344 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
345 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
346 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
347 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
348 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
352 static const char *plane_visibility(const struct intel_plane_state *plane_state)
354 if (plane_state->uapi.visible)
357 if (plane_state->planar_slave)
358 return "planar-slave";
363 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
365 const struct intel_plane_state *plane_state =
366 to_intel_plane_state(plane->base.state);
367 const struct drm_framebuffer *fb = plane_state->uapi.fb;
368 struct drm_rect src, dst;
371 src = drm_plane_state_src(&plane_state->uapi);
372 dst = drm_plane_state_dest(&plane_state->uapi);
374 plane_rotation(rot_str, sizeof(rot_str),
375 plane_state->uapi.rotation);
377 seq_puts(m, "\t\tuapi: [FB:");
379 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
380 &fb->format->format, fb->modifier, fb->width,
383 seq_puts(m, "0] n/a,0x0,0x0,");
384 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
385 ", rotation=%s\n", plane_visibility(plane_state),
386 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
388 if (plane_state->planar_linked_plane)
389 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
390 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
391 plane_state->planar_slave ? "slave" : "master");
394 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
396 const struct intel_plane_state *plane_state =
397 to_intel_plane_state(plane->base.state);
398 const struct drm_framebuffer *fb = plane_state->hw.fb;
404 plane_rotation(rot_str, sizeof(rot_str),
405 plane_state->hw.rotation);
407 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
408 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
409 fb->base.id, &fb->format->format,
410 fb->modifier, fb->width, fb->height,
411 str_yes_no(plane_state->uapi.visible),
412 DRM_RECT_FP_ARG(&plane_state->uapi.src),
413 DRM_RECT_ARG(&plane_state->uapi.dst),
417 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
419 struct drm_i915_private *dev_priv = node_to_i915(m->private);
420 struct intel_plane *plane;
422 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
423 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
424 plane->base.base.id, plane->base.name,
425 plane_type(plane->base.type));
426 intel_plane_uapi_info(m, plane);
427 intel_plane_hw_info(m, plane);
431 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
433 const struct intel_crtc_state *crtc_state =
434 to_intel_crtc_state(crtc->base.state);
435 int num_scalers = crtc->num_scalers;
438 /* Not all platformas have a scaler */
440 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
442 crtc_state->scaler_state.scaler_users,
443 crtc_state->scaler_state.scaler_id,
444 crtc_state->hw.scaling_filter);
446 for (i = 0; i < num_scalers; i++) {
447 const struct intel_scaler *sc =
448 &crtc_state->scaler_state.scalers[i];
450 seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
451 i, str_yes_no(sc->in_use), sc->mode);
455 seq_puts(m, "\tNo scalers available on this platform\n");
459 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
460 static void crtc_updates_info(struct seq_file *m,
461 struct intel_crtc *crtc,
468 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
469 count += crtc->debug.vbl.times[row];
470 seq_printf(m, "%sUpdates: %llu\n", hdr, count);
474 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
475 char columns[80] = " |";
489 snprintf(columns, sizeof(columns), "%4ld%s |",
490 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
493 if (crtc->debug.vbl.times[row]) {
494 x = ilog2(crtc->debug.vbl.times[row]);
495 memset(columns + 8, '*', x);
496 columns[8 + x] = '\0';
499 seq_printf(m, "%s%s\n", hdr, columns);
502 seq_printf(m, "%sMin update: %lluns\n",
503 hdr, crtc->debug.vbl.min);
504 seq_printf(m, "%sMax update: %lluns\n",
505 hdr, crtc->debug.vbl.max);
506 seq_printf(m, "%sAverage update: %lluns\n",
507 hdr, div64_u64(crtc->debug.vbl.sum, count));
508 seq_printf(m, "%sOverruns > %uus: %u\n",
509 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
512 static int crtc_updates_show(struct seq_file *m, void *data)
514 crtc_updates_info(m, m->private, "");
518 static int crtc_updates_open(struct inode *inode, struct file *file)
520 return single_open(file, crtc_updates_show, inode->i_private);
523 static ssize_t crtc_updates_write(struct file *file,
524 const char __user *ubuf,
525 size_t len, loff_t *offp)
527 struct seq_file *m = file->private_data;
528 struct intel_crtc *crtc = m->private;
530 /* May race with an update. Meh. */
531 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
536 static const struct file_operations crtc_updates_fops = {
537 .owner = THIS_MODULE,
538 .open = crtc_updates_open,
541 .release = single_release,
542 .write = crtc_updates_write
545 static void crtc_updates_add(struct intel_crtc *crtc)
547 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
548 crtc, &crtc_updates_fops);
552 static void crtc_updates_info(struct seq_file *m,
553 struct intel_crtc *crtc,
558 static void crtc_updates_add(struct intel_crtc *crtc)
563 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
565 struct drm_i915_private *dev_priv = node_to_i915(m->private);
566 const struct intel_crtc_state *crtc_state =
567 to_intel_crtc_state(crtc->base.state);
568 struct intel_encoder *encoder;
570 seq_printf(m, "[CRTC:%d:%s]:\n",
571 crtc->base.base.id, crtc->base.name);
573 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
574 str_yes_no(crtc_state->uapi.enable),
575 str_yes_no(crtc_state->uapi.active),
576 DRM_MODE_ARG(&crtc_state->uapi.mode));
578 seq_printf(m, "\thw: enable=%s, active=%s\n",
579 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
580 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
581 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
582 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
583 DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
585 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
586 DRM_RECT_ARG(&crtc_state->pipe_src),
587 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
589 intel_scaler_info(m, crtc);
591 if (crtc_state->bigjoiner_pipes)
592 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
593 crtc_state->bigjoiner_pipes,
594 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master");
596 for_each_intel_encoder_mask(&dev_priv->drm, encoder,
597 crtc_state->uapi.encoder_mask)
598 intel_encoder_info(m, crtc, encoder);
600 intel_plane_info(m, crtc);
602 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
603 str_yes_no(!crtc->cpu_fifo_underrun_disabled),
604 str_yes_no(!crtc->pch_fifo_underrun_disabled));
606 crtc_updates_info(m, crtc, "\t");
609 static int i915_display_info(struct seq_file *m, void *unused)
611 struct drm_i915_private *dev_priv = node_to_i915(m->private);
612 struct intel_crtc *crtc;
613 struct drm_connector *connector;
614 struct drm_connector_list_iter conn_iter;
615 intel_wakeref_t wakeref;
617 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
619 drm_modeset_lock_all(&dev_priv->drm);
621 seq_printf(m, "CRTC info\n");
622 seq_printf(m, "---------\n");
623 for_each_intel_crtc(&dev_priv->drm, crtc)
624 intel_crtc_info(m, crtc);
627 seq_printf(m, "Connector info\n");
628 seq_printf(m, "--------------\n");
629 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
630 drm_for_each_connector_iter(connector, &conn_iter)
631 intel_connector_info(m, connector);
632 drm_connector_list_iter_end(&conn_iter);
634 drm_modeset_unlock_all(&dev_priv->drm);
636 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
641 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
643 struct drm_i915_private *dev_priv = node_to_i915(m->private);
646 drm_modeset_lock_all(&dev_priv->drm);
648 seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
649 dev_priv->display.dpll.ref_clks.nssc,
650 dev_priv->display.dpll.ref_clks.ssc);
652 for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) {
653 struct intel_shared_dpll *pll = &dev_priv->display.dpll.shared_dplls[i];
655 seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->info->name,
657 seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
658 pll->state.pipe_mask, pll->active_mask,
659 str_yes_no(pll->on));
660 seq_printf(m, " tracked hardware state:\n");
661 seq_printf(m, " dpll: 0x%08x\n", pll->state.hw_state.dpll);
662 seq_printf(m, " dpll_md: 0x%08x\n",
663 pll->state.hw_state.dpll_md);
664 seq_printf(m, " fp0: 0x%08x\n", pll->state.hw_state.fp0);
665 seq_printf(m, " fp1: 0x%08x\n", pll->state.hw_state.fp1);
666 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll);
667 seq_printf(m, " cfgcr0: 0x%08x\n", pll->state.hw_state.cfgcr0);
668 seq_printf(m, " cfgcr1: 0x%08x\n", pll->state.hw_state.cfgcr1);
669 seq_printf(m, " div0: 0x%08x\n", pll->state.hw_state.div0);
670 seq_printf(m, " mg_refclkin_ctl: 0x%08x\n",
671 pll->state.hw_state.mg_refclkin_ctl);
672 seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n",
673 pll->state.hw_state.mg_clktop2_coreclkctl1);
674 seq_printf(m, " mg_clktop2_hsclkctl: 0x%08x\n",
675 pll->state.hw_state.mg_clktop2_hsclkctl);
676 seq_printf(m, " mg_pll_div0: 0x%08x\n",
677 pll->state.hw_state.mg_pll_div0);
678 seq_printf(m, " mg_pll_div1: 0x%08x\n",
679 pll->state.hw_state.mg_pll_div1);
680 seq_printf(m, " mg_pll_lf: 0x%08x\n",
681 pll->state.hw_state.mg_pll_lf);
682 seq_printf(m, " mg_pll_frac_lock: 0x%08x\n",
683 pll->state.hw_state.mg_pll_frac_lock);
684 seq_printf(m, " mg_pll_ssc: 0x%08x\n",
685 pll->state.hw_state.mg_pll_ssc);
686 seq_printf(m, " mg_pll_bias: 0x%08x\n",
687 pll->state.hw_state.mg_pll_bias);
688 seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",
689 pll->state.hw_state.mg_pll_tdc_coldst_bias);
691 drm_modeset_unlock_all(&dev_priv->drm);
696 static int i915_ddb_info(struct seq_file *m, void *unused)
698 struct drm_i915_private *dev_priv = node_to_i915(m->private);
699 struct skl_ddb_entry *entry;
700 struct intel_crtc *crtc;
702 if (DISPLAY_VER(dev_priv) < 9)
705 drm_modeset_lock_all(&dev_priv->drm);
707 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
709 for_each_intel_crtc(&dev_priv->drm, crtc) {
710 struct intel_crtc_state *crtc_state =
711 to_intel_crtc_state(crtc->base.state);
712 enum pipe pipe = crtc->pipe;
713 enum plane_id plane_id;
715 seq_printf(m, "Pipe %c\n", pipe_name(pipe));
717 for_each_plane_id_on_crtc(crtc, plane_id) {
718 entry = &crtc_state->wm.skl.plane_ddb[plane_id];
719 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
720 entry->start, entry->end,
721 skl_ddb_entry_size(entry));
724 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
725 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start,
726 entry->end, skl_ddb_entry_size(entry));
729 drm_modeset_unlock_all(&dev_priv->drm);
735 intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
736 enum i915_power_well_id power_well_id)
738 intel_wakeref_t wakeref;
741 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
742 is_enabled = intel_display_power_well_is_enabled(i915,
744 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
749 static int i915_lpsp_status(struct seq_file *m, void *unused)
751 struct drm_i915_private *i915 = node_to_i915(m->private);
752 bool lpsp_enabled = false;
754 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
755 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
756 } else if (IS_DISPLAY_VER(i915, 11, 12)) {
757 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
758 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
759 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
761 seq_puts(m, "LPSP: not supported\n");
765 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
770 static int i915_dp_mst_info(struct seq_file *m, void *unused)
772 struct drm_i915_private *dev_priv = node_to_i915(m->private);
773 struct intel_encoder *intel_encoder;
774 struct intel_digital_port *dig_port;
775 struct drm_connector *connector;
776 struct drm_connector_list_iter conn_iter;
778 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
779 drm_for_each_connector_iter(connector, &conn_iter) {
780 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
783 intel_encoder = intel_attached_encoder(to_intel_connector(connector));
784 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
787 dig_port = enc_to_dig_port(intel_encoder);
788 if (!intel_dp_mst_source_support(&dig_port->dp))
791 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
792 dig_port->base.base.base.id,
793 dig_port->base.base.name);
794 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
796 drm_connector_list_iter_end(&conn_iter);
801 static ssize_t i915_displayport_test_active_write(struct file *file,
802 const char __user *ubuf,
803 size_t len, loff_t *offp)
807 struct drm_device *dev;
808 struct drm_connector *connector;
809 struct drm_connector_list_iter conn_iter;
810 struct intel_dp *intel_dp;
813 dev = ((struct seq_file *)file->private_data)->private;
818 input_buffer = memdup_user_nul(ubuf, len);
819 if (IS_ERR(input_buffer))
820 return PTR_ERR(input_buffer);
822 drm_dbg(&to_i915(dev)->drm,
823 "Copied %d bytes from user\n", (unsigned int)len);
825 drm_connector_list_iter_begin(dev, &conn_iter);
826 drm_for_each_connector_iter(connector, &conn_iter) {
827 struct intel_encoder *encoder;
829 if (connector->connector_type !=
830 DRM_MODE_CONNECTOR_DisplayPort)
833 encoder = to_intel_encoder(connector->encoder);
834 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
837 if (encoder && connector->status == connector_status_connected) {
838 intel_dp = enc_to_intel_dp(encoder);
839 status = kstrtoint(input_buffer, 10, &val);
842 drm_dbg(&to_i915(dev)->drm,
843 "Got %d for test active\n", val);
844 /* To prevent erroneous activation of the compliance
845 * testing code, only accept an actual value of 1 here
848 intel_dp->compliance.test_active = true;
850 intel_dp->compliance.test_active = false;
853 drm_connector_list_iter_end(&conn_iter);
862 static int i915_displayport_test_active_show(struct seq_file *m, void *data)
864 struct drm_i915_private *dev_priv = m->private;
865 struct drm_connector *connector;
866 struct drm_connector_list_iter conn_iter;
867 struct intel_dp *intel_dp;
869 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
870 drm_for_each_connector_iter(connector, &conn_iter) {
871 struct intel_encoder *encoder;
873 if (connector->connector_type !=
874 DRM_MODE_CONNECTOR_DisplayPort)
877 encoder = to_intel_encoder(connector->encoder);
878 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
881 if (encoder && connector->status == connector_status_connected) {
882 intel_dp = enc_to_intel_dp(encoder);
883 if (intel_dp->compliance.test_active)
890 drm_connector_list_iter_end(&conn_iter);
895 static int i915_displayport_test_active_open(struct inode *inode,
898 return single_open(file, i915_displayport_test_active_show,
902 static const struct file_operations i915_displayport_test_active_fops = {
903 .owner = THIS_MODULE,
904 .open = i915_displayport_test_active_open,
907 .release = single_release,
908 .write = i915_displayport_test_active_write
911 static int i915_displayport_test_data_show(struct seq_file *m, void *data)
913 struct drm_i915_private *dev_priv = m->private;
914 struct drm_connector *connector;
915 struct drm_connector_list_iter conn_iter;
916 struct intel_dp *intel_dp;
918 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
919 drm_for_each_connector_iter(connector, &conn_iter) {
920 struct intel_encoder *encoder;
922 if (connector->connector_type !=
923 DRM_MODE_CONNECTOR_DisplayPort)
926 encoder = to_intel_encoder(connector->encoder);
927 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
930 if (encoder && connector->status == connector_status_connected) {
931 intel_dp = enc_to_intel_dp(encoder);
932 if (intel_dp->compliance.test_type ==
933 DP_TEST_LINK_EDID_READ)
935 intel_dp->compliance.test_data.edid);
936 else if (intel_dp->compliance.test_type ==
937 DP_TEST_LINK_VIDEO_PATTERN) {
938 seq_printf(m, "hdisplay: %d\n",
939 intel_dp->compliance.test_data.hdisplay);
940 seq_printf(m, "vdisplay: %d\n",
941 intel_dp->compliance.test_data.vdisplay);
942 seq_printf(m, "bpc: %u\n",
943 intel_dp->compliance.test_data.bpc);
944 } else if (intel_dp->compliance.test_type ==
945 DP_TEST_LINK_PHY_TEST_PATTERN) {
946 seq_printf(m, "pattern: %d\n",
947 intel_dp->compliance.test_data.phytest.phy_pattern);
948 seq_printf(m, "Number of lanes: %d\n",
949 intel_dp->compliance.test_data.phytest.num_lanes);
950 seq_printf(m, "Link Rate: %d\n",
951 intel_dp->compliance.test_data.phytest.link_rate);
952 seq_printf(m, "level: %02x\n",
953 intel_dp->train_set[0]);
958 drm_connector_list_iter_end(&conn_iter);
962 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data);
964 static int i915_displayport_test_type_show(struct seq_file *m, void *data)
966 struct drm_i915_private *dev_priv = m->private;
967 struct drm_connector *connector;
968 struct drm_connector_list_iter conn_iter;
969 struct intel_dp *intel_dp;
971 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
972 drm_for_each_connector_iter(connector, &conn_iter) {
973 struct intel_encoder *encoder;
975 if (connector->connector_type !=
976 DRM_MODE_CONNECTOR_DisplayPort)
979 encoder = to_intel_encoder(connector->encoder);
980 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
983 if (encoder && connector->status == connector_status_connected) {
984 intel_dp = enc_to_intel_dp(encoder);
985 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
989 drm_connector_list_iter_end(&conn_iter);
993 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type);
996 i915_fifo_underrun_reset_write(struct file *filp,
997 const char __user *ubuf,
998 size_t cnt, loff_t *ppos)
1000 struct drm_i915_private *dev_priv = filp->private_data;
1001 struct intel_crtc *crtc;
1005 ret = kstrtobool_from_user(ubuf, cnt, &reset);
1012 for_each_intel_crtc(&dev_priv->drm, crtc) {
1013 struct drm_crtc_commit *commit;
1014 struct intel_crtc_state *crtc_state;
1016 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1020 crtc_state = to_intel_crtc_state(crtc->base.state);
1021 commit = crtc_state->uapi.commit;
1023 ret = wait_for_completion_interruptible(&commit->hw_done);
1025 ret = wait_for_completion_interruptible(&commit->flip_done);
1028 if (!ret && crtc_state->hw.active) {
1029 drm_dbg_kms(&dev_priv->drm,
1030 "Re-arming FIFO underruns on pipe %c\n",
1031 pipe_name(crtc->pipe));
1033 intel_crtc_arm_fifo_underrun(crtc, crtc_state);
1036 drm_modeset_unlock(&crtc->base.mutex);
1042 intel_fbc_reset_underrun(dev_priv);
1047 static const struct file_operations i915_fifo_underrun_reset_ops = {
1048 .owner = THIS_MODULE,
1049 .open = simple_open,
1050 .write = i915_fifo_underrun_reset_write,
1051 .llseek = default_llseek,
1054 static const struct drm_info_list intel_display_debugfs_list[] = {
1055 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
1056 {"i915_sr_status", i915_sr_status, 0},
1057 {"i915_opregion", i915_opregion, 0},
1058 {"i915_vbt", i915_vbt, 0},
1059 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1060 {"i915_power_domain_info", i915_power_domain_info, 0},
1061 {"i915_display_info", i915_display_info, 0},
1062 {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
1063 {"i915_dp_mst_info", i915_dp_mst_info, 0},
1064 {"i915_ddb_info", i915_ddb_info, 0},
1065 {"i915_lpsp_status", i915_lpsp_status, 0},
1068 static const struct {
1070 const struct file_operations *fops;
1071 } intel_display_debugfs_files[] = {
1072 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops},
1073 {"i915_dp_test_data", &i915_displayport_test_data_fops},
1074 {"i915_dp_test_type", &i915_displayport_test_type_fops},
1075 {"i915_dp_test_active", &i915_displayport_test_active_fops},
1078 void intel_display_debugfs_register(struct drm_i915_private *i915)
1080 struct drm_minor *minor = i915->drm.primary;
1083 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) {
1084 debugfs_create_file(intel_display_debugfs_files[i].name,
1086 minor->debugfs_root,
1087 to_i915(minor->dev),
1088 intel_display_debugfs_files[i].fops);
1091 drm_debugfs_create_files(intel_display_debugfs_list,
1092 ARRAY_SIZE(intel_display_debugfs_list),
1093 minor->debugfs_root, minor);
1095 intel_cdclk_debugfs_register(i915);
1096 intel_dmc_debugfs_register(i915);
1097 intel_fbc_debugfs_register(i915);
1098 intel_hpd_debugfs_register(i915);
1099 intel_psr_debugfs_register(i915);
1100 intel_wm_debugfs_register(i915);
1103 static int i915_panel_show(struct seq_file *m, void *data)
1105 struct drm_connector *connector = m->private;
1106 struct intel_dp *intel_dp =
1107 intel_attached_dp(to_intel_connector(connector));
1109 if (connector->status != connector_status_connected)
1112 seq_printf(m, "Panel power up delay: %d\n",
1113 intel_dp->pps.panel_power_up_delay);
1114 seq_printf(m, "Panel power down delay: %d\n",
1115 intel_dp->pps.panel_power_down_delay);
1116 seq_printf(m, "Backlight on delay: %d\n",
1117 intel_dp->pps.backlight_on_delay);
1118 seq_printf(m, "Backlight off delay: %d\n",
1119 intel_dp->pps.backlight_off_delay);
1123 DEFINE_SHOW_ATTRIBUTE(i915_panel);
1125 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
1127 struct drm_connector *connector = m->private;
1128 struct drm_i915_private *i915 = to_i915(connector->dev);
1129 struct intel_connector *intel_connector = to_intel_connector(connector);
1132 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1136 if (!connector->encoder || connector->status != connector_status_connected) {
1141 seq_printf(m, "%s:%d HDCP version: ", connector->name,
1142 connector->base.id);
1143 intel_hdcp_info(m, intel_connector);
1146 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1150 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
1152 static int i915_lpsp_capability_show(struct seq_file *m, void *data)
1154 struct drm_connector *connector = m->private;
1155 struct drm_i915_private *i915 = to_i915(connector->dev);
1156 struct intel_encoder *encoder;
1157 bool lpsp_capable = false;
1159 encoder = intel_attached_encoder(to_intel_connector(connector));
1163 if (connector->status != connector_status_connected)
1166 if (DISPLAY_VER(i915) >= 13)
1167 lpsp_capable = encoder->port <= PORT_B;
1168 else if (DISPLAY_VER(i915) >= 12)
1170 * Actually TGL can drive LPSP on port till DDI_C
1171 * but there is no physical connected DDI_C on TGL sku's,
1172 * even driver is not initilizing DDI_C port for gen12.
1174 lpsp_capable = encoder->port <= PORT_B;
1175 else if (DISPLAY_VER(i915) == 11)
1176 lpsp_capable = (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
1177 connector->connector_type == DRM_MODE_CONNECTOR_eDP);
1178 else if (IS_DISPLAY_VER(i915, 9, 10))
1179 lpsp_capable = (encoder->port == PORT_A &&
1180 (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
1181 connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
1182 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort));
1183 else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
1184 lpsp_capable = connector->connector_type == DRM_MODE_CONNECTOR_eDP;
1186 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1190 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
1192 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
1194 struct drm_connector *connector = m->private;
1195 struct drm_device *dev = connector->dev;
1196 struct drm_crtc *crtc;
1197 struct intel_dp *intel_dp;
1198 struct drm_modeset_acquire_ctx ctx;
1199 struct intel_crtc_state *crtc_state = NULL;
1201 bool try_again = false;
1203 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
1207 ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
1210 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
1216 crtc = connector->state->crtc;
1217 if (connector->status != connector_status_connected || !crtc) {
1221 ret = drm_modeset_lock(&crtc->mutex, &ctx);
1222 if (ret == -EDEADLK) {
1223 ret = drm_modeset_backoff(&ctx);
1232 intel_dp = intel_attached_dp(to_intel_connector(connector));
1233 crtc_state = to_intel_crtc_state(crtc->state);
1234 seq_printf(m, "DSC_Enabled: %s\n",
1235 str_yes_no(crtc_state->dsc.compression_enable));
1236 seq_printf(m, "DSC_Sink_Support: %s\n",
1237 str_yes_no(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)));
1238 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1239 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1241 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1242 DP_DSC_YCbCr420_Native)),
1243 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1245 seq_printf(m, "Force_DSC_Enable: %s\n",
1246 str_yes_no(intel_dp->force_dsc_en));
1247 if (!intel_dp_is_edp(intel_dp))
1248 seq_printf(m, "FEC_Sink_Support: %s\n",
1249 str_yes_no(drm_dp_sink_supports_fec(intel_dp->fec_capable)));
1250 } while (try_again);
1252 drm_modeset_drop_locks(&ctx);
1253 drm_modeset_acquire_fini(&ctx);
1258 static ssize_t i915_dsc_fec_support_write(struct file *file,
1259 const char __user *ubuf,
1260 size_t len, loff_t *offp)
1262 bool dsc_enable = false;
1264 struct drm_connector *connector =
1265 ((struct seq_file *)file->private_data)->private;
1266 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1267 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
1268 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1274 "Copied %zu bytes from user to force DSC\n", len);
1276 ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1280 drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1281 (dsc_enable) ? "true" : "false");
1282 intel_dp->force_dsc_en = dsc_enable;
1288 static int i915_dsc_fec_support_open(struct inode *inode,
1291 return single_open(file, i915_dsc_fec_support_show,
1295 static const struct file_operations i915_dsc_fec_support_fops = {
1296 .owner = THIS_MODULE,
1297 .open = i915_dsc_fec_support_open,
1299 .llseek = seq_lseek,
1300 .release = single_release,
1301 .write = i915_dsc_fec_support_write
1304 static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1306 struct drm_connector *connector = m->private;
1307 struct drm_device *dev = connector->dev;
1308 struct drm_crtc *crtc;
1309 struct intel_crtc_state *crtc_state;
1310 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1316 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex);
1320 crtc = connector->state->crtc;
1321 if (connector->status != connector_status_connected || !crtc) {
1326 crtc_state = to_intel_crtc_state(crtc->state);
1327 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1329 out: drm_modeset_unlock(&dev->mode_config.connection_mutex);
1334 static ssize_t i915_dsc_bpc_write(struct file *file,
1335 const char __user *ubuf,
1336 size_t len, loff_t *offp)
1338 struct drm_connector *connector =
1339 ((struct seq_file *)file->private_data)->private;
1340 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1341 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1345 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1349 intel_dp->force_dsc_bpc = dsc_bpc;
1355 static int i915_dsc_bpc_open(struct inode *inode,
1358 return single_open(file, i915_dsc_bpc_show, inode->i_private);
1361 static const struct file_operations i915_dsc_bpc_fops = {
1362 .owner = THIS_MODULE,
1363 .open = i915_dsc_bpc_open,
1365 .llseek = seq_lseek,
1366 .release = single_release,
1367 .write = i915_dsc_bpc_write
1370 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1372 struct drm_connector *connector = m->private;
1373 struct drm_device *dev = connector->dev;
1374 struct drm_crtc *crtc;
1375 struct intel_crtc_state *crtc_state;
1376 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1382 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex);
1386 crtc = connector->state->crtc;
1387 if (connector->status != connector_status_connected || !crtc) {
1392 crtc_state = to_intel_crtc_state(crtc->state);
1393 seq_printf(m, "DSC_Output_Format: %s\n",
1394 intel_output_format_name(crtc_state->output_format));
1396 out: drm_modeset_unlock(&dev->mode_config.connection_mutex);
1401 static ssize_t i915_dsc_output_format_write(struct file *file,
1402 const char __user *ubuf,
1403 size_t len, loff_t *offp)
1405 struct drm_connector *connector =
1406 ((struct seq_file *)file->private_data)->private;
1407 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
1408 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1409 int dsc_output_format = 0;
1412 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1416 intel_dp->force_dsc_output_format = dsc_output_format;
1422 static int i915_dsc_output_format_open(struct inode *inode,
1425 return single_open(file, i915_dsc_output_format_show, inode->i_private);
1428 static const struct file_operations i915_dsc_output_format_fops = {
1429 .owner = THIS_MODULE,
1430 .open = i915_dsc_output_format_open,
1432 .llseek = seq_lseek,
1433 .release = single_release,
1434 .write = i915_dsc_output_format_write
1438 * Returns the Current CRTC's bpc.
1439 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1441 static int i915_current_bpc_show(struct seq_file *m, void *data)
1443 struct intel_crtc *crtc = m->private;
1444 struct intel_crtc_state *crtc_state;
1447 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1451 crtc_state = to_intel_crtc_state(crtc->base.state);
1452 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1454 drm_modeset_unlock(&crtc->base.mutex);
1458 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1460 /* Pipe may differ from crtc index if pipes are fused off */
1461 static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1463 struct intel_crtc *crtc = m->private;
1465 seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1469 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1472 * intel_connector_debugfs_add - add i915 specific connector debugfs files
1473 * @intel_connector: pointer to a registered drm_connector
1475 * Cleanup will be done by drm_connector_unregister() through a call to
1476 * drm_debugfs_connector_remove().
1478 void intel_connector_debugfs_add(struct intel_connector *intel_connector)
1480 struct drm_connector *connector = &intel_connector->base;
1481 struct dentry *root = connector->debugfs_entry;
1482 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1484 /* The connector must have been registered beforehands. */
1488 intel_drrs_connector_debugfs_add(intel_connector);
1489 intel_psr_connector_debugfs_add(intel_connector);
1491 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
1492 debugfs_create_file("i915_panel_timings", S_IRUGO, root,
1493 connector, &i915_panel_fops);
1495 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1496 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1497 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1498 debugfs_create_file("i915_hdcp_sink_capability", S_IRUGO, root,
1499 connector, &i915_hdcp_sink_capability_fops);
1502 if (DISPLAY_VER(dev_priv) >= 11 &&
1503 ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
1504 !to_intel_connector(connector)->mst_port) ||
1505 connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
1506 debugfs_create_file("i915_dsc_fec_support", 0644, root,
1507 connector, &i915_dsc_fec_support_fops);
1509 debugfs_create_file("i915_dsc_bpc", 0644, root,
1510 connector, &i915_dsc_bpc_fops);
1512 debugfs_create_file("i915_dsc_output_format", 0644, root,
1513 connector, &i915_dsc_output_format_fops);
1516 if (connector->connector_type == DRM_MODE_CONNECTOR_DSI ||
1517 connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
1518 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1519 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1520 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB)
1521 debugfs_create_file("i915_lpsp_capability", 0444, root,
1522 connector, &i915_lpsp_capability_fops);
1526 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1527 * @crtc: pointer to a drm_crtc
1529 * Failure to add debugfs entries should generally be ignored.
1531 void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1533 struct dentry *root = crtc->base.debugfs_entry;
1538 crtc_updates_add(crtc);
1539 intel_drrs_crtc_debugfs_add(crtc);
1540 intel_fbc_crtc_debugfs_add(crtc);
1541 hsw_ips_crtc_debugfs_add(crtc);
1543 debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1544 &i915_current_bpc_fops);
1545 debugfs_create_file("i915_pipe", 0444, root, crtc,
1546 &intel_crtc_pipe_fops);