1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Hibernation low level support for RISCV.
5 * Copyright (C) 2023 StarFive Technology Co., Ltd.
11 #include <asm/asm-offsets.h>
12 #include <asm/assembler.h>
15 #include <linux/linkage.h>
18 * int __hibernate_cpu_resume(void)
19 * Switch back to the hibernated image's page table prior to restoring the CPU
24 ENTRY(__hibernate_cpu_resume)
25 /* switch to hibernated image's page table. */
29 REG_L a0, hibernate_cpu_context
34 /* Return zero value. */
38 END(__hibernate_cpu_resume)
41 * Prepare to restore the image.
42 * a0: satp of saved page tables.
43 * a1: satp of temporary page tables.
46 ENTRY(hibernate_restore_image)
50 REG_L s4, restore_pblist
51 REG_L a1, relocated_restore_code
54 END(hibernate_restore_image)
57 * The below code will be executed from a 'safe' page.
58 * It first switches to the temporary page table, then starts to copy the pages
59 * back to the original memory location. Finally, it jumps to __hibernate_cpu_resume()
60 * to restore the CPU context.
62 ENTRY(hibernate_core_restore_code)
63 /* switch to temp page table. */
67 /* The below code will restore the hibernated image. */
68 REG_L a1, HIBERN_PBE_ADDR(s4)
69 REG_L a0, HIBERN_PBE_ORIG(s4)
73 REG_L s4, HIBERN_PBE_NEXT(s4)
77 END(hibernate_core_restore_code)