arch/arm/mach-omap1/serial.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * linux/arch/arm/mach-omap1/serial.c
   4  *
   5  * OMAP1 serial support.
   6  */
   7 #include <linux/gpio.h>
   8 #include <linux/module.h>
   9 #include <linux/kernel.h>
  10 #include <linux/init.h>
  11 #include <linux/irq.h>
  12 #include <linux/delay.h>
  13 #include <linux/serial.h>
  14 #include <linux/tty.h>
  15 #include <linux/serial_8250.h>
  16 #include <linux/serial_reg.h>
  17 #include <linux/clk.h>
  18 #include <linux/io.h>
  19
  20 #include <asm/mach-types.h>
  21
  22 #include "serial.h"
  23 #include "mux.h"
  24 #include "pm.h"
  25 #include "soc.h"
  26
  27 static struct clk * uart1_ck;
  28 static struct clk * uart2_ck;
  29 static struct clk * uart3_ck;
  30
  31 static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
  32                                           int offset)
  33 {
  34         offset <<= up->regshift;
  35         return (unsigned int)__raw_readb(up->membase + offset);
  36 }
  37
  38 static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
  39                                     int value)
  40 {
  41         offset <<= p->regshift;
  42         __raw_writeb(value, p->membase + offset);
  43 }
  44
  45 /*
  46  * Internal UARTs need to be initialized for the 8250 autoconfig to work
  47  * properly. Note that the TX watermark initialization may not be needed
  48  * once the 8250.c watermark handling code is merged.
  49  */
  50 static void __init omap_serial_reset(struct plat_serial8250_port *p)
  51 {
  52         omap_serial_outp(p, UART_OMAP_MDR1,
  53                         UART_OMAP_MDR1_DISABLE);        /* disable UART */
  54         omap_serial_outp(p, UART_OMAP_SCR, 0x08);       /* TX watermark */
  55         omap_serial_outp(p, UART_OMAP_MDR1,
  56                         UART_OMAP_MDR1_16X_MODE);       /* enable UART */
  57
  58         if (!cpu_is_omap15xx()) {
  59                 omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
  60                 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
  61         }
  62 }
  63
  64 static struct plat_serial8250_port serial_platform_data[] = {
  65         {
  66                 .mapbase        = OMAP1_UART1_BASE,
  67                 .irq            = INT_UART1,
  68                 .flags          = UPF_BOOT_AUTOCONF,
  69                 .iotype         = UPIO_MEM,
  70                 .regshift       = 2,
  71                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  72         },
  73         {
  74                 .mapbase        = OMAP1_UART2_BASE,
  75                 .irq            = INT_UART2,
  76                 .flags          = UPF_BOOT_AUTOCONF,
  77                 .iotype         = UPIO_MEM,
  78                 .regshift       = 2,
  79                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  80         },
  81         {
  82                 .mapbase        = OMAP1_UART3_BASE,
  83                 .irq            = INT_UART3,
  84                 .flags          = UPF_BOOT_AUTOCONF,
  85                 .iotype         = UPIO_MEM,
  86                 .regshift       = 2,
  87                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  88         },
  89         { },
  90 };
  91
  92 static struct platform_device serial_device = {
  93         .name                   = "serial8250",
  94         .id                     = PLAT8250_DEV_PLATFORM,
  95         .dev                    = {
  96                 .platform_data  = serial_platform_data,
  97         },
  98 };
  99
 100 /*
 101  * Note that on Innovator-1510 UART2 pins conflict with USB2.
 102  * By default UART2 does not work on Innovator-1510 if you have
 103  * USB OHCI enabled. To use UART2, you must disable USB2 first.
 104  */
 105 void __init omap_serial_init(void)
 106 {
 107         int i;
 108
 109         if (cpu_is_omap15xx()) {
 110                 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
 111                 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
 112                 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
 113         }
 114
 115         for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
 116                 /* Static mapping, never released */
 117                 serial_platform_data[i].membase =
 118                         ioremap(serial_platform_data[i].mapbase, SZ_2K);
 119                 if (!serial_platform_data[i].membase) {
 120                         printk(KERN_ERR "Could not ioremap uart%i\n", i);
 121                         continue;
 122                 }
 123                 switch (i) {
 124                 case 0:
 125                         uart1_ck = clk_get(NULL, "uart1_ck");
 126                         if (IS_ERR(uart1_ck))
 127                                 printk("Could not get uart1_ck\n");
 128                         else {
 129                                 clk_prepare_enable(uart1_ck);
 130                                 if (cpu_is_omap15xx())
 131                                         clk_set_rate(uart1_ck, 12000000);
 132                         }
 133                         break;
 134                 case 1:
 135                         uart2_ck = clk_get(NULL, "uart2_ck");
 136                         if (IS_ERR(uart2_ck))
 137                                 printk("Could not get uart2_ck\n");
 138                         else {
 139                                 clk_prepare_enable(uart2_ck);
 140                                 if (cpu_is_omap15xx())
 141                                         clk_set_rate(uart2_ck, 12000000);
 142                                 else
 143                                         clk_set_rate(uart2_ck, 48000000);
 144                         }
 145                         break;
 146                 case 2:
 147                         uart3_ck = clk_get(NULL, "uart3_ck");
 148                         if (IS_ERR(uart3_ck))
 149                                 printk("Could not get uart3_ck\n");
 150                         else {
 151                                 clk_prepare_enable(uart3_ck);
 152                                 if (cpu_is_omap15xx())
 153                                         clk_set_rate(uart3_ck, 12000000);
 154                         }
 155                         break;
 156                 }
 157                 omap_serial_reset(&serial_platform_data[i]);
 158         }
 159 }
 160
 161 #ifdef CONFIG_OMAP_SERIAL_WAKE
 162
 163 static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
 164 {
 165         /* Need to do something with serial port right after wake-up? */
 166         return IRQ_HANDLED;
 167 }
 168
 169 /*
 170  * Reroutes serial RX lines to GPIO lines for the duration of
 171  * sleep to allow waking up the device from serial port even
 172  * in deep sleep.
 173  */
 174 void omap_serial_wake_trigger(int enable)
 175 {
 176         if (!cpu_is_omap16xx())
 177                 return;
 178
 179         if (uart1_ck != NULL) {
 180                 if (enable)
 181                         omap_cfg_reg(V14_16XX_GPIO37);
 182                 else
 183                         omap_cfg_reg(V14_16XX_UART1_RX);
 184         }
 185         if (uart2_ck != NULL) {
 186                 if (enable)
 187                         omap_cfg_reg(R9_16XX_GPIO18);
 188                 else
 189                         omap_cfg_reg(R9_16XX_UART2_RX);
 190         }
 191         if (uart3_ck != NULL) {
 192                 if (enable)
 193                         omap_cfg_reg(L14_16XX_GPIO49);
 194                 else
 195                         omap_cfg_reg(L14_16XX_UART3_RX);
 196         }
 197 }
 198
 199 static void __init omap_serial_set_port_wakeup(int gpio_nr)
 200 {
 201         int ret;
 202
 203         ret = gpio_request(gpio_nr, "UART wake");
 204         if (ret < 0) {
 205                 printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
 206                        gpio_nr);
 207                 return;
 208         }
 209         gpio_direction_input(gpio_nr);
 210         ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
 211                           IRQF_TRIGGER_RISING, "serial wakeup", NULL);
 212         if (ret) {
 213                 gpio_free(gpio_nr);
 214                 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
 215                        gpio_nr);
 216                 return;
 217         }
 218         enable_irq_wake(gpio_to_irq(gpio_nr));
 219 }
 220
 221 int __init omap_serial_wakeup_init(void)
 222 {
 223         if (!cpu_is_omap16xx())
 224                 return 0;
 225
 226         if (uart1_ck != NULL)
 227                 omap_serial_set_port_wakeup(37);
 228         if (uart2_ck != NULL)
 229                 omap_serial_set_port_wakeup(18);
 230         if (uart3_ck != NULL)
 231                 omap_serial_set_port_wakeup(49);
 232
 233         return 0;
 234 }
 235
 236 #endif  /* CONFIG_OMAP_SERIAL_WAKE */
 237
 238 static int __init omap_init(void)
 239 {
 240         if (!cpu_class_is_omap1())
 241                 return -ENODEV;
 242
 243         return platform_device_register(&serial_device);
 244 }
 245 arch_initcall(omap_init);