1 What: /sys/devices/system/cpu/
5 A collection of both global and individual CPU attributes
7 Individual CPU attributes are contained in subdirectories
8 named by the kernel's logical CPU number, e.g.:
10 /sys/devices/system/cpu/cpuX/
12 What: /sys/devices/system/cpu/kernel_max
13 /sys/devices/system/cpu/offline
14 /sys/devices/system/cpu/online
15 /sys/devices/system/cpu/possible
16 /sys/devices/system/cpu/present
19 Description: CPU topology files that describe kernel limits related to
22 kernel_max: the maximum cpu index allowed by the kernel
25 offline: cpus that are not online because they have been
26 HOTPLUGGED off or exceed the limit of cpus allowed by the
27 kernel configuration (kernel_max above).
29 online: cpus that are online and being scheduled.
31 possible: cpus that have been allocated resources and can be
32 brought online if they are present.
34 present: cpus that have been identified as being present in
37 See Documentation/admin-guide/cputopology.rst for more information.
40 What: /sys/devices/system/cpu/probe
41 /sys/devices/system/cpu/release
44 Description: Dynamic addition and removal of CPU's. This is not hotplug
45 removal, this is meant complete removal/addition of the CPU
48 probe: writes to this file will dynamically add a CPU to the
49 system. Information written to the file to add CPU's is
50 architecture specific.
52 release: writes to this file dynamically remove a CPU from
53 the system. Information written to the file to remove CPU's
54 is architecture specific.
56 What: /sys/devices/system/cpu/cpuX/node
59 Description: Discover NUMA node a CPU belongs to
61 When CONFIG_NUMA is enabled, a symbolic link that points
62 to the corresponding NUMA node directory.
64 For example, the following symlink is created for cpu42
67 /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2
70 What: /sys/devices/system/cpu/cpuX/topology/core_siblings
71 /sys/devices/system/cpu/cpuX/topology/core_siblings_list
72 /sys/devices/system/cpu/cpuX/topology/physical_package_id
73 /sys/devices/system/cpu/cpuX/topology/thread_siblings
74 /sys/devices/system/cpu/cpuX/topology/thread_siblings_list
75 /sys/devices/system/cpu/cpuX/topology/ppin
78 Description: CPU topology files that describe a logical CPU's relationship
79 to other cores and threads in the same physical package.
81 One cpuX directory is created per logical CPU in the system,
82 e.g. /sys/devices/system/cpu/cpu42/.
84 Briefly, the files above are:
86 core_siblings: internal kernel map of cpuX's hardware threads
87 within the same physical_package_id.
89 core_siblings_list: human-readable list of the logical CPU
90 numbers within the same physical_package_id as cpuX.
92 physical_package_id: physical package id of cpuX. Typically
93 corresponds to a physical socket number, but the actual value
94 is architecture and platform dependent.
96 thread_siblings: internal kernel map of cpuX's hardware
97 threads within the same core as cpuX
99 thread_siblings_list: human-readable list of cpuX's hardware
100 threads within the same core as cpuX
102 ppin: human-readable Protected Processor Identification
103 Number of the socket the cpu# belongs to. There should be
104 one per physical_package_id. File is readable only to
107 See Documentation/admin-guide/cputopology.rst for more information.
110 What: /sys/devices/system/cpu/cpuidle/available_governors
111 /sys/devices/system/cpu/cpuidle/current_driver
112 /sys/devices/system/cpu/cpuidle/current_governor
113 /sys/devices/system/cpu/cpuidle/current_governer_ro
116 Description: Discover cpuidle policy and mechanism
118 Various CPUs today support multiple idle levels that are
119 differentiated by varying exit latencies and power
120 consumption during idle.
122 Idle policy (governor) is differentiated from idle mechanism
125 available_governors: (RO) displays a space separated list of
128 current_driver: (RO) displays current idle mechanism.
130 current_governor: (RW) displays current idle policy. Users can
131 switch the governor at runtime by writing to this file.
133 current_governor_ro: (RO) displays current idle policy.
135 See Documentation/admin-guide/pm/cpuidle.rst and
136 Documentation/driver-api/pm/cpuidle.rst for more information.
139 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/name
140 /sys/devices/system/cpu/cpuX/cpuidle/stateN/latency
141 /sys/devices/system/cpu/cpuX/cpuidle/stateN/power
142 /sys/devices/system/cpu/cpuX/cpuidle/stateN/time
143 /sys/devices/system/cpu/cpuX/cpuidle/stateN/usage
144 /sys/devices/system/cpu/cpuX/cpuidle/stateN/above
145 /sys/devices/system/cpu/cpuX/cpuidle/stateN/below
147 KernelVersion: v2.6.24
150 The directory /sys/devices/system/cpu/cpuX/cpuidle contains per
151 logical CPU specific cpuidle information for each online cpu X.
152 The processor idle states which are available for use have the
153 following attributes:
155 ======== ==== =================================================
156 name: (RO) Name of the idle state (string).
158 latency: (RO) The latency to exit out of this idle state (in
161 power: (RO) The power consumed while in this idle state (in
164 time: (RO) The total time spent in this idle state
167 usage: (RO) Number of times this state was entered (a count).
169 above: (RO) Number of times this state was entered, but the
170 observed CPU idle duration was too short for it
173 below: (RO) Number of times this state was entered, but the
174 observed CPU idle duration was too long for it
176 ======== ==== =================================================
178 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/desc
180 KernelVersion: v2.6.25
183 (RO) A small description about the idle state (string).
186 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/disable
191 (RW) Option to disable this idle state (bool). The behavior and
192 the effect of the disable variable depends on the implementation
193 of a particular governor. In the ladder governor, for example,
194 it is not coherent, i.e. if one is disabling a light state, then
195 all deeper states are disabled as well, but the disable variable
196 does not reflect it. Likewise, if one enables a deep state but a
197 lighter state still is disabled, then this has no effect.
199 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/default_status
204 (RO) The default status of this state, "enabled" or "disabled".
206 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/residency
211 (RO) Display the target residency i.e. the minimum amount of
212 time (in microseconds) this cpu should spend in this idle state
213 to make the transition worth the effort.
215 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/s2idle/
220 Idle state usage statistics related to suspend-to-idle.
222 This attribute group is only present for states that can be
223 used in suspend-to-idle with suspended timekeeping.
225 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/s2idle/time
230 Total time spent by the CPU in suspend-to-idle (with scheduler
231 tick suspended) after requesting this state.
233 What: /sys/devices/system/cpu/cpuX/cpuidle/state<N>/s2idle/usage
238 Total number of times this state has been requested by the CPU
239 while entering suspend-to-idle.
241 What: /sys/devices/system/cpu/cpuX/cpufreq/*
242 Date: pre-git history
244 Description: Discover and change clock speed of CPUs
246 Clock scaling allows you to change the clock speed of the
247 CPUs on the fly. This is a nice method to save battery
248 power, because the lower the clock speed, the less power
251 There are many knobs to tweak in this directory.
253 See files in Documentation/cpu-freq/ for more information.
256 What: /sys/devices/system/cpu/cpuX/cpufreq/freqdomain_cpus
259 Description: Discover CPUs in the same CPU frequency coordination domain
261 freqdomain_cpus is the list of CPUs (online+offline) that share
262 the same clock/freq domain (possibly at the hardware level).
263 That information may be hidden from the cpufreq core and the
264 value of related_cpus may be different from freqdomain_cpus. This
265 attribute is useful for user space DVFS controllers to get better
266 power/performance results for platforms using acpi-cpufreq.
268 This file is only present if the acpi-cpufreq or the cppc-cpufreq
272 What: /sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1}
274 KernelVersion: 2.6.27
276 Description: Disable L3 cache indices
278 These files exist in every CPU's cache/index3 directory. Each
279 cache_disable_{0,1} file corresponds to one disable slot which
280 can be used to disable a cache index. Reading from these files
281 on a processor with this functionality will return the currently
282 disabled index for that node. There is one L3 structure per
283 node, or per internal node on MCM machines. Writing a valid
284 index to one of these files will cause the specified cache
285 index to be disabled.
287 All AMD processors with L3 caches provide this functionality.
288 For details, see BKDGs at
289 https://www.amd.com/en/support/tech-docs?keyword=bios+kernel
292 What: /sys/devices/system/cpu/cpufreq/boost
295 Description: Processor frequency boosting control
297 This switch controls the boost setting for the whole system.
298 Boosting allows the CPU and the firmware to run at a frequency
299 beyond its nominal limit.
301 More details can be found in
302 Documentation/admin-guide/pm/cpufreq.rst
305 What: /sys/devices/system/cpu/cpuX/crash_notes
306 /sys/devices/system/cpu/cpuX/crash_notes_size
309 Description: address and size of the percpu note.
311 crash_notes: the physical address of the memory that holds the
314 crash_notes_size: size of the note of cpuX.
317 What: /sys/devices/system/cpu/intel_pstate/max_perf_pct
318 /sys/devices/system/cpu/intel_pstate/min_perf_pct
319 /sys/devices/system/cpu/intel_pstate/no_turbo
322 Description: Parameters for the Intel P-state driver
324 Logic for selecting the current P-state in Intel
325 Sandybridge+ processors. The three knobs control
326 limits for the P-state that will be requested by the
329 max_perf_pct: limits the maximum P state that will be requested by
330 the driver stated as a percentage of the available performance.
332 min_perf_pct: limits the minimum P state that will be requested by
333 the driver stated as a percentage of the available performance.
335 no_turbo: limits the driver to selecting P states below the turbo
338 More details can be found in
339 Documentation/admin-guide/pm/intel_pstate.rst
341 What: /sys/devices/system/cpu/cpu*/cache/index*/<set_of_attributes_mentioned_below>
342 Date: July 2014(documented, existed before August 2008)
345 Description: Parameters for the CPU cache attributes
349 allocate a memory location to a cache line
350 on a cache miss because of a write
352 allocate a memory location to a cache line
353 on a cache miss because of a read
355 both writeallocate and readallocate
358 LEGACY used only on IA64 and is same as write_policy
361 the minimum amount of data in bytes that gets
362 transferred from memory to cache
365 the cache hierarchy in the multi-level cache configuration
368 total number of sets in the cache, a set is a
369 collection of cache lines with the same cache index
371 physical_line_partition:
372 number of physical cache line per cache tag
375 the list of logical cpus sharing the cache
378 logical cpu mask containing the list of cpus sharing
382 the total cache size in kB
385 - Instruction: cache that only holds instructions
386 - Data: cache that only caches data
387 - Unified: cache that holds both data and instructions
389 ways_of_associativity:
390 degree of freedom in placing a particular block
391 of memory in the cache
395 data is written to both the cache line
396 and to the block in the lower-level memory
398 data is written only to the cache line and
399 the modified cache line is written to main
400 memory only when it is replaced
403 What: /sys/devices/system/cpu/cpu*/cache/index*/id
406 Description: Cache id
408 The id provides a unique number for a specific instance of
409 a cache of a particular type. E.g. there may be a level
410 3 unified cache on each socket in a server and we may
411 assign them ids 0, 1, 2, ...
413 Note that id value can be non-contiguous. E.g. level 1
414 caches typically exist per core, but there may not be a
415 power of two cores on a socket, so these caches may be
416 numbered 0, 1, 2, 3, 4, 5, 8, 9, 10, ...
418 What: /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats
419 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/turbo_stat
420 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/sub_turbo_stat
421 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/unthrottle
422 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/powercap
423 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/overtemp
424 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/supply_fault
425 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/overcurrent
426 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/occ_reset
430 Description: POWERNV CPUFreq driver's frequency throttle stats directory and
433 'cpuX/cpufreq/throttle_stats' directory contains the CPU frequency
434 throttle stat attributes for the chip. The throttle stats of a cpu
435 is common across all the cpus belonging to a chip. Below are the
436 throttle attributes exported in the 'throttle_stats' directory:
438 - turbo_stat : This file gives the total number of times the max
439 frequency is throttled to lower frequency in turbo (at and above
440 nominal frequency) range of frequencies.
442 - sub_turbo_stat : This file gives the total number of times the
443 max frequency is throttled to lower frequency in sub-turbo(below
444 nominal frequency) range of frequencies.
446 - unthrottle : This file gives the total number of times the max
447 frequency is unthrottled after being throttled.
449 - powercap : This file gives the total number of times the max
450 frequency is throttled due to 'Power Capping'.
452 - overtemp : This file gives the total number of times the max
453 frequency is throttled due to 'CPU Over Temperature'.
455 - supply_fault : This file gives the total number of times the
456 max frequency is throttled due to 'Power Supply Failure'.
458 - overcurrent : This file gives the total number of times the
459 max frequency is throttled due to 'Overcurrent'.
461 - occ_reset : This file gives the total number of times the max
462 frequency is throttled due to 'OCC Reset'.
464 The sysfs attributes representing different throttle reasons like
465 powercap, overtemp, supply_fault, overcurrent and occ_reset map to
466 the reasons provided by OCC firmware for throttling the frequency.
468 What: /sys/devices/system/cpu/cpufreq/policyX/throttle_stats
469 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/turbo_stat
470 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/sub_turbo_stat
471 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/unthrottle
472 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/powercap
473 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/overtemp
474 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/supply_fault
475 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/overcurrent
476 /sys/devices/system/cpu/cpufreq/policyX/throttle_stats/occ_reset
480 Description: POWERNV CPUFreq driver's frequency throttle stats directory and
483 'policyX/throttle_stats' directory and all the attributes are same as
484 the /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats directory and
485 attributes which give the frequency throttle information of the chip.
487 What: /sys/devices/system/cpu/cpuX/regs/
488 /sys/devices/system/cpu/cpuX/regs/identification/
489 /sys/devices/system/cpu/cpuX/regs/identification/midr_el1
490 /sys/devices/system/cpu/cpuX/regs/identification/revidr_el1
491 /sys/devices/system/cpu/cpuX/regs/identification/smidr_el1
494 Description: AArch64 CPU registers
496 'identification' directory exposes the CPU ID registers for
497 identifying model and revision of the CPU and SMCU.
499 What: /sys/devices/system/cpu/aarch32_el0
502 Description: Identifies the subset of CPUs in the system that can execute
503 AArch32 (32-bit ARM) applications. If present, the same format as
504 /sys/devices/system/cpu/{offline,online,possible,present} is used.
505 If absent, then all or none of the CPUs can execute AArch32
506 applications and execve() will behave accordingly.
508 What: /sys/devices/system/cpu/cpuX/cpu_capacity
511 Description: information about CPUs heterogeneity.
513 cpu_capacity: capacity of cpuX.
515 What: /sys/devices/system/cpu/vulnerabilities
516 /sys/devices/system/cpu/vulnerabilities/meltdown
517 /sys/devices/system/cpu/vulnerabilities/spectre_v1
518 /sys/devices/system/cpu/vulnerabilities/spectre_v2
519 /sys/devices/system/cpu/vulnerabilities/spec_store_bypass
520 /sys/devices/system/cpu/vulnerabilities/l1tf
521 /sys/devices/system/cpu/vulnerabilities/mds
522 /sys/devices/system/cpu/vulnerabilities/srbds
523 /sys/devices/system/cpu/vulnerabilities/tsx_async_abort
524 /sys/devices/system/cpu/vulnerabilities/itlb_multihit
525 /sys/devices/system/cpu/vulnerabilities/mmio_stale_data
526 /sys/devices/system/cpu/vulnerabilities/retbleed
529 Description: Information about CPU vulnerabilities
531 The files are named after the code names of CPU
532 vulnerabilities. The output of those files reflects the
533 state of the CPUs in the system. Possible output values:
535 ================ ==============================================
536 "Not affected" CPU is not affected by the vulnerability
537 "Vulnerable" CPU is affected and no mitigation in effect
538 "Mitigation: $M" CPU is affected and mitigation $M is in effect
539 ================ ==============================================
541 See also: Documentation/admin-guide/hw-vuln/index.rst
543 What: /sys/devices/system/cpu/smt
544 /sys/devices/system/cpu/smt/active
545 /sys/devices/system/cpu/smt/control
548 Description: Control Symmetric Multi Threading (SMT)
550 active: Tells whether SMT is active (enabled and siblings online)
552 control: Read/write interface to control SMT. Possible
555 ================ =========================================
557 "off" SMT is disabled
558 "forceoff" SMT is force disabled. Cannot be changed.
559 "notsupported" SMT is not supported by the CPU
560 "notimplemented" SMT runtime toggling is not
561 implemented for the architecture
562 ================ =========================================
564 If control status is "forceoff" or "notsupported" writes
567 What: /sys/devices/system/cpu/cpuX/power/energy_perf_bias
570 Description: Intel Energy and Performance Bias Hint (EPB)
572 EPB for the given CPU in a sliding scale 0 - 15, where a value
573 of 0 corresponds to a hint preference for highest performance
574 and a value of 15 corresponds to the maximum energy savings.
576 In order to change the EPB value for the CPU, write either
577 a number in the 0 - 15 sliding scale above, or one of the
578 strings: "performance", "balance-performance", "normal",
579 "balance-power", "power" (that represent values reflected by
580 their meaning), to this attribute.
582 This attribute is present for all online CPUs supporting the
585 What: /sys/devices/system/cpu/umwait_control
586 /sys/devices/system/cpu/umwait_control/enable_c02
587 /sys/devices/system/cpu/umwait_control/max_time
590 Description: Umwait control
592 enable_c02: Read/write interface to control umwait C0.2 state
593 Read returns C0.2 state status:
597 Write 'y' or '1' or 'on' to enable C0.2 state.
598 Write 'n' or '0' or 'off' to disable C0.2 state.
600 The interface is case insensitive.
602 max_time: Read/write interface to control umwait maximum time
603 in TSC-quanta that the CPU can reside in either C0.1
604 or C0.2 state. The time is an unsigned 32-bit number.
605 Note that a value of zero means there is no limit.
606 Low order two bits must be zero.
608 What: /sys/devices/system/cpu/svm
612 Description: Secure Virtual Machine
614 If 1, it means the system is using the Protected Execution
615 Facility in POWER9 and newer processors. i.e., it is a Secure
618 What: /sys/devices/system/cpu/cpuX/purr
621 Description: PURR ticks for this CPU since the system boot.
623 The Processor Utilization Resources Register (PURR) is
624 a 64-bit counter which provides an estimate of the
625 resources used by the CPU thread. The contents of this
626 register increases monotonically. This sysfs interface
627 exposes the number of PURR ticks for cpuX.
629 What: /sys/devices/system/cpu/cpuX/spurr
632 Description: SPURR ticks for this CPU since the system boot.
634 The Scaled Processor Utilization Resources Register
635 (SPURR) is a 64-bit counter that provides a frequency
636 invariant estimate of the resources used by the CPU
637 thread. The contents of this register increases
638 monotonically. This sysfs interface exposes the number
639 of SPURR ticks for cpuX.
641 What: /sys/devices/system/cpu/cpuX/idle_purr
644 Description: PURR ticks for cpuX when it was idle.
646 This sysfs interface exposes the number of PURR ticks
647 for cpuX when it was idle.
649 What: /sys/devices/system/cpu/cpuX/idle_spurr
652 Description: SPURR ticks for cpuX when it was idle.
654 This sysfs interface exposes the number of SPURR ticks
655 for cpuX when it was idle.
657 What: /sys/devices/system/cpu/cpuX/mte_tcf_preferred
660 Description: Preferred MTE tag checking mode
662 When a user program specifies more than one MTE tag checking
663 mode, this sysfs node is used to specify which mode should
664 be preferred when scheduling a task on that CPU. Possible
667 ================ ==============================================
668 "sync" Prefer synchronous mode
669 "asymm" Prefer asymmetric mode
670 "async" Prefer asynchronous mode
671 ================ ==============================================
673 See also: Documentation/arm64/memory-tagging-extension.rst
675 What: /sys/devices/system/cpu/nohz_full
679 (RO) the list of CPUs that are in nohz_full mode.
680 These CPUs are set by boot parameter "nohz_full=".
682 What: /sys/devices/system/cpu/isolated
686 (RO) the list of CPUs that are isolated and don't
687 participate in load balancing. These CPUs are set by
688 boot parameter "isolcpus=".