1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
4 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
7 #include <linux/kernel.h>
8 #include <linux/errno.h>
9 #include <linux/types.h>
10 #include <linux/pci.h>
11 #include <linux/delay.h>
12 #include <linux/if_ether.h>
13 #include <linux/slab.h>
14 #include "vnic_resource.h"
15 #include "vnic_devcmd.h"
17 #include "vnic_stats.h"
20 struct devcmd2_controller {
21 struct vnic_wq_ctrl *wq_ctrl;
22 struct vnic_dev_ring results_ring;
24 struct vnic_devcmd2 *cmd_ring;
25 struct devcmd2_result *result;
31 enum vnic_proxy_type {
45 struct vnic_res res[RES_TYPE_MAX];
46 enum vnic_dev_intr_mode intr_mode;
47 struct vnic_devcmd __iomem *devcmd;
48 struct vnic_devcmd_notify *notify;
49 struct vnic_devcmd_notify notify_copy;
52 dma_addr_t linkstatus_pa;
53 struct vnic_stats *stats;
55 struct vnic_devcmd_fw_info *fw_info;
56 dma_addr_t fw_info_pa;
57 enum vnic_proxy_type proxy;
59 u64 args[VNIC_DEVCMD_NARGS];
60 struct devcmd2_controller *devcmd2;
61 int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
65 #define VNIC_MAX_RES_HDR_SIZE \
66 (sizeof(struct vnic_resource_header) + \
67 sizeof(struct vnic_resource) * RES_TYPE_MAX)
68 #define VNIC_RES_STRIDE 128
70 void *vnic_dev_priv(struct vnic_dev *vdev)
75 static int vnic_dev_discover_res(struct vnic_dev *vdev,
76 struct vnic_dev_bar *bar)
78 struct vnic_resource_header __iomem *rh;
79 struct vnic_resource __iomem *r;
82 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
83 printk(KERN_ERR "vNIC BAR0 res hdr length error\n");
89 printk(KERN_ERR "vNIC BAR0 res hdr not mem-mapped\n");
93 if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
94 ioread32(&rh->version) != VNIC_RES_VERSION) {
95 printk(KERN_ERR "vNIC BAR0 res magic/version error "
96 "exp (%lx/%lx) curr (%x/%x)\n",
97 VNIC_RES_MAGIC, VNIC_RES_VERSION,
98 ioread32(&rh->magic), ioread32(&rh->version));
102 r = (struct vnic_resource __iomem *)(rh + 1);
104 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
106 u8 bar_num = ioread8(&r->bar);
107 u32 bar_offset = ioread32(&r->bar_offset);
108 u32 count = ioread32(&r->count);
113 if (bar_num != 0) /* only mapping in BAR0 resources */
120 case RES_TYPE_INTR_CTRL:
121 /* each count is stride bytes long */
122 len = count * VNIC_RES_STRIDE;
123 if (len + bar_offset > bar->len) {
124 printk(KERN_ERR "vNIC BAR0 resource %d "
125 "out-of-bounds, offset 0x%x + "
126 "size 0x%x > bar len 0x%lx\n",
133 case RES_TYPE_INTR_PBA_LEGACY:
134 case RES_TYPE_DEVCMD2:
135 case RES_TYPE_DEVCMD:
142 vdev->res[type].count = count;
143 vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
149 unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
150 enum vnic_res_type type)
152 return vdev->res[type].count;
155 void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
158 if (!vdev->res[type].vaddr)
165 case RES_TYPE_INTR_CTRL:
166 return (char __iomem *)vdev->res[type].vaddr +
167 index * VNIC_RES_STRIDE;
169 return (char __iomem *)vdev->res[type].vaddr;
173 unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
174 unsigned int desc_count,
175 unsigned int desc_size)
177 /* The base address of the desc rings must be 512 byte aligned.
178 * Descriptor count is aligned to groups of 32 descriptors. A
179 * count of 0 means the maximum 4096 descriptors. Descriptor
180 * size is aligned to 16 bytes.
183 unsigned int count_align = 32;
184 unsigned int desc_align = 16;
186 ring->base_align = 512;
191 ring->desc_count = ALIGN(desc_count, count_align);
193 ring->desc_size = ALIGN(desc_size, desc_align);
195 ring->size = ring->desc_count * ring->desc_size;
196 ring->size_unaligned = ring->size + ring->base_align;
198 return ring->size_unaligned;
201 void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
203 memset(ring->descs, 0, ring->size);
206 int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
207 unsigned int desc_count, unsigned int desc_size)
209 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
211 ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
212 ring->size_unaligned,
213 &ring->base_addr_unaligned, GFP_KERNEL);
215 if (!ring->descs_unaligned) {
217 "Failed to allocate ring (size=%d), aborting\n",
222 ring->base_addr = ALIGN(ring->base_addr_unaligned,
224 ring->descs = (u8 *)ring->descs_unaligned +
225 (ring->base_addr - ring->base_addr_unaligned);
227 vnic_dev_clear_desc_ring(ring);
229 ring->desc_avail = ring->desc_count - 1;
234 void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
237 dma_free_coherent(&vdev->pdev->dev,
238 ring->size_unaligned,
239 ring->descs_unaligned,
240 ring->base_addr_unaligned);
245 static int vnic_dev_cmd1(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd, int wait)
247 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
250 static const int dev_cmd_err[] = {
251 /* convert from fw's version of error.h to host's version */
253 EINVAL, /* ERR_EINVAL */
254 EFAULT, /* ERR_EFAULT */
255 EPERM, /* ERR_EPERM */
256 EBUSY, /* ERR_EBUSY */
259 u64 *a0 = &vdev->args[0];
260 u64 *a1 = &vdev->args[1];
262 status = ioread32(&devcmd->status);
263 if (status & STAT_BUSY) {
264 printk(KERN_ERR "Busy devcmd %d\n", _CMD_N(cmd));
268 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
269 writeq(*a0, &devcmd->args[0]);
270 writeq(*a1, &devcmd->args[1]);
274 iowrite32(cmd, &devcmd->cmd);
276 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
279 for (delay = 0; delay < wait; delay++) {
283 status = ioread32(&devcmd->status);
284 if (!(status & STAT_BUSY)) {
286 if (status & STAT_ERROR) {
287 err = dev_cmd_err[(int)readq(&devcmd->args[0])];
288 printk(KERN_ERR "Error %d devcmd %d\n",
293 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
295 *a0 = readq(&devcmd->args[0]);
296 *a1 = readq(&devcmd->args[1]);
303 printk(KERN_ERR "Timedout devcmd %d\n", _CMD_N(cmd));
307 static int vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
310 struct devcmd2_controller *dc2c = vdev->devcmd2;
311 struct devcmd2_result *result;
320 posted = ioread32(&dc2c->wq_ctrl->posted_index);
321 fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
323 if (posted == 0xFFFFFFFF || fetch_index == 0xFFFFFFFF) {
324 /* Hardware surprise removal: return error */
325 pr_err("%s: devcmd2 invalid posted or fetch index on cmd %d\n",
326 pci_name(vdev->pdev), _CMD_N(cmd));
327 pr_err("%s: fetch index: %u, posted index: %u\n",
328 pci_name(vdev->pdev), fetch_index, posted);
334 new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
336 if (new_posted == fetch_index) {
337 pr_err("%s: devcmd2 wq full while issuing cmd %d\n",
338 pci_name(vdev->pdev), _CMD_N(cmd));
339 pr_err("%s: fetch index: %u, posted index: %u\n",
340 pci_name(vdev->pdev), fetch_index, posted);
344 dc2c->cmd_ring[posted].cmd = cmd;
345 dc2c->cmd_ring[posted].flags = 0;
347 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
348 dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
349 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
350 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
351 dc2c->cmd_ring[posted].args[i] = vdev->args[i];
355 /* Adding write memory barrier prevents compiler and/or CPU
356 * reordering, thus avoiding descriptor posting before
357 * descriptor is initialized. Otherwise, hardware can read
358 * stale descriptor fields.
361 iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
363 if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
366 result = dc2c->result + dc2c->next_result;
370 if (dc2c->next_result == dc2c->result_size) {
371 dc2c->next_result = 0;
372 dc2c->color = dc2c->color ? 0 : 1;
375 for (delay = 0; delay < wait; delay++) {
377 if (result->color == color) {
379 err = -(int) result->error;
380 if (err != ERR_ECMDUNKNOWN ||
381 cmd != CMD_CAPABILITY)
382 pr_err("%s:Error %d devcmd %d\n",
383 pci_name(vdev->pdev),
387 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
388 rmb(); /*prevent reorder while reding result*/
389 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
390 vdev->args[i] = result->results[i];
396 pr_err("%s:Timed out devcmd %d\n", pci_name(vdev->pdev), _CMD_N(cmd));
402 static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
404 vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
408 vdev->devcmd_rtn = &vnic_dev_cmd1;
413 static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
416 unsigned int fetch_index;
421 vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_ATOMIC);
425 vdev->devcmd2->color = 1;
426 vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
427 err = vnic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq,
428 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
430 goto err_free_devcmd2;
432 fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
433 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
434 pr_err("error in devcmd2 init");
440 * Don't change fetch_index ever and
441 * set posted_index same as fetch_index
442 * when setting up the WQ for devcmd2.
444 vnic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index,
447 vnic_wq_enable(&vdev->devcmd2->wq);
449 err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
450 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
454 vdev->devcmd2->result =
455 (struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
456 vdev->devcmd2->cmd_ring =
457 (struct vnic_devcmd2 *) vdev->devcmd2->wq.ring.descs;
458 vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
459 vdev->args[0] = (u64) vdev->devcmd2->results_ring.base_addr |
461 vdev->args[1] = DEVCMD2_RING_SIZE;
463 err = vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
465 goto err_free_desc_ring;
467 vdev->devcmd_rtn = &vnic_dev_cmd2;
472 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
474 vnic_wq_disable(&vdev->devcmd2->wq);
476 vnic_wq_free(&vdev->devcmd2->wq);
478 kfree(vdev->devcmd2);
479 vdev->devcmd2 = NULL;
485 static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
487 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
488 vnic_wq_disable(&vdev->devcmd2->wq);
489 vnic_wq_free(&vdev->devcmd2->wq);
490 kfree(vdev->devcmd2);
491 vdev->devcmd2 = NULL;
492 vdev->devcmd_rtn = &vnic_dev_cmd1;
496 static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
497 enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
504 err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
513 int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
514 u64 *a0, u64 *a1, int wait)
516 memset(vdev->args, 0, sizeof(vdev->args));
518 switch (vdev->proxy) {
521 return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
526 int vnic_dev_fw_info(struct vnic_dev *vdev,
527 struct vnic_devcmd_fw_info **fw_info)
533 if (!vdev->fw_info) {
534 vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
535 sizeof(struct vnic_devcmd_fw_info),
536 &vdev->fw_info_pa, GFP_KERNEL);
540 a0 = vdev->fw_info_pa;
542 /* only get fw_info once and cache it */
543 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
546 *fw_info = vdev->fw_info;
551 int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
561 err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
565 *(u8 *)value = (u8)a0;
568 *(u16 *)value = (u16)a0;
571 *(u32 *)value = (u32)a0;
584 int vnic_dev_stats_clear(struct vnic_dev *vdev)
588 return vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
591 int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
597 vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
598 sizeof(struct vnic_stats), &vdev->stats_pa, GFP_KERNEL);
603 *stats = vdev->stats;
605 a1 = sizeof(struct vnic_stats);
607 return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
610 int vnic_dev_close(struct vnic_dev *vdev)
614 return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
617 int vnic_dev_enable(struct vnic_dev *vdev)
621 return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
624 int vnic_dev_disable(struct vnic_dev *vdev)
628 return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
631 int vnic_dev_open(struct vnic_dev *vdev, int arg)
633 u64 a0 = (u32)arg, a1 = 0;
635 return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
638 int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
646 err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
655 int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
657 u64 a0 = (u32)arg, a1 = 0;
659 return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
662 int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
670 err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
679 int vnic_dev_hang_notify(struct vnic_dev *vdev)
683 return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
686 int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
692 for (i = 0; i < ETH_ALEN; i++)
695 err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a[0], &a[1], wait);
699 for (i = 0; i < ETH_ALEN; i++)
700 mac_addr[i] = ((u8 *)&a)[i];
705 void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
706 int broadcast, int promisc, int allmulti)
712 a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
713 (multicast ? CMD_PFILTER_MULTICAST : 0) |
714 (broadcast ? CMD_PFILTER_BROADCAST : 0) |
715 (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
716 (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
718 err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
720 printk(KERN_ERR "Can't set packet filter\n");
723 void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
730 for (i = 0; i < ETH_ALEN; i++)
731 ((u8 *)&a)[i] = addr[i];
733 err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a[0], &a[1], wait);
735 pr_err("Can't add addr [%pM], %d\n", addr, err);
738 void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
745 for (i = 0; i < ETH_ALEN; i++)
746 ((u8 *)&a)[i] = addr[i];
748 err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a[0], &a[1], wait);
750 pr_err("Can't del addr [%pM], %d\n", addr, err);
753 int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
759 vdev->notify = dma_alloc_coherent(&vdev->pdev->dev,
760 sizeof(struct vnic_devcmd_notify),
761 &vdev->notify_pa, GFP_KERNEL);
766 a0 = vdev->notify_pa;
767 a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
768 a1 += sizeof(struct vnic_devcmd_notify);
770 return vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
773 void vnic_dev_notify_unset(struct vnic_dev *vdev)
778 a0 = 0; /* paddr = 0 to unset notify buffer */
779 a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
780 a1 += sizeof(struct vnic_devcmd_notify);
782 vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
785 static int vnic_dev_notify_ready(struct vnic_dev *vdev)
788 unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
797 memcpy(&vdev->notify_copy, vdev->notify,
798 sizeof(struct vnic_devcmd_notify));
799 words = (u32 *)&vdev->notify_copy;
800 for (i = 1; i < nwords; i++)
802 } while (csum != words[0]);
807 int vnic_dev_init(struct vnic_dev *vdev, int arg)
809 u64 a0 = (u32)arg, a1 = 0;
811 return vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
814 u16 vnic_dev_set_default_vlan(struct vnic_dev *vdev, u16 new_default_vlan)
816 u64 a0 = new_default_vlan, a1 = 0;
820 old_vlan = vnic_dev_cmd(vdev, CMD_SET_DEFAULT_VLAN, &a0, &a1, wait);
821 return (u16)old_vlan;
824 int vnic_dev_link_status(struct vnic_dev *vdev)
826 if (vdev->linkstatus)
827 return *vdev->linkstatus;
829 if (!vnic_dev_notify_ready(vdev))
832 return vdev->notify_copy.link_state;
835 u32 vnic_dev_port_speed(struct vnic_dev *vdev)
837 if (!vnic_dev_notify_ready(vdev))
840 return vdev->notify_copy.port_speed;
843 u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
845 if (!vnic_dev_notify_ready(vdev))
848 return vdev->notify_copy.msglvl;
851 u32 vnic_dev_mtu(struct vnic_dev *vdev)
853 if (!vnic_dev_notify_ready(vdev))
856 return vdev->notify_copy.mtu;
859 u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev)
861 if (!vnic_dev_notify_ready(vdev))
864 return vdev->notify_copy.link_down_cnt;
867 void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
868 enum vnic_dev_intr_mode intr_mode)
870 vdev->intr_mode = intr_mode;
873 enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
874 struct vnic_dev *vdev)
876 return vdev->intr_mode;
879 void vnic_dev_unregister(struct vnic_dev *vdev)
883 dma_free_coherent(&vdev->pdev->dev,
884 sizeof(struct vnic_devcmd_notify),
887 if (vdev->linkstatus)
888 dma_free_coherent(&vdev->pdev->dev,
891 vdev->linkstatus_pa);
893 dma_free_coherent(&vdev->pdev->dev,
894 sizeof(struct vnic_stats),
895 vdev->stats, vdev->stats_pa);
897 dma_free_coherent(&vdev->pdev->dev,
898 sizeof(struct vnic_devcmd_fw_info),
899 vdev->fw_info, vdev->fw_info_pa);
901 vnic_dev_deinit_devcmd2(vdev);
906 struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
907 void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar)
910 vdev = kzalloc(sizeof(struct vnic_dev), GFP_KERNEL);
918 if (vnic_dev_discover_res(vdev, bar))
924 vnic_dev_unregister(vdev);
928 int vnic_dev_cmd_init(struct vnic_dev *vdev)
933 p = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
935 pr_err("fnic: DEVCMD2 resource found!\n");
936 err = vnic_dev_init_devcmd2(vdev);
938 pr_err("fnic: DEVCMD2 not found, fall back to Devcmd\n");
939 err = vnic_dev_init_devcmd1(vdev);