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[linux.git] / drivers / gpu / drm / amd / display / dc / i2caux / engine.h
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25
26 #ifndef __DAL_ENGINE_H__
27 #define __DAL_ENGINE_H__
28
29 enum i2caux_transaction_operation {
30         I2CAUX_TRANSACTION_READ,
31         I2CAUX_TRANSACTION_WRITE
32 };
33
34 enum i2caux_transaction_address_space {
35         I2CAUX_TRANSACTION_ADDRESS_SPACE_I2C = 1,
36         I2CAUX_TRANSACTION_ADDRESS_SPACE_DPCD
37 };
38
39 struct i2caux_transaction_payload {
40         enum i2caux_transaction_address_space address_space;
41         uint32_t address;
42         uint32_t length;
43         uint8_t *data;
44 };
45
46 enum i2caux_transaction_status {
47         I2CAUX_TRANSACTION_STATUS_UNKNOWN = (-1L),
48         I2CAUX_TRANSACTION_STATUS_SUCCEEDED,
49         I2CAUX_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY,
50         I2CAUX_TRANSACTION_STATUS_FAILED_TIMEOUT,
51         I2CAUX_TRANSACTION_STATUS_FAILED_PROTOCOL_ERROR,
52         I2CAUX_TRANSACTION_STATUS_FAILED_NACK,
53         I2CAUX_TRANSACTION_STATUS_FAILED_INCOMPLETE,
54         I2CAUX_TRANSACTION_STATUS_FAILED_OPERATION,
55         I2CAUX_TRANSACTION_STATUS_FAILED_INVALID_OPERATION,
56         I2CAUX_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW
57 };
58
59 struct i2caux_transaction_request {
60         enum i2caux_transaction_operation operation;
61         struct i2caux_transaction_payload payload;
62         enum i2caux_transaction_status status;
63 };
64
65 enum i2caux_engine_type {
66         I2CAUX_ENGINE_TYPE_UNKNOWN = (-1L),
67         I2CAUX_ENGINE_TYPE_AUX,
68         I2CAUX_ENGINE_TYPE_I2C_DDC_HW,
69         I2CAUX_ENGINE_TYPE_I2C_GENERIC_HW,
70         I2CAUX_ENGINE_TYPE_I2C_SW
71 };
72
73 enum i2c_default_speed {
74         I2CAUX_DEFAULT_I2C_HW_SPEED = 50,
75         I2CAUX_DEFAULT_I2C_SW_SPEED = 50
76 };
77
78 enum i2caux_transaction_action {
79         I2CAUX_TRANSACTION_ACTION_I2C_WRITE = 0x00,
80         I2CAUX_TRANSACTION_ACTION_I2C_READ = 0x10,
81         I2CAUX_TRANSACTION_ACTION_I2C_STATUS_REQUEST = 0x20,
82
83         I2CAUX_TRANSACTION_ACTION_I2C_WRITE_MOT = 0x40,
84         I2CAUX_TRANSACTION_ACTION_I2C_READ_MOT = 0x50,
85         I2CAUX_TRANSACTION_ACTION_I2C_STATUS_REQUEST_MOT = 0x60,
86
87         I2CAUX_TRANSACTION_ACTION_DP_WRITE = 0x80,
88         I2CAUX_TRANSACTION_ACTION_DP_READ = 0x90
89 };
90
91 struct engine;
92
93 struct engine_funcs {
94         enum i2caux_engine_type (*get_engine_type)(
95                 const struct engine *engine);
96         bool (*acquire)(
97                 struct engine *engine,
98                 struct ddc *ddc);
99         bool (*submit_request)(
100                 struct engine *engine,
101                 struct i2caux_transaction_request *request,
102                 bool middle_of_transaction);
103         void (*release_engine)(
104                 struct engine *engine);
105 };
106
107 struct engine {
108         const struct engine_funcs *funcs;
109         struct ddc *ddc;
110         struct dc_context *ctx;
111 };
112
113 void dal_i2caux_construct_engine(
114         struct engine *engine,
115         struct dc_context *ctx);
116
117 void dal_i2caux_destruct_engine(
118         struct engine *engine);
119
120 #endif
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