arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <[email protected]>
  13  *   Yaniv Kamay  <[email protected]>
  14  *   Amit Shah    <[email protected]>
  15  *   Ben-Ami Yassour <[email protected]>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <trace/events/kvm.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include "trace.h"
  50
  51 #include <asm/debugreg.h>
  52 #include <asm/msr.h>
  53 #include <asm/desc.h>
  54 #include <asm/mtrr.h>
  55 #include <asm/mce.h>
  56 #include <asm/i387.h>
  57 #include <asm/xcr.h>
  58 #include <asm/pvclock.h>
  59 #include <asm/div64.h>
  60
  61 #define MAX_IO_MSRS 256
  62 #define CR0_RESERVED_BITS                                               \
  63         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  64                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  65                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  66 #define CR4_RESERVED_BITS                                               \
  67         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  68                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  69                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  70                           | X86_CR4_OSXSAVE \
  71                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  72
  73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  74
  75 #define KVM_MAX_MCE_BANKS 32
  76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  84 #else
  85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  86 #endif
  87
  88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  90
  91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  93                                     struct kvm_cpuid_entry2 __user *entries);
  94
  95 struct kvm_x86_ops *kvm_x86_ops;
  96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  97
  98 int ignore_msrs = 0;
  99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 100
 101 #define KVM_NR_SHARED_MSRS 16
 102
 103 struct kvm_shared_msrs_global {
 104         int nr;
 105         u32 msrs[KVM_NR_SHARED_MSRS];
 106 };
 107
 108 struct kvm_shared_msrs {
 109         struct user_return_notifier urn;
 110         bool registered;
 111         struct kvm_shared_msr_values {
 112                 u64 host;
 113                 u64 curr;
 114         } values[KVM_NR_SHARED_MSRS];
 115 };
 116
 117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 119
 120 struct kvm_stats_debugfs_item debugfs_entries[] = {
 121         { "pf_fixed", VCPU_STAT(pf_fixed) },
 122         { "pf_guest", VCPU_STAT(pf_guest) },
 123         { "tlb_flush", VCPU_STAT(tlb_flush) },
 124         { "invlpg", VCPU_STAT(invlpg) },
 125         { "exits", VCPU_STAT(exits) },
 126         { "io_exits", VCPU_STAT(io_exits) },
 127         { "mmio_exits", VCPU_STAT(mmio_exits) },
 128         { "signal_exits", VCPU_STAT(signal_exits) },
 129         { "irq_window", VCPU_STAT(irq_window_exits) },
 130         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 131         { "halt_exits", VCPU_STAT(halt_exits) },
 132         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 133         { "hypercalls", VCPU_STAT(hypercalls) },
 134         { "request_irq", VCPU_STAT(request_irq_exits) },
 135         { "irq_exits", VCPU_STAT(irq_exits) },
 136         { "host_state_reload", VCPU_STAT(host_state_reload) },
 137         { "efer_reload", VCPU_STAT(efer_reload) },
 138         { "fpu_reload", VCPU_STAT(fpu_reload) },
 139         { "insn_emulation", VCPU_STAT(insn_emulation) },
 140         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 141         { "irq_injections", VCPU_STAT(irq_injections) },
 142         { "nmi_injections", VCPU_STAT(nmi_injections) },
 143         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 144         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 145         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 146         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 147         { "mmu_flooded", VM_STAT(mmu_flooded) },
 148         { "mmu_recycled", VM_STAT(mmu_recycled) },
 149         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 150         { "mmu_unsync", VM_STAT(mmu_unsync) },
 151         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 152         { "largepages", VM_STAT(lpages) },
 153         { NULL }
 154 };
 155
 156 u64 __read_mostly host_xcr0;
 157
 158 static inline u32 bit(int bitno)
 159 {
 160         return 1 << (bitno & 31);
 161 }
 162
 163 static void kvm_on_user_return(struct user_return_notifier *urn)
 164 {
 165         unsigned slot;
 166         struct kvm_shared_msrs *locals
 167                 = container_of(urn, struct kvm_shared_msrs, urn);
 168         struct kvm_shared_msr_values *values;
 169
 170         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 171                 values = &locals->values[slot];
 172                 if (values->host != values->curr) {
 173                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 174                         values->curr = values->host;
 175                 }
 176         }
 177         locals->registered = false;
 178         user_return_notifier_unregister(urn);
 179 }
 180
 181 static void shared_msr_update(unsigned slot, u32 msr)
 182 {
 183         struct kvm_shared_msrs *smsr;
 184         u64 value;
 185
 186         smsr = &__get_cpu_var(shared_msrs);
 187         /* only read, and nobody should modify it at this time,
 188          * so don't need lock */
 189         if (slot >= shared_msrs_global.nr) {
 190                 printk(KERN_ERR "kvm: invalid MSR slot!");
 191                 return;
 192         }
 193         rdmsrl_safe(msr, &value);
 194         smsr->values[slot].host = value;
 195         smsr->values[slot].curr = value;
 196 }
 197
 198 void kvm_define_shared_msr(unsigned slot, u32 msr)
 199 {
 200         if (slot >= shared_msrs_global.nr)
 201                 shared_msrs_global.nr = slot + 1;
 202         shared_msrs_global.msrs[slot] = msr;
 203         /* we need ensured the shared_msr_global have been updated */
 204         smp_wmb();
 205 }
 206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 207
 208 static void kvm_shared_msr_cpu_online(void)
 209 {
 210         unsigned i;
 211
 212         for (i = 0; i < shared_msrs_global.nr; ++i)
 213                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 214 }
 215
 216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 217 {
 218         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 219
 220         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 221                 return;
 222         smsr->values[slot].curr = value;
 223         wrmsrl(shared_msrs_global.msrs[slot], value);
 224         if (!smsr->registered) {
 225                 smsr->urn.on_user_return = kvm_on_user_return;
 226                 user_return_notifier_register(&smsr->urn);
 227                 smsr->registered = true;
 228         }
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 231
 232 static void drop_user_return_notifiers(void *ignore)
 233 {
 234         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 235
 236         if (smsr->registered)
 237                 kvm_on_user_return(&smsr->urn);
 238 }
 239
 240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 241 {
 242         if (irqchip_in_kernel(vcpu->kvm))
 243                 return vcpu->arch.apic_base;
 244         else
 245                 return vcpu->arch.apic_base;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 248
 249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 250 {
 251         /* TODO: reserve bits check */
 252         if (irqchip_in_kernel(vcpu->kvm))
 253                 kvm_lapic_set_base(vcpu, data);
 254         else
 255                 vcpu->arch.apic_base = data;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 258
 259 #define EXCPT_BENIGN            0
 260 #define EXCPT_CONTRIBUTORY      1
 261 #define EXCPT_PF                2
 262
 263 static int exception_class(int vector)
 264 {
 265         switch (vector) {
 266         case PF_VECTOR:
 267                 return EXCPT_PF;
 268         case DE_VECTOR:
 269         case TS_VECTOR:
 270         case NP_VECTOR:
 271         case SS_VECTOR:
 272         case GP_VECTOR:
 273                 return EXCPT_CONTRIBUTORY;
 274         default:
 275                 break;
 276         }
 277         return EXCPT_BENIGN;
 278 }
 279
 280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 281                 unsigned nr, bool has_error, u32 error_code,
 282                 bool reinject)
 283 {
 284         u32 prev_nr;
 285         int class1, class2;
 286
 287         if (!vcpu->arch.exception.pending) {
 288         queue:
 289                 vcpu->arch.exception.pending = true;
 290                 vcpu->arch.exception.has_error_code = has_error;
 291                 vcpu->arch.exception.nr = nr;
 292                 vcpu->arch.exception.error_code = error_code;
 293                 vcpu->arch.exception.reinject = reinject;
 294                 return;
 295         }
 296
 297         /* to check exception */
 298         prev_nr = vcpu->arch.exception.nr;
 299         if (prev_nr == DF_VECTOR) {
 300                 /* triple fault -> shutdown */
 301                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 302                 return;
 303         }
 304         class1 = exception_class(prev_nr);
 305         class2 = exception_class(nr);
 306         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 307                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 308                 /* generate double fault per SDM Table 5-5 */
 309                 vcpu->arch.exception.pending = true;
 310                 vcpu->arch.exception.has_error_code = true;
 311                 vcpu->arch.exception.nr = DF_VECTOR;
 312                 vcpu->arch.exception.error_code = 0;
 313         } else
 314                 /* replace previous exception with a new one in a hope
 315                    that instruction re-execution will regenerate lost
 316                    exception */
 317                 goto queue;
 318 }
 319
 320 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 321 {
 322         kvm_multiple_exception(vcpu, nr, false, 0, false);
 323 }
 324 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 325
 326 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 327 {
 328         kvm_multiple_exception(vcpu, nr, false, 0, true);
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 331
 332 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 333 {
 334         unsigned error_code = vcpu->arch.fault.error_code;
 335
 336         ++vcpu->stat.pf_guest;
 337         vcpu->arch.cr2 = vcpu->arch.fault.address;
 338         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 339 }
 340
 341 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 342 {
 343         vcpu->arch.nmi_pending = 1;
 344 }
 345 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 346
 347 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 348 {
 349         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 350 }
 351 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 352
 353 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 354 {
 355         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 356 }
 357 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 358
 359 /*
 360  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 361  * a #GP and return false.
 362  */
 363 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 364 {
 365         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 366                 return true;
 367         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 368         return false;
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 371
 372 /*
 373  * Load the pae pdptrs.  Return true is they are all valid.
 374  */
 375 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 376 {
 377         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 378         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 379         int i;
 380         int ret;
 381         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 382
 383         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 384                                   offset * sizeof(u64), sizeof(pdpte));
 385         if (ret < 0) {
 386                 ret = 0;
 387                 goto out;
 388         }
 389         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 390                 if (is_present_gpte(pdpte[i]) &&
 391                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 392                         ret = 0;
 393                         goto out;
 394                 }
 395         }
 396         ret = 1;
 397
 398         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 399         __set_bit(VCPU_EXREG_PDPTR,
 400                   (unsigned long *)&vcpu->arch.regs_avail);
 401         __set_bit(VCPU_EXREG_PDPTR,
 402                   (unsigned long *)&vcpu->arch.regs_dirty);
 403 out:
 404
 405         return ret;
 406 }
 407 EXPORT_SYMBOL_GPL(load_pdptrs);
 408
 409 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 410 {
 411         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 412         bool changed = true;
 413         int r;
 414
 415         if (is_long_mode(vcpu) || !is_pae(vcpu))
 416                 return false;
 417
 418         if (!test_bit(VCPU_EXREG_PDPTR,
 419                       (unsigned long *)&vcpu->arch.regs_avail))
 420                 return true;
 421
 422         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 423         if (r < 0)
 424                 goto out;
 425         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 426 out:
 427
 428         return changed;
 429 }
 430
 431 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 432 {
 433         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 434         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 435                                     X86_CR0_CD | X86_CR0_NW;
 436
 437         cr0 |= X86_CR0_ET;
 438
 439 #ifdef CONFIG_X86_64
 440         if (cr0 & 0xffffffff00000000UL)
 441                 return 1;
 442 #endif
 443
 444         cr0 &= ~CR0_RESERVED_BITS;
 445
 446         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 447                 return 1;
 448
 449         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 450                 return 1;
 451
 452         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 453 #ifdef CONFIG_X86_64
 454                 if ((vcpu->arch.efer & EFER_LME)) {
 455                         int cs_db, cs_l;
 456
 457                         if (!is_pae(vcpu))
 458                                 return 1;
 459                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 460                         if (cs_l)
 461                                 return 1;
 462                 } else
 463 #endif
 464                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
 465                         return 1;
 466         }
 467
 468         kvm_x86_ops->set_cr0(vcpu, cr0);
 469
 470         if ((cr0 ^ old_cr0) & update_bits)
 471                 kvm_mmu_reset_context(vcpu);
 472         return 0;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 475
 476 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 477 {
 478         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 479 }
 480 EXPORT_SYMBOL_GPL(kvm_lmsw);
 481
 482 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 483 {
 484         u64 xcr0;
 485
 486         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 487         if (index != XCR_XFEATURE_ENABLED_MASK)
 488                 return 1;
 489         xcr0 = xcr;
 490         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 491                 return 1;
 492         if (!(xcr0 & XSTATE_FP))
 493                 return 1;
 494         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 495                 return 1;
 496         if (xcr0 & ~host_xcr0)
 497                 return 1;
 498         vcpu->arch.xcr0 = xcr0;
 499         vcpu->guest_xcr0_loaded = 0;
 500         return 0;
 501 }
 502
 503 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 504 {
 505         if (__kvm_set_xcr(vcpu, index, xcr)) {
 506                 kvm_inject_gp(vcpu, 0);
 507                 return 1;
 508         }
 509         return 0;
 510 }
 511 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 512
 513 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 514 {
 515         struct kvm_cpuid_entry2 *best;
 516
 517         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 518         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 519 }
 520
 521 static void update_cpuid(struct kvm_vcpu *vcpu)
 522 {
 523         struct kvm_cpuid_entry2 *best;
 524
 525         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 526         if (!best)
 527                 return;
 528
 529         /* Update OSXSAVE bit */
 530         if (cpu_has_xsave && best->function == 0x1) {
 531                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 532                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 533                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 534         }
 535 }
 536
 537 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 538 {
 539         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 540         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 541
 542         if (cr4 & CR4_RESERVED_BITS)
 543                 return 1;
 544
 545         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 546                 return 1;
 547
 548         if (is_long_mode(vcpu)) {
 549                 if (!(cr4 & X86_CR4_PAE))
 550                         return 1;
 551         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 552                    && ((cr4 ^ old_cr4) & pdptr_bits)
 553                    && !load_pdptrs(vcpu, vcpu->arch.cr3))
 554                 return 1;
 555
 556         if (cr4 & X86_CR4_VMXE)
 557                 return 1;
 558
 559         kvm_x86_ops->set_cr4(vcpu, cr4);
 560
 561         if ((cr4 ^ old_cr4) & pdptr_bits)
 562                 kvm_mmu_reset_context(vcpu);
 563
 564         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 565                 update_cpuid(vcpu);
 566
 567         return 0;
 568 }
 569 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 570
 571 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 572 {
 573         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 574                 kvm_mmu_sync_roots(vcpu);
 575                 kvm_mmu_flush_tlb(vcpu);
 576                 return 0;
 577         }
 578
 579         if (is_long_mode(vcpu)) {
 580                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 581                         return 1;
 582         } else {
 583                 if (is_pae(vcpu)) {
 584                         if (cr3 & CR3_PAE_RESERVED_BITS)
 585                                 return 1;
 586                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
 587                                 return 1;
 588                 }
 589                 /*
 590                  * We don't check reserved bits in nonpae mode, because
 591                  * this isn't enforced, and VMware depends on this.
 592                  */
 593         }
 594
 595         /*
 596          * Does the new cr3 value map to physical memory? (Note, we
 597          * catch an invalid cr3 even in real-mode, because it would
 598          * cause trouble later on when we turn on paging anyway.)
 599          *
 600          * A real CPU would silently accept an invalid cr3 and would
 601          * attempt to use it - with largely undefined (and often hard
 602          * to debug) behavior on the guest side.
 603          */
 604         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 605                 return 1;
 606         vcpu->arch.cr3 = cr3;
 607         vcpu->arch.mmu.new_cr3(vcpu);
 608         return 0;
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 611
 612 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 613 {
 614         if (cr8 & CR8_RESERVED_BITS)
 615                 return 1;
 616         if (irqchip_in_kernel(vcpu->kvm))
 617                 kvm_lapic_set_tpr(vcpu, cr8);
 618         else
 619                 vcpu->arch.cr8 = cr8;
 620         return 0;
 621 }
 622
 623 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 624 {
 625         if (__kvm_set_cr8(vcpu, cr8))
 626                 kvm_inject_gp(vcpu, 0);
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 629
 630 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 631 {
 632         if (irqchip_in_kernel(vcpu->kvm))
 633                 return kvm_lapic_get_cr8(vcpu);
 634         else
 635                 return vcpu->arch.cr8;
 636 }
 637 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 638
 639 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 640 {
 641         switch (dr) {
 642         case 0 ... 3:
 643                 vcpu->arch.db[dr] = val;
 644                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 645                         vcpu->arch.eff_db[dr] = val;
 646                 break;
 647         case 4:
 648                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 649                         return 1; /* #UD */
 650                 /* fall through */
 651         case 6:
 652                 if (val & 0xffffffff00000000ULL)
 653                         return -1; /* #GP */
 654                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 655                 break;
 656         case 5:
 657                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 658                         return 1; /* #UD */
 659                 /* fall through */
 660         default: /* 7 */
 661                 if (val & 0xffffffff00000000ULL)
 662                         return -1; /* #GP */
 663                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 664                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 665                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 666                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 667                 }
 668                 break;
 669         }
 670
 671         return 0;
 672 }
 673
 674 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 675 {
 676         int res;
 677
 678         res = __kvm_set_dr(vcpu, dr, val);
 679         if (res > 0)
 680                 kvm_queue_exception(vcpu, UD_VECTOR);
 681         else if (res < 0)
 682                 kvm_inject_gp(vcpu, 0);
 683
 684         return res;
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_set_dr);
 687
 688 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 689 {
 690         switch (dr) {
 691         case 0 ... 3:
 692                 *val = vcpu->arch.db[dr];
 693                 break;
 694         case 4:
 695                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 696                         return 1;
 697                 /* fall through */
 698         case 6:
 699                 *val = vcpu->arch.dr6;
 700                 break;
 701         case 5:
 702                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 703                         return 1;
 704                 /* fall through */
 705         default: /* 7 */
 706                 *val = vcpu->arch.dr7;
 707                 break;
 708         }
 709
 710         return 0;
 711 }
 712
 713 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 714 {
 715         if (_kvm_get_dr(vcpu, dr, val)) {
 716                 kvm_queue_exception(vcpu, UD_VECTOR);
 717                 return 1;
 718         }
 719         return 0;
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_get_dr);
 722
 723 /*
 724  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 725  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 726  *
 727  * This list is modified at module load time to reflect the
 728  * capabilities of the host cpu. This capabilities test skips MSRs that are
 729  * kvm-specific. Those are put in the beginning of the list.
 730  */
 731
 732 #define KVM_SAVE_MSRS_BEGIN     7
 733 static u32 msrs_to_save[] = {
 734         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 735         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 736         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 737         HV_X64_MSR_APIC_ASSIST_PAGE,
 738         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 739         MSR_STAR,
 740 #ifdef CONFIG_X86_64
 741         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 742 #endif
 743         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 744 };
 745
 746 static unsigned num_msrs_to_save;
 747
 748 static u32 emulated_msrs[] = {
 749         MSR_IA32_MISC_ENABLE,
 750         MSR_IA32_MCG_STATUS,
 751         MSR_IA32_MCG_CTL,
 752 };
 753
 754 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 755 {
 756         u64 old_efer = vcpu->arch.efer;
 757
 758         if (efer & efer_reserved_bits)
 759                 return 1;
 760
 761         if (is_paging(vcpu)
 762             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 763                 return 1;
 764
 765         if (efer & EFER_FFXSR) {
 766                 struct kvm_cpuid_entry2 *feat;
 767
 768                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 769                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 770                         return 1;
 771         }
 772
 773         if (efer & EFER_SVME) {
 774                 struct kvm_cpuid_entry2 *feat;
 775
 776                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 777                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 778                         return 1;
 779         }
 780
 781         efer &= ~EFER_LMA;
 782         efer |= vcpu->arch.efer & EFER_LMA;
 783
 784         kvm_x86_ops->set_efer(vcpu, efer);
 785
 786         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 787         kvm_mmu_reset_context(vcpu);
 788
 789         /* Update reserved bits */
 790         if ((efer ^ old_efer) & EFER_NX)
 791                 kvm_mmu_reset_context(vcpu);
 792
 793         return 0;
 794 }
 795
 796 void kvm_enable_efer_bits(u64 mask)
 797 {
 798        efer_reserved_bits &= ~mask;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 801
 802
 803 /*
 804  * Writes msr value into into the appropriate "register".
 805  * Returns 0 on success, non-0 otherwise.
 806  * Assumes vcpu_load() was already called.
 807  */
 808 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 809 {
 810         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 811 }
 812
 813 /*
 814  * Adapt set_msr() to msr_io()'s calling convention
 815  */
 816 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 817 {
 818         return kvm_set_msr(vcpu, index, *data);
 819 }
 820
 821 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 822 {
 823         int version;
 824         int r;
 825         struct pvclock_wall_clock wc;
 826         struct timespec boot;
 827
 828         if (!wall_clock)
 829                 return;
 830
 831         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 832         if (r)
 833                 return;
 834
 835         if (version & 1)
 836                 ++version;  /* first time write, random junk */
 837
 838         ++version;
 839
 840         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 841
 842         /*
 843          * The guest calculates current wall clock time by adding
 844          * system time (updated by kvm_write_guest_time below) to the
 845          * wall clock specified here.  guest system time equals host
 846          * system time for us, thus we must fill in host boot time here.
 847          */
 848         getboottime(&boot);
 849
 850         wc.sec = boot.tv_sec;
 851         wc.nsec = boot.tv_nsec;
 852         wc.version = version;
 853
 854         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 855
 856         version++;
 857         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 858 }
 859
 860 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 861 {
 862         uint32_t quotient, remainder;
 863
 864         /* Don't try to replace with do_div(), this one calculates
 865          * "(dividend << 32) / divisor" */
 866         __asm__ ( "divl %4"
 867                   : "=a" (quotient), "=d" (remainder)
 868                   : "0" (0), "1" (dividend), "r" (divisor) );
 869         return quotient;
 870 }
 871
 872 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 873 {
 874         uint64_t nsecs = 1000000000LL;
 875         int32_t  shift = 0;
 876         uint64_t tps64;
 877         uint32_t tps32;
 878
 879         tps64 = tsc_khz * 1000LL;
 880         while (tps64 > nsecs*2) {
 881                 tps64 >>= 1;
 882                 shift--;
 883         }
 884
 885         tps32 = (uint32_t)tps64;
 886         while (tps32 <= (uint32_t)nsecs) {
 887                 tps32 <<= 1;
 888                 shift++;
 889         }
 890
 891         hv_clock->tsc_shift = shift;
 892         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 893
 894         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 895                  __func__, tsc_khz, hv_clock->tsc_shift,
 896                  hv_clock->tsc_to_system_mul);
 897 }
 898
 899 static inline u64 get_kernel_ns(void)
 900 {
 901         struct timespec ts;
 902
 903         WARN_ON(preemptible());
 904         ktime_get_ts(&ts);
 905         monotonic_to_bootbased(&ts);
 906         return timespec_to_ns(&ts);
 907 }
 908
 909 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 910
 911 static inline int kvm_tsc_changes_freq(void)
 912 {
 913         int cpu = get_cpu();
 914         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 915                   cpufreq_quick_get(cpu) != 0;
 916         put_cpu();
 917         return ret;
 918 }
 919
 920 static inline u64 nsec_to_cycles(u64 nsec)
 921 {
 922         u64 ret;
 923
 924         WARN_ON(preemptible());
 925         if (kvm_tsc_changes_freq())
 926                 printk_once(KERN_WARNING
 927                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 928         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 929         do_div(ret, USEC_PER_SEC);
 930         return ret;
 931 }
 932
 933 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
 934 {
 935         struct kvm *kvm = vcpu->kvm;
 936         u64 offset, ns, elapsed;
 937         unsigned long flags;
 938         s64 sdiff;
 939
 940         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
 941         offset = data - native_read_tsc();
 942         ns = get_kernel_ns();
 943         elapsed = ns - kvm->arch.last_tsc_nsec;
 944         sdiff = data - kvm->arch.last_tsc_write;
 945         if (sdiff < 0)
 946                 sdiff = -sdiff;
 947
 948         /*
 949          * Special case: close write to TSC within 5 seconds of
 950          * another CPU is interpreted as an attempt to synchronize
 951          * The 5 seconds is to accomodate host load / swapping as
 952          * well as any reset of TSC during the boot process.
 953          *
 954          * In that case, for a reliable TSC, we can match TSC offsets,
 955          * or make a best guest using elapsed value.
 956          */
 957         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
 958             elapsed < 5ULL * NSEC_PER_SEC) {
 959                 if (!check_tsc_unstable()) {
 960                         offset = kvm->arch.last_tsc_offset;
 961                         pr_debug("kvm: matched tsc offset for %llu\n", data);
 962                 } else {
 963                         u64 delta = nsec_to_cycles(elapsed);
 964                         offset += delta;
 965                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
 966                 }
 967                 ns = kvm->arch.last_tsc_nsec;
 968         }
 969         kvm->arch.last_tsc_nsec = ns;
 970         kvm->arch.last_tsc_write = data;
 971         kvm->arch.last_tsc_offset = offset;
 972         kvm_x86_ops->write_tsc_offset(vcpu, offset);
 973         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
 974
 975         /* Reset of TSC must disable overshoot protection below */
 976         vcpu->arch.hv_clock.tsc_timestamp = 0;
 977 }
 978 EXPORT_SYMBOL_GPL(kvm_write_tsc);
 979
 980 static int kvm_write_guest_time(struct kvm_vcpu *v)
 981 {
 982         unsigned long flags;
 983         struct kvm_vcpu_arch *vcpu = &v->arch;
 984         void *shared_kaddr;
 985         unsigned long this_tsc_khz;
 986         s64 kernel_ns, max_kernel_ns;
 987         u64 tsc_timestamp;
 988
 989         if ((!vcpu->time_page))
 990                 return 0;
 991
 992         /* Keep irq disabled to prevent changes to the clock */
 993         local_irq_save(flags);
 994         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
 995         kernel_ns = get_kernel_ns();
 996         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
 997         local_irq_restore(flags);
 998
 999         if (unlikely(this_tsc_khz == 0)) {
1000                 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1001                 return 1;
1002         }
1003
1004         /*
1005          * Time as measured by the TSC may go backwards when resetting the base
1006          * tsc_timestamp.  The reason for this is that the TSC resolution is
1007          * higher than the resolution of the other clock scales.  Thus, many
1008          * possible measurments of the TSC correspond to one measurement of any
1009          * other clock, and so a spread of values is possible.  This is not a
1010          * problem for the computation of the nanosecond clock; with TSC rates
1011          * around 1GHZ, there can only be a few cycles which correspond to one
1012          * nanosecond value, and any path through this code will inevitably
1013          * take longer than that.  However, with the kernel_ns value itself,
1014          * the precision may be much lower, down to HZ granularity.  If the
1015          * first sampling of TSC against kernel_ns ends in the low part of the
1016          * range, and the second in the high end of the range, we can get:
1017          *
1018          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1019          *
1020          * As the sampling errors potentially range in the thousands of cycles,
1021          * it is possible such a time value has already been observed by the
1022          * guest.  To protect against this, we must compute the system time as
1023          * observed by the guest and ensure the new system time is greater.
1024          */
1025         max_kernel_ns = 0;
1026         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1027                 max_kernel_ns = vcpu->last_guest_tsc -
1028                                 vcpu->hv_clock.tsc_timestamp;
1029                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1030                                     vcpu->hv_clock.tsc_to_system_mul,
1031                                     vcpu->hv_clock.tsc_shift);
1032                 max_kernel_ns += vcpu->last_kernel_ns;
1033         }
1034
1035         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1036                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
1037                 vcpu->hw_tsc_khz = this_tsc_khz;
1038         }
1039
1040         if (max_kernel_ns > kernel_ns)
1041                 kernel_ns = max_kernel_ns;
1042
1043         /* With all the info we got, fill in the values */
1044         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1045         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1046         vcpu->last_kernel_ns = kernel_ns;
1047         vcpu->hv_clock.flags = 0;
1048
1049         /*
1050          * The interface expects us to write an even number signaling that the
1051          * update is finished. Since the guest won't see the intermediate
1052          * state, we just increase by 2 at the end.
1053          */
1054         vcpu->hv_clock.version += 2;
1055
1056         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1057
1058         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1059                sizeof(vcpu->hv_clock));
1060
1061         kunmap_atomic(shared_kaddr, KM_USER0);
1062
1063         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1064         return 0;
1065 }
1066
1067 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1068 {
1069         struct kvm_vcpu_arch *vcpu = &v->arch;
1070
1071         if (!vcpu->time_page)
1072                 return 0;
1073         kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1074         return 1;
1075 }
1076
1077 static bool msr_mtrr_valid(unsigned msr)
1078 {
1079         switch (msr) {
1080         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1081         case MSR_MTRRfix64K_00000:
1082         case MSR_MTRRfix16K_80000:
1083         case MSR_MTRRfix16K_A0000:
1084         case MSR_MTRRfix4K_C0000:
1085         case MSR_MTRRfix4K_C8000:
1086         case MSR_MTRRfix4K_D0000:
1087         case MSR_MTRRfix4K_D8000:
1088         case MSR_MTRRfix4K_E0000:
1089         case MSR_MTRRfix4K_E8000:
1090         case MSR_MTRRfix4K_F0000:
1091         case MSR_MTRRfix4K_F8000:
1092         case MSR_MTRRdefType:
1093         case MSR_IA32_CR_PAT:
1094                 return true;
1095         case 0x2f8:
1096                 return true;
1097         }
1098         return false;
1099 }
1100
1101 static bool valid_pat_type(unsigned t)
1102 {
1103         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1104 }
1105
1106 static bool valid_mtrr_type(unsigned t)
1107 {
1108         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1109 }
1110
1111 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1112 {
1113         int i;
1114
1115         if (!msr_mtrr_valid(msr))
1116                 return false;
1117
1118         if (msr == MSR_IA32_CR_PAT) {
1119                 for (i = 0; i < 8; i++)
1120                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1121                                 return false;
1122                 return true;
1123         } else if (msr == MSR_MTRRdefType) {
1124                 if (data & ~0xcff)
1125                         return false;
1126                 return valid_mtrr_type(data & 0xff);
1127         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1128                 for (i = 0; i < 8 ; i++)
1129                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1130                                 return false;
1131                 return true;
1132         }
1133
1134         /* variable MTRRs */
1135         return valid_mtrr_type(data & 0xff);
1136 }
1137
1138 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1139 {
1140         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1141
1142         if (!mtrr_valid(vcpu, msr, data))
1143                 return 1;
1144
1145         if (msr == MSR_MTRRdefType) {
1146                 vcpu->arch.mtrr_state.def_type = data;
1147                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1148         } else if (msr == MSR_MTRRfix64K_00000)
1149                 p[0] = data;
1150         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1151                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1152         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1153                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1154         else if (msr == MSR_IA32_CR_PAT)
1155                 vcpu->arch.pat = data;
1156         else {  /* Variable MTRRs */
1157                 int idx, is_mtrr_mask;
1158                 u64 *pt;
1159
1160                 idx = (msr - 0x200) / 2;
1161                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1162                 if (!is_mtrr_mask)
1163                         pt =
1164                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1165                 else
1166                         pt =
1167                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1168                 *pt = data;
1169         }
1170
1171         kvm_mmu_reset_context(vcpu);
1172         return 0;
1173 }
1174
1175 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1176 {
1177         u64 mcg_cap = vcpu->arch.mcg_cap;
1178         unsigned bank_num = mcg_cap & 0xff;
1179
1180         switch (msr) {
1181         case MSR_IA32_MCG_STATUS:
1182                 vcpu->arch.mcg_status = data;
1183                 break;
1184         case MSR_IA32_MCG_CTL:
1185                 if (!(mcg_cap & MCG_CTL_P))
1186                         return 1;
1187                 if (data != 0 && data != ~(u64)0)
1188                         return -1;
1189                 vcpu->arch.mcg_ctl = data;
1190                 break;
1191         default:
1192                 if (msr >= MSR_IA32_MC0_CTL &&
1193                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1194                         u32 offset = msr - MSR_IA32_MC0_CTL;
1195                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1196                          * some Linux kernels though clear bit 10 in bank 4 to
1197                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1198                          * this to avoid an uncatched #GP in the guest
1199                          */
1200                         if ((offset & 0x3) == 0 &&
1201                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1202                                 return -1;
1203                         vcpu->arch.mce_banks[offset] = data;
1204                         break;
1205                 }
1206                 return 1;
1207         }
1208         return 0;
1209 }
1210
1211 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1212 {
1213         struct kvm *kvm = vcpu->kvm;
1214         int lm = is_long_mode(vcpu);
1215         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1216                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1217         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1218                 : kvm->arch.xen_hvm_config.blob_size_32;
1219         u32 page_num = data & ~PAGE_MASK;
1220         u64 page_addr = data & PAGE_MASK;
1221         u8 *page;
1222         int r;
1223
1224         r = -E2BIG;
1225         if (page_num >= blob_size)
1226                 goto out;
1227         r = -ENOMEM;
1228         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1229         if (!page)
1230                 goto out;
1231         r = -EFAULT;
1232         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1233                 goto out_free;
1234         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1235                 goto out_free;
1236         r = 0;
1237 out_free:
1238         kfree(page);
1239 out:
1240         return r;
1241 }
1242
1243 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1244 {
1245         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1246 }
1247
1248 static bool kvm_hv_msr_partition_wide(u32 msr)
1249 {
1250         bool r = false;
1251         switch (msr) {
1252         case HV_X64_MSR_GUEST_OS_ID:
1253         case HV_X64_MSR_HYPERCALL:
1254                 r = true;
1255                 break;
1256         }
1257
1258         return r;
1259 }
1260
1261 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1262 {
1263         struct kvm *kvm = vcpu->kvm;
1264
1265         switch (msr) {
1266         case HV_X64_MSR_GUEST_OS_ID:
1267                 kvm->arch.hv_guest_os_id = data;
1268                 /* setting guest os id to zero disables hypercall page */
1269                 if (!kvm->arch.hv_guest_os_id)
1270                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1271                 break;
1272         case HV_X64_MSR_HYPERCALL: {
1273                 u64 gfn;
1274                 unsigned long addr;
1275                 u8 instructions[4];
1276
1277                 /* if guest os id is not set hypercall should remain disabled */
1278                 if (!kvm->arch.hv_guest_os_id)
1279                         break;
1280                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1281                         kvm->arch.hv_hypercall = data;
1282                         break;
1283                 }
1284                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1285                 addr = gfn_to_hva(kvm, gfn);
1286                 if (kvm_is_error_hva(addr))
1287                         return 1;
1288                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1289                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1290                 if (copy_to_user((void __user *)addr, instructions, 4))
1291                         return 1;
1292                 kvm->arch.hv_hypercall = data;
1293                 break;
1294         }
1295         default:
1296                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1297                           "data 0x%llx\n", msr, data);
1298                 return 1;
1299         }
1300         return 0;
1301 }
1302
1303 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1304 {
1305         switch (msr) {
1306         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1307                 unsigned long addr;
1308
1309                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1310                         vcpu->arch.hv_vapic = data;
1311                         break;
1312                 }
1313                 addr = gfn_to_hva(vcpu->kvm, data >>
1314                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1315                 if (kvm_is_error_hva(addr))
1316                         return 1;
1317                 if (clear_user((void __user *)addr, PAGE_SIZE))
1318                         return 1;
1319                 vcpu->arch.hv_vapic = data;
1320                 break;
1321         }
1322         case HV_X64_MSR_EOI:
1323                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1324         case HV_X64_MSR_ICR:
1325                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1326         case HV_X64_MSR_TPR:
1327                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1328         default:
1329                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1330                           "data 0x%llx\n", msr, data);
1331                 return 1;
1332         }
1333
1334         return 0;
1335 }
1336
1337 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1338 {
1339         switch (msr) {
1340         case MSR_EFER:
1341                 return set_efer(vcpu, data);
1342         case MSR_K7_HWCR:
1343                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1344                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1345                 if (data != 0) {
1346                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1347                                 data);
1348                         return 1;
1349                 }
1350                 break;
1351         case MSR_FAM10H_MMIO_CONF_BASE:
1352                 if (data != 0) {
1353                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1354                                 "0x%llx\n", data);
1355                         return 1;
1356                 }
1357                 break;
1358         case MSR_AMD64_NB_CFG:
1359                 break;
1360         case MSR_IA32_DEBUGCTLMSR:
1361                 if (!data) {
1362                         /* We support the non-activated case already */
1363                         break;
1364                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1365                         /* Values other than LBR and BTF are vendor-specific,
1366                            thus reserved and should throw a #GP */
1367                         return 1;
1368                 }
1369                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1370                         __func__, data);
1371                 break;
1372         case MSR_IA32_UCODE_REV:
1373         case MSR_IA32_UCODE_WRITE:
1374         case MSR_VM_HSAVE_PA:
1375         case MSR_AMD64_PATCH_LOADER:
1376                 break;
1377         case 0x200 ... 0x2ff:
1378                 return set_msr_mtrr(vcpu, msr, data);
1379         case MSR_IA32_APICBASE:
1380                 kvm_set_apic_base(vcpu, data);
1381                 break;
1382         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1383                 return kvm_x2apic_msr_write(vcpu, msr, data);
1384         case MSR_IA32_MISC_ENABLE:
1385                 vcpu->arch.ia32_misc_enable_msr = data;
1386                 break;
1387         case MSR_KVM_WALL_CLOCK_NEW:
1388         case MSR_KVM_WALL_CLOCK:
1389                 vcpu->kvm->arch.wall_clock = data;
1390                 kvm_write_wall_clock(vcpu->kvm, data);
1391                 break;
1392         case MSR_KVM_SYSTEM_TIME_NEW:
1393         case MSR_KVM_SYSTEM_TIME: {
1394                 if (vcpu->arch.time_page) {
1395                         kvm_release_page_dirty(vcpu->arch.time_page);
1396                         vcpu->arch.time_page = NULL;
1397                 }
1398
1399                 vcpu->arch.time = data;
1400
1401                 /* we verify if the enable bit is set... */
1402                 if (!(data & 1))
1403                         break;
1404
1405                 /* ...but clean it before doing the actual write */
1406                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1407
1408                 vcpu->arch.time_page =
1409                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1410
1411                 if (is_error_page(vcpu->arch.time_page)) {
1412                         kvm_release_page_clean(vcpu->arch.time_page);
1413                         vcpu->arch.time_page = NULL;
1414                 }
1415
1416                 kvm_request_guest_time_update(vcpu);
1417                 break;
1418         }
1419         case MSR_IA32_MCG_CTL:
1420         case MSR_IA32_MCG_STATUS:
1421         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1422                 return set_msr_mce(vcpu, msr, data);
1423
1424         /* Performance counters are not protected by a CPUID bit,
1425          * so we should check all of them in the generic path for the sake of
1426          * cross vendor migration.
1427          * Writing a zero into the event select MSRs disables them,
1428          * which we perfectly emulate ;-). Any other value should be at least
1429          * reported, some guests depend on them.
1430          */
1431         case MSR_P6_EVNTSEL0:
1432         case MSR_P6_EVNTSEL1:
1433         case MSR_K7_EVNTSEL0:
1434         case MSR_K7_EVNTSEL1:
1435         case MSR_K7_EVNTSEL2:
1436         case MSR_K7_EVNTSEL3:
1437                 if (data != 0)
1438                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1439                                 "0x%x data 0x%llx\n", msr, data);
1440                 break;
1441         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1442          * so we ignore writes to make it happy.
1443          */
1444         case MSR_P6_PERFCTR0:
1445         case MSR_P6_PERFCTR1:
1446         case MSR_K7_PERFCTR0:
1447         case MSR_K7_PERFCTR1:
1448         case MSR_K7_PERFCTR2:
1449         case MSR_K7_PERFCTR3:
1450                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1451                         "0x%x data 0x%llx\n", msr, data);
1452                 break;
1453         case MSR_K7_CLK_CTL:
1454                 /*
1455                  * Ignore all writes to this no longer documented MSR.
1456                  * Writes are only relevant for old K7 processors,
1457                  * all pre-dating SVM, but a recommended workaround from
1458                  * AMD for these chips. It is possible to speicify the
1459                  * affected processor models on the command line, hence
1460                  * the need to ignore the workaround.
1461                  */
1462                 break;
1463         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1464                 if (kvm_hv_msr_partition_wide(msr)) {
1465                         int r;
1466                         mutex_lock(&vcpu->kvm->lock);
1467                         r = set_msr_hyperv_pw(vcpu, msr, data);
1468                         mutex_unlock(&vcpu->kvm->lock);
1469                         return r;
1470                 } else
1471                         return set_msr_hyperv(vcpu, msr, data);
1472                 break;
1473         default:
1474                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1475                         return xen_hvm_config(vcpu, data);
1476                 if (!ignore_msrs) {
1477                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1478                                 msr, data);
1479                         return 1;
1480                 } else {
1481                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1482                                 msr, data);
1483                         break;
1484                 }
1485         }
1486         return 0;
1487 }
1488 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1489
1490
1491 /*
1492  * Reads an msr value (of 'msr_index') into 'pdata'.
1493  * Returns 0 on success, non-0 otherwise.
1494  * Assumes vcpu_load() was already called.
1495  */
1496 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1497 {
1498         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1499 }
1500
1501 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1502 {
1503         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1504
1505         if (!msr_mtrr_valid(msr))
1506                 return 1;
1507
1508         if (msr == MSR_MTRRdefType)
1509                 *pdata = vcpu->arch.mtrr_state.def_type +
1510                          (vcpu->arch.mtrr_state.enabled << 10);
1511         else if (msr == MSR_MTRRfix64K_00000)
1512                 *pdata = p[0];
1513         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1514                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1515         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1516                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1517         else if (msr == MSR_IA32_CR_PAT)
1518                 *pdata = vcpu->arch.pat;
1519         else {  /* Variable MTRRs */
1520                 int idx, is_mtrr_mask;
1521                 u64 *pt;
1522
1523                 idx = (msr - 0x200) / 2;
1524                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1525                 if (!is_mtrr_mask)
1526                         pt =
1527                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1528                 else
1529                         pt =
1530                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1531                 *pdata = *pt;
1532         }
1533
1534         return 0;
1535 }
1536
1537 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1538 {
1539         u64 data;
1540         u64 mcg_cap = vcpu->arch.mcg_cap;
1541         unsigned bank_num = mcg_cap & 0xff;
1542
1543         switch (msr) {
1544         case MSR_IA32_P5_MC_ADDR:
1545         case MSR_IA32_P5_MC_TYPE:
1546                 data = 0;
1547                 break;
1548         case MSR_IA32_MCG_CAP:
1549                 data = vcpu->arch.mcg_cap;
1550                 break;
1551         case MSR_IA32_MCG_CTL:
1552                 if (!(mcg_cap & MCG_CTL_P))
1553                         return 1;
1554                 data = vcpu->arch.mcg_ctl;
1555                 break;
1556         case MSR_IA32_MCG_STATUS:
1557                 data = vcpu->arch.mcg_status;
1558                 break;
1559         default:
1560                 if (msr >= MSR_IA32_MC0_CTL &&
1561                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1562                         u32 offset = msr - MSR_IA32_MC0_CTL;
1563                         data = vcpu->arch.mce_banks[offset];
1564                         break;
1565                 }
1566                 return 1;
1567         }
1568         *pdata = data;
1569         return 0;
1570 }
1571
1572 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1573 {
1574         u64 data = 0;
1575         struct kvm *kvm = vcpu->kvm;
1576
1577         switch (msr) {
1578         case HV_X64_MSR_GUEST_OS_ID:
1579                 data = kvm->arch.hv_guest_os_id;
1580                 break;
1581         case HV_X64_MSR_HYPERCALL:
1582                 data = kvm->arch.hv_hypercall;
1583                 break;
1584         default:
1585                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1586                 return 1;
1587         }
1588
1589         *pdata = data;
1590         return 0;
1591 }
1592
1593 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1594 {
1595         u64 data = 0;
1596
1597         switch (msr) {
1598         case HV_X64_MSR_VP_INDEX: {
1599                 int r;
1600                 struct kvm_vcpu *v;
1601                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1602                         if (v == vcpu)
1603                                 data = r;
1604                 break;
1605         }
1606         case HV_X64_MSR_EOI:
1607                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1608         case HV_X64_MSR_ICR:
1609                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1610         case HV_X64_MSR_TPR:
1611                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1612         default:
1613                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1614                 return 1;
1615         }
1616         *pdata = data;
1617         return 0;
1618 }
1619
1620 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1621 {
1622         u64 data;
1623
1624         switch (msr) {
1625         case MSR_IA32_PLATFORM_ID:
1626         case MSR_IA32_UCODE_REV:
1627         case MSR_IA32_EBL_CR_POWERON:
1628         case MSR_IA32_DEBUGCTLMSR:
1629         case MSR_IA32_LASTBRANCHFROMIP:
1630         case MSR_IA32_LASTBRANCHTOIP:
1631         case MSR_IA32_LASTINTFROMIP:
1632         case MSR_IA32_LASTINTTOIP:
1633         case MSR_K8_SYSCFG:
1634         case MSR_K7_HWCR:
1635         case MSR_VM_HSAVE_PA:
1636         case MSR_P6_PERFCTR0:
1637         case MSR_P6_PERFCTR1:
1638         case MSR_P6_EVNTSEL0:
1639         case MSR_P6_EVNTSEL1:
1640         case MSR_K7_EVNTSEL0:
1641         case MSR_K7_PERFCTR0:
1642         case MSR_K8_INT_PENDING_MSG:
1643         case MSR_AMD64_NB_CFG:
1644         case MSR_FAM10H_MMIO_CONF_BASE:
1645                 data = 0;
1646                 break;
1647         case MSR_MTRRcap:
1648                 data = 0x500 | KVM_NR_VAR_MTRR;
1649                 break;
1650         case 0x200 ... 0x2ff:
1651                 return get_msr_mtrr(vcpu, msr, pdata);
1652         case 0xcd: /* fsb frequency */
1653                 data = 3;
1654                 break;
1655                 /*
1656                  * MSR_EBC_FREQUENCY_ID
1657                  * Conservative value valid for even the basic CPU models.
1658                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1659                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1660                  * and 266MHz for model 3, or 4. Set Core Clock
1661                  * Frequency to System Bus Frequency Ratio to 1 (bits
1662                  * 31:24) even though these are only valid for CPU
1663                  * models > 2, however guests may end up dividing or
1664                  * multiplying by zero otherwise.
1665                  */
1666         case MSR_EBC_FREQUENCY_ID:
1667                 data = 1 << 24;
1668                 break;
1669         case MSR_IA32_APICBASE:
1670                 data = kvm_get_apic_base(vcpu);
1671                 break;
1672         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1673                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1674                 break;
1675         case MSR_IA32_MISC_ENABLE:
1676                 data = vcpu->arch.ia32_misc_enable_msr;
1677                 break;
1678         case MSR_IA32_PERF_STATUS:
1679                 /* TSC increment by tick */
1680                 data = 1000ULL;
1681                 /* CPU multiplier */
1682                 data |= (((uint64_t)4ULL) << 40);
1683                 break;
1684         case MSR_EFER:
1685                 data = vcpu->arch.efer;
1686                 break;
1687         case MSR_KVM_WALL_CLOCK:
1688         case MSR_KVM_WALL_CLOCK_NEW:
1689                 data = vcpu->kvm->arch.wall_clock;
1690                 break;
1691         case MSR_KVM_SYSTEM_TIME:
1692         case MSR_KVM_SYSTEM_TIME_NEW:
1693                 data = vcpu->arch.time;
1694                 break;
1695         case MSR_IA32_P5_MC_ADDR:
1696         case MSR_IA32_P5_MC_TYPE:
1697         case MSR_IA32_MCG_CAP:
1698         case MSR_IA32_MCG_CTL:
1699         case MSR_IA32_MCG_STATUS:
1700         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1701                 return get_msr_mce(vcpu, msr, pdata);
1702         case MSR_K7_CLK_CTL:
1703                 /*
1704                  * Provide expected ramp-up count for K7. All other
1705                  * are set to zero, indicating minimum divisors for
1706                  * every field.
1707                  *
1708                  * This prevents guest kernels on AMD host with CPU
1709                  * type 6, model 8 and higher from exploding due to
1710                  * the rdmsr failing.
1711                  */
1712                 data = 0x20000000;
1713                 break;
1714         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1715                 if (kvm_hv_msr_partition_wide(msr)) {
1716                         int r;
1717                         mutex_lock(&vcpu->kvm->lock);
1718                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1719                         mutex_unlock(&vcpu->kvm->lock);
1720                         return r;
1721                 } else
1722                         return get_msr_hyperv(vcpu, msr, pdata);
1723                 break;
1724         default:
1725                 if (!ignore_msrs) {
1726                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1727                         return 1;
1728                 } else {
1729                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1730                         data = 0;
1731                 }
1732                 break;
1733         }
1734         *pdata = data;
1735         return 0;
1736 }
1737 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1738
1739 /*
1740  * Read or write a bunch of msrs. All parameters are kernel addresses.
1741  *
1742  * @return number of msrs set successfully.
1743  */
1744 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1745                     struct kvm_msr_entry *entries,
1746                     int (*do_msr)(struct kvm_vcpu *vcpu,
1747                                   unsigned index, u64 *data))
1748 {
1749         int i, idx;
1750
1751         idx = srcu_read_lock(&vcpu->kvm->srcu);
1752         for (i = 0; i < msrs->nmsrs; ++i)
1753                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1754                         break;
1755         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1756
1757         return i;
1758 }
1759
1760 /*
1761  * Read or write a bunch of msrs. Parameters are user addresses.
1762  *
1763  * @return number of msrs set successfully.
1764  */
1765 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1766                   int (*do_msr)(struct kvm_vcpu *vcpu,
1767                                 unsigned index, u64 *data),
1768                   int writeback)
1769 {
1770         struct kvm_msrs msrs;
1771         struct kvm_msr_entry *entries;
1772         int r, n;
1773         unsigned size;
1774
1775         r = -EFAULT;
1776         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1777                 goto out;
1778
1779         r = -E2BIG;
1780         if (msrs.nmsrs >= MAX_IO_MSRS)
1781                 goto out;
1782
1783         r = -ENOMEM;
1784         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1785         entries = kmalloc(size, GFP_KERNEL);
1786         if (!entries)
1787                 goto out;
1788
1789         r = -EFAULT;
1790         if (copy_from_user(entries, user_msrs->entries, size))
1791                 goto out_free;
1792
1793         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1794         if (r < 0)
1795                 goto out_free;
1796
1797         r = -EFAULT;
1798         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1799                 goto out_free;
1800
1801         r = n;
1802
1803 out_free:
1804         kfree(entries);
1805 out:
1806         return r;
1807 }
1808
1809 int kvm_dev_ioctl_check_extension(long ext)
1810 {
1811         int r;
1812
1813         switch (ext) {
1814         case KVM_CAP_IRQCHIP:
1815         case KVM_CAP_HLT:
1816         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1817         case KVM_CAP_SET_TSS_ADDR:
1818         case KVM_CAP_EXT_CPUID:
1819         case KVM_CAP_CLOCKSOURCE:
1820         case KVM_CAP_PIT:
1821         case KVM_CAP_NOP_IO_DELAY:
1822         case KVM_CAP_MP_STATE:
1823         case KVM_CAP_SYNC_MMU:
1824         case KVM_CAP_REINJECT_CONTROL:
1825         case KVM_CAP_IRQ_INJECT_STATUS:
1826         case KVM_CAP_ASSIGN_DEV_IRQ:
1827         case KVM_CAP_IRQFD:
1828         case KVM_CAP_IOEVENTFD:
1829         case KVM_CAP_PIT2:
1830         case KVM_CAP_PIT_STATE2:
1831         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1832         case KVM_CAP_XEN_HVM:
1833         case KVM_CAP_ADJUST_CLOCK:
1834         case KVM_CAP_VCPU_EVENTS:
1835         case KVM_CAP_HYPERV:
1836         case KVM_CAP_HYPERV_VAPIC:
1837         case KVM_CAP_HYPERV_SPIN:
1838         case KVM_CAP_PCI_SEGMENT:
1839         case KVM_CAP_DEBUGREGS:
1840         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1841         case KVM_CAP_XSAVE:
1842                 r = 1;
1843                 break;
1844         case KVM_CAP_COALESCED_MMIO:
1845                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1846                 break;
1847         case KVM_CAP_VAPIC:
1848                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1849                 break;
1850         case KVM_CAP_NR_VCPUS:
1851                 r = KVM_MAX_VCPUS;
1852                 break;
1853         case KVM_CAP_NR_MEMSLOTS:
1854                 r = KVM_MEMORY_SLOTS;
1855                 break;
1856         case KVM_CAP_PV_MMU:    /* obsolete */
1857                 r = 0;
1858                 break;
1859         case KVM_CAP_IOMMU:
1860                 r = iommu_found();
1861                 break;
1862         case KVM_CAP_MCE:
1863                 r = KVM_MAX_MCE_BANKS;
1864                 break;
1865         case KVM_CAP_XCRS:
1866                 r = cpu_has_xsave;
1867                 break;
1868         default:
1869                 r = 0;
1870                 break;
1871         }
1872         return r;
1873
1874 }
1875
1876 long kvm_arch_dev_ioctl(struct file *filp,
1877                         unsigned int ioctl, unsigned long arg)
1878 {
1879         void __user *argp = (void __user *)arg;
1880         long r;
1881
1882         switch (ioctl) {
1883         case KVM_GET_MSR_INDEX_LIST: {
1884                 struct kvm_msr_list __user *user_msr_list = argp;
1885                 struct kvm_msr_list msr_list;
1886                 unsigned n;
1887
1888                 r = -EFAULT;
1889                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1890                         goto out;
1891                 n = msr_list.nmsrs;
1892                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1893                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1894                         goto out;
1895                 r = -E2BIG;
1896                 if (n < msr_list.nmsrs)
1897                         goto out;
1898                 r = -EFAULT;
1899                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1900                                  num_msrs_to_save * sizeof(u32)))
1901                         goto out;
1902                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1903                                  &emulated_msrs,
1904                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1905                         goto out;
1906                 r = 0;
1907                 break;
1908         }
1909         case KVM_GET_SUPPORTED_CPUID: {
1910                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1911                 struct kvm_cpuid2 cpuid;
1912
1913                 r = -EFAULT;
1914                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1915                         goto out;
1916                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1917                                                       cpuid_arg->entries);
1918                 if (r)
1919                         goto out;
1920
1921                 r = -EFAULT;
1922                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1923                         goto out;
1924                 r = 0;
1925                 break;
1926         }
1927         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1928                 u64 mce_cap;
1929
1930                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1931                 r = -EFAULT;
1932                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1933                         goto out;
1934                 r = 0;
1935                 break;
1936         }
1937         default:
1938                 r = -EINVAL;
1939         }
1940 out:
1941         return r;
1942 }
1943
1944 static void wbinvd_ipi(void *garbage)
1945 {
1946         wbinvd();
1947 }
1948
1949 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1950 {
1951         return vcpu->kvm->arch.iommu_domain &&
1952                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1953 }
1954
1955 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1956 {
1957         /* Address WBINVD may be executed by guest */
1958         if (need_emulate_wbinvd(vcpu)) {
1959                 if (kvm_x86_ops->has_wbinvd_exit())
1960                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1961                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1962                         smp_call_function_single(vcpu->cpu,
1963                                         wbinvd_ipi, NULL, 1);
1964         }
1965
1966         kvm_x86_ops->vcpu_load(vcpu, cpu);
1967         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
1968                 /* Make sure TSC doesn't go backwards */
1969                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
1970                                 native_read_tsc() - vcpu->arch.last_host_tsc;
1971                 if (tsc_delta < 0)
1972                         mark_tsc_unstable("KVM discovered backwards TSC");
1973                 if (check_tsc_unstable())
1974                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
1975                 kvm_migrate_timers(vcpu);
1976                 vcpu->cpu = cpu;
1977         }
1978 }
1979
1980 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1981 {
1982         kvm_x86_ops->vcpu_put(vcpu);
1983         kvm_put_guest_fpu(vcpu);
1984         vcpu->arch.last_host_tsc = native_read_tsc();
1985 }
1986
1987 static int is_efer_nx(void)
1988 {
1989         unsigned long long efer = 0;
1990
1991         rdmsrl_safe(MSR_EFER, &efer);
1992         return efer & EFER_NX;
1993 }
1994
1995 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1996 {
1997         int i;
1998         struct kvm_cpuid_entry2 *e, *entry;
1999
2000         entry = NULL;
2001         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2002                 e = &vcpu->arch.cpuid_entries[i];
2003                 if (e->function == 0x80000001) {
2004                         entry = e;
2005                         break;
2006                 }
2007         }
2008         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2009                 entry->edx &= ~(1 << 20);
2010                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2011         }
2012 }
2013
2014 /* when an old userspace process fills a new kernel module */
2015 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2016                                     struct kvm_cpuid *cpuid,
2017                                     struct kvm_cpuid_entry __user *entries)
2018 {
2019         int r, i;
2020         struct kvm_cpuid_entry *cpuid_entries;
2021
2022         r = -E2BIG;
2023         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2024                 goto out;
2025         r = -ENOMEM;
2026         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2027         if (!cpuid_entries)
2028                 goto out;
2029         r = -EFAULT;
2030         if (copy_from_user(cpuid_entries, entries,
2031                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2032                 goto out_free;
2033         for (i = 0; i < cpuid->nent; i++) {
2034                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2035                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2036                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2037                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2038                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2039                 vcpu->arch.cpuid_entries[i].index = 0;
2040                 vcpu->arch.cpuid_entries[i].flags = 0;
2041                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2042                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2043                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2044         }
2045         vcpu->arch.cpuid_nent = cpuid->nent;
2046         cpuid_fix_nx_cap(vcpu);
2047         r = 0;
2048         kvm_apic_set_version(vcpu);
2049         kvm_x86_ops->cpuid_update(vcpu);
2050         update_cpuid(vcpu);
2051
2052 out_free:
2053         vfree(cpuid_entries);
2054 out:
2055         return r;
2056 }
2057
2058 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2059                                      struct kvm_cpuid2 *cpuid,
2060                                      struct kvm_cpuid_entry2 __user *entries)
2061 {
2062         int r;
2063
2064         r = -E2BIG;
2065         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2066                 goto out;
2067         r = -EFAULT;
2068         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2069                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2070                 goto out;
2071         vcpu->arch.cpuid_nent = cpuid->nent;
2072         kvm_apic_set_version(vcpu);
2073         kvm_x86_ops->cpuid_update(vcpu);
2074         update_cpuid(vcpu);
2075         return 0;
2076
2077 out:
2078         return r;
2079 }
2080
2081 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2082                                      struct kvm_cpuid2 *cpuid,
2083                                      struct kvm_cpuid_entry2 __user *entries)
2084 {
2085         int r;
2086
2087         r = -E2BIG;
2088         if (cpuid->nent < vcpu->arch.cpuid_nent)
2089                 goto out;
2090         r = -EFAULT;
2091         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2092                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2093                 goto out;
2094         return 0;
2095
2096 out:
2097         cpuid->nent = vcpu->arch.cpuid_nent;
2098         return r;
2099 }
2100
2101 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2102                            u32 index)
2103 {
2104         entry->function = function;
2105         entry->index = index;
2106         cpuid_count(entry->function, entry->index,
2107                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2108         entry->flags = 0;
2109 }
2110
2111 #define F(x) bit(X86_FEATURE_##x)
2112
2113 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2114                          u32 index, int *nent, int maxnent)
2115 {
2116         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2117 #ifdef CONFIG_X86_64
2118         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2119                                 ? F(GBPAGES) : 0;
2120         unsigned f_lm = F(LM);
2121 #else
2122         unsigned f_gbpages = 0;
2123         unsigned f_lm = 0;
2124 #endif
2125         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2126
2127         /* cpuid 1.edx */
2128         const u32 kvm_supported_word0_x86_features =
2129                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2130                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2131                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2132                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2133                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2134                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2135                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2136                 0 /* HTT, TM, Reserved, PBE */;
2137         /* cpuid 0x80000001.edx */
2138         const u32 kvm_supported_word1_x86_features =
2139                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2140                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2141                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2142                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2143                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2144                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2145                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2146                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2147         /* cpuid 1.ecx */
2148         const u32 kvm_supported_word4_x86_features =
2149                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2150                 0 /* DS-CPL, VMX, SMX, EST */ |
2151                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2152                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2153                 0 /* Reserved, DCA */ | F(XMM4_1) |
2154                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2155                 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2156         /* cpuid 0x80000001.ecx */
2157         const u32 kvm_supported_word6_x86_features =
2158                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
2159                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2160                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2161                 0 /* SKINIT */ | 0 /* WDT */;
2162
2163         /* all calls to cpuid_count() should be made on the same cpu */
2164         get_cpu();
2165         do_cpuid_1_ent(entry, function, index);
2166         ++*nent;
2167
2168         switch (function) {
2169         case 0:
2170                 entry->eax = min(entry->eax, (u32)0xd);
2171                 break;
2172         case 1:
2173                 entry->edx &= kvm_supported_word0_x86_features;
2174                 entry->ecx &= kvm_supported_word4_x86_features;
2175                 /* we support x2apic emulation even if host does not support
2176                  * it since we emulate x2apic in software */
2177                 entry->ecx |= F(X2APIC);
2178                 break;
2179         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2180          * may return different values. This forces us to get_cpu() before
2181          * issuing the first command, and also to emulate this annoying behavior
2182          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2183         case 2: {
2184                 int t, times = entry->eax & 0xff;
2185
2186                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2187                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2188                 for (t = 1; t < times && *nent < maxnent; ++t) {
2189                         do_cpuid_1_ent(&entry[t], function, 0);
2190                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2191                         ++*nent;
2192                 }
2193                 break;
2194         }
2195         /* function 4 and 0xb have additional index. */
2196         case 4: {
2197                 int i, cache_type;
2198
2199                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2200                 /* read more entries until cache_type is zero */
2201                 for (i = 1; *nent < maxnent; ++i) {
2202                         cache_type = entry[i - 1].eax & 0x1f;
2203                         if (!cache_type)
2204                                 break;
2205                         do_cpuid_1_ent(&entry[i], function, i);
2206                         entry[i].flags |=
2207                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2208                         ++*nent;
2209                 }
2210                 break;
2211         }
2212         case 0xb: {
2213                 int i, level_type;
2214
2215                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2216                 /* read more entries until level_type is zero */
2217                 for (i = 1; *nent < maxnent; ++i) {
2218                         level_type = entry[i - 1].ecx & 0xff00;
2219                         if (!level_type)
2220                                 break;
2221                         do_cpuid_1_ent(&entry[i], function, i);
2222                         entry[i].flags |=
2223                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2224                         ++*nent;
2225                 }
2226                 break;
2227         }
2228         case 0xd: {
2229                 int i;
2230
2231                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2232                 for (i = 1; *nent < maxnent; ++i) {
2233                         if (entry[i - 1].eax == 0 && i != 2)
2234                                 break;
2235                         do_cpuid_1_ent(&entry[i], function, i);
2236                         entry[i].flags |=
2237                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2238                         ++*nent;
2239                 }
2240                 break;
2241         }
2242         case KVM_CPUID_SIGNATURE: {
2243                 char signature[12] = "KVMKVMKVM\0\0";
2244                 u32 *sigptr = (u32 *)signature;
2245                 entry->eax = 0;
2246                 entry->ebx = sigptr[0];
2247                 entry->ecx = sigptr[1];
2248                 entry->edx = sigptr[2];
2249                 break;
2250         }
2251         case KVM_CPUID_FEATURES:
2252                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2253                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2254                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2255                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2256                 entry->ebx = 0;
2257                 entry->ecx = 0;
2258                 entry->edx = 0;
2259                 break;
2260         case 0x80000000:
2261                 entry->eax = min(entry->eax, 0x8000001a);
2262                 break;
2263         case 0x80000001:
2264                 entry->edx &= kvm_supported_word1_x86_features;
2265                 entry->ecx &= kvm_supported_word6_x86_features;
2266                 break;
2267         }
2268
2269         kvm_x86_ops->set_supported_cpuid(function, entry);
2270
2271         put_cpu();
2272 }
2273
2274 #undef F
2275
2276 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2277                                      struct kvm_cpuid_entry2 __user *entries)
2278 {
2279         struct kvm_cpuid_entry2 *cpuid_entries;
2280         int limit, nent = 0, r = -E2BIG;
2281         u32 func;
2282
2283         if (cpuid->nent < 1)
2284                 goto out;
2285         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2286                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2287         r = -ENOMEM;
2288         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2289         if (!cpuid_entries)
2290                 goto out;
2291
2292         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2293         limit = cpuid_entries[0].eax;
2294         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2295                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2296                              &nent, cpuid->nent);
2297         r = -E2BIG;
2298         if (nent >= cpuid->nent)
2299                 goto out_free;
2300
2301         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2302         limit = cpuid_entries[nent - 1].eax;
2303         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2304                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2305                              &nent, cpuid->nent);
2306
2307
2308
2309         r = -E2BIG;
2310         if (nent >= cpuid->nent)
2311                 goto out_free;
2312
2313         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2314                      cpuid->nent);
2315
2316         r = -E2BIG;
2317         if (nent >= cpuid->nent)
2318                 goto out_free;
2319
2320         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2321                      cpuid->nent);
2322
2323         r = -E2BIG;
2324         if (nent >= cpuid->nent)
2325                 goto out_free;
2326
2327         r = -EFAULT;
2328         if (copy_to_user(entries, cpuid_entries,
2329                          nent * sizeof(struct kvm_cpuid_entry2)))
2330                 goto out_free;
2331         cpuid->nent = nent;
2332         r = 0;
2333
2334 out_free:
2335         vfree(cpuid_entries);
2336 out:
2337         return r;
2338 }
2339
2340 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2341                                     struct kvm_lapic_state *s)
2342 {
2343         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2344
2345         return 0;
2346 }
2347
2348 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2349                                     struct kvm_lapic_state *s)
2350 {
2351         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2352         kvm_apic_post_state_restore(vcpu);
2353         update_cr8_intercept(vcpu);
2354
2355         return 0;
2356 }
2357
2358 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2359                                     struct kvm_interrupt *irq)
2360 {
2361         if (irq->irq < 0 || irq->irq >= 256)
2362                 return -EINVAL;
2363         if (irqchip_in_kernel(vcpu->kvm))
2364                 return -ENXIO;
2365
2366         kvm_queue_interrupt(vcpu, irq->irq, false);
2367
2368         return 0;
2369 }
2370
2371 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2372 {
2373         kvm_inject_nmi(vcpu);
2374
2375         return 0;
2376 }
2377
2378 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2379                                            struct kvm_tpr_access_ctl *tac)
2380 {
2381         if (tac->flags)
2382                 return -EINVAL;
2383         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2384         return 0;
2385 }
2386
2387 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2388                                         u64 mcg_cap)
2389 {
2390         int r;
2391         unsigned bank_num = mcg_cap & 0xff, bank;
2392
2393         r = -EINVAL;
2394         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2395                 goto out;
2396         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2397                 goto out;
2398         r = 0;
2399         vcpu->arch.mcg_cap = mcg_cap;
2400         /* Init IA32_MCG_CTL to all 1s */
2401         if (mcg_cap & MCG_CTL_P)
2402                 vcpu->arch.mcg_ctl = ~(u64)0;
2403         /* Init IA32_MCi_CTL to all 1s */
2404         for (bank = 0; bank < bank_num; bank++)
2405                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2406 out:
2407         return r;
2408 }
2409
2410 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2411                                       struct kvm_x86_mce *mce)
2412 {
2413         u64 mcg_cap = vcpu->arch.mcg_cap;
2414         unsigned bank_num = mcg_cap & 0xff;
2415         u64 *banks = vcpu->arch.mce_banks;
2416
2417         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2418                 return -EINVAL;
2419         /*
2420          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2421          * reporting is disabled
2422          */
2423         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2424             vcpu->arch.mcg_ctl != ~(u64)0)
2425                 return 0;
2426         banks += 4 * mce->bank;
2427         /*
2428          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2429          * reporting is disabled for the bank
2430          */
2431         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2432                 return 0;
2433         if (mce->status & MCI_STATUS_UC) {
2434                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2435                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2436                         printk(KERN_DEBUG "kvm: set_mce: "
2437                                "injects mce exception while "
2438                                "previous one is in progress!\n");
2439                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2440                         return 0;
2441                 }
2442                 if (banks[1] & MCI_STATUS_VAL)
2443                         mce->status |= MCI_STATUS_OVER;
2444                 banks[2] = mce->addr;
2445                 banks[3] = mce->misc;
2446                 vcpu->arch.mcg_status = mce->mcg_status;
2447                 banks[1] = mce->status;
2448                 kvm_queue_exception(vcpu, MC_VECTOR);
2449         } else if (!(banks[1] & MCI_STATUS_VAL)
2450                    || !(banks[1] & MCI_STATUS_UC)) {
2451                 if (banks[1] & MCI_STATUS_VAL)
2452                         mce->status |= MCI_STATUS_OVER;
2453                 banks[2] = mce->addr;
2454                 banks[3] = mce->misc;
2455                 banks[1] = mce->status;
2456         } else
2457                 banks[1] |= MCI_STATUS_OVER;
2458         return 0;
2459 }
2460
2461 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2462                                                struct kvm_vcpu_events *events)
2463 {
2464         events->exception.injected =
2465                 vcpu->arch.exception.pending &&
2466                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2467         events->exception.nr = vcpu->arch.exception.nr;
2468         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2469         events->exception.error_code = vcpu->arch.exception.error_code;
2470
2471         events->interrupt.injected =
2472                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2473         events->interrupt.nr = vcpu->arch.interrupt.nr;
2474         events->interrupt.soft = 0;
2475         events->interrupt.shadow =
2476                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2477                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2478
2479         events->nmi.injected = vcpu->arch.nmi_injected;
2480         events->nmi.pending = vcpu->arch.nmi_pending;
2481         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2482
2483         events->sipi_vector = vcpu->arch.sipi_vector;
2484
2485         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2486                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2487                          | KVM_VCPUEVENT_VALID_SHADOW);
2488 }
2489
2490 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2491                                               struct kvm_vcpu_events *events)
2492 {
2493         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2494                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2495                               | KVM_VCPUEVENT_VALID_SHADOW))
2496                 return -EINVAL;
2497
2498         vcpu->arch.exception.pending = events->exception.injected;
2499         vcpu->arch.exception.nr = events->exception.nr;
2500         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2501         vcpu->arch.exception.error_code = events->exception.error_code;
2502
2503         vcpu->arch.interrupt.pending = events->interrupt.injected;
2504         vcpu->arch.interrupt.nr = events->interrupt.nr;
2505         vcpu->arch.interrupt.soft = events->interrupt.soft;
2506         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2507                 kvm_pic_clear_isr_ack(vcpu->kvm);
2508         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2509                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2510                                                   events->interrupt.shadow);
2511
2512         vcpu->arch.nmi_injected = events->nmi.injected;
2513         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2514                 vcpu->arch.nmi_pending = events->nmi.pending;
2515         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2516
2517         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2518                 vcpu->arch.sipi_vector = events->sipi_vector;
2519
2520         return 0;
2521 }
2522
2523 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2524                                              struct kvm_debugregs *dbgregs)
2525 {
2526         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2527         dbgregs->dr6 = vcpu->arch.dr6;
2528         dbgregs->dr7 = vcpu->arch.dr7;
2529         dbgregs->flags = 0;
2530 }
2531
2532 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2533                                             struct kvm_debugregs *dbgregs)
2534 {
2535         if (dbgregs->flags)
2536                 return -EINVAL;
2537
2538         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2539         vcpu->arch.dr6 = dbgregs->dr6;
2540         vcpu->arch.dr7 = dbgregs->dr7;
2541
2542         return 0;
2543 }
2544
2545 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2546                                          struct kvm_xsave *guest_xsave)
2547 {
2548         if (cpu_has_xsave)
2549                 memcpy(guest_xsave->region,
2550                         &vcpu->arch.guest_fpu.state->xsave,
2551                         xstate_size);
2552         else {
2553                 memcpy(guest_xsave->region,
2554                         &vcpu->arch.guest_fpu.state->fxsave,
2555                         sizeof(struct i387_fxsave_struct));
2556                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2557                         XSTATE_FPSSE;
2558         }
2559 }
2560
2561 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2562                                         struct kvm_xsave *guest_xsave)
2563 {
2564         u64 xstate_bv =
2565                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2566
2567         if (cpu_has_xsave)
2568                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2569                         guest_xsave->region, xstate_size);
2570         else {
2571                 if (xstate_bv & ~XSTATE_FPSSE)
2572                         return -EINVAL;
2573                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2574                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2575         }
2576         return 0;
2577 }
2578
2579 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2580                                         struct kvm_xcrs *guest_xcrs)
2581 {
2582         if (!cpu_has_xsave) {
2583                 guest_xcrs->nr_xcrs = 0;
2584                 return;
2585         }
2586
2587         guest_xcrs->nr_xcrs = 1;
2588         guest_xcrs->flags = 0;
2589         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2590         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2591 }
2592
2593 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2594                                        struct kvm_xcrs *guest_xcrs)
2595 {
2596         int i, r = 0;
2597
2598         if (!cpu_has_xsave)
2599                 return -EINVAL;
2600
2601         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2602                 return -EINVAL;
2603
2604         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2605                 /* Only support XCR0 currently */
2606                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2607                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2608                                 guest_xcrs->xcrs[0].value);
2609                         break;
2610                 }
2611         if (r)
2612                 r = -EINVAL;
2613         return r;
2614 }
2615
2616 long kvm_arch_vcpu_ioctl(struct file *filp,
2617                          unsigned int ioctl, unsigned long arg)
2618 {
2619         struct kvm_vcpu *vcpu = filp->private_data;
2620         void __user *argp = (void __user *)arg;
2621         int r;
2622         union {
2623                 struct kvm_lapic_state *lapic;
2624                 struct kvm_xsave *xsave;
2625                 struct kvm_xcrs *xcrs;
2626                 void *buffer;
2627         } u;
2628
2629         u.buffer = NULL;
2630         switch (ioctl) {
2631         case KVM_GET_LAPIC: {
2632                 r = -EINVAL;
2633                 if (!vcpu->arch.apic)
2634                         goto out;
2635                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2636
2637                 r = -ENOMEM;
2638                 if (!u.lapic)
2639                         goto out;
2640                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2641                 if (r)
2642                         goto out;
2643                 r = -EFAULT;
2644                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2645                         goto out;
2646                 r = 0;
2647                 break;
2648         }
2649         case KVM_SET_LAPIC: {
2650                 r = -EINVAL;
2651                 if (!vcpu->arch.apic)
2652                         goto out;
2653                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2654                 r = -ENOMEM;
2655                 if (!u.lapic)
2656                         goto out;
2657                 r = -EFAULT;
2658                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2659                         goto out;
2660                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2661                 if (r)
2662                         goto out;
2663                 r = 0;
2664                 break;
2665         }
2666         case KVM_INTERRUPT: {
2667                 struct kvm_interrupt irq;
2668
2669                 r = -EFAULT;
2670                 if (copy_from_user(&irq, argp, sizeof irq))
2671                         goto out;
2672                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2673                 if (r)
2674                         goto out;
2675                 r = 0;
2676                 break;
2677         }
2678         case KVM_NMI: {
2679                 r = kvm_vcpu_ioctl_nmi(vcpu);
2680                 if (r)
2681                         goto out;
2682                 r = 0;
2683                 break;
2684         }
2685         case KVM_SET_CPUID: {
2686                 struct kvm_cpuid __user *cpuid_arg = argp;
2687                 struct kvm_cpuid cpuid;
2688
2689                 r = -EFAULT;
2690                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2691                         goto out;
2692                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2693                 if (r)
2694                         goto out;
2695                 break;
2696         }
2697         case KVM_SET_CPUID2: {
2698                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2699                 struct kvm_cpuid2 cpuid;
2700
2701                 r = -EFAULT;
2702                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2703                         goto out;
2704                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2705                                               cpuid_arg->entries);
2706                 if (r)
2707                         goto out;
2708                 break;
2709         }
2710         case KVM_GET_CPUID2: {
2711                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2712                 struct kvm_cpuid2 cpuid;
2713
2714                 r = -EFAULT;
2715                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2716                         goto out;
2717                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2718                                               cpuid_arg->entries);
2719                 if (r)
2720                         goto out;
2721                 r = -EFAULT;
2722                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2723                         goto out;
2724                 r = 0;
2725                 break;
2726         }
2727         case KVM_GET_MSRS:
2728                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2729                 break;
2730         case KVM_SET_MSRS:
2731                 r = msr_io(vcpu, argp, do_set_msr, 0);
2732                 break;
2733         case KVM_TPR_ACCESS_REPORTING: {
2734                 struct kvm_tpr_access_ctl tac;
2735
2736                 r = -EFAULT;
2737                 if (copy_from_user(&tac, argp, sizeof tac))
2738                         goto out;
2739                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2740                 if (r)
2741                         goto out;
2742                 r = -EFAULT;
2743                 if (copy_to_user(argp, &tac, sizeof tac))
2744                         goto out;
2745                 r = 0;
2746                 break;
2747         };
2748         case KVM_SET_VAPIC_ADDR: {
2749                 struct kvm_vapic_addr va;
2750
2751                 r = -EINVAL;
2752                 if (!irqchip_in_kernel(vcpu->kvm))
2753                         goto out;
2754                 r = -EFAULT;
2755                 if (copy_from_user(&va, argp, sizeof va))
2756                         goto out;
2757                 r = 0;
2758                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2759                 break;
2760         }
2761         case KVM_X86_SETUP_MCE: {
2762                 u64 mcg_cap;
2763
2764                 r = -EFAULT;
2765                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2766                         goto out;
2767                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2768                 break;
2769         }
2770         case KVM_X86_SET_MCE: {
2771                 struct kvm_x86_mce mce;
2772
2773                 r = -EFAULT;
2774                 if (copy_from_user(&mce, argp, sizeof mce))
2775                         goto out;
2776                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2777                 break;
2778         }
2779         case KVM_GET_VCPU_EVENTS: {
2780                 struct kvm_vcpu_events events;
2781
2782                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2783
2784                 r = -EFAULT;
2785                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2786                         break;
2787                 r = 0;
2788                 break;
2789         }
2790         case KVM_SET_VCPU_EVENTS: {
2791                 struct kvm_vcpu_events events;
2792
2793                 r = -EFAULT;
2794                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2795                         break;
2796
2797                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2798                 break;
2799         }
2800         case KVM_GET_DEBUGREGS: {
2801                 struct kvm_debugregs dbgregs;
2802
2803                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2804
2805                 r = -EFAULT;
2806                 if (copy_to_user(argp, &dbgregs,
2807                                  sizeof(struct kvm_debugregs)))
2808                         break;
2809                 r = 0;
2810                 break;
2811         }
2812         case KVM_SET_DEBUGREGS: {
2813                 struct kvm_debugregs dbgregs;
2814
2815                 r = -EFAULT;
2816                 if (copy_from_user(&dbgregs, argp,
2817                                    sizeof(struct kvm_debugregs)))
2818                         break;
2819
2820                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2821                 break;
2822         }
2823         case KVM_GET_XSAVE: {
2824                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2825                 r = -ENOMEM;
2826                 if (!u.xsave)
2827                         break;
2828
2829                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2830
2831                 r = -EFAULT;
2832                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2833                         break;
2834                 r = 0;
2835                 break;
2836         }
2837         case KVM_SET_XSAVE: {
2838                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2839                 r = -ENOMEM;
2840                 if (!u.xsave)
2841                         break;
2842
2843                 r = -EFAULT;
2844                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2845                         break;
2846
2847                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2848                 break;
2849         }
2850         case KVM_GET_XCRS: {
2851                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2852                 r = -ENOMEM;
2853                 if (!u.xcrs)
2854                         break;
2855
2856                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2857
2858                 r = -EFAULT;
2859                 if (copy_to_user(argp, u.xcrs,
2860                                  sizeof(struct kvm_xcrs)))
2861                         break;
2862                 r = 0;
2863                 break;
2864         }
2865         case KVM_SET_XCRS: {
2866                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2867                 r = -ENOMEM;
2868                 if (!u.xcrs)
2869                         break;
2870
2871                 r = -EFAULT;
2872                 if (copy_from_user(u.xcrs, argp,
2873                                    sizeof(struct kvm_xcrs)))
2874                         break;
2875
2876                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2877                 break;
2878         }
2879         default:
2880                 r = -EINVAL;
2881         }
2882 out:
2883         kfree(u.buffer);
2884         return r;
2885 }
2886
2887 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2888 {
2889         int ret;
2890
2891         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2892                 return -1;
2893         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2894         return ret;
2895 }
2896
2897 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2898                                               u64 ident_addr)
2899 {
2900         kvm->arch.ept_identity_map_addr = ident_addr;
2901         return 0;
2902 }
2903
2904 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2905                                           u32 kvm_nr_mmu_pages)
2906 {
2907         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2908                 return -EINVAL;
2909
2910         mutex_lock(&kvm->slots_lock);
2911         spin_lock(&kvm->mmu_lock);
2912
2913         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2914         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2915
2916         spin_unlock(&kvm->mmu_lock);
2917         mutex_unlock(&kvm->slots_lock);
2918         return 0;
2919 }
2920
2921 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2922 {
2923         return kvm->arch.n_max_mmu_pages;
2924 }
2925
2926 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2927 {
2928         int r;
2929
2930         r = 0;
2931         switch (chip->chip_id) {
2932         case KVM_IRQCHIP_PIC_MASTER:
2933                 memcpy(&chip->chip.pic,
2934                         &pic_irqchip(kvm)->pics[0],
2935                         sizeof(struct kvm_pic_state));
2936                 break;
2937         case KVM_IRQCHIP_PIC_SLAVE:
2938                 memcpy(&chip->chip.pic,
2939                         &pic_irqchip(kvm)->pics[1],
2940                         sizeof(struct kvm_pic_state));
2941                 break;
2942         case KVM_IRQCHIP_IOAPIC:
2943                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2944                 break;
2945         default:
2946                 r = -EINVAL;
2947                 break;
2948         }
2949         return r;
2950 }
2951
2952 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2953 {
2954         int r;
2955
2956         r = 0;
2957         switch (chip->chip_id) {
2958         case KVM_IRQCHIP_PIC_MASTER:
2959                 raw_spin_lock(&pic_irqchip(kvm)->lock);
2960                 memcpy(&pic_irqchip(kvm)->pics[0],
2961                         &chip->chip.pic,
2962                         sizeof(struct kvm_pic_state));
2963                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2964                 break;
2965         case KVM_IRQCHIP_PIC_SLAVE:
2966                 raw_spin_lock(&pic_irqchip(kvm)->lock);
2967                 memcpy(&pic_irqchip(kvm)->pics[1],
2968                         &chip->chip.pic,
2969                         sizeof(struct kvm_pic_state));
2970                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2971                 break;
2972         case KVM_IRQCHIP_IOAPIC:
2973                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2974                 break;
2975         default:
2976                 r = -EINVAL;
2977                 break;
2978         }
2979         kvm_pic_update_irq(pic_irqchip(kvm));
2980         return r;
2981 }
2982
2983 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2984 {
2985         int r = 0;
2986
2987         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2988         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2989         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2990         return r;
2991 }
2992
2993 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2994 {
2995         int r = 0;
2996
2997         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2998         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2999         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3000         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3001         return r;
3002 }
3003
3004 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3005 {
3006         int r = 0;
3007
3008         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3009         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3010                 sizeof(ps->channels));
3011         ps->flags = kvm->arch.vpit->pit_state.flags;
3012         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3013         return r;
3014 }
3015
3016 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3017 {
3018         int r = 0, start = 0;
3019         u32 prev_legacy, cur_legacy;
3020         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3021         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3022         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3023         if (!prev_legacy && cur_legacy)
3024                 start = 1;
3025         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3026                sizeof(kvm->arch.vpit->pit_state.channels));
3027         kvm->arch.vpit->pit_state.flags = ps->flags;
3028         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3029         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3030         return r;
3031 }
3032
3033 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3034                                  struct kvm_reinject_control *control)
3035 {
3036         if (!kvm->arch.vpit)
3037                 return -ENXIO;
3038         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3039         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3040         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3041         return 0;
3042 }
3043
3044 /*
3045  * Get (and clear) the dirty memory log for a memory slot.
3046  */
3047 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3048                                       struct kvm_dirty_log *log)
3049 {
3050         int r, i;
3051         struct kvm_memory_slot *memslot;
3052         unsigned long n;
3053         unsigned long is_dirty = 0;
3054
3055         mutex_lock(&kvm->slots_lock);
3056
3057         r = -EINVAL;
3058         if (log->slot >= KVM_MEMORY_SLOTS)
3059                 goto out;
3060
3061         memslot = &kvm->memslots->memslots[log->slot];
3062         r = -ENOENT;
3063         if (!memslot->dirty_bitmap)
3064                 goto out;
3065
3066         n = kvm_dirty_bitmap_bytes(memslot);
3067
3068         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3069                 is_dirty = memslot->dirty_bitmap[i];
3070
3071         /* If nothing is dirty, don't bother messing with page tables. */
3072         if (is_dirty) {
3073                 struct kvm_memslots *slots, *old_slots;
3074                 unsigned long *dirty_bitmap;
3075
3076                 spin_lock(&kvm->mmu_lock);
3077                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3078                 spin_unlock(&kvm->mmu_lock);
3079
3080                 r = -ENOMEM;
3081                 dirty_bitmap = vmalloc(n);
3082                 if (!dirty_bitmap)
3083                         goto out;
3084                 memset(dirty_bitmap, 0, n);
3085
3086                 r = -ENOMEM;
3087                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3088                 if (!slots) {
3089                         vfree(dirty_bitmap);
3090                         goto out;
3091                 }
3092                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3093                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3094
3095                 old_slots = kvm->memslots;
3096                 rcu_assign_pointer(kvm->memslots, slots);
3097                 synchronize_srcu_expedited(&kvm->srcu);
3098                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3099                 kfree(old_slots);
3100
3101                 r = -EFAULT;
3102                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3103                         vfree(dirty_bitmap);
3104                         goto out;
3105                 }
3106                 vfree(dirty_bitmap);
3107         } else {
3108                 r = -EFAULT;
3109                 if (clear_user(log->dirty_bitmap, n))
3110                         goto out;
3111         }
3112
3113         r = 0;
3114 out:
3115         mutex_unlock(&kvm->slots_lock);
3116         return r;
3117 }
3118
3119 long kvm_arch_vm_ioctl(struct file *filp,
3120                        unsigned int ioctl, unsigned long arg)
3121 {
3122         struct kvm *kvm = filp->private_data;
3123         void __user *argp = (void __user *)arg;
3124         int r = -ENOTTY;
3125         /*
3126          * This union makes it completely explicit to gcc-3.x
3127          * that these two variables' stack usage should be
3128          * combined, not added together.
3129          */
3130         union {
3131                 struct kvm_pit_state ps;
3132                 struct kvm_pit_state2 ps2;
3133                 struct kvm_pit_config pit_config;
3134         } u;
3135
3136         switch (ioctl) {
3137         case KVM_SET_TSS_ADDR:
3138                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3139                 if (r < 0)
3140                         goto out;
3141                 break;
3142         case KVM_SET_IDENTITY_MAP_ADDR: {
3143                 u64 ident_addr;
3144
3145                 r = -EFAULT;
3146                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3147                         goto out;
3148                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3149                 if (r < 0)
3150                         goto out;
3151                 break;
3152         }
3153         case KVM_SET_NR_MMU_PAGES:
3154                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3155                 if (r)
3156                         goto out;
3157                 break;
3158         case KVM_GET_NR_MMU_PAGES:
3159                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3160                 break;
3161         case KVM_CREATE_IRQCHIP: {
3162                 struct kvm_pic *vpic;
3163
3164                 mutex_lock(&kvm->lock);
3165                 r = -EEXIST;
3166                 if (kvm->arch.vpic)
3167                         goto create_irqchip_unlock;
3168                 r = -ENOMEM;
3169                 vpic = kvm_create_pic(kvm);
3170                 if (vpic) {
3171                         r = kvm_ioapic_init(kvm);
3172                         if (r) {
3173                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3174                                                           &vpic->dev);
3175                                 kfree(vpic);
3176                                 goto create_irqchip_unlock;
3177                         }
3178                 } else
3179                         goto create_irqchip_unlock;
3180                 smp_wmb();
3181                 kvm->arch.vpic = vpic;
3182                 smp_wmb();
3183                 r = kvm_setup_default_irq_routing(kvm);
3184                 if (r) {
3185                         mutex_lock(&kvm->irq_lock);
3186                         kvm_ioapic_destroy(kvm);
3187                         kvm_destroy_pic(kvm);
3188                         mutex_unlock(&kvm->irq_lock);
3189                 }
3190         create_irqchip_unlock:
3191                 mutex_unlock(&kvm->lock);
3192                 break;
3193         }
3194         case KVM_CREATE_PIT:
3195                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3196                 goto create_pit;
3197         case KVM_CREATE_PIT2:
3198                 r = -EFAULT;
3199                 if (copy_from_user(&u.pit_config, argp,
3200                                    sizeof(struct kvm_pit_config)))
3201                         goto out;
3202         create_pit:
3203                 mutex_lock(&kvm->slots_lock);
3204                 r = -EEXIST;
3205                 if (kvm->arch.vpit)
3206                         goto create_pit_unlock;
3207                 r = -ENOMEM;
3208                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3209                 if (kvm->arch.vpit)
3210                         r = 0;
3211         create_pit_unlock:
3212                 mutex_unlock(&kvm->slots_lock);
3213                 break;
3214         case KVM_IRQ_LINE_STATUS:
3215         case KVM_IRQ_LINE: {
3216                 struct kvm_irq_level irq_event;
3217
3218                 r = -EFAULT;
3219                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3220                         goto out;
3221                 r = -ENXIO;
3222                 if (irqchip_in_kernel(kvm)) {
3223                         __s32 status;
3224                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3225                                         irq_event.irq, irq_event.level);
3226                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3227                                 r = -EFAULT;
3228                                 irq_event.status = status;
3229                                 if (copy_to_user(argp, &irq_event,
3230                                                         sizeof irq_event))
3231                                         goto out;
3232                         }
3233                         r = 0;
3234                 }
3235                 break;
3236         }
3237         case KVM_GET_IRQCHIP: {
3238                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3239                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3240
3241                 r = -ENOMEM;
3242                 if (!chip)
3243                         goto out;
3244                 r = -EFAULT;
3245                 if (copy_from_user(chip, argp, sizeof *chip))
3246                         goto get_irqchip_out;
3247                 r = -ENXIO;
3248                 if (!irqchip_in_kernel(kvm))
3249                         goto get_irqchip_out;
3250                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3251                 if (r)
3252                         goto get_irqchip_out;
3253                 r = -EFAULT;
3254                 if (copy_to_user(argp, chip, sizeof *chip))
3255                         goto get_irqchip_out;
3256                 r = 0;
3257         get_irqchip_out:
3258                 kfree(chip);
3259                 if (r)
3260                         goto out;
3261                 break;
3262         }
3263         case KVM_SET_IRQCHIP: {
3264                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3265                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3266
3267                 r = -ENOMEM;
3268                 if (!chip)
3269                         goto out;
3270                 r = -EFAULT;
3271                 if (copy_from_user(chip, argp, sizeof *chip))
3272                         goto set_irqchip_out;
3273                 r = -ENXIO;
3274                 if (!irqchip_in_kernel(kvm))
3275                         goto set_irqchip_out;
3276                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3277                 if (r)
3278                         goto set_irqchip_out;
3279                 r = 0;
3280         set_irqchip_out:
3281                 kfree(chip);
3282                 if (r)
3283                         goto out;
3284                 break;
3285         }
3286         case KVM_GET_PIT: {
3287                 r = -EFAULT;
3288                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3289                         goto out;
3290                 r = -ENXIO;
3291                 if (!kvm->arch.vpit)
3292                         goto out;
3293                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3294                 if (r)
3295                         goto out;
3296                 r = -EFAULT;
3297                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3298                         goto out;
3299                 r = 0;
3300                 break;
3301         }
3302         case KVM_SET_PIT: {
3303                 r = -EFAULT;
3304                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3305                         goto out;
3306                 r = -ENXIO;
3307                 if (!kvm->arch.vpit)
3308                         goto out;
3309                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3310                 if (r)
3311                         goto out;
3312                 r = 0;
3313                 break;
3314         }
3315         case KVM_GET_PIT2: {
3316                 r = -ENXIO;
3317                 if (!kvm->arch.vpit)
3318                         goto out;
3319                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3320                 if (r)
3321                         goto out;
3322                 r = -EFAULT;
3323                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3324                         goto out;
3325                 r = 0;
3326                 break;
3327         }
3328         case KVM_SET_PIT2: {
3329                 r = -EFAULT;
3330                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3331                         goto out;
3332                 r = -ENXIO;
3333                 if (!kvm->arch.vpit)
3334                         goto out;
3335                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3336                 if (r)
3337                         goto out;
3338                 r = 0;
3339                 break;
3340         }
3341         case KVM_REINJECT_CONTROL: {
3342                 struct kvm_reinject_control control;
3343                 r =  -EFAULT;
3344                 if (copy_from_user(&control, argp, sizeof(control)))
3345                         goto out;
3346                 r = kvm_vm_ioctl_reinject(kvm, &control);
3347                 if (r)
3348                         goto out;
3349                 r = 0;
3350                 break;
3351         }
3352         case KVM_XEN_HVM_CONFIG: {
3353                 r = -EFAULT;
3354                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3355                                    sizeof(struct kvm_xen_hvm_config)))
3356                         goto out;
3357                 r = -EINVAL;
3358                 if (kvm->arch.xen_hvm_config.flags)
3359                         goto out;
3360                 r = 0;
3361                 break;
3362         }
3363         case KVM_SET_CLOCK: {
3364                 struct kvm_clock_data user_ns;
3365                 u64 now_ns;
3366                 s64 delta;
3367
3368                 r = -EFAULT;
3369                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3370                         goto out;
3371
3372                 r = -EINVAL;
3373                 if (user_ns.flags)
3374                         goto out;
3375
3376                 r = 0;
3377                 now_ns = get_kernel_ns();
3378                 delta = user_ns.clock - now_ns;
3379                 kvm->arch.kvmclock_offset = delta;
3380                 break;
3381         }
3382         case KVM_GET_CLOCK: {
3383                 struct kvm_clock_data user_ns;
3384                 u64 now_ns;
3385
3386                 now_ns = get_kernel_ns();
3387                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3388                 user_ns.flags = 0;
3389
3390                 r = -EFAULT;
3391                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3392                         goto out;
3393                 r = 0;
3394                 break;
3395         }
3396
3397         default:
3398                 ;
3399         }
3400 out:
3401         return r;
3402 }
3403
3404 static void kvm_init_msr_list(void)
3405 {
3406         u32 dummy[2];
3407         unsigned i, j;
3408
3409         /* skip the first msrs in the list. KVM-specific */
3410         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3411                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3412                         continue;
3413                 if (j < i)
3414                         msrs_to_save[j] = msrs_to_save[i];
3415                 j++;
3416         }
3417         num_msrs_to_save = j;
3418 }
3419
3420 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3421                            const void *v)
3422 {
3423         if (vcpu->arch.apic &&
3424             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3425                 return 0;
3426
3427         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3428 }
3429
3430 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3431 {
3432         if (vcpu->arch.apic &&
3433             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3434                 return 0;
3435
3436         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3437 }
3438
3439 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3440                         struct kvm_segment *var, int seg)
3441 {
3442         kvm_x86_ops->set_segment(vcpu, var, seg);
3443 }
3444
3445 void kvm_get_segment(struct kvm_vcpu *vcpu,
3446                      struct kvm_segment *var, int seg)
3447 {
3448         kvm_x86_ops->get_segment(vcpu, var, seg);
3449 }
3450
3451 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3452 {
3453         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3454         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3455 }
3456
3457  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3458 {
3459         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3460         access |= PFERR_FETCH_MASK;
3461         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3462 }
3463
3464 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3465 {
3466         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3467         access |= PFERR_WRITE_MASK;
3468         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3469 }
3470
3471 /* uses this to access any guest's mapped memory without checking CPL */
3472 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3473 {
3474         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3475 }
3476
3477 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3478                                       struct kvm_vcpu *vcpu, u32 access,
3479                                       u32 *error)
3480 {
3481         void *data = val;
3482         int r = X86EMUL_CONTINUE;
3483
3484         while (bytes) {
3485                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3486                 unsigned offset = addr & (PAGE_SIZE-1);
3487                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3488                 int ret;
3489
3490                 if (gpa == UNMAPPED_GVA) {
3491                         r = X86EMUL_PROPAGATE_FAULT;
3492                         goto out;
3493                 }
3494                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3495                 if (ret < 0) {
3496                         r = X86EMUL_IO_NEEDED;
3497                         goto out;
3498                 }
3499
3500                 bytes -= toread;
3501                 data += toread;
3502                 addr += toread;
3503         }
3504 out:
3505         return r;
3506 }
3507
3508 /* used for instruction fetching */
3509 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3510                                 struct kvm_vcpu *vcpu, u32 *error)
3511 {
3512         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3513         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3514                                           access | PFERR_FETCH_MASK, error);
3515 }
3516
3517 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3518                                struct kvm_vcpu *vcpu, u32 *error)
3519 {
3520         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3521         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3522                                           error);
3523 }
3524
3525 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3526                                struct kvm_vcpu *vcpu, u32 *error)
3527 {
3528         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3529 }
3530
3531 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3532                                        unsigned int bytes,
3533                                        struct kvm_vcpu *vcpu,
3534                                        u32 *error)
3535 {
3536         void *data = val;
3537         int r = X86EMUL_CONTINUE;
3538
3539         while (bytes) {
3540                 gpa_t gpa =  vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3541                                                        PFERR_WRITE_MASK, error);
3542                 unsigned offset = addr & (PAGE_SIZE-1);
3543                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3544                 int ret;
3545
3546                 if (gpa == UNMAPPED_GVA) {
3547                         r = X86EMUL_PROPAGATE_FAULT;
3548                         goto out;
3549                 }
3550                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3551                 if (ret < 0) {
3552                         r = X86EMUL_IO_NEEDED;
3553                         goto out;
3554                 }
3555
3556                 bytes -= towrite;
3557                 data += towrite;
3558                 addr += towrite;
3559         }
3560 out:
3561         return r;
3562 }
3563
3564 static int emulator_read_emulated(unsigned long addr,
3565                                   void *val,
3566                                   unsigned int bytes,
3567                                   unsigned int *error_code,
3568                                   struct kvm_vcpu *vcpu)
3569 {
3570         gpa_t                 gpa;
3571
3572         if (vcpu->mmio_read_completed) {
3573                 memcpy(val, vcpu->mmio_data, bytes);
3574                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3575                                vcpu->mmio_phys_addr, *(u64 *)val);
3576                 vcpu->mmio_read_completed = 0;
3577                 return X86EMUL_CONTINUE;
3578         }
3579
3580         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3581
3582         if (gpa == UNMAPPED_GVA)
3583                 return X86EMUL_PROPAGATE_FAULT;
3584
3585         /* For APIC access vmexit */
3586         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3587                 goto mmio;
3588
3589         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3590                                 == X86EMUL_CONTINUE)
3591                 return X86EMUL_CONTINUE;
3592
3593 mmio:
3594         /*
3595          * Is this MMIO handled locally?
3596          */
3597         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3598                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3599                 return X86EMUL_CONTINUE;
3600         }
3601
3602         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3603
3604         vcpu->mmio_needed = 1;
3605         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3606         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3607         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3608         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3609
3610         return X86EMUL_IO_NEEDED;
3611 }
3612
3613 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3614                           const void *val, int bytes)
3615 {
3616         int ret;
3617
3618         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3619         if (ret < 0)
3620                 return 0;
3621         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3622         return 1;
3623 }
3624
3625 static int emulator_write_emulated_onepage(unsigned long addr,
3626                                            const void *val,
3627                                            unsigned int bytes,
3628                                            unsigned int *error_code,
3629                                            struct kvm_vcpu *vcpu)
3630 {
3631         gpa_t                 gpa;
3632
3633         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3634
3635         if (gpa == UNMAPPED_GVA)
3636                 return X86EMUL_PROPAGATE_FAULT;
3637
3638         /* For APIC access vmexit */
3639         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3640                 goto mmio;
3641
3642         if (emulator_write_phys(vcpu, gpa, val, bytes))
3643                 return X86EMUL_CONTINUE;
3644
3645 mmio:
3646         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3647         /*
3648          * Is this MMIO handled locally?
3649          */
3650         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3651                 return X86EMUL_CONTINUE;
3652
3653         vcpu->mmio_needed = 1;
3654         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3655         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3656         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3657         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3658         memcpy(vcpu->run->mmio.data, val, bytes);
3659
3660         return X86EMUL_CONTINUE;
3661 }
3662
3663 int emulator_write_emulated(unsigned long addr,
3664                             const void *val,
3665                             unsigned int bytes,
3666                             unsigned int *error_code,
3667                             struct kvm_vcpu *vcpu)
3668 {
3669         /* Crossing a page boundary? */
3670         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3671                 int rc, now;
3672
3673                 now = -addr & ~PAGE_MASK;
3674                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3675                                                      vcpu);
3676                 if (rc != X86EMUL_CONTINUE)
3677                         return rc;
3678                 addr += now;
3679                 val += now;
3680                 bytes -= now;
3681         }
3682         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3683                                                vcpu);
3684 }
3685
3686 #define CMPXCHG_TYPE(t, ptr, old, new) \
3687         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3688
3689 #ifdef CONFIG_X86_64
3690 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3691 #else
3692 #  define CMPXCHG64(ptr, old, new) \
3693         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3694 #endif
3695
3696 static int emulator_cmpxchg_emulated(unsigned long addr,
3697                                      const void *old,
3698                                      const void *new,
3699                                      unsigned int bytes,
3700                                      unsigned int *error_code,
3701                                      struct kvm_vcpu *vcpu)
3702 {
3703         gpa_t gpa;
3704         struct page *page;
3705         char *kaddr;
3706         bool exchanged;
3707
3708         /* guests cmpxchg8b have to be emulated atomically */
3709         if (bytes > 8 || (bytes & (bytes - 1)))
3710                 goto emul_write;
3711
3712         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3713
3714         if (gpa == UNMAPPED_GVA ||
3715             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3716                 goto emul_write;
3717
3718         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3719                 goto emul_write;
3720
3721         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3722         if (is_error_page(page)) {
3723                 kvm_release_page_clean(page);
3724                 goto emul_write;
3725         }
3726
3727         kaddr = kmap_atomic(page, KM_USER0);
3728         kaddr += offset_in_page(gpa);
3729         switch (bytes) {
3730         case 1:
3731                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3732                 break;
3733         case 2:
3734                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3735                 break;
3736         case 4:
3737                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3738                 break;
3739         case 8:
3740                 exchanged = CMPXCHG64(kaddr, old, new);
3741                 break;
3742         default:
3743                 BUG();
3744         }
3745         kunmap_atomic(kaddr, KM_USER0);
3746         kvm_release_page_dirty(page);
3747
3748         if (!exchanged)
3749                 return X86EMUL_CMPXCHG_FAILED;
3750
3751         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3752
3753         return X86EMUL_CONTINUE;
3754
3755 emul_write:
3756         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3757
3758         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3759 }
3760
3761 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3762 {
3763         /* TODO: String I/O for in kernel device */
3764         int r;
3765
3766         if (vcpu->arch.pio.in)
3767                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3768                                     vcpu->arch.pio.size, pd);
3769         else
3770                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3771                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3772                                      pd);
3773         return r;
3774 }
3775
3776
3777 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3778                              unsigned int count, struct kvm_vcpu *vcpu)
3779 {
3780         if (vcpu->arch.pio.count)
3781                 goto data_avail;
3782
3783         trace_kvm_pio(0, port, size, 1);
3784
3785         vcpu->arch.pio.port = port;
3786         vcpu->arch.pio.in = 1;
3787         vcpu->arch.pio.count  = count;
3788         vcpu->arch.pio.size = size;
3789
3790         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3791         data_avail:
3792                 memcpy(val, vcpu->arch.pio_data, size * count);
3793                 vcpu->arch.pio.count = 0;
3794                 return 1;
3795         }
3796
3797         vcpu->run->exit_reason = KVM_EXIT_IO;
3798         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3799         vcpu->run->io.size = size;
3800         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3801         vcpu->run->io.count = count;
3802         vcpu->run->io.port = port;
3803
3804         return 0;
3805 }
3806
3807 static int emulator_pio_out_emulated(int size, unsigned short port,
3808                               const void *val, unsigned int count,
3809                               struct kvm_vcpu *vcpu)
3810 {
3811         trace_kvm_pio(1, port, size, 1);
3812
3813         vcpu->arch.pio.port = port;
3814         vcpu->arch.pio.in = 0;
3815         vcpu->arch.pio.count = count;
3816         vcpu->arch.pio.size = size;
3817
3818         memcpy(vcpu->arch.pio_data, val, size * count);
3819
3820         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3821                 vcpu->arch.pio.count = 0;
3822                 return 1;
3823         }
3824
3825         vcpu->run->exit_reason = KVM_EXIT_IO;
3826         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3827         vcpu->run->io.size = size;
3828         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3829         vcpu->run->io.count = count;
3830         vcpu->run->io.port = port;
3831
3832         return 0;
3833 }
3834
3835 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3836 {
3837         return kvm_x86_ops->get_segment_base(vcpu, seg);
3838 }
3839
3840 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3841 {
3842         kvm_mmu_invlpg(vcpu, address);
3843         return X86EMUL_CONTINUE;
3844 }
3845
3846 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3847 {
3848         if (!need_emulate_wbinvd(vcpu))
3849                 return X86EMUL_CONTINUE;
3850
3851         if (kvm_x86_ops->has_wbinvd_exit()) {
3852                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3853                                 wbinvd_ipi, NULL, 1);
3854                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3855         }
3856         wbinvd();
3857         return X86EMUL_CONTINUE;
3858 }
3859 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3860
3861 int emulate_clts(struct kvm_vcpu *vcpu)
3862 {
3863         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3864         kvm_x86_ops->fpu_activate(vcpu);
3865         return X86EMUL_CONTINUE;
3866 }
3867
3868 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3869 {
3870         return _kvm_get_dr(vcpu, dr, dest);
3871 }
3872
3873 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3874 {
3875
3876         return __kvm_set_dr(vcpu, dr, value);
3877 }
3878
3879 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3880 {
3881         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3882 }
3883
3884 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3885 {
3886         unsigned long value;
3887
3888         switch (cr) {
3889         case 0:
3890                 value = kvm_read_cr0(vcpu);
3891                 break;
3892         case 2:
3893                 value = vcpu->arch.cr2;
3894                 break;
3895         case 3:
3896                 value = vcpu->arch.cr3;
3897                 break;
3898         case 4:
3899                 value = kvm_read_cr4(vcpu);
3900                 break;
3901         case 8:
3902                 value = kvm_get_cr8(vcpu);
3903                 break;
3904         default:
3905                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3906                 return 0;
3907         }
3908
3909         return value;
3910 }
3911
3912 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3913 {
3914         int res = 0;
3915
3916         switch (cr) {
3917         case 0:
3918                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3919                 break;
3920         case 2:
3921                 vcpu->arch.cr2 = val;
3922                 break;
3923         case 3:
3924                 res = kvm_set_cr3(vcpu, val);
3925                 break;
3926         case 4:
3927                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3928                 break;
3929         case 8:
3930                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3931                 break;
3932         default:
3933                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3934                 res = -1;
3935         }
3936
3937         return res;
3938 }
3939
3940 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3941 {
3942         return kvm_x86_ops->get_cpl(vcpu);
3943 }
3944
3945 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3946 {
3947         kvm_x86_ops->get_gdt(vcpu, dt);
3948 }
3949
3950 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3951 {
3952         kvm_x86_ops->get_idt(vcpu, dt);
3953 }
3954
3955 static unsigned long emulator_get_cached_segment_base(int seg,
3956                                                       struct kvm_vcpu *vcpu)
3957 {
3958         return get_segment_base(vcpu, seg);
3959 }
3960
3961 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3962                                            struct kvm_vcpu *vcpu)
3963 {
3964         struct kvm_segment var;
3965
3966         kvm_get_segment(vcpu, &var, seg);
3967
3968         if (var.unusable)
3969                 return false;
3970
3971         if (var.g)
3972                 var.limit >>= 12;
3973         set_desc_limit(desc, var.limit);
3974         set_desc_base(desc, (unsigned long)var.base);
3975         desc->type = var.type;
3976         desc->s = var.s;
3977         desc->dpl = var.dpl;
3978         desc->p = var.present;
3979         desc->avl = var.avl;
3980         desc->l = var.l;
3981         desc->d = var.db;
3982         desc->g = var.g;
3983
3984         return true;
3985 }
3986
3987 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3988                                            struct kvm_vcpu *vcpu)
3989 {
3990         struct kvm_segment var;
3991
3992         /* needed to preserve selector */
3993         kvm_get_segment(vcpu, &var, seg);
3994
3995         var.base = get_desc_base(desc);
3996         var.limit = get_desc_limit(desc);
3997         if (desc->g)
3998                 var.limit = (var.limit << 12) | 0xfff;
3999         var.type = desc->type;
4000         var.present = desc->p;
4001         var.dpl = desc->dpl;
4002         var.db = desc->d;
4003         var.s = desc->s;
4004         var.l = desc->l;
4005         var.g = desc->g;
4006         var.avl = desc->avl;
4007         var.present = desc->p;
4008         var.unusable = !var.present;
4009         var.padding = 0;
4010
4011         kvm_set_segment(vcpu, &var, seg);
4012         return;
4013 }
4014
4015 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4016 {
4017         struct kvm_segment kvm_seg;
4018
4019         kvm_get_segment(vcpu, &kvm_seg, seg);
4020         return kvm_seg.selector;
4021 }
4022
4023 static void emulator_set_segment_selector(u16 sel, int seg,
4024                                           struct kvm_vcpu *vcpu)
4025 {
4026         struct kvm_segment kvm_seg;
4027
4028         kvm_get_segment(vcpu, &kvm_seg, seg);
4029         kvm_seg.selector = sel;
4030         kvm_set_segment(vcpu, &kvm_seg, seg);
4031 }
4032
4033 static struct x86_emulate_ops emulate_ops = {
4034         .read_std            = kvm_read_guest_virt_system,
4035         .write_std           = kvm_write_guest_virt_system,
4036         .fetch               = kvm_fetch_guest_virt,
4037         .read_emulated       = emulator_read_emulated,
4038         .write_emulated      = emulator_write_emulated,
4039         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4040         .pio_in_emulated     = emulator_pio_in_emulated,
4041         .pio_out_emulated    = emulator_pio_out_emulated,
4042         .get_cached_descriptor = emulator_get_cached_descriptor,
4043         .set_cached_descriptor = emulator_set_cached_descriptor,
4044         .get_segment_selector = emulator_get_segment_selector,
4045         .set_segment_selector = emulator_set_segment_selector,
4046         .get_cached_segment_base = emulator_get_cached_segment_base,
4047         .get_gdt             = emulator_get_gdt,
4048         .get_idt             = emulator_get_idt,
4049         .get_cr              = emulator_get_cr,
4050         .set_cr              = emulator_set_cr,
4051         .cpl                 = emulator_get_cpl,
4052         .get_dr              = emulator_get_dr,
4053         .set_dr              = emulator_set_dr,
4054         .set_msr             = kvm_set_msr,
4055         .get_msr             = kvm_get_msr,
4056 };
4057
4058 static void cache_all_regs(struct kvm_vcpu *vcpu)
4059 {
4060         kvm_register_read(vcpu, VCPU_REGS_RAX);
4061         kvm_register_read(vcpu, VCPU_REGS_RSP);
4062         kvm_register_read(vcpu, VCPU_REGS_RIP);
4063         vcpu->arch.regs_dirty = ~0;
4064 }
4065
4066 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4067 {
4068         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4069         /*
4070          * an sti; sti; sequence only disable interrupts for the first
4071          * instruction. So, if the last instruction, be it emulated or
4072          * not, left the system with the INT_STI flag enabled, it
4073          * means that the last instruction is an sti. We should not
4074          * leave the flag on in this case. The same goes for mov ss
4075          */
4076         if (!(int_shadow & mask))
4077                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4078 }
4079
4080 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4081 {
4082         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4083         if (ctxt->exception == PF_VECTOR)
4084                 kvm_inject_page_fault(vcpu);
4085         else if (ctxt->error_code_valid)
4086                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4087         else
4088                 kvm_queue_exception(vcpu, ctxt->exception);
4089 }
4090
4091 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4092 {
4093         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4094         int cs_db, cs_l;
4095
4096         cache_all_regs(vcpu);
4097
4098         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4099
4100         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4101         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4102         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4103         vcpu->arch.emulate_ctxt.mode =
4104                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4105                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4106                 ? X86EMUL_MODE_VM86 : cs_l
4107                 ? X86EMUL_MODE_PROT64 : cs_db
4108                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4109         memset(c, 0, sizeof(struct decode_cache));
4110         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4111 }
4112
4113 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4114 {
4115         ++vcpu->stat.insn_emulation_fail;
4116         trace_kvm_emulate_insn_failed(vcpu);
4117         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4118         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4119         vcpu->run->internal.ndata = 0;
4120         kvm_queue_exception(vcpu, UD_VECTOR);
4121         return EMULATE_FAIL;
4122 }
4123
4124 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4125 {
4126         gpa_t gpa;
4127
4128         if (tdp_enabled)
4129                 return false;
4130
4131         /*
4132          * if emulation was due to access to shadowed page table
4133          * and it failed try to unshadow page and re-entetr the
4134          * guest to let CPU execute the instruction.
4135          */
4136         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4137                 return true;
4138
4139         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4140
4141         if (gpa == UNMAPPED_GVA)
4142                 return true; /* let cpu generate fault */
4143
4144         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4145                 return true;
4146
4147         return false;
4148 }
4149
4150 int emulate_instruction(struct kvm_vcpu *vcpu,
4151                         unsigned long cr2,
4152                         u16 error_code,
4153                         int emulation_type)
4154 {
4155         int r;
4156         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4157
4158         kvm_clear_exception_queue(vcpu);
4159         vcpu->arch.mmio_fault_cr2 = cr2;
4160         /*
4161          * TODO: fix emulate.c to use guest_read/write_register
4162          * instead of direct ->regs accesses, can save hundred cycles
4163          * on Intel for instructions that don't read/change RSP, for
4164          * for example.
4165          */
4166         cache_all_regs(vcpu);
4167
4168         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4169                 init_emulate_ctxt(vcpu);
4170                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4171                 vcpu->arch.emulate_ctxt.exception = -1;
4172                 vcpu->arch.emulate_ctxt.perm_ok = false;
4173
4174                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4175                 trace_kvm_emulate_insn_start(vcpu);
4176
4177                 /* Only allow emulation of specific instructions on #UD
4178                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4179                 if (emulation_type & EMULTYPE_TRAP_UD) {
4180                         if (!c->twobyte)
4181                                 return EMULATE_FAIL;
4182                         switch (c->b) {
4183                         case 0x01: /* VMMCALL */
4184                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4185                                         return EMULATE_FAIL;
4186                                 break;
4187                         case 0x34: /* sysenter */
4188                         case 0x35: /* sysexit */
4189                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4190                                         return EMULATE_FAIL;
4191                                 break;
4192                         case 0x05: /* syscall */
4193                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4194                                         return EMULATE_FAIL;
4195                                 break;
4196                         default:
4197                                 return EMULATE_FAIL;
4198                         }
4199
4200                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4201                                 return EMULATE_FAIL;
4202                 }
4203
4204                 ++vcpu->stat.insn_emulation;
4205                 if (r)  {
4206                         if (reexecute_instruction(vcpu, cr2))
4207                                 return EMULATE_DONE;
4208                         if (emulation_type & EMULTYPE_SKIP)
4209                                 return EMULATE_FAIL;
4210                         return handle_emulation_failure(vcpu);
4211                 }
4212         }
4213
4214         if (emulation_type & EMULTYPE_SKIP) {
4215                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4216                 return EMULATE_DONE;
4217         }
4218
4219         /* this is needed for vmware backdor interface to work since it
4220            changes registers values  during IO operation */
4221         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4222
4223 restart:
4224         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4225
4226         if (r == EMULATION_FAILED) {
4227                 if (reexecute_instruction(vcpu, cr2))
4228                         return EMULATE_DONE;
4229
4230                 return handle_emulation_failure(vcpu);
4231         }
4232
4233         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4234                 inject_emulated_exception(vcpu);
4235                 r = EMULATE_DONE;
4236         } else if (vcpu->arch.pio.count) {
4237                 if (!vcpu->arch.pio.in)
4238                         vcpu->arch.pio.count = 0;
4239                 r = EMULATE_DO_MMIO;
4240         } else if (vcpu->mmio_needed) {
4241                 if (vcpu->mmio_is_write)
4242                         vcpu->mmio_needed = 0;
4243                 r = EMULATE_DO_MMIO;
4244         } else if (r == EMULATION_RESTART)
4245                 goto restart;
4246         else
4247                 r = EMULATE_DONE;
4248
4249         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4250         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4251         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4252         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4253
4254         return r;
4255 }
4256 EXPORT_SYMBOL_GPL(emulate_instruction);
4257
4258 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4259 {
4260         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4261         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4262         /* do not return to emulator after return from userspace */
4263         vcpu->arch.pio.count = 0;
4264         return ret;
4265 }
4266 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4267
4268 static void tsc_bad(void *info)
4269 {
4270         __get_cpu_var(cpu_tsc_khz) = 0;
4271 }
4272
4273 static void tsc_khz_changed(void *data)
4274 {
4275         struct cpufreq_freqs *freq = data;
4276         unsigned long khz = 0;
4277
4278         if (data)
4279                 khz = freq->new;
4280         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4281                 khz = cpufreq_quick_get(raw_smp_processor_id());
4282         if (!khz)
4283                 khz = tsc_khz;
4284         __get_cpu_var(cpu_tsc_khz) = khz;
4285 }
4286
4287 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4288                                      void *data)
4289 {
4290         struct cpufreq_freqs *freq = data;
4291         struct kvm *kvm;
4292         struct kvm_vcpu *vcpu;
4293         int i, send_ipi = 0;
4294
4295         /*
4296          * We allow guests to temporarily run on slowing clocks,
4297          * provided we notify them after, or to run on accelerating
4298          * clocks, provided we notify them before.  Thus time never
4299          * goes backwards.
4300          *
4301          * However, we have a problem.  We can't atomically update
4302          * the frequency of a given CPU from this function; it is
4303          * merely a notifier, which can be called from any CPU.
4304          * Changing the TSC frequency at arbitrary points in time
4305          * requires a recomputation of local variables related to
4306          * the TSC for each VCPU.  We must flag these local variables
4307          * to be updated and be sure the update takes place with the
4308          * new frequency before any guests proceed.
4309          *
4310          * Unfortunately, the combination of hotplug CPU and frequency
4311          * change creates an intractable locking scenario; the order
4312          * of when these callouts happen is undefined with respect to
4313          * CPU hotplug, and they can race with each other.  As such,
4314          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4315          * undefined; you can actually have a CPU frequency change take
4316          * place in between the computation of X and the setting of the
4317          * variable.  To protect against this problem, all updates of
4318          * the per_cpu tsc_khz variable are done in an interrupt
4319          * protected IPI, and all callers wishing to update the value
4320          * must wait for a synchronous IPI to complete (which is trivial
4321          * if the caller is on the CPU already).  This establishes the
4322          * necessary total order on variable updates.
4323          *
4324          * Note that because a guest time update may take place
4325          * anytime after the setting of the VCPU's request bit, the
4326          * correct TSC value must be set before the request.  However,
4327          * to ensure the update actually makes it to any guest which
4328          * starts running in hardware virtualization between the set
4329          * and the acquisition of the spinlock, we must also ping the
4330          * CPU after setting the request bit.
4331          *
4332          */
4333
4334         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4335                 return 0;
4336         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4337                 return 0;
4338
4339         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4340
4341         spin_lock(&kvm_lock);
4342         list_for_each_entry(kvm, &vm_list, vm_list) {
4343                 kvm_for_each_vcpu(i, vcpu, kvm) {
4344                         if (vcpu->cpu != freq->cpu)
4345                                 continue;
4346                         if (!kvm_request_guest_time_update(vcpu))
4347                                 continue;
4348                         if (vcpu->cpu != smp_processor_id())
4349                                 send_ipi = 1;
4350                 }
4351         }
4352         spin_unlock(&kvm_lock);
4353
4354         if (freq->old < freq->new && send_ipi) {
4355                 /*
4356                  * We upscale the frequency.  Must make the guest
4357                  * doesn't see old kvmclock values while running with
4358                  * the new frequency, otherwise we risk the guest sees
4359                  * time go backwards.
4360                  *
4361                  * In case we update the frequency for another cpu
4362                  * (which might be in guest context) send an interrupt
4363                  * to kick the cpu out of guest context.  Next time
4364                  * guest context is entered kvmclock will be updated,
4365                  * so the guest will not see stale values.
4366                  */
4367                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4368         }
4369         return 0;
4370 }
4371
4372 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4373         .notifier_call  = kvmclock_cpufreq_notifier
4374 };
4375
4376 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4377                                         unsigned long action, void *hcpu)
4378 {
4379         unsigned int cpu = (unsigned long)hcpu;
4380
4381         switch (action) {
4382                 case CPU_ONLINE:
4383                 case CPU_DOWN_FAILED:
4384                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4385                         break;
4386                 case CPU_DOWN_PREPARE:
4387                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4388                         break;
4389         }
4390         return NOTIFY_OK;
4391 }
4392
4393 static struct notifier_block kvmclock_cpu_notifier_block = {
4394         .notifier_call  = kvmclock_cpu_notifier,
4395         .priority = -INT_MAX
4396 };
4397
4398 static void kvm_timer_init(void)
4399 {
4400         int cpu;
4401
4402         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4403         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4404                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4405                                           CPUFREQ_TRANSITION_NOTIFIER);
4406         }
4407         for_each_online_cpu(cpu)
4408                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4409 }
4410
4411 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4412
4413 static int kvm_is_in_guest(void)
4414 {
4415         return percpu_read(current_vcpu) != NULL;
4416 }
4417
4418 static int kvm_is_user_mode(void)
4419 {
4420         int user_mode = 3;
4421
4422         if (percpu_read(current_vcpu))
4423                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4424
4425         return user_mode != 0;
4426 }
4427
4428 static unsigned long kvm_get_guest_ip(void)
4429 {
4430         unsigned long ip = 0;
4431
4432         if (percpu_read(current_vcpu))
4433                 ip = kvm_rip_read(percpu_read(current_vcpu));
4434
4435         return ip;
4436 }
4437
4438 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4439         .is_in_guest            = kvm_is_in_guest,
4440         .is_user_mode           = kvm_is_user_mode,
4441         .get_guest_ip           = kvm_get_guest_ip,
4442 };
4443
4444 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4445 {
4446         percpu_write(current_vcpu, vcpu);
4447 }
4448 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4449
4450 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4451 {
4452         percpu_write(current_vcpu, NULL);
4453 }
4454 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4455
4456 int kvm_arch_init(void *opaque)
4457 {
4458         int r;
4459         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4460
4461         if (kvm_x86_ops) {
4462                 printk(KERN_ERR "kvm: already loaded the other module\n");
4463                 r = -EEXIST;
4464                 goto out;
4465         }
4466
4467         if (!ops->cpu_has_kvm_support()) {
4468                 printk(KERN_ERR "kvm: no hardware support\n");
4469                 r = -EOPNOTSUPP;
4470                 goto out;
4471         }
4472         if (ops->disabled_by_bios()) {
4473                 printk(KERN_ERR "kvm: disabled by bios\n");
4474                 r = -EOPNOTSUPP;
4475                 goto out;
4476         }
4477
4478         r = kvm_mmu_module_init();
4479         if (r)
4480                 goto out;
4481
4482         kvm_init_msr_list();
4483
4484         kvm_x86_ops = ops;
4485         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4486         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4487         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4488                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4489
4490         kvm_timer_init();
4491
4492         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4493
4494         if (cpu_has_xsave)
4495                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4496
4497         return 0;
4498
4499 out:
4500         return r;
4501 }
4502
4503 void kvm_arch_exit(void)
4504 {
4505         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4506
4507         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4508                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4509                                             CPUFREQ_TRANSITION_NOTIFIER);
4510         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4511         kvm_x86_ops = NULL;
4512         kvm_mmu_module_exit();
4513 }
4514
4515 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4516 {
4517         ++vcpu->stat.halt_exits;
4518         if (irqchip_in_kernel(vcpu->kvm)) {
4519                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4520                 return 1;
4521         } else {
4522                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4523                 return 0;
4524         }
4525 }
4526 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4527
4528 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4529                            unsigned long a1)
4530 {
4531         if (is_long_mode(vcpu))
4532                 return a0;
4533         else
4534                 return a0 | ((gpa_t)a1 << 32);
4535 }
4536
4537 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4538 {
4539         u64 param, ingpa, outgpa, ret;
4540         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4541         bool fast, longmode;
4542         int cs_db, cs_l;
4543
4544         /*
4545          * hypercall generates UD from non zero cpl and real mode
4546          * per HYPER-V spec
4547          */
4548         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4549                 kvm_queue_exception(vcpu, UD_VECTOR);
4550                 return 0;
4551         }
4552
4553         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4554         longmode = is_long_mode(vcpu) && cs_l == 1;
4555
4556         if (!longmode) {
4557                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4558                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4559                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4560                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4561                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4562                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4563         }
4564 #ifdef CONFIG_X86_64
4565         else {
4566                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4567                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4568                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4569         }
4570 #endif
4571
4572         code = param & 0xffff;
4573         fast = (param >> 16) & 0x1;
4574         rep_cnt = (param >> 32) & 0xfff;
4575         rep_idx = (param >> 48) & 0xfff;
4576
4577         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4578
4579         switch (code) {
4580         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4581                 kvm_vcpu_on_spin(vcpu);
4582                 break;
4583         default:
4584                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4585                 break;
4586         }
4587
4588         ret = res | (((u64)rep_done & 0xfff) << 32);
4589         if (longmode) {
4590                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4591         } else {
4592                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4593                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4594         }
4595
4596         return 1;
4597 }
4598
4599 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4600 {
4601         unsigned long nr, a0, a1, a2, a3, ret;
4602         int r = 1;
4603
4604         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4605                 return kvm_hv_hypercall(vcpu);
4606
4607         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4608         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4609         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4610         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4611         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4612
4613         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4614
4615         if (!is_long_mode(vcpu)) {
4616                 nr &= 0xFFFFFFFF;
4617                 a0 &= 0xFFFFFFFF;
4618                 a1 &= 0xFFFFFFFF;
4619                 a2 &= 0xFFFFFFFF;
4620                 a3 &= 0xFFFFFFFF;
4621         }
4622
4623         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4624                 ret = -KVM_EPERM;
4625                 goto out;
4626         }
4627
4628         switch (nr) {
4629         case KVM_HC_VAPIC_POLL_IRQ:
4630                 ret = 0;
4631                 break;
4632         case KVM_HC_MMU_OP:
4633                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4634                 break;
4635         default:
4636                 ret = -KVM_ENOSYS;
4637                 break;
4638         }
4639 out:
4640         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4641         ++vcpu->stat.hypercalls;
4642         return r;
4643 }
4644 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4645
4646 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4647 {
4648         char instruction[3];
4649         unsigned long rip = kvm_rip_read(vcpu);
4650
4651         /*
4652          * Blow out the MMU to ensure that no other VCPU has an active mapping
4653          * to ensure that the updated hypercall appears atomically across all
4654          * VCPUs.
4655          */
4656         kvm_mmu_zap_all(vcpu->kvm);
4657
4658         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4659
4660         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4661 }
4662
4663 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4664 {
4665         struct desc_ptr dt = { limit, base };
4666
4667         kvm_x86_ops->set_gdt(vcpu, &dt);
4668 }
4669
4670 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4671 {
4672         struct desc_ptr dt = { limit, base };
4673
4674         kvm_x86_ops->set_idt(vcpu, &dt);
4675 }
4676
4677 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4678 {
4679         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4680         int j, nent = vcpu->arch.cpuid_nent;
4681
4682         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4683         /* when no next entry is found, the current entry[i] is reselected */
4684         for (j = i + 1; ; j = (j + 1) % nent) {
4685                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4686                 if (ej->function == e->function) {
4687                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4688                         return j;
4689                 }
4690         }
4691         return 0; /* silence gcc, even though control never reaches here */
4692 }
4693
4694 /* find an entry with matching function, matching index (if needed), and that
4695  * should be read next (if it's stateful) */
4696 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4697         u32 function, u32 index)
4698 {
4699         if (e->function != function)
4700                 return 0;
4701         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4702                 return 0;
4703         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4704             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4705                 return 0;
4706         return 1;
4707 }
4708
4709 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4710                                               u32 function, u32 index)
4711 {
4712         int i;
4713         struct kvm_cpuid_entry2 *best = NULL;
4714
4715         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4716                 struct kvm_cpuid_entry2 *e;
4717
4718                 e = &vcpu->arch.cpuid_entries[i];
4719                 if (is_matching_cpuid_entry(e, function, index)) {
4720                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4721                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4722                         best = e;
4723                         break;
4724                 }
4725                 /*
4726                  * Both basic or both extended?
4727                  */
4728                 if (((e->function ^ function) & 0x80000000) == 0)
4729                         if (!best || e->function > best->function)
4730                                 best = e;
4731         }
4732         return best;
4733 }
4734 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4735
4736 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4737 {
4738         struct kvm_cpuid_entry2 *best;
4739
4740         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4741         if (!best || best->eax < 0x80000008)
4742                 goto not_found;
4743         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4744         if (best)
4745                 return best->eax & 0xff;
4746 not_found:
4747         return 36;
4748 }
4749
4750 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4751 {
4752         u32 function, index;
4753         struct kvm_cpuid_entry2 *best;
4754
4755         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4756         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4757         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4758         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4759         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4760         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4761         best = kvm_find_cpuid_entry(vcpu, function, index);
4762         if (best) {
4763                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4764                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4765                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4766                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4767         }
4768         kvm_x86_ops->skip_emulated_instruction(vcpu);
4769         trace_kvm_cpuid(function,
4770                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4771                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4772                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4773                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4774 }
4775 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4776
4777 /*
4778  * Check if userspace requested an interrupt window, and that the
4779  * interrupt window is open.
4780  *
4781  * No need to exit to userspace if we already have an interrupt queued.
4782  */
4783 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4784 {
4785         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4786                 vcpu->run->request_interrupt_window &&
4787                 kvm_arch_interrupt_allowed(vcpu));
4788 }
4789
4790 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4791 {
4792         struct kvm_run *kvm_run = vcpu->run;
4793
4794         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4795         kvm_run->cr8 = kvm_get_cr8(vcpu);
4796         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4797         if (irqchip_in_kernel(vcpu->kvm))
4798                 kvm_run->ready_for_interrupt_injection = 1;
4799         else
4800                 kvm_run->ready_for_interrupt_injection =
4801                         kvm_arch_interrupt_allowed(vcpu) &&
4802                         !kvm_cpu_has_interrupt(vcpu) &&
4803                         !kvm_event_needs_reinjection(vcpu);
4804 }
4805
4806 static void vapic_enter(struct kvm_vcpu *vcpu)
4807 {
4808         struct kvm_lapic *apic = vcpu->arch.apic;
4809         struct page *page;
4810
4811         if (!apic || !apic->vapic_addr)
4812                 return;
4813
4814         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4815
4816         vcpu->arch.apic->vapic_page = page;
4817 }
4818
4819 static void vapic_exit(struct kvm_vcpu *vcpu)
4820 {
4821         struct kvm_lapic *apic = vcpu->arch.apic;
4822         int idx;
4823
4824         if (!apic || !apic->vapic_addr)
4825                 return;
4826
4827         idx = srcu_read_lock(&vcpu->kvm->srcu);
4828         kvm_release_page_dirty(apic->vapic_page);
4829         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4830         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4831 }
4832
4833 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4834 {
4835         int max_irr, tpr;
4836
4837         if (!kvm_x86_ops->update_cr8_intercept)
4838                 return;
4839
4840         if (!vcpu->arch.apic)
4841                 return;
4842
4843         if (!vcpu->arch.apic->vapic_addr)
4844                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4845         else
4846                 max_irr = -1;
4847
4848         if (max_irr != -1)
4849                 max_irr >>= 4;
4850
4851         tpr = kvm_lapic_get_cr8(vcpu);
4852
4853         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4854 }
4855
4856 static void inject_pending_event(struct kvm_vcpu *vcpu)
4857 {
4858         /* try to reinject previous events if any */
4859         if (vcpu->arch.exception.pending) {
4860                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4861                                         vcpu->arch.exception.has_error_code,
4862                                         vcpu->arch.exception.error_code);
4863                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4864                                           vcpu->arch.exception.has_error_code,
4865                                           vcpu->arch.exception.error_code,
4866                                           vcpu->arch.exception.reinject);
4867                 return;
4868         }
4869
4870         if (vcpu->arch.nmi_injected) {
4871                 kvm_x86_ops->set_nmi(vcpu);
4872                 return;
4873         }
4874
4875         if (vcpu->arch.interrupt.pending) {
4876                 kvm_x86_ops->set_irq(vcpu);
4877                 return;
4878         }
4879
4880         /* try to inject new event if pending */
4881         if (vcpu->arch.nmi_pending) {
4882                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4883                         vcpu->arch.nmi_pending = false;
4884                         vcpu->arch.nmi_injected = true;
4885                         kvm_x86_ops->set_nmi(vcpu);
4886                 }
4887         } else if (kvm_cpu_has_interrupt(vcpu)) {
4888                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4889                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4890                                             false);
4891                         kvm_x86_ops->set_irq(vcpu);
4892                 }
4893         }
4894 }
4895
4896 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4897 {
4898         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4899                         !vcpu->guest_xcr0_loaded) {
4900                 /* kvm_set_xcr() also depends on this */
4901                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4902                 vcpu->guest_xcr0_loaded = 1;
4903         }
4904 }
4905
4906 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4907 {
4908         if (vcpu->guest_xcr0_loaded) {
4909                 if (vcpu->arch.xcr0 != host_xcr0)
4910                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4911                 vcpu->guest_xcr0_loaded = 0;
4912         }
4913 }
4914
4915 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4916 {
4917         int r;
4918         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4919                 vcpu->run->request_interrupt_window;
4920
4921         if (vcpu->requests) {
4922                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4923                         kvm_mmu_unload(vcpu);
4924                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4925                         __kvm_migrate_timers(vcpu);
4926                 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu)) {
4927                         r = kvm_write_guest_time(vcpu);
4928                         if (unlikely(r))
4929                                 goto out;
4930                 }
4931                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4932                         kvm_mmu_sync_roots(vcpu);
4933                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4934                         kvm_x86_ops->tlb_flush(vcpu);
4935                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4936                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4937                         r = 0;
4938                         goto out;
4939                 }
4940                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
4941                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4942                         r = 0;
4943                         goto out;
4944                 }
4945                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
4946                         vcpu->fpu_active = 0;
4947                         kvm_x86_ops->fpu_deactivate(vcpu);
4948                 }
4949         }
4950
4951         r = kvm_mmu_reload(vcpu);
4952         if (unlikely(r))
4953                 goto out;
4954
4955         preempt_disable();
4956
4957         kvm_x86_ops->prepare_guest_switch(vcpu);
4958         if (vcpu->fpu_active)
4959                 kvm_load_guest_fpu(vcpu);
4960         kvm_load_guest_xcr0(vcpu);
4961
4962         atomic_set(&vcpu->guest_mode, 1);
4963         smp_wmb();
4964
4965         local_irq_disable();
4966
4967         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4968             || need_resched() || signal_pending(current)) {
4969                 atomic_set(&vcpu->guest_mode, 0);
4970                 smp_wmb();
4971                 local_irq_enable();
4972                 preempt_enable();
4973                 r = 1;
4974                 goto out;
4975         }
4976
4977         inject_pending_event(vcpu);
4978
4979         /* enable NMI/IRQ window open exits if needed */
4980         if (vcpu->arch.nmi_pending)
4981                 kvm_x86_ops->enable_nmi_window(vcpu);
4982         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4983                 kvm_x86_ops->enable_irq_window(vcpu);
4984
4985         if (kvm_lapic_enabled(vcpu)) {
4986                 update_cr8_intercept(vcpu);
4987                 kvm_lapic_sync_to_vapic(vcpu);
4988         }
4989
4990         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4991
4992         kvm_guest_enter();
4993
4994         if (unlikely(vcpu->arch.switch_db_regs)) {
4995                 set_debugreg(0, 7);
4996                 set_debugreg(vcpu->arch.eff_db[0], 0);
4997                 set_debugreg(vcpu->arch.eff_db[1], 1);
4998                 set_debugreg(vcpu->arch.eff_db[2], 2);
4999                 set_debugreg(vcpu->arch.eff_db[3], 3);
5000         }
5001
5002         trace_kvm_entry(vcpu->vcpu_id);
5003         kvm_x86_ops->run(vcpu);
5004
5005         /*
5006          * If the guest has used debug registers, at least dr7
5007          * will be disabled while returning to the host.
5008          * If we don't have active breakpoints in the host, we don't
5009          * care about the messed up debug address registers. But if
5010          * we have some of them active, restore the old state.
5011          */
5012         if (hw_breakpoint_active())
5013                 hw_breakpoint_restore();
5014
5015         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5016
5017         atomic_set(&vcpu->guest_mode, 0);
5018         smp_wmb();
5019         local_irq_enable();
5020
5021         ++vcpu->stat.exits;
5022
5023         /*
5024          * We must have an instruction between local_irq_enable() and
5025          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5026          * the interrupt shadow.  The stat.exits increment will do nicely.
5027          * But we need to prevent reordering, hence this barrier():
5028          */
5029         barrier();
5030
5031         kvm_guest_exit();
5032
5033         preempt_enable();
5034
5035         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5036
5037         /*
5038          * Profile KVM exit RIPs:
5039          */
5040         if (unlikely(prof_on == KVM_PROFILING)) {
5041                 unsigned long rip = kvm_rip_read(vcpu);
5042                 profile_hit(KVM_PROFILING, (void *)rip);
5043         }
5044
5045
5046         kvm_lapic_sync_from_vapic(vcpu);
5047
5048         r = kvm_x86_ops->handle_exit(vcpu);
5049 out:
5050         return r;
5051 }
5052
5053
5054 static int __vcpu_run(struct kvm_vcpu *vcpu)
5055 {
5056         int r;
5057         struct kvm *kvm = vcpu->kvm;
5058
5059         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5060                 pr_debug("vcpu %d received sipi with vector # %x\n",
5061                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5062                 kvm_lapic_reset(vcpu);
5063                 r = kvm_arch_vcpu_reset(vcpu);
5064                 if (r)
5065                         return r;
5066                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5067         }
5068
5069         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5070         vapic_enter(vcpu);
5071
5072         r = 1;
5073         while (r > 0) {
5074                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5075                         r = vcpu_enter_guest(vcpu);
5076                 else {
5077                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5078                         kvm_vcpu_block(vcpu);
5079                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5080                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5081                         {
5082                                 switch(vcpu->arch.mp_state) {
5083                                 case KVM_MP_STATE_HALTED:
5084                                         vcpu->arch.mp_state =
5085                                                 KVM_MP_STATE_RUNNABLE;
5086                                 case KVM_MP_STATE_RUNNABLE:
5087                                         break;
5088                                 case KVM_MP_STATE_SIPI_RECEIVED:
5089                                 default:
5090                                         r = -EINTR;
5091                                         break;
5092                                 }
5093                         }
5094                 }
5095
5096                 if (r <= 0)
5097                         break;
5098
5099                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5100                 if (kvm_cpu_has_pending_timer(vcpu))
5101                         kvm_inject_pending_timer_irqs(vcpu);
5102
5103                 if (dm_request_for_irq_injection(vcpu)) {
5104                         r = -EINTR;
5105                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5106                         ++vcpu->stat.request_irq_exits;
5107                 }
5108                 if (signal_pending(current)) {
5109                         r = -EINTR;
5110                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5111                         ++vcpu->stat.signal_exits;
5112                 }
5113                 if (need_resched()) {
5114                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5115                         kvm_resched(vcpu);
5116                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5117                 }
5118         }
5119
5120         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5121
5122         vapic_exit(vcpu);
5123
5124         return r;
5125 }
5126
5127 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5128 {
5129         int r;
5130         sigset_t sigsaved;
5131
5132         if (vcpu->sigset_active)
5133                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5134
5135         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5136                 kvm_vcpu_block(vcpu);
5137                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5138                 r = -EAGAIN;
5139                 goto out;
5140         }
5141
5142         /* re-sync apic's tpr */
5143         if (!irqchip_in_kernel(vcpu->kvm))
5144                 kvm_set_cr8(vcpu, kvm_run->cr8);
5145
5146         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5147                 if (vcpu->mmio_needed) {
5148                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5149                         vcpu->mmio_read_completed = 1;
5150                         vcpu->mmio_needed = 0;
5151                 }
5152                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5153                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5154                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5155                 if (r != EMULATE_DONE) {
5156                         r = 0;
5157                         goto out;
5158                 }
5159         }
5160         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5161                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5162                                      kvm_run->hypercall.ret);
5163
5164         r = __vcpu_run(vcpu);
5165
5166 out:
5167         post_kvm_run_save(vcpu);
5168         if (vcpu->sigset_active)
5169                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5170
5171         return r;
5172 }
5173
5174 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5175 {
5176         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5177         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5178         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5179         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5180         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5181         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5182         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5183         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5184 #ifdef CONFIG_X86_64
5185         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5186         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5187         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5188         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5189         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5190         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5191         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5192         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5193 #endif
5194
5195         regs->rip = kvm_rip_read(vcpu);
5196         regs->rflags = kvm_get_rflags(vcpu);
5197
5198         return 0;
5199 }
5200
5201 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5202 {
5203         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5204         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5205         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5206         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5207         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5208         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5209         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5210         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5211 #ifdef CONFIG_X86_64
5212         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5213         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5214         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5215         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5216         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5217         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5218         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5219         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5220 #endif
5221
5222         kvm_rip_write(vcpu, regs->rip);
5223         kvm_set_rflags(vcpu, regs->rflags);
5224
5225         vcpu->arch.exception.pending = false;
5226
5227         return 0;
5228 }
5229
5230 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5231 {
5232         struct kvm_segment cs;
5233
5234         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5235         *db = cs.db;
5236         *l = cs.l;
5237 }
5238 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5239
5240 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5241                                   struct kvm_sregs *sregs)
5242 {
5243         struct desc_ptr dt;
5244
5245         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5246         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5247         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5248         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5249         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5250         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5251
5252         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5253         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5254
5255         kvm_x86_ops->get_idt(vcpu, &dt);
5256         sregs->idt.limit = dt.size;
5257         sregs->idt.base = dt.address;
5258         kvm_x86_ops->get_gdt(vcpu, &dt);
5259         sregs->gdt.limit = dt.size;
5260         sregs->gdt.base = dt.address;
5261
5262         sregs->cr0 = kvm_read_cr0(vcpu);
5263         sregs->cr2 = vcpu->arch.cr2;
5264         sregs->cr3 = vcpu->arch.cr3;
5265         sregs->cr4 = kvm_read_cr4(vcpu);
5266         sregs->cr8 = kvm_get_cr8(vcpu);
5267         sregs->efer = vcpu->arch.efer;
5268         sregs->apic_base = kvm_get_apic_base(vcpu);
5269
5270         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5271
5272         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5273                 set_bit(vcpu->arch.interrupt.nr,
5274                         (unsigned long *)sregs->interrupt_bitmap);
5275
5276         return 0;
5277 }
5278
5279 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5280                                     struct kvm_mp_state *mp_state)
5281 {
5282         mp_state->mp_state = vcpu->arch.mp_state;
5283         return 0;
5284 }
5285
5286 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5287                                     struct kvm_mp_state *mp_state)
5288 {
5289         vcpu->arch.mp_state = mp_state->mp_state;
5290         return 0;
5291 }
5292
5293 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5294                     bool has_error_code, u32 error_code)
5295 {
5296         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5297         int ret;
5298
5299         init_emulate_ctxt(vcpu);
5300
5301         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5302                                    tss_selector, reason, has_error_code,
5303                                    error_code);
5304
5305         if (ret)
5306                 return EMULATE_FAIL;
5307
5308         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5309         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5310         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5311         return EMULATE_DONE;
5312 }
5313 EXPORT_SYMBOL_GPL(kvm_task_switch);
5314
5315 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5316                                   struct kvm_sregs *sregs)
5317 {
5318         int mmu_reset_needed = 0;
5319         int pending_vec, max_bits;
5320         struct desc_ptr dt;
5321
5322         dt.size = sregs->idt.limit;
5323         dt.address = sregs->idt.base;
5324         kvm_x86_ops->set_idt(vcpu, &dt);
5325         dt.size = sregs->gdt.limit;
5326         dt.address = sregs->gdt.base;
5327         kvm_x86_ops->set_gdt(vcpu, &dt);
5328
5329         vcpu->arch.cr2 = sregs->cr2;
5330         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5331         vcpu->arch.cr3 = sregs->cr3;
5332
5333         kvm_set_cr8(vcpu, sregs->cr8);
5334
5335         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5336         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5337         kvm_set_apic_base(vcpu, sregs->apic_base);
5338
5339         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5340         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5341         vcpu->arch.cr0 = sregs->cr0;
5342
5343         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5344         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5345         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5346                 load_pdptrs(vcpu, vcpu->arch.cr3);
5347                 mmu_reset_needed = 1;
5348         }
5349
5350         if (mmu_reset_needed)
5351                 kvm_mmu_reset_context(vcpu);
5352
5353         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5354         pending_vec = find_first_bit(
5355                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5356         if (pending_vec < max_bits) {
5357                 kvm_queue_interrupt(vcpu, pending_vec, false);
5358                 pr_debug("Set back pending irq %d\n", pending_vec);
5359                 if (irqchip_in_kernel(vcpu->kvm))
5360                         kvm_pic_clear_isr_ack(vcpu->kvm);
5361         }
5362
5363         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5364         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5365         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5366         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5367         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5368         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5369
5370         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5371         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5372
5373         update_cr8_intercept(vcpu);
5374
5375         /* Older userspace won't unhalt the vcpu on reset. */
5376         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5377             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5378             !is_protmode(vcpu))
5379                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5380
5381         return 0;
5382 }
5383
5384 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5385                                         struct kvm_guest_debug *dbg)
5386 {
5387         unsigned long rflags;
5388         int i, r;
5389
5390         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5391                 r = -EBUSY;
5392                 if (vcpu->arch.exception.pending)
5393                         goto out;
5394                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5395                         kvm_queue_exception(vcpu, DB_VECTOR);
5396                 else
5397                         kvm_queue_exception(vcpu, BP_VECTOR);
5398         }
5399
5400         /*
5401          * Read rflags as long as potentially injected trace flags are still
5402          * filtered out.
5403          */
5404         rflags = kvm_get_rflags(vcpu);
5405
5406         vcpu->guest_debug = dbg->control;
5407         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5408                 vcpu->guest_debug = 0;
5409
5410         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5411                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5412                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5413                 vcpu->arch.switch_db_regs =
5414                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5415         } else {
5416                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5417                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5418                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5419         }
5420
5421         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5422                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5423                         get_segment_base(vcpu, VCPU_SREG_CS);
5424
5425         /*
5426          * Trigger an rflags update that will inject or remove the trace
5427          * flags.
5428          */
5429         kvm_set_rflags(vcpu, rflags);
5430
5431         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5432
5433         r = 0;
5434
5435 out:
5436
5437         return r;
5438 }
5439
5440 /*
5441  * Translate a guest virtual address to a guest physical address.
5442  */
5443 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5444                                     struct kvm_translation *tr)
5445 {
5446         unsigned long vaddr = tr->linear_address;
5447         gpa_t gpa;
5448         int idx;
5449
5450         idx = srcu_read_lock(&vcpu->kvm->srcu);
5451         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5452         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5453         tr->physical_address = gpa;
5454         tr->valid = gpa != UNMAPPED_GVA;
5455         tr->writeable = 1;
5456         tr->usermode = 0;
5457
5458         return 0;
5459 }
5460
5461 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5462 {
5463         struct i387_fxsave_struct *fxsave =
5464                         &vcpu->arch.guest_fpu.state->fxsave;
5465
5466         memcpy(fpu->fpr, fxsave->st_space, 128);
5467         fpu->fcw = fxsave->cwd;
5468         fpu->fsw = fxsave->swd;
5469         fpu->ftwx = fxsave->twd;
5470         fpu->last_opcode = fxsave->fop;
5471         fpu->last_ip = fxsave->rip;
5472         fpu->last_dp = fxsave->rdp;
5473         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5474
5475         return 0;
5476 }
5477
5478 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5479 {
5480         struct i387_fxsave_struct *fxsave =
5481                         &vcpu->arch.guest_fpu.state->fxsave;
5482
5483         memcpy(fxsave->st_space, fpu->fpr, 128);
5484         fxsave->cwd = fpu->fcw;
5485         fxsave->swd = fpu->fsw;
5486         fxsave->twd = fpu->ftwx;
5487         fxsave->fop = fpu->last_opcode;
5488         fxsave->rip = fpu->last_ip;
5489         fxsave->rdp = fpu->last_dp;
5490         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5491
5492         return 0;
5493 }
5494
5495 int fx_init(struct kvm_vcpu *vcpu)
5496 {
5497         int err;
5498
5499         err = fpu_alloc(&vcpu->arch.guest_fpu);
5500         if (err)
5501                 return err;
5502
5503         fpu_finit(&vcpu->arch.guest_fpu);
5504
5505         /*
5506          * Ensure guest xcr0 is valid for loading
5507          */
5508         vcpu->arch.xcr0 = XSTATE_FP;
5509
5510         vcpu->arch.cr0 |= X86_CR0_ET;
5511
5512         return 0;
5513 }
5514 EXPORT_SYMBOL_GPL(fx_init);
5515
5516 static void fx_free(struct kvm_vcpu *vcpu)
5517 {
5518         fpu_free(&vcpu->arch.guest_fpu);
5519 }
5520
5521 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5522 {
5523         if (vcpu->guest_fpu_loaded)
5524                 return;
5525
5526         /*
5527          * Restore all possible states in the guest,
5528          * and assume host would use all available bits.
5529          * Guest xcr0 would be loaded later.
5530          */
5531         kvm_put_guest_xcr0(vcpu);
5532         vcpu->guest_fpu_loaded = 1;
5533         unlazy_fpu(current);
5534         fpu_restore_checking(&vcpu->arch.guest_fpu);
5535         trace_kvm_fpu(1);
5536 }
5537
5538 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5539 {
5540         kvm_put_guest_xcr0(vcpu);
5541
5542         if (!vcpu->guest_fpu_loaded)
5543                 return;
5544
5545         vcpu->guest_fpu_loaded = 0;
5546         fpu_save_init(&vcpu->arch.guest_fpu);
5547         ++vcpu->stat.fpu_reload;
5548         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5549         trace_kvm_fpu(0);
5550 }
5551
5552 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5553 {
5554         if (vcpu->arch.time_page) {
5555                 kvm_release_page_dirty(vcpu->arch.time_page);
5556                 vcpu->arch.time_page = NULL;
5557         }
5558
5559         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5560         fx_free(vcpu);
5561         kvm_x86_ops->vcpu_free(vcpu);
5562 }
5563
5564 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5565                                                 unsigned int id)
5566 {
5567         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5568                 printk_once(KERN_WARNING
5569                 "kvm: SMP vm created on host with unstable TSC; "
5570                 "guest TSC will not be reliable\n");
5571         return kvm_x86_ops->vcpu_create(kvm, id);
5572 }
5573
5574 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5575 {
5576         int r;
5577
5578         vcpu->arch.mtrr_state.have_fixed = 1;
5579         vcpu_load(vcpu);
5580         r = kvm_arch_vcpu_reset(vcpu);
5581         if (r == 0)
5582                 r = kvm_mmu_setup(vcpu);
5583         vcpu_put(vcpu);
5584         if (r < 0)
5585                 goto free_vcpu;
5586
5587         return 0;
5588 free_vcpu:
5589         kvm_x86_ops->vcpu_free(vcpu);
5590         return r;
5591 }
5592
5593 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5594 {
5595         vcpu_load(vcpu);
5596         kvm_mmu_unload(vcpu);
5597         vcpu_put(vcpu);
5598
5599         fx_free(vcpu);
5600         kvm_x86_ops->vcpu_free(vcpu);
5601 }
5602
5603 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5604 {
5605         vcpu->arch.nmi_pending = false;
5606         vcpu->arch.nmi_injected = false;
5607
5608         vcpu->arch.switch_db_regs = 0;
5609         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5610         vcpu->arch.dr6 = DR6_FIXED_1;
5611         vcpu->arch.dr7 = DR7_FIXED_1;
5612
5613         return kvm_x86_ops->vcpu_reset(vcpu);
5614 }
5615
5616 int kvm_arch_hardware_enable(void *garbage)
5617 {
5618         struct kvm *kvm;
5619         struct kvm_vcpu *vcpu;
5620         int i;
5621
5622         kvm_shared_msr_cpu_online();
5623         list_for_each_entry(kvm, &vm_list, vm_list)
5624                 kvm_for_each_vcpu(i, vcpu, kvm)
5625                         if (vcpu->cpu == smp_processor_id())
5626                                 kvm_request_guest_time_update(vcpu);
5627         return kvm_x86_ops->hardware_enable(garbage);
5628 }
5629
5630 void kvm_arch_hardware_disable(void *garbage)
5631 {
5632         kvm_x86_ops->hardware_disable(garbage);
5633         drop_user_return_notifiers(garbage);
5634 }
5635
5636 int kvm_arch_hardware_setup(void)
5637 {
5638         return kvm_x86_ops->hardware_setup();
5639 }
5640
5641 void kvm_arch_hardware_unsetup(void)
5642 {
5643         kvm_x86_ops->hardware_unsetup();
5644 }
5645
5646 void kvm_arch_check_processor_compat(void *rtn)
5647 {
5648         kvm_x86_ops->check_processor_compatibility(rtn);
5649 }
5650
5651 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5652 {
5653         struct page *page;
5654         struct kvm *kvm;
5655         int r;
5656
5657         BUG_ON(vcpu->kvm == NULL);
5658         kvm = vcpu->kvm;
5659
5660         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5661         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5662         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5663                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5664         else
5665                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5666
5667         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5668         if (!page) {
5669                 r = -ENOMEM;
5670                 goto fail;
5671         }
5672         vcpu->arch.pio_data = page_address(page);
5673
5674         r = kvm_mmu_create(vcpu);
5675         if (r < 0)
5676                 goto fail_free_pio_data;
5677
5678         if (irqchip_in_kernel(kvm)) {
5679                 r = kvm_create_lapic(vcpu);
5680                 if (r < 0)
5681                         goto fail_mmu_destroy;
5682         }
5683
5684         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5685                                        GFP_KERNEL);
5686         if (!vcpu->arch.mce_banks) {
5687                 r = -ENOMEM;
5688                 goto fail_free_lapic;
5689         }
5690         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5691
5692         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5693                 goto fail_free_mce_banks;
5694
5695         return 0;
5696 fail_free_mce_banks:
5697         kfree(vcpu->arch.mce_banks);
5698 fail_free_lapic:
5699         kvm_free_lapic(vcpu);
5700 fail_mmu_destroy:
5701         kvm_mmu_destroy(vcpu);
5702 fail_free_pio_data:
5703         free_page((unsigned long)vcpu->arch.pio_data);
5704 fail:
5705         return r;
5706 }
5707
5708 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5709 {
5710         int idx;
5711
5712         kfree(vcpu->arch.mce_banks);
5713         kvm_free_lapic(vcpu);
5714         idx = srcu_read_lock(&vcpu->kvm->srcu);
5715         kvm_mmu_destroy(vcpu);
5716         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5717         free_page((unsigned long)vcpu->arch.pio_data);
5718 }
5719
5720 struct  kvm *kvm_arch_create_vm(void)
5721 {
5722         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5723
5724         if (!kvm)
5725                 return ERR_PTR(-ENOMEM);
5726
5727         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5728         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5729
5730         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5731         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5732
5733         spin_lock_init(&kvm->arch.tsc_write_lock);
5734
5735         return kvm;
5736 }
5737
5738 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5739 {
5740         vcpu_load(vcpu);
5741         kvm_mmu_unload(vcpu);
5742         vcpu_put(vcpu);
5743 }
5744
5745 static void kvm_free_vcpus(struct kvm *kvm)
5746 {
5747         unsigned int i;
5748         struct kvm_vcpu *vcpu;
5749
5750         /*
5751          * Unpin any mmu pages first.
5752          */
5753         kvm_for_each_vcpu(i, vcpu, kvm)
5754                 kvm_unload_vcpu_mmu(vcpu);
5755         kvm_for_each_vcpu(i, vcpu, kvm)
5756                 kvm_arch_vcpu_free(vcpu);
5757
5758         mutex_lock(&kvm->lock);
5759         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5760                 kvm->vcpus[i] = NULL;
5761
5762         atomic_set(&kvm->online_vcpus, 0);
5763         mutex_unlock(&kvm->lock);
5764 }
5765
5766 void kvm_arch_sync_events(struct kvm *kvm)
5767 {
5768         kvm_free_all_assigned_devices(kvm);
5769         kvm_free_pit(kvm);
5770 }
5771
5772 void kvm_arch_destroy_vm(struct kvm *kvm)
5773 {
5774         kvm_iommu_unmap_guest(kvm);
5775         kfree(kvm->arch.vpic);
5776         kfree(kvm->arch.vioapic);
5777         kvm_free_vcpus(kvm);
5778         kvm_free_physmem(kvm);
5779         if (kvm->arch.apic_access_page)
5780                 put_page(kvm->arch.apic_access_page);
5781         if (kvm->arch.ept_identity_pagetable)
5782                 put_page(kvm->arch.ept_identity_pagetable);
5783         cleanup_srcu_struct(&kvm->srcu);
5784         kfree(kvm);
5785 }
5786
5787 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5788                                 struct kvm_memory_slot *memslot,
5789                                 struct kvm_memory_slot old,
5790                                 struct kvm_userspace_memory_region *mem,
5791                                 int user_alloc)
5792 {
5793         int npages = memslot->npages;
5794         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5795
5796         /* Prevent internal slot pages from being moved by fork()/COW. */
5797         if (memslot->id >= KVM_MEMORY_SLOTS)
5798                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5799
5800         /*To keep backward compatibility with older userspace,
5801          *x86 needs to hanlde !user_alloc case.
5802          */
5803         if (!user_alloc) {
5804                 if (npages && !old.rmap) {
5805                         unsigned long userspace_addr;
5806
5807                         down_write(&current->mm->mmap_sem);
5808                         userspace_addr = do_mmap(NULL, 0,
5809                                                  npages * PAGE_SIZE,
5810                                                  PROT_READ | PROT_WRITE,
5811                                                  map_flags,
5812                                                  0);
5813                         up_write(&current->mm->mmap_sem);
5814
5815                         if (IS_ERR((void *)userspace_addr))
5816                                 return PTR_ERR((void *)userspace_addr);
5817
5818                         memslot->userspace_addr = userspace_addr;
5819                 }
5820         }
5821
5822
5823         return 0;
5824 }
5825
5826 void kvm_arch_commit_memory_region(struct kvm *kvm,
5827                                 struct kvm_userspace_memory_region *mem,
5828                                 struct kvm_memory_slot old,
5829                                 int user_alloc)
5830 {
5831
5832         int npages = mem->memory_size >> PAGE_SHIFT;
5833
5834         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5835                 int ret;
5836
5837                 down_write(&current->mm->mmap_sem);
5838                 ret = do_munmap(current->mm, old.userspace_addr,
5839                                 old.npages * PAGE_SIZE);
5840                 up_write(&current->mm->mmap_sem);
5841                 if (ret < 0)
5842                         printk(KERN_WARNING
5843                                "kvm_vm_ioctl_set_memory_region: "
5844                                "failed to munmap memory\n");
5845         }
5846
5847         spin_lock(&kvm->mmu_lock);
5848         if (!kvm->arch.n_requested_mmu_pages) {
5849                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5850                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5851         }
5852
5853         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5854         spin_unlock(&kvm->mmu_lock);
5855 }
5856
5857 void kvm_arch_flush_shadow(struct kvm *kvm)
5858 {
5859         kvm_mmu_zap_all(kvm);
5860         kvm_reload_remote_mmus(kvm);
5861 }
5862
5863 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5864 {
5865         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5866                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5867                 || vcpu->arch.nmi_pending ||
5868                 (kvm_arch_interrupt_allowed(vcpu) &&
5869                  kvm_cpu_has_interrupt(vcpu));
5870 }
5871
5872 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5873 {
5874         int me;
5875         int cpu = vcpu->cpu;
5876
5877         if (waitqueue_active(&vcpu->wq)) {
5878                 wake_up_interruptible(&vcpu->wq);
5879                 ++vcpu->stat.halt_wakeup;
5880         }
5881
5882         me = get_cpu();
5883         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5884                 if (atomic_xchg(&vcpu->guest_mode, 0))
5885                         smp_send_reschedule(cpu);
5886         put_cpu();
5887 }
5888
5889 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5890 {
5891         return kvm_x86_ops->interrupt_allowed(vcpu);
5892 }
5893
5894 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5895 {
5896         unsigned long current_rip = kvm_rip_read(vcpu) +
5897                 get_segment_base(vcpu, VCPU_SREG_CS);
5898
5899         return current_rip == linear_rip;
5900 }
5901 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5902
5903 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5904 {
5905         unsigned long rflags;
5906
5907         rflags = kvm_x86_ops->get_rflags(vcpu);
5908         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5909                 rflags &= ~X86_EFLAGS_TF;
5910         return rflags;
5911 }
5912 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5913
5914 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5915 {
5916         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5917             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5918                 rflags |= X86_EFLAGS_TF;
5919         kvm_x86_ops->set_rflags(vcpu, rflags);
5920 }
5921 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5922
5923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5924 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5925 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5926 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5927 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5928 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5929 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5930 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5931 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5932 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5933 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5934 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);