drivers/gpu/drm/amd/display/dc/inc/hw/aux_engine.h

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef __DAL_AUX_ENGINE_H__
  27 #define __DAL_AUX_ENGINE_H__
  28
  29 #include "dc_ddc_types.h"
  30 #include "include/i2caux_interface.h"
  31
  32 enum aux_return_code_type;
  33
  34 enum i2caux_transaction_operation {
  35         I2CAUX_TRANSACTION_READ,
  36         I2CAUX_TRANSACTION_WRITE
  37 };
  38
  39 enum i2caux_transaction_address_space {
  40         I2CAUX_TRANSACTION_ADDRESS_SPACE_I2C = 1,
  41         I2CAUX_TRANSACTION_ADDRESS_SPACE_DPCD
  42 };
  43
  44 struct i2caux_transaction_payload {
  45         enum i2caux_transaction_address_space address_space;
  46         uint32_t address;
  47         uint32_t length;
  48         uint8_t *data;
  49 };
  50
  51 enum i2caux_transaction_status {
  52         I2CAUX_TRANSACTION_STATUS_UNKNOWN = (-1L),
  53         I2CAUX_TRANSACTION_STATUS_SUCCEEDED,
  54         I2CAUX_TRANSACTION_STATUS_FAILED_CHANNEL_BUSY,
  55         I2CAUX_TRANSACTION_STATUS_FAILED_TIMEOUT,
  56         I2CAUX_TRANSACTION_STATUS_FAILED_PROTOCOL_ERROR,
  57         I2CAUX_TRANSACTION_STATUS_FAILED_NACK,
  58         I2CAUX_TRANSACTION_STATUS_FAILED_INCOMPLETE,
  59         I2CAUX_TRANSACTION_STATUS_FAILED_OPERATION,
  60         I2CAUX_TRANSACTION_STATUS_FAILED_INVALID_OPERATION,
  61         I2CAUX_TRANSACTION_STATUS_FAILED_BUFFER_OVERFLOW,
  62         I2CAUX_TRANSACTION_STATUS_FAILED_HPD_DISCON
  63 };
  64
  65 struct i2caux_transaction_request {
  66         enum i2caux_transaction_operation operation;
  67         struct i2caux_transaction_payload payload;
  68         enum i2caux_transaction_status status;
  69 };
  70
  71 enum i2caux_engine_type {
  72         I2CAUX_ENGINE_TYPE_UNKNOWN = (-1L),
  73         I2CAUX_ENGINE_TYPE_AUX,
  74         I2CAUX_ENGINE_TYPE_I2C_DDC_HW,
  75         I2CAUX_ENGINE_TYPE_I2C_GENERIC_HW,
  76         I2CAUX_ENGINE_TYPE_I2C_SW
  77 };
  78
  79 enum i2c_default_speed {
  80         I2CAUX_DEFAULT_I2C_HW_SPEED = 50,
  81         I2CAUX_DEFAULT_I2C_SW_SPEED = 50
  82 };
  83
  84 union aux_config;
  85
  86 struct aux_engine {
  87         uint32_t inst;
  88         struct ddc *ddc;
  89         struct dc_context *ctx;
  90         const struct aux_engine_funcs *funcs;
  91         /* following values are expressed in milliseconds */
  92         uint32_t delay;
  93         uint32_t max_defer_write_retry;
  94         bool acquire_reset;
  95 };
  96
  97 struct read_command_context {
  98         uint8_t *buffer;
  99         uint32_t current_read_length;
 100         uint32_t offset;
 101         enum i2caux_transaction_status status;
 102
 103         struct aux_request_transaction_data request;
 104         struct aux_reply_transaction_data reply;
 105
 106         uint8_t returned_byte;
 107
 108         uint32_t timed_out_retry_aux;
 109         uint32_t invalid_reply_retry_aux;
 110         uint32_t defer_retry_aux;
 111         uint32_t defer_retry_i2c;
 112         uint32_t invalid_reply_retry_aux_on_ack;
 113
 114         bool transaction_complete;
 115         bool operation_succeeded;
 116 };
 117
 118 struct write_command_context {
 119         bool mot;
 120
 121         uint8_t *buffer;
 122         uint32_t current_write_length;
 123         enum i2caux_transaction_status status;
 124
 125         struct aux_request_transaction_data request;
 126         struct aux_reply_transaction_data reply;
 127
 128         uint8_t returned_byte;
 129
 130         uint32_t timed_out_retry_aux;
 131         uint32_t invalid_reply_retry_aux;
 132         uint32_t defer_retry_aux;
 133         uint32_t defer_retry_i2c;
 134         uint32_t max_defer_retry;
 135         uint32_t ack_m_retry;
 136
 137         uint8_t reply_data[DEFAULT_AUX_MAX_DATA_SIZE];
 138
 139         bool transaction_complete;
 140         bool operation_succeeded;
 141 };
 142
 143
 144 struct aux_engine_funcs {
 145         bool (*configure_timeout)(
 146                 struct ddc_service *ddc,
 147                 uint32_t timeout);
 148         void (*destroy)(
 149                 struct aux_engine **ptr);
 150         bool (*acquire_engine)(
 151                 struct aux_engine *engine);
 152         void (*configure)(
 153                 struct aux_engine *engine,
 154                 union aux_config cfg);
 155         void (*submit_channel_request)(
 156                 struct aux_engine *engine,
 157                 struct aux_request_transaction_data *request);
 158         void (*process_channel_reply)(
 159                 struct aux_engine *engine,
 160                 struct aux_reply_transaction_data *reply);
 161         int (*read_channel_reply)(
 162                 struct aux_engine *engine,
 163                 uint32_t size,
 164                 uint8_t *buffer,
 165                 uint8_t *reply_result,
 166                 uint32_t *sw_status);
 167         enum aux_return_code_type (*get_channel_status)(
 168                 struct aux_engine *engine,
 169                 uint8_t *returned_bytes);
 170         bool (*is_engine_available)(struct aux_engine *engine);
 171         enum i2caux_engine_type (*get_engine_type)(
 172                 const struct aux_engine *engine);
 173         bool (*acquire)(
 174                 struct aux_engine *engine,
 175                 struct ddc *ddc);
 176         bool (*submit_request)(
 177                 struct aux_engine *engine,
 178                 struct i2caux_transaction_request *request,
 179                 bool middle_of_transaction);
 180         void (*release_engine)(
 181                 struct aux_engine *engine);
 182         void (*destroy_engine)(
 183                 struct aux_engine **engine);
 184 };
 185 #endif