2 * Portions copyright (C) 2003 Russell King, PXA MMCI Driver
3 * Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver
5 * Copyright 2008 Embedded Alley Solutions, Inc.
6 * Copyright 2009-2011 Freescale Semiconductor, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/ioport.h>
27 #include <linux/of_device.h>
28 #include <linux/of_gpio.h>
29 #include <linux/platform_device.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/dmaengine.h>
34 #include <linux/highmem.h>
35 #include <linux/clk.h>
36 #include <linux/err.h>
37 #include <linux/completion.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/mmc.h>
40 #include <linux/mmc/sdio.h>
41 #include <linux/mmc/slot-gpio.h>
42 #include <linux/gpio.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/module.h>
45 #include <linux/stmp_device.h>
46 #include <linux/spi/mxs-spi.h>
48 #define DRIVER_NAME "mxs-mmc"
50 #define MXS_MMC_IRQ_BITS (BM_SSP_CTRL1_SDIO_IRQ | \
51 BM_SSP_CTRL1_RESP_ERR_IRQ | \
52 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ | \
53 BM_SSP_CTRL1_DATA_TIMEOUT_IRQ | \
54 BM_SSP_CTRL1_DATA_CRC_IRQ | \
55 BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
56 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ | \
57 BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
59 /* card detect polling timeout */
60 #define MXS_MMC_DETECT_TIMEOUT (HZ/2)
66 struct mmc_request *mrq;
67 struct mmc_command *cmd;
68 struct mmc_data *data;
70 unsigned char bus_width;
76 static int mxs_mmc_get_cd(struct mmc_host *mmc)
78 struct mxs_mmc_host *host = mmc_priv(mmc);
79 struct mxs_ssp *ssp = &host->ssp;
85 ret = mmc_gpio_get_cd(mmc);
89 present = !(readl(ssp->base + HW_SSP_STATUS(ssp)) &
90 BM_SSP_STATUS_CARD_DETECT);
92 if (mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH)
98 static int mxs_mmc_reset(struct mxs_mmc_host *host)
100 struct mxs_ssp *ssp = &host->ssp;
104 ret = stmp_reset_block(ssp->base);
108 ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
109 ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
110 BF_SSP(0x7, CTRL1_WORD_LENGTH) |
111 BM_SSP_CTRL1_DMA_ENABLE |
112 BM_SSP_CTRL1_POLARITY |
113 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN |
114 BM_SSP_CTRL1_DATA_CRC_IRQ_EN |
115 BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN |
116 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN |
117 BM_SSP_CTRL1_RESP_ERR_IRQ_EN;
119 writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
120 BF_SSP(2, TIMING_CLOCK_DIVIDE) |
121 BF_SSP(0, TIMING_CLOCK_RATE),
122 ssp->base + HW_SSP_TIMING(ssp));
124 if (host->sdio_irq_en) {
125 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
126 ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
129 writel(ctrl0, ssp->base + HW_SSP_CTRL0);
130 writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp));
134 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
135 struct mmc_command *cmd);
137 static void mxs_mmc_request_done(struct mxs_mmc_host *host)
139 struct mmc_command *cmd = host->cmd;
140 struct mmc_data *data = host->data;
141 struct mmc_request *mrq = host->mrq;
142 struct mxs_ssp *ssp = &host->ssp;
144 if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
145 if (mmc_resp_type(cmd) & MMC_RSP_136) {
146 cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
147 cmd->resp[2] = readl(ssp->base + HW_SSP_SDRESP1(ssp));
148 cmd->resp[1] = readl(ssp->base + HW_SSP_SDRESP2(ssp));
149 cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP3(ssp));
151 cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
156 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
157 data->sg_len, ssp->dma_dir);
159 * If there was an error on any block, we mark all
160 * data blocks as being in error.
163 data->bytes_xfered = data->blocks * data->blksz;
165 data->bytes_xfered = 0;
169 mxs_mmc_start_cmd(host, mrq->stop);
175 mmc_request_done(host->mmc, mrq);
178 static void mxs_mmc_dma_irq_callback(void *param)
180 struct mxs_mmc_host *host = param;
182 mxs_mmc_request_done(host);
185 static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
187 struct mxs_mmc_host *host = dev_id;
188 struct mmc_command *cmd = host->cmd;
189 struct mmc_data *data = host->data;
190 struct mxs_ssp *ssp = &host->ssp;
193 spin_lock(&host->lock);
195 stat = readl(ssp->base + HW_SSP_CTRL1(ssp));
196 writel(stat & MXS_MMC_IRQ_BITS,
197 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
199 spin_unlock(&host->lock);
201 if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
202 mmc_signal_sdio_irq(host->mmc);
204 if (stat & BM_SSP_CTRL1_RESP_TIMEOUT_IRQ)
205 cmd->error = -ETIMEDOUT;
206 else if (stat & BM_SSP_CTRL1_RESP_ERR_IRQ)
210 if (stat & (BM_SSP_CTRL1_DATA_TIMEOUT_IRQ |
211 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
212 data->error = -ETIMEDOUT;
213 else if (stat & BM_SSP_CTRL1_DATA_CRC_IRQ)
214 data->error = -EILSEQ;
215 else if (stat & (BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ |
216 BM_SSP_CTRL1_FIFO_OVERRUN_IRQ))
223 static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
224 struct mxs_mmc_host *host, unsigned long flags)
226 struct mxs_ssp *ssp = &host->ssp;
227 struct dma_async_tx_descriptor *desc;
228 struct mmc_data *data = host->data;
229 struct scatterlist * sgl;
234 dma_map_sg(mmc_dev(host->mmc), data->sg,
235 data->sg_len, ssp->dma_dir);
237 sg_len = data->sg_len;
240 sgl = (struct scatterlist *) ssp->ssp_pio_words;
241 sg_len = SSP_PIO_NUM;
244 desc = dmaengine_prep_slave_sg(ssp->dmach,
245 sgl, sg_len, ssp->slave_dirn, flags);
247 desc->callback = mxs_mmc_dma_irq_callback;
248 desc->callback_param = host;
251 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
252 data->sg_len, ssp->dma_dir);
258 static void mxs_mmc_bc(struct mxs_mmc_host *host)
260 struct mxs_ssp *ssp = &host->ssp;
261 struct mmc_command *cmd = host->cmd;
262 struct dma_async_tx_descriptor *desc;
263 u32 ctrl0, cmd0, cmd1;
265 ctrl0 = BM_SSP_CTRL0_ENABLE | BM_SSP_CTRL0_IGNORE_CRC;
266 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD) | BM_SSP_CMD0_APPEND_8CYC;
269 if (host->sdio_irq_en) {
270 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
271 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
274 ssp->ssp_pio_words[0] = ctrl0;
275 ssp->ssp_pio_words[1] = cmd0;
276 ssp->ssp_pio_words[2] = cmd1;
277 ssp->dma_dir = DMA_NONE;
278 ssp->slave_dirn = DMA_TRANS_NONE;
279 desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
283 dmaengine_submit(desc);
284 dma_async_issue_pending(ssp->dmach);
288 dev_warn(mmc_dev(host->mmc),
289 "%s: failed to prep dma\n", __func__);
292 static void mxs_mmc_ac(struct mxs_mmc_host *host)
294 struct mxs_ssp *ssp = &host->ssp;
295 struct mmc_command *cmd = host->cmd;
296 struct dma_async_tx_descriptor *desc;
297 u32 ignore_crc, get_resp, long_resp;
298 u32 ctrl0, cmd0, cmd1;
300 ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
301 0 : BM_SSP_CTRL0_IGNORE_CRC;
302 get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
303 BM_SSP_CTRL0_GET_RESP : 0;
304 long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
305 BM_SSP_CTRL0_LONG_RESP : 0;
307 ctrl0 = BM_SSP_CTRL0_ENABLE | ignore_crc | get_resp | long_resp;
308 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
311 if (host->sdio_irq_en) {
312 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
313 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
316 ssp->ssp_pio_words[0] = ctrl0;
317 ssp->ssp_pio_words[1] = cmd0;
318 ssp->ssp_pio_words[2] = cmd1;
319 ssp->dma_dir = DMA_NONE;
320 ssp->slave_dirn = DMA_TRANS_NONE;
321 desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
325 dmaengine_submit(desc);
326 dma_async_issue_pending(ssp->dmach);
330 dev_warn(mmc_dev(host->mmc),
331 "%s: failed to prep dma\n", __func__);
334 static unsigned short mxs_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns)
336 const unsigned int ssp_timeout_mul = 4096;
338 * Calculate ticks in ms since ns are large numbers
341 const unsigned int clock_per_ms = clock_rate / 1000;
342 const unsigned int ms = ns / 1000;
343 const unsigned int ticks = ms * clock_per_ms;
344 const unsigned int ssp_ticks = ticks / ssp_timeout_mul;
346 WARN_ON(ssp_ticks == 0);
350 static void mxs_mmc_adtc(struct mxs_mmc_host *host)
352 struct mmc_command *cmd = host->cmd;
353 struct mmc_data *data = cmd->data;
354 struct dma_async_tx_descriptor *desc;
355 struct scatterlist *sgl = data->sg, *sg;
356 unsigned int sg_len = data->sg_len;
359 unsigned short dma_data_dir, timeout;
360 enum dma_transfer_direction slave_dirn;
361 unsigned int data_size = 0, log2_blksz;
362 unsigned int blocks = data->blocks;
364 struct mxs_ssp *ssp = &host->ssp;
366 u32 ignore_crc, get_resp, long_resp, read;
367 u32 ctrl0, cmd0, cmd1, val;
369 ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
370 0 : BM_SSP_CTRL0_IGNORE_CRC;
371 get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
372 BM_SSP_CTRL0_GET_RESP : 0;
373 long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
374 BM_SSP_CTRL0_LONG_RESP : 0;
376 if (data->flags & MMC_DATA_WRITE) {
377 dma_data_dir = DMA_TO_DEVICE;
378 slave_dirn = DMA_MEM_TO_DEV;
381 dma_data_dir = DMA_FROM_DEVICE;
382 slave_dirn = DMA_DEV_TO_MEM;
383 read = BM_SSP_CTRL0_READ;
386 ctrl0 = BF_SSP(host->bus_width, CTRL0_BUS_WIDTH) |
387 ignore_crc | get_resp | long_resp |
388 BM_SSP_CTRL0_DATA_XFER | read |
389 BM_SSP_CTRL0_WAIT_FOR_IRQ |
392 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
394 /* get logarithm to base 2 of block size for setting register */
395 log2_blksz = ilog2(data->blksz);
398 * take special care of the case that data size from data->sg
399 * is not equal to blocks x blksz
401 for_each_sg(sgl, sg, sg_len, i)
402 data_size += sg->length;
404 if (data_size != data->blocks * data->blksz)
407 /* xfer count, block size and count need to be set differently */
408 if (ssp_is_old(ssp)) {
409 ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
410 cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
411 BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
413 writel(data_size, ssp->base + HW_SSP_XFER_SIZE);
414 writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
415 BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
416 ssp->base + HW_SSP_BLOCK_SIZE);
419 if ((cmd->opcode == MMC_STOP_TRANSMISSION) ||
420 (cmd->opcode == SD_IO_RW_EXTENDED))
421 cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
425 if (host->sdio_irq_en) {
426 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
427 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
430 /* set the timeout count */
431 timeout = mxs_ns_to_ssp_ticks(ssp->clk_rate, data->timeout_ns);
432 val = readl(ssp->base + HW_SSP_TIMING(ssp));
433 val &= ~(BM_SSP_TIMING_TIMEOUT);
434 val |= BF_SSP(timeout, TIMING_TIMEOUT);
435 writel(val, ssp->base + HW_SSP_TIMING(ssp));
438 ssp->ssp_pio_words[0] = ctrl0;
439 ssp->ssp_pio_words[1] = cmd0;
440 ssp->ssp_pio_words[2] = cmd1;
441 ssp->dma_dir = DMA_NONE;
442 ssp->slave_dirn = DMA_TRANS_NONE;
443 desc = mxs_mmc_prep_dma(host, 0);
448 WARN_ON(host->data != NULL);
450 ssp->dma_dir = dma_data_dir;
451 ssp->slave_dirn = slave_dirn;
452 desc = mxs_mmc_prep_dma(host, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
456 dmaengine_submit(desc);
457 dma_async_issue_pending(ssp->dmach);
460 dev_warn(mmc_dev(host->mmc),
461 "%s: failed to prep dma\n", __func__);
464 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
465 struct mmc_command *cmd)
469 switch (mmc_cmd_type(cmd)) {
483 dev_warn(mmc_dev(host->mmc),
484 "%s: unknown MMC command\n", __func__);
489 static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
491 struct mxs_mmc_host *host = mmc_priv(mmc);
493 WARN_ON(host->mrq != NULL);
495 mxs_mmc_start_cmd(host, mrq->cmd);
498 static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
500 struct mxs_mmc_host *host = mmc_priv(mmc);
502 if (ios->bus_width == MMC_BUS_WIDTH_8)
504 else if (ios->bus_width == MMC_BUS_WIDTH_4)
510 mxs_ssp_set_clk_rate(&host->ssp, ios->clock);
513 static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
515 struct mxs_mmc_host *host = mmc_priv(mmc);
516 struct mxs_ssp *ssp = &host->ssp;
519 spin_lock_irqsave(&host->lock, flags);
521 host->sdio_irq_en = enable;
524 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
525 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
526 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
527 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_SET);
529 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
530 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
531 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
532 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
535 spin_unlock_irqrestore(&host->lock, flags);
537 if (enable && readl(ssp->base + HW_SSP_STATUS(ssp)) &
538 BM_SSP_STATUS_SDIO_IRQ)
539 mmc_signal_sdio_irq(host->mmc);
543 static const struct mmc_host_ops mxs_mmc_ops = {
544 .request = mxs_mmc_request,
545 .get_ro = mmc_gpio_get_ro,
546 .get_cd = mxs_mmc_get_cd,
547 .set_ios = mxs_mmc_set_ios,
548 .enable_sdio_irq = mxs_mmc_enable_sdio_irq,
551 static struct platform_device_id mxs_ssp_ids[] = {
554 .driver_data = IMX23_SSP,
557 .driver_data = IMX28_SSP,
562 MODULE_DEVICE_TABLE(platform, mxs_ssp_ids);
564 static const struct of_device_id mxs_mmc_dt_ids[] = {
565 { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_SSP, },
566 { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_SSP, },
569 MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
571 static int mxs_mmc_probe(struct platform_device *pdev)
573 const struct of_device_id *of_id =
574 of_match_device(mxs_mmc_dt_ids, &pdev->dev);
575 struct device_node *np = pdev->dev.of_node;
576 struct mxs_mmc_host *host;
577 struct mmc_host *mmc;
578 struct resource *iores;
579 int ret = 0, irq_err;
580 struct regulator *reg_vmmc;
583 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
584 irq_err = platform_get_irq(pdev, 0);
585 if (!iores || irq_err < 0)
588 mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
592 host = mmc_priv(mmc);
594 ssp->dev = &pdev->dev;
595 ssp->base = devm_ioremap_resource(&pdev->dev, iores);
596 if (IS_ERR(ssp->base)) {
597 ret = PTR_ERR(ssp->base);
601 ssp->devid = (enum mxs_ssp_id) of_id->data;
604 host->sdio_irq_en = 0;
606 reg_vmmc = devm_regulator_get(&pdev->dev, "vmmc");
607 if (!IS_ERR(reg_vmmc)) {
608 ret = regulator_enable(reg_vmmc);
611 "Failed to enable vmmc regulator: %d\n", ret);
616 ssp->clk = devm_clk_get(&pdev->dev, NULL);
617 if (IS_ERR(ssp->clk)) {
618 ret = PTR_ERR(ssp->clk);
621 clk_prepare_enable(ssp->clk);
623 ret = mxs_mmc_reset(host);
625 dev_err(&pdev->dev, "Failed to reset mmc: %d\n", ret);
626 goto out_clk_disable;
629 ssp->dmach = dma_request_slave_channel(&pdev->dev, "rx-tx");
631 dev_err(mmc_dev(host->mmc),
632 "%s: failed to request dma\n", __func__);
634 goto out_clk_disable;
637 /* set mmc core parameters */
638 mmc->ops = &mxs_mmc_ops;
639 mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
640 MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
642 host->broken_cd = of_property_read_bool(np, "broken-cd");
645 mmc->f_max = 288000000;
647 ret = mmc_of_parse(mmc);
649 goto out_clk_disable;
651 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
654 mmc->max_blk_size = 1 << 0xf;
655 mmc->max_blk_count = (ssp_is_old(ssp)) ? 0xff : 0xffffff;
656 mmc->max_req_size = (ssp_is_old(ssp)) ? 0xffff : 0xffffffff;
657 mmc->max_seg_size = dma_get_max_seg_size(ssp->dmach->device->dev);
659 platform_set_drvdata(pdev, mmc);
661 ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
666 spin_lock_init(&host->lock);
668 ret = mmc_add_host(mmc);
672 dev_info(mmc_dev(host->mmc), "initialized\n");
678 dma_release_channel(ssp->dmach);
680 clk_disable_unprepare(ssp->clk);
686 static int mxs_mmc_remove(struct platform_device *pdev)
688 struct mmc_host *mmc = platform_get_drvdata(pdev);
689 struct mxs_mmc_host *host = mmc_priv(mmc);
690 struct mxs_ssp *ssp = &host->ssp;
692 mmc_remove_host(mmc);
695 dma_release_channel(ssp->dmach);
697 clk_disable_unprepare(ssp->clk);
705 static int mxs_mmc_suspend(struct device *dev)
707 struct mmc_host *mmc = dev_get_drvdata(dev);
708 struct mxs_mmc_host *host = mmc_priv(mmc);
709 struct mxs_ssp *ssp = &host->ssp;
711 clk_disable_unprepare(ssp->clk);
715 static int mxs_mmc_resume(struct device *dev)
717 struct mmc_host *mmc = dev_get_drvdata(dev);
718 struct mxs_mmc_host *host = mmc_priv(mmc);
719 struct mxs_ssp *ssp = &host->ssp;
721 clk_prepare_enable(ssp->clk);
725 static const struct dev_pm_ops mxs_mmc_pm_ops = {
726 .suspend = mxs_mmc_suspend,
727 .resume = mxs_mmc_resume,
731 static struct platform_driver mxs_mmc_driver = {
732 .probe = mxs_mmc_probe,
733 .remove = mxs_mmc_remove,
734 .id_table = mxs_ssp_ids,
737 .owner = THIS_MODULE,
739 .pm = &mxs_mmc_pm_ops,
741 .of_match_table = mxs_mmc_dt_ids,
745 module_platform_driver(mxs_mmc_driver);
747 MODULE_DESCRIPTION("FREESCALE MXS MMC peripheral");
748 MODULE_AUTHOR("Freescale Semiconductor");
749 MODULE_LICENSE("GPL");
750 MODULE_ALIAS("platform:" DRIVER_NAME);