2 * Copyright 2019 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
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11 * The above copyright notice and this permission notice shall be included in
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14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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22 * based on nouveau_prime.c
24 * Authors: Alex Deucher
28 * DOC: PRIME Buffer Sharing
30 * The following callback implementations are used for :ref:`sharing GEM buffer
31 * objects between different devices via PRIME <prime_buffer_sharing>`.
35 #include "amdgpu_display.h"
36 #include "amdgpu_gem.h"
37 #include "amdgpu_dma_buf.h"
38 #include <drm/amdgpu_drm.h>
39 #include <linux/dma-buf.h>
40 #include <linux/dma-fence-array.h>
43 * amdgpu_gem_prime_vmap - &dma_buf_ops.vmap implementation
46 * Sets up an in-kernel virtual mapping of the BO's memory.
49 * The virtual address of the mapping or an error pointer.
51 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
53 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
56 ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
61 return bo->dma_buf_vmap.virtual;
65 * amdgpu_gem_prime_vunmap - &dma_buf_ops.vunmap implementation
67 * @vaddr: Virtual address (unused)
69 * Tears down the in-kernel virtual mapping of the BO's memory.
71 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
73 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
75 ttm_bo_kunmap(&bo->dma_buf_vmap);
79 * amdgpu_gem_prime_mmap - &drm_driver.gem_prime_mmap implementation
81 * @vma: Virtual memory area
83 * Sets up a userspace mapping of the BO's memory in the given
84 * virtual memory area.
87 * 0 on success or a negative error code on failure.
89 int amdgpu_gem_prime_mmap(struct drm_gem_object *obj,
90 struct vm_area_struct *vma)
92 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
93 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
94 unsigned asize = amdgpu_bo_size(bo);
103 /* Check for valid size. */
104 if (asize < vma->vm_end - vma->vm_start)
107 if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
108 (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
111 vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
113 /* prime mmap does not need to check access, so allow here */
114 ret = drm_vma_node_allow(&obj->vma_node, vma->vm_file->private_data);
118 ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev);
119 drm_vma_node_revoke(&obj->vma_node, vma->vm_file->private_data);
125 __dma_resv_make_exclusive(struct dma_resv *obj)
127 struct dma_fence **fences;
131 if (!dma_resv_get_list(obj)) /* no shared fences to convert */
134 r = dma_resv_get_fences_rcu(obj, NULL, &count, &fences);
139 /* Now that was unexpected. */
140 } else if (count == 1) {
141 dma_resv_add_excl_fence(obj, fences[0]);
142 dma_fence_put(fences[0]);
145 struct dma_fence_array *array;
147 array = dma_fence_array_create(count, fences,
148 dma_fence_context_alloc(1), 0,
153 dma_resv_add_excl_fence(obj, &array->base);
154 dma_fence_put(&array->base);
161 dma_fence_put(fences[count]);
167 * amdgpu_dma_buf_attach - &dma_buf_ops.attach implementation
169 * @dmabuf: DMA-buf where we attach to
170 * @attach: attachment to add
172 * Add the attachment as user to the exported DMA-buf.
174 static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,
175 struct dma_buf_attachment *attach)
177 struct drm_gem_object *obj = dmabuf->priv;
178 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
179 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
182 if (attach->dev->driver == adev->dev->driver)
185 r = amdgpu_bo_reserve(bo, false);
186 if (unlikely(r != 0))
190 * We only create shared fences for internal use, but importers
191 * of the dmabuf rely on exclusive fences for implicitly
192 * tracking write hazards. As any of the current fences may
193 * correspond to a write, we need to convert all existing
194 * fences on the reservation object into a single exclusive
197 r = __dma_resv_make_exclusive(bo->tbo.base.resv);
201 bo->prime_shared_count++;
202 amdgpu_bo_unreserve(bo);
207 * amdgpu_dma_buf_detach - &dma_buf_ops.detach implementation
209 * @dmabuf: DMA-buf where we remove the attachment from
210 * @attach: the attachment to remove
212 * Called when an attachment is removed from the DMA-buf.
214 static void amdgpu_dma_buf_detach(struct dma_buf *dmabuf,
215 struct dma_buf_attachment *attach)
217 struct drm_gem_object *obj = dmabuf->priv;
218 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
219 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
221 if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count)
222 bo->prime_shared_count--;
226 * amdgpu_dma_buf_map - &dma_buf_ops.map_dma_buf implementation
227 * @attach: DMA-buf attachment
228 * @dir: DMA direction
230 * Makes sure that the shared DMA buffer can be accessed by the target device.
231 * For now, simply pins it to the GTT domain, where it should be accessible by
235 * sg_table filled with the DMA addresses to use or ERR_PRT with negative error
238 static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,
239 enum dma_data_direction dir)
241 struct dma_buf *dma_buf = attach->dmabuf;
242 struct drm_gem_object *obj = dma_buf->priv;
243 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
244 struct sg_table *sgt;
247 r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
251 sgt = drm_prime_pages_to_sg(bo->tbo.ttm->pages, bo->tbo.num_pages);
255 if (!dma_map_sg_attrs(attach->dev, sgt->sgl, sgt->nents, dir,
256 DMA_ATTR_SKIP_CPU_SYNC))
264 return ERR_PTR(-ENOMEM);
268 * amdgpu_dma_buf_unmap - &dma_buf_ops.unmap_dma_buf implementation
269 * @attach: DMA-buf attachment
270 * @sgt: sg_table to unmap
271 * @dir: DMA direction
273 * This is called when a shared DMA buffer no longer needs to be accessible by
274 * another device. For now, simply unpins the buffer from GTT.
276 static void amdgpu_dma_buf_unmap(struct dma_buf_attachment *attach,
277 struct sg_table *sgt,
278 enum dma_data_direction dir)
280 struct drm_gem_object *obj = attach->dmabuf->priv;
281 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
283 dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents, dir);
290 * amdgpu_dma_buf_begin_cpu_access - &dma_buf_ops.begin_cpu_access implementation
291 * @dma_buf: Shared DMA buffer
292 * @direction: Direction of DMA transfer
294 * This is called before CPU access to the shared DMA buffer's memory. If it's
295 * a read access, the buffer is moved to the GTT domain if possible, for optimal
296 * CPU read performance.
299 * 0 on success or a negative error code on failure.
301 static int amdgpu_dma_buf_begin_cpu_access(struct dma_buf *dma_buf,
302 enum dma_data_direction direction)
304 struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
305 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
306 struct ttm_operation_ctx ctx = { true, false };
307 u32 domain = amdgpu_display_supported_domains(adev, bo->flags);
309 bool reads = (direction == DMA_BIDIRECTIONAL ||
310 direction == DMA_FROM_DEVICE);
312 if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
316 ret = amdgpu_bo_reserve(bo, false);
317 if (unlikely(ret != 0))
320 if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
321 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
322 ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
325 amdgpu_bo_unreserve(bo);
329 const struct dma_buf_ops amdgpu_dmabuf_ops = {
330 .dynamic_mapping = true,
331 .attach = amdgpu_dma_buf_attach,
332 .detach = amdgpu_dma_buf_detach,
333 .map_dma_buf = amdgpu_dma_buf_map,
334 .unmap_dma_buf = amdgpu_dma_buf_unmap,
335 .release = drm_gem_dmabuf_release,
336 .begin_cpu_access = amdgpu_dma_buf_begin_cpu_access,
337 .mmap = drm_gem_dmabuf_mmap,
338 .vmap = drm_gem_dmabuf_vmap,
339 .vunmap = drm_gem_dmabuf_vunmap,
343 * amdgpu_gem_prime_export - &drm_driver.gem_prime_export implementation
345 * @flags: Flags such as DRM_CLOEXEC and DRM_RDWR.
347 * The main work is done by the &drm_gem_prime_export helper.
350 * Shared DMA buffer representing the GEM BO from the given device.
352 struct dma_buf *amdgpu_gem_prime_export(struct drm_gem_object *gobj,
355 struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
358 if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
359 bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
360 return ERR_PTR(-EPERM);
362 buf = drm_gem_prime_export(gobj, flags);
364 buf->file->f_mapping = gobj->dev->anon_inode->i_mapping;
365 buf->ops = &amdgpu_dmabuf_ops;
372 * amdgpu_dma_buf_create_obj - create BO for DMA-buf import
377 * Creates an empty SG BO for DMA-buf import.
380 * A new GEM BO of the given DRM device, representing the memory
381 * described by the given DMA-buf attachment and scatter/gather table.
383 static struct drm_gem_object *
384 amdgpu_dma_buf_create_obj(struct drm_device *dev, struct dma_buf *dma_buf)
386 struct dma_resv *resv = dma_buf->resv;
387 struct amdgpu_device *adev = dev->dev_private;
388 struct amdgpu_bo *bo;
389 struct amdgpu_bo_param bp;
392 memset(&bp, 0, sizeof(bp));
393 bp.size = dma_buf->size;
394 bp.byte_align = PAGE_SIZE;
395 bp.domain = AMDGPU_GEM_DOMAIN_CPU;
397 bp.type = ttm_bo_type_sg;
399 dma_resv_lock(resv, NULL);
400 ret = amdgpu_bo_create(adev, &bp, &bo);
404 bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
405 bo->preferred_domains = AMDGPU_GEM_DOMAIN_GTT;
406 if (dma_buf->ops != &amdgpu_dmabuf_ops)
407 bo->prime_shared_count = 1;
409 dma_resv_unlock(resv);
410 return &bo->tbo.base;
413 dma_resv_unlock(resv);
418 * amdgpu_gem_prime_import - &drm_driver.gem_prime_import implementation
420 * @dma_buf: Shared DMA buffer
422 * Import a dma_buf into a the driver and potentially create a new GEM object.
425 * GEM BO representing the shared DMA buffer for the given device.
427 struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
428 struct dma_buf *dma_buf)
430 struct dma_buf_attachment *attach;
431 struct drm_gem_object *obj;
433 if (dma_buf->ops == &amdgpu_dmabuf_ops) {
435 if (obj->dev == dev) {
437 * Importing dmabuf exported from out own gem increases
438 * refcount on gem itself instead of f_count of dmabuf.
440 drm_gem_object_get(obj);
445 obj = amdgpu_dma_buf_create_obj(dev, dma_buf);
449 attach = dma_buf_dynamic_attach(dma_buf, dev->dev, true);
450 if (IS_ERR(attach)) {
451 drm_gem_object_put(obj);
452 return ERR_CAST(attach);
455 get_dma_buf(dma_buf);
456 obj->import_attach = attach;