1 // SPDX-License-Identifier: GPL-2.0
3 * Primary to Sideband (P2SB) bridge access support
5 * Copyright (c) 2017, 2021-2022 Intel Corporation.
11 #include <linux/bits.h>
12 #include <linux/export.h>
13 #include <linux/pci.h>
14 #include <linux/platform_data/x86/p2sb.h>
16 #include <asm/cpu_device_id.h>
17 #include <asm/intel-family.h>
20 #define P2SBC_HIDE BIT(8)
22 static const struct x86_cpu_id p2sb_cpu_ids[] = {
23 X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, PCI_DEVFN(13, 0)),
24 X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, PCI_DEVFN(31, 1)),
25 X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, PCI_DEVFN(31, 1)),
26 X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, PCI_DEVFN(31, 1)),
27 X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, PCI_DEVFN(31, 1)),
28 X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, PCI_DEVFN(31, 1)),
29 X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, PCI_DEVFN(31, 1)),
33 static int p2sb_get_devfn(unsigned int *devfn)
35 const struct x86_cpu_id *id;
37 id = x86_match_cpu(p2sb_cpu_ids);
41 *devfn = (unsigned int)id->driver_data;
45 /* Copy resource from the first BAR of the device in question */
46 static int p2sb_read_bar0(struct pci_dev *pdev, struct resource *mem)
48 struct resource *bar0 = &pdev->resource[0];
50 /* Make sure we have no dangling pointers in the output */
51 memset(mem, 0, sizeof(*mem));
54 * We copy only selected fields from the original resource.
55 * Because a PCI device will be removed soon, we may not use
56 * any allocated data, hence we may not copy any pointers.
58 mem->start = bar0->start;
60 mem->flags = bar0->flags;
61 mem->desc = bar0->desc;
66 static int p2sb_scan_and_read(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
71 pdev = pci_scan_single_device(bus, devfn);
75 ret = p2sb_read_bar0(pdev, mem);
77 pci_stop_and_remove_bus_device(pdev);
82 * p2sb_bar - Get Primary to Sideband (P2SB) bridge device BAR
83 * @bus: PCI bus to communicate with
84 * @devfn: PCI slot and function to communicate with
85 * @mem: memory resource to be filled in
87 * The BIOS prevents the P2SB device from being enumerated by the PCI
88 * subsystem, so we need to unhide and hide it back to lookup the BAR.
90 * if @bus is NULL, the bus 0 in domain 0 will be used.
91 * If @devfn is 0, it will be replaced by devfn of the P2SB device.
93 * Caller must provide a valid pointer to @mem.
95 * Locking is handled by pci_rescan_remove_lock mutex.
98 * 0 on success or appropriate errno value on error.
100 int p2sb_bar(struct pci_bus *bus, unsigned int devfn, struct resource *mem)
102 struct pci_dev *pdev_p2sb;
103 unsigned int devfn_p2sb;
104 u32 value = P2SBC_HIDE;
107 /* Get devfn for P2SB device itself */
108 ret = p2sb_get_devfn(&devfn_p2sb);
112 /* if @bus is NULL, use bus 0 in domain 0 */
113 bus = bus ?: pci_find_bus(0, 0);
116 * Prevent concurrent PCI bus scan from seeing the P2SB device and
117 * removing via sysfs while it is temporarily exposed.
119 pci_lock_rescan_remove();
121 /* Unhide the P2SB device, if needed */
122 pci_bus_read_config_dword(bus, devfn_p2sb, P2SBC, &value);
123 if (value & P2SBC_HIDE)
124 pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, 0);
126 pdev_p2sb = pci_scan_single_device(bus, devfn_p2sb);
128 ret = p2sb_scan_and_read(bus, devfn, mem);
130 ret = p2sb_read_bar0(pdev_p2sb, mem);
131 pci_stop_and_remove_bus_device(pdev_p2sb);
133 /* Hide the P2SB device, if it was hidden */
134 if (value & P2SBC_HIDE)
135 pci_bus_write_config_dword(bus, devfn_p2sb, P2SBC, P2SBC_HIDE);
137 pci_unlock_rescan_remove();
147 EXPORT_SYMBOL_GPL(p2sb_bar);