2 * Freescale SPI/eSPI controller driver library.
4 * Maintainer: Kumar Gala
6 * Copyright (C) 2006 Polycom, Inc.
8 * CPM SPI and QE buffer descriptors mode support:
9 * Copyright (c) 2009 MontaVista Software, Inc.
12 * Copyright 2010 Freescale Semiconductor, Inc.
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
19 #include <linux/dma-mapping.h>
20 #include <linux/fsl_devices.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
24 #include <linux/of_platform.h>
25 #include <linux/spi/spi.h>
27 #include <sysdev/fsl_soc.h>
30 #include "spi-fsl-lib.h"
32 #define MPC8XXX_SPI_RX_BUF(type) \
33 void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
35 type *rx = mpc8xxx_spi->rx; \
36 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
37 mpc8xxx_spi->rx = rx; \
40 #define MPC8XXX_SPI_TX_BUF(type) \
41 u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
44 const type *tx = mpc8xxx_spi->tx; \
47 data = *tx++ << mpc8xxx_spi->tx_shift; \
48 mpc8xxx_spi->tx = tx; \
52 MPC8XXX_SPI_RX_BUF(u8)
53 MPC8XXX_SPI_RX_BUF(u16)
54 MPC8XXX_SPI_RX_BUF(u32)
55 MPC8XXX_SPI_TX_BUF(u8)
56 MPC8XXX_SPI_TX_BUF(u16)
57 MPC8XXX_SPI_TX_BUF(u32)
59 struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
61 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
64 static void mpc8xxx_spi_work(struct work_struct *work)
66 struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
69 spin_lock_irq(&mpc8xxx_spi->lock);
70 while (!list_empty(&mpc8xxx_spi->queue)) {
71 struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
72 struct spi_message, queue);
74 list_del_init(&m->queue);
75 spin_unlock_irq(&mpc8xxx_spi->lock);
77 if (mpc8xxx_spi->spi_do_one_msg)
78 mpc8xxx_spi->spi_do_one_msg(m);
80 spin_lock_irq(&mpc8xxx_spi->lock);
82 spin_unlock_irq(&mpc8xxx_spi->lock);
85 int mpc8xxx_spi_transfer(struct spi_device *spi,
86 struct spi_message *m)
88 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
92 m->status = -EINPROGRESS;
94 spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
95 list_add_tail(&m->queue, &mpc8xxx_spi->queue);
96 queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
97 spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
102 const char *mpc8xxx_spi_strmode(unsigned int flags)
104 if (flags & SPI_QE_CPU_MODE) {
106 } else if (flags & SPI_CPM_MODE) {
109 else if (flags & SPI_CPM2)
117 int mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
120 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
121 struct spi_master *master;
122 struct mpc8xxx_spi *mpc8xxx_spi;
125 master = dev_get_drvdata(dev);
127 /* the spi->mode bits understood by this driver: */
128 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
129 | SPI_LSB_FIRST | SPI_LOOP;
131 master->transfer = mpc8xxx_spi_transfer;
132 master->dev.of_node = dev->of_node;
134 mpc8xxx_spi = spi_master_get_devdata(master);
135 mpc8xxx_spi->dev = dev;
136 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
137 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
138 mpc8xxx_spi->flags = pdata->flags;
139 mpc8xxx_spi->spibrg = pdata->sysclk;
140 mpc8xxx_spi->irq = irq;
142 mpc8xxx_spi->rx_shift = 0;
143 mpc8xxx_spi->tx_shift = 0;
145 init_completion(&mpc8xxx_spi->done);
147 master->bus_num = pdata->bus_num;
148 master->num_chipselect = pdata->max_chipselect;
150 spin_lock_init(&mpc8xxx_spi->lock);
151 init_completion(&mpc8xxx_spi->done);
152 INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
153 INIT_LIST_HEAD(&mpc8xxx_spi->queue);
155 mpc8xxx_spi->workqueue = create_singlethread_workqueue(
156 dev_name(master->dev.parent));
157 if (mpc8xxx_spi->workqueue == NULL) {
168 int mpc8xxx_spi_remove(struct device *dev)
170 struct mpc8xxx_spi *mpc8xxx_spi;
171 struct spi_master *master;
173 master = dev_get_drvdata(dev);
174 mpc8xxx_spi = spi_master_get_devdata(master);
176 flush_workqueue(mpc8xxx_spi->workqueue);
177 destroy_workqueue(mpc8xxx_spi->workqueue);
178 spi_unregister_master(master);
180 free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
182 if (mpc8xxx_spi->spi_remove)
183 mpc8xxx_spi->spi_remove(mpc8xxx_spi);
188 int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
190 struct device *dev = &ofdev->dev;
191 struct device_node *np = ofdev->dev.of_node;
192 struct mpc8xxx_spi_probe_info *pinfo;
193 struct fsl_spi_platform_data *pdata;
197 pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
201 pdata = &pinfo->pdata;
202 dev->platform_data = pdata;
204 /* Allocate bus num dynamically. */
207 #ifdef CONFIG_FSL_SOC
208 /* SPI controller is either clocked from QE or SoC clock. */
209 pdata->sysclk = get_brgfreq();
210 if (pdata->sysclk == -1) {
211 pdata->sysclk = fsl_get_sys_freq();
212 if (pdata->sysclk == -1)
216 ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
221 prop = of_get_property(np, "mode", NULL);
222 if (prop && !strcmp(prop, "cpu-qe"))
223 pdata->flags = SPI_QE_CPU_MODE;
224 else if (prop && !strcmp(prop, "qe"))
225 pdata->flags = SPI_CPM_MODE | SPI_QE;
226 else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
227 pdata->flags = SPI_CPM_MODE | SPI_CPM2;
228 else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
229 pdata->flags = SPI_CPM_MODE | SPI_CPM1;