1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Analog Devices 1889 audio driver
4 * This is a driver for the AD1889 PCI audio chipset found
5 * on the HP PA-RISC [BCJ]-xxx0 workstations.
12 * Do we need to take care of CCS register?
13 * Maybe we could use finer grained locking (separate locks for pb/cap)?
15 * Control Interface (mixer) support
16 * Better AC97 support (VSR...)?
20 * SG DMA support (this will need *a lot* of work)
23 #include <linux/init.h>
24 #include <linux/pci.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/compiler.h>
29 #include <linux/delay.h>
30 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/pcm.h>
35 #include <sound/initval.h>
36 #include <sound/ac97_codec.h>
39 #include "ac97/ac97_id.h"
41 #define AD1889_DRVVER "Version: 1.7"
44 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
45 MODULE_LICENSE("GPL");
46 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
48 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
49 module_param_array(index, int, NULL, 0444);
50 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
52 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
53 module_param_array(id, charp, NULL, 0444);
54 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
56 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
57 module_param_array(enable, bool, NULL, 0444);
58 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
60 static char *ac97_quirk[SNDRV_CARDS];
61 module_param_array(ac97_quirk, charp, NULL, 0444);
62 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
64 #define DEVNAME "ad1889"
65 #define PFX DEVNAME ": "
67 /* keep track of some hw registers */
68 struct ad1889_register_state {
69 u16 reg; /* reg setup */
70 u32 addr; /* dma base address */
71 unsigned long size; /* DMA buffer size */
75 struct snd_card *card;
82 struct snd_ac97 *ac97;
83 struct snd_ac97_bus *ac97_bus;
85 struct snd_info_entry *proc;
87 struct snd_pcm_substream *psubs;
88 struct snd_pcm_substream *csubs;
90 /* playback register state */
91 struct ad1889_register_state wave;
92 struct ad1889_register_state ramc;
98 ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
100 return readw(chip->iobase + reg);
104 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
106 writew(val, chip->iobase + reg);
110 ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
112 return readl(chip->iobase + reg);
116 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
118 writel(val, chip->iobase + reg);
122 ad1889_unmute(struct snd_ad1889 *chip)
125 st = ad1889_readw(chip, AD_DS_WADA) &
126 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
127 ad1889_writew(chip, AD_DS_WADA, st);
128 ad1889_readw(chip, AD_DS_WADA);
132 ad1889_mute(struct snd_ad1889 *chip)
135 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
136 ad1889_writew(chip, AD_DS_WADA, st);
137 ad1889_readw(chip, AD_DS_WADA);
141 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
143 ad1889_writel(chip, AD_DMA_ADCBA, address);
144 ad1889_writel(chip, AD_DMA_ADCCA, address);
148 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
150 ad1889_writel(chip, AD_DMA_ADCBC, count);
151 ad1889_writel(chip, AD_DMA_ADCCC, count);
155 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
157 ad1889_writel(chip, AD_DMA_ADCIB, count);
158 ad1889_writel(chip, AD_DMA_ADCIC, count);
162 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
164 ad1889_writel(chip, AD_DMA_WAVBA, address);
165 ad1889_writel(chip, AD_DMA_WAVCA, address);
169 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
171 ad1889_writel(chip, AD_DMA_WAVBC, count);
172 ad1889_writel(chip, AD_DMA_WAVCC, count);
176 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
178 ad1889_writel(chip, AD_DMA_WAVIB, count);
179 ad1889_writel(chip, AD_DMA_WAVIC, count);
183 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
187 if (channel & AD_CHAN_WAV) {
188 /* Disable wave channel */
189 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
190 ad1889_writew(chip, AD_DS_WSMC, reg);
191 chip->wave.reg = reg;
194 reg = ad1889_readw(chip, AD_DMA_WAV);
195 reg &= AD_DMA_IM_DIS;
197 ad1889_writew(chip, AD_DMA_WAV, reg);
199 /* clear IRQ and address counters and pointers */
200 ad1889_load_wave_buffer_address(chip, 0x0);
201 ad1889_load_wave_buffer_count(chip, 0x0);
202 ad1889_load_wave_interrupt_count(chip, 0x0);
205 ad1889_readw(chip, AD_DMA_WAV);
208 if (channel & AD_CHAN_ADC) {
209 /* Disable ADC channel */
210 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
211 ad1889_writew(chip, AD_DS_RAMC, reg);
212 chip->ramc.reg = reg;
214 reg = ad1889_readw(chip, AD_DMA_ADC);
215 reg &= AD_DMA_IM_DIS;
217 ad1889_writew(chip, AD_DMA_ADC, reg);
219 ad1889_load_adc_buffer_address(chip, 0x0);
220 ad1889_load_adc_buffer_count(chip, 0x0);
221 ad1889_load_adc_interrupt_count(chip, 0x0);
224 ad1889_readw(chip, AD_DMA_ADC);
229 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
231 struct snd_ad1889 *chip = ac97->private_data;
232 return ad1889_readw(chip, AD_AC97_BASE + reg);
236 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
238 struct snd_ad1889 *chip = ac97->private_data;
239 ad1889_writew(chip, AD_AC97_BASE + reg, val);
243 snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
245 int retry = 400; /* average needs 352 msec */
247 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
249 usleep_range(1000, 2000);
251 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
255 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
260 static const struct snd_pcm_hardware snd_ad1889_playback_hw = {
261 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
262 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
263 .formats = SNDRV_PCM_FMTBIT_S16_LE,
264 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
265 .rate_min = 8000, /* docs say 7000, but we're lazy */
269 .buffer_bytes_max = BUFFER_BYTES_MAX,
270 .period_bytes_min = PERIOD_BYTES_MIN,
271 .period_bytes_max = PERIOD_BYTES_MAX,
272 .periods_min = PERIODS_MIN,
273 .periods_max = PERIODS_MAX,
277 static const struct snd_pcm_hardware snd_ad1889_capture_hw = {
278 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
279 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
280 .formats = SNDRV_PCM_FMTBIT_S16_LE,
281 .rates = SNDRV_PCM_RATE_48000,
282 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
286 .buffer_bytes_max = BUFFER_BYTES_MAX,
287 .period_bytes_min = PERIOD_BYTES_MIN,
288 .period_bytes_max = PERIOD_BYTES_MAX,
289 .periods_min = PERIODS_MIN,
290 .periods_max = PERIODS_MAX,
295 snd_ad1889_playback_open(struct snd_pcm_substream *ss)
297 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
298 struct snd_pcm_runtime *rt = ss->runtime;
301 rt->hw = snd_ad1889_playback_hw;
307 snd_ad1889_capture_open(struct snd_pcm_substream *ss)
309 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
310 struct snd_pcm_runtime *rt = ss->runtime;
313 rt->hw = snd_ad1889_capture_hw;
319 snd_ad1889_playback_close(struct snd_pcm_substream *ss)
321 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
327 snd_ad1889_capture_close(struct snd_pcm_substream *ss)
329 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
335 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
337 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
338 struct snd_pcm_runtime *rt = ss->runtime;
339 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
340 unsigned int count = snd_pcm_lib_period_bytes(ss);
343 ad1889_channel_reset(chip, AD_CHAN_WAV);
345 reg = ad1889_readw(chip, AD_DS_WSMC);
347 /* Mask out 16-bit / Stereo */
348 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
350 if (snd_pcm_format_width(rt->format) == 16)
351 reg |= AD_DS_WSMC_WA16;
353 if (rt->channels > 1)
354 reg |= AD_DS_WSMC_WAST;
356 /* let's make sure we don't clobber ourselves */
357 spin_lock_irq(&chip->lock);
359 chip->wave.size = size;
360 chip->wave.reg = reg;
361 chip->wave.addr = rt->dma_addr;
363 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
365 /* Set sample rates on the codec */
366 ad1889_writew(chip, AD_DS_WAS, rt->rate);
369 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
370 ad1889_load_wave_buffer_count(chip, size);
371 ad1889_load_wave_interrupt_count(chip, count);
374 ad1889_readw(chip, AD_DS_WSMC);
376 spin_unlock_irq(&chip->lock);
378 dev_dbg(chip->card->dev,
379 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
380 chip->wave.addr, count, size, reg, rt->rate);
385 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
387 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
388 struct snd_pcm_runtime *rt = ss->runtime;
389 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
390 unsigned int count = snd_pcm_lib_period_bytes(ss);
393 ad1889_channel_reset(chip, AD_CHAN_ADC);
395 reg = ad1889_readw(chip, AD_DS_RAMC);
397 /* Mask out 16-bit / Stereo */
398 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
400 if (snd_pcm_format_width(rt->format) == 16)
401 reg |= AD_DS_RAMC_AD16;
403 if (rt->channels > 1)
404 reg |= AD_DS_RAMC_ADST;
406 /* let's make sure we don't clobber ourselves */
407 spin_lock_irq(&chip->lock);
409 chip->ramc.size = size;
410 chip->ramc.reg = reg;
411 chip->ramc.addr = rt->dma_addr;
413 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
416 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
417 ad1889_load_adc_buffer_count(chip, size);
418 ad1889_load_adc_interrupt_count(chip, count);
421 ad1889_readw(chip, AD_DS_RAMC);
423 spin_unlock_irq(&chip->lock);
425 dev_dbg(chip->card->dev,
426 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
427 chip->ramc.addr, count, size, reg, rt->rate);
431 /* this is called in atomic context with IRQ disabled.
432 Must be as fast as possible and not sleep.
433 DMA should be *triggered* by this call.
434 The WSMC "WAEN" bit triggers DMA Wave On/Off */
436 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
439 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
441 wsmc = ad1889_readw(chip, AD_DS_WSMC);
444 case SNDRV_PCM_TRIGGER_START:
445 /* enable DMA loop & interrupts */
446 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
447 wsmc |= AD_DS_WSMC_WAEN;
448 /* 1 to clear CHSS bit */
449 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
452 case SNDRV_PCM_TRIGGER_STOP:
454 wsmc &= ~AD_DS_WSMC_WAEN;
461 chip->wave.reg = wsmc;
462 ad1889_writew(chip, AD_DS_WSMC, wsmc);
463 ad1889_readw(chip, AD_DS_WSMC); /* flush */
465 /* reset the chip when STOP - will disable IRQs */
466 if (cmd == SNDRV_PCM_TRIGGER_STOP)
467 ad1889_channel_reset(chip, AD_CHAN_WAV);
472 /* this is called in atomic context with IRQ disabled.
473 Must be as fast as possible and not sleep.
474 DMA should be *triggered* by this call.
475 The RAMC "ADEN" bit triggers DMA ADC On/Off */
477 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
480 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
482 ramc = ad1889_readw(chip, AD_DS_RAMC);
485 case SNDRV_PCM_TRIGGER_START:
486 /* enable DMA loop & interrupts */
487 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
488 ramc |= AD_DS_RAMC_ADEN;
489 /* 1 to clear CHSS bit */
490 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
492 case SNDRV_PCM_TRIGGER_STOP:
493 ramc &= ~AD_DS_RAMC_ADEN;
499 chip->ramc.reg = ramc;
500 ad1889_writew(chip, AD_DS_RAMC, ramc);
501 ad1889_readw(chip, AD_DS_RAMC); /* flush */
503 /* reset the chip when STOP - will disable IRQs */
504 if (cmd == SNDRV_PCM_TRIGGER_STOP)
505 ad1889_channel_reset(chip, AD_CHAN_ADC);
510 /* Called in atomic context with IRQ disabled */
511 static snd_pcm_uframes_t
512 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
515 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
517 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
520 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
521 ptr -= chip->wave.addr;
523 if (snd_BUG_ON(ptr >= chip->wave.size))
526 return bytes_to_frames(ss->runtime, ptr);
529 /* Called in atomic context with IRQ disabled */
530 static snd_pcm_uframes_t
531 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
534 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
536 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
539 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
540 ptr -= chip->ramc.addr;
542 if (snd_BUG_ON(ptr >= chip->ramc.size))
545 return bytes_to_frames(ss->runtime, ptr);
548 static const struct snd_pcm_ops snd_ad1889_playback_ops = {
549 .open = snd_ad1889_playback_open,
550 .close = snd_ad1889_playback_close,
551 .prepare = snd_ad1889_playback_prepare,
552 .trigger = snd_ad1889_playback_trigger,
553 .pointer = snd_ad1889_playback_pointer,
556 static const struct snd_pcm_ops snd_ad1889_capture_ops = {
557 .open = snd_ad1889_capture_open,
558 .close = snd_ad1889_capture_close,
559 .prepare = snd_ad1889_capture_prepare,
560 .trigger = snd_ad1889_capture_trigger,
561 .pointer = snd_ad1889_capture_pointer,
565 snd_ad1889_interrupt(int irq, void *dev_id)
568 struct snd_ad1889 *chip = dev_id;
570 st = ad1889_readl(chip, AD_DMA_DISR);
573 ad1889_writel(chip, AD_DMA_DISR, st);
580 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
581 dev_dbg(chip->card->dev,
582 "Unexpected master or target abort interrupt!\n");
584 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
585 snd_pcm_period_elapsed(chip->psubs);
586 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
587 snd_pcm_period_elapsed(chip->csubs);
593 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
598 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
602 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
603 &snd_ad1889_playback_ops);
604 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
605 &snd_ad1889_capture_ops);
607 pcm->private_data = chip;
609 strcpy(pcm->name, chip->card->shortname);
615 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
616 BUFFER_BYTES_MAX / 2, BUFFER_BYTES_MAX);
622 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
624 struct snd_ad1889 *chip = entry->private_data;
628 reg = ad1889_readw(chip, AD_DS_WSMC);
629 snd_iprintf(buffer, "Wave output: %s\n",
630 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
631 snd_iprintf(buffer, "Wave Channels: %s\n",
632 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
633 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
634 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
636 /* WARQ is at offset 12 */
637 tmp = (reg & AD_DS_WSMC_WARQ) ?
638 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
639 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
641 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
642 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
645 snd_iprintf(buffer, "Synthesis output: %s\n",
646 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
648 /* SYRQ is at offset 4 */
649 tmp = (reg & AD_DS_WSMC_SYRQ) ?
650 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
651 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
653 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
654 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
656 reg = ad1889_readw(chip, AD_DS_RAMC);
657 snd_iprintf(buffer, "ADC input: %s\n",
658 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
659 snd_iprintf(buffer, "ADC Channels: %s\n",
660 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
661 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
662 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
664 /* ACRQ is at offset 4 */
665 tmp = (reg & AD_DS_RAMC_ACRQ) ?
666 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
667 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
669 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
670 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
672 snd_iprintf(buffer, "Resampler input: %s\n",
673 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
675 /* RERQ is at offset 12 */
676 tmp = (reg & AD_DS_RAMC_RERQ) ?
677 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
678 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
680 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
681 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
684 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
685 suggests that LSB is -3dB, which is more coherent with the logarithmic
686 nature of the dB scale */
687 reg = ad1889_readw(chip, AD_DS_WADA);
688 snd_iprintf(buffer, "Left: %s, -%d dB\n",
689 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
690 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
691 reg = ad1889_readw(chip, AD_DS_WADA);
692 snd_iprintf(buffer, "Right: %s, -%d dB\n",
693 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
694 (reg & AD_DS_WADA_RWAA) * 3);
696 reg = ad1889_readw(chip, AD_DS_WAS);
697 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
698 reg = ad1889_readw(chip, AD_DS_RES);
699 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
703 snd_ad1889_proc_init(struct snd_ad1889 *chip)
705 snd_card_ro_proc_new(chip->card, chip->card->driver,
706 chip, snd_ad1889_proc_read);
709 static const struct ac97_quirk ac97_quirks[] = {
711 .subvendor = 0x11d4, /* AD */
712 .subdevice = 0x1889, /* AD1889 */
713 .codec_id = AC97_ID_AD1819,
715 .type = AC97_TUNE_HP_ONLY
721 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
725 reg = ad1889_readw(chip, AD_AC97_ACIC);
726 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
727 ad1889_writew(chip, AD_AC97_ACIC, reg);
728 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
730 /* Interface Enable */
731 reg |= AD_AC97_ACIC_ACIE;
732 ad1889_writew(chip, AD_AC97_ACIC, reg);
734 snd_ad1889_ac97_ready(chip);
736 /* Audio Stream Output | Variable Sample Rate Mode */
737 reg = ad1889_readw(chip, AD_AC97_ACIC);
738 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
739 ad1889_writew(chip, AD_AC97_ACIC, reg);
740 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
745 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
747 struct snd_ad1889 *chip = bus->private_data;
748 chip->ac97_bus = NULL;
752 snd_ad1889_ac97_free(struct snd_ac97 *ac97)
754 struct snd_ad1889 *chip = ac97->private_data;
759 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
762 struct snd_ac97_template ac97;
763 static const struct snd_ac97_bus_ops ops = {
764 .write = snd_ad1889_ac97_write,
765 .read = snd_ad1889_ac97_read,
768 /* doing that here, it works. */
769 snd_ad1889_ac97_xinit(chip);
771 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
775 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
777 memset(&ac97, 0, sizeof(ac97));
778 ac97.private_data = chip;
779 ac97.private_free = snd_ad1889_ac97_free;
780 ac97.pci = chip->pci;
782 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
786 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
792 snd_ad1889_free(struct snd_ad1889 *chip)
797 spin_lock_irq(&chip->lock);
801 /* Turn off interrupt on count and zero DMA registers */
802 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
804 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
805 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
806 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
808 spin_unlock_irq(&chip->lock);
811 free_irq(chip->irq, chip);
814 iounmap(chip->iobase);
815 pci_release_regions(chip->pci);
816 pci_disable_device(chip->pci);
822 snd_ad1889_dev_free(struct snd_device *device)
824 struct snd_ad1889 *chip = device->device_data;
825 return snd_ad1889_free(chip);
829 snd_ad1889_init(struct snd_ad1889 *chip)
831 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
832 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
834 usleep_range(10000, 11000);
836 /* enable Master and Target abort interrupts */
837 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
843 snd_ad1889_create(struct snd_card *card,
845 struct snd_ad1889 **rchip)
849 struct snd_ad1889 *chip;
850 static const struct snd_device_ops ops = {
851 .dev_free = snd_ad1889_dev_free,
856 if ((err = pci_enable_device(pci)) < 0)
859 /* check PCI availability (32bit DMA) */
860 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 ||
861 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) {
862 dev_err(card->dev, "error setting 32-bit DMA mask.\n");
863 pci_disable_device(pci);
867 /* allocate chip specific data with zero-filled memory */
868 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
869 pci_disable_device(pci);
874 card->private_data = chip;
878 /* (1) PCI resource allocation */
879 if ((err = pci_request_regions(pci, card->driver)) < 0)
882 chip->bar = pci_resource_start(pci, 0);
883 chip->iobase = pci_ioremap_bar(pci, 0);
884 if (chip->iobase == NULL) {
885 dev_err(card->dev, "unable to reserve region.\n");
892 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
894 if (request_irq(pci->irq, snd_ad1889_interrupt,
895 IRQF_SHARED, KBUILD_MODNAME, chip)) {
896 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
897 snd_ad1889_free(chip);
901 chip->irq = pci->irq;
902 card->sync_irq = chip->irq;
904 /* (2) initialization of the chip hardware */
905 if ((err = snd_ad1889_init(chip)) < 0) {
906 snd_ad1889_free(chip);
910 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
911 snd_ad1889_free(chip);
921 pci_disable_device(pci);
927 snd_ad1889_probe(struct pci_dev *pci,
928 const struct pci_device_id *pci_id)
932 struct snd_card *card;
933 struct snd_ad1889 *chip;
936 if (devno >= SNDRV_CARDS)
938 if (!enable[devno]) {
944 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
946 /* XXX REVISIT: we can probably allocate chip in this call */
950 strcpy(card->driver, "AD1889");
951 strcpy(card->shortname, "Analog Devices AD1889");
954 err = snd_ad1889_create(card, pci, &chip);
959 sprintf(card->longname, "%s at 0x%lx irq %i",
960 card->shortname, chip->bar, chip->irq);
963 /* register AC97 mixer */
964 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
968 err = snd_ad1889_pcm_init(chip, 0);
972 /* register proc interface */
973 snd_ad1889_proc_init(chip);
976 err = snd_card_register(card);
981 pci_set_drvdata(pci, card);
992 snd_ad1889_remove(struct pci_dev *pci)
994 snd_card_free(pci_get_drvdata(pci));
997 static const struct pci_device_id snd_ad1889_ids[] = {
998 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1001 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1003 static struct pci_driver ad1889_pci_driver = {
1004 .name = KBUILD_MODNAME,
1005 .id_table = snd_ad1889_ids,
1006 .probe = snd_ad1889_probe,
1007 .remove = snd_ad1889_remove,
1010 module_pci_driver(ad1889_pci_driver);