drivers/misc/cardreader/rts5209.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /* Driver for Realtek PCI-Express card reader
   3  *
   4  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   5  *
   6  * Author:
   7  *   Wei WANG <[email protected]>
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/delay.h>
  12 #include <linux/rtsx_pci.h>
  13
  14 #include "rtsx_pcr.h"
  15
  16 static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr)
  17 {
  18         u8 val;
  19
  20         val = rtsx_pci_readb(pcr, 0x1C);
  21         return val & 0x0F;
  22 }
  23
  24 static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
  25 {
  26         u32 reg;
  27
  28         rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
  29         pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
  30
  31         if (rts5209_vendor_setting1_valid(reg)) {
  32                 if (rts5209_reg_check_ms_pmos(reg))
  33                         pcr->flags |= PCR_MS_PMOS;
  34                 pcr->aspm_en = rts5209_reg_to_aspm(reg);
  35         }
  36
  37         rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
  38         pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
  39
  40         if (rts5209_vendor_setting2_valid(reg)) {
  41                 pcr->sd30_drive_sel_1v8 =
  42                         rts5209_reg_to_sd30_drive_sel_1v8(reg);
  43                 pcr->sd30_drive_sel_3v3 =
  44                         rts5209_reg_to_sd30_drive_sel_3v3(reg);
  45                 pcr->card_drive_sel = rts5209_reg_to_card_drive_sel(reg);
  46         }
  47 }
  48
  49 static void rts5209_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
  50 {
  51         rtsx_pci_write_register(pcr, FPDCTL, 0x07, 0x07);
  52 }
  53
  54 static int rts5209_extra_init_hw(struct rtsx_pcr *pcr)
  55 {
  56         rtsx_pci_init_cmd(pcr);
  57
  58         /* Turn off LED */
  59         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03);
  60         /* Reset ASPM state to default value */
  61         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
  62         /* Force CLKREQ# PIN to drive 0 to request clock */
  63         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
  64         /* Configure GPIO as output */
  65         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03);
  66         /* Configure driving */
  67         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
  68                         0xFF, pcr->sd30_drive_sel_3v3);
  69
  70         return rtsx_pci_send_cmd(pcr, 100);
  71 }
  72
  73 static int rts5209_optimize_phy(struct rtsx_pcr *pcr)
  74 {
  75         return rtsx_pci_write_phy_register(pcr, 0x00, 0xB966);
  76 }
  77
  78 static int rts5209_turn_on_led(struct rtsx_pcr *pcr)
  79 {
  80         return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x00);
  81 }
  82
  83 static int rts5209_turn_off_led(struct rtsx_pcr *pcr)
  84 {
  85         return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x01);
  86 }
  87
  88 static int rts5209_enable_auto_blink(struct rtsx_pcr *pcr)
  89 {
  90         return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0xFF, 0x0D);
  91 }
  92
  93 static int rts5209_disable_auto_blink(struct rtsx_pcr *pcr)
  94 {
  95         return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0x08, 0x00);
  96 }
  97
  98 static int rts5209_card_power_on(struct rtsx_pcr *pcr, int card)
  99 {
 100         int err;
 101         u8 pwr_mask, partial_pwr_on, pwr_on;
 102
 103         pwr_mask = SD_POWER_MASK;
 104         partial_pwr_on = SD_PARTIAL_POWER_ON;
 105         pwr_on = SD_POWER_ON;
 106
 107         if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
 108                 pwr_mask = MS_POWER_MASK;
 109                 partial_pwr_on = MS_PARTIAL_POWER_ON;
 110                 pwr_on = MS_POWER_ON;
 111         }
 112
 113         rtsx_pci_init_cmd(pcr);
 114         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 115                         pwr_mask, partial_pwr_on);
 116         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 117                         LDO3318_PWR_MASK, 0x04);
 118         err = rtsx_pci_send_cmd(pcr, 100);
 119         if (err < 0)
 120                 return err;
 121
 122         /* To avoid too large in-rush current */
 123         udelay(150);
 124
 125         rtsx_pci_init_cmd(pcr);
 126         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, pwr_mask, pwr_on);
 127         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 128                         LDO3318_PWR_MASK, 0x00);
 129         return rtsx_pci_send_cmd(pcr, 100);
 130 }
 131
 132 static int rts5209_card_power_off(struct rtsx_pcr *pcr, int card)
 133 {
 134         u8 pwr_mask, pwr_off;
 135
 136         pwr_mask = SD_POWER_MASK;
 137         pwr_off = SD_POWER_OFF;
 138
 139         if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
 140                 pwr_mask = MS_POWER_MASK;
 141                 pwr_off = MS_POWER_OFF;
 142         }
 143
 144         rtsx_pci_init_cmd(pcr);
 145         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 146                         pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA);
 147         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 148                         LDO3318_PWR_MASK, 0x06);
 149         return rtsx_pci_send_cmd(pcr, 100);
 150 }
 151
 152 static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
 153 {
 154         int err;
 155
 156         if (voltage == OUTPUT_3V3) {
 157                 err = rtsx_pci_write_register(pcr,
 158                                 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
 159                 if (err < 0)
 160                         return err;
 161                 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
 162                 if (err < 0)
 163                         return err;
 164         } else if (voltage == OUTPUT_1V8) {
 165                 err = rtsx_pci_write_register(pcr,
 166                                 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
 167                 if (err < 0)
 168                         return err;
 169                 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
 170                 if (err < 0)
 171                         return err;
 172         } else {
 173                 return -EINVAL;
 174         }
 175
 176         return 0;
 177 }
 178
 179 static const struct pcr_ops rts5209_pcr_ops = {
 180         .fetch_vendor_settings = rts5209_fetch_vendor_settings,
 181         .extra_init_hw = rts5209_extra_init_hw,
 182         .optimize_phy = rts5209_optimize_phy,
 183         .turn_on_led = rts5209_turn_on_led,
 184         .turn_off_led = rts5209_turn_off_led,
 185         .enable_auto_blink = rts5209_enable_auto_blink,
 186         .disable_auto_blink = rts5209_disable_auto_blink,
 187         .card_power_on = rts5209_card_power_on,
 188         .card_power_off = rts5209_card_power_off,
 189         .switch_output_voltage = rts5209_switch_output_voltage,
 190         .cd_deglitch = NULL,
 191         .conv_clk_and_div_n = NULL,
 192         .force_power_down = rts5209_force_power_down,
 193 };
 194
 195 /* SD Pull Control Enable:
 196  *     SD_DAT[3:0] ==> pull up
 197  *     SD_CD       ==> pull up
 198  *     SD_WP       ==> pull up
 199  *     SD_CMD      ==> pull up
 200  *     SD_CLK      ==> pull down
 201  */
 202 static const u32 rts5209_sd_pull_ctl_enable_tbl[] = {
 203         RTSX_REG_PAIR(CARD_PULL_CTL1, 0xAA),
 204         RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
 205         RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
 206         0,
 207 };
 208
 209 /* SD Pull Control Disable:
 210  *     SD_DAT[3:0] ==> pull down
 211  *     SD_CD       ==> pull up
 212  *     SD_WP       ==> pull down
 213  *     SD_CMD      ==> pull down
 214  *     SD_CLK      ==> pull down
 215  */
 216 static const u32 rts5209_sd_pull_ctl_disable_tbl[] = {
 217         RTSX_REG_PAIR(CARD_PULL_CTL1, 0x55),
 218         RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
 219         RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
 220         0,
 221 };
 222
 223 /* MS Pull Control Enable:
 224  *     MS CD       ==> pull up
 225  *     others      ==> pull down
 226  */
 227 static const u32 rts5209_ms_pull_ctl_enable_tbl[] = {
 228         RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
 229         RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
 230         RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
 231         0,
 232 };
 233
 234 /* MS Pull Control Disable:
 235  *     MS CD       ==> pull up
 236  *     others      ==> pull down
 237  */
 238 static const u32 rts5209_ms_pull_ctl_disable_tbl[] = {
 239         RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
 240         RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
 241         RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
 242         0,
 243 };
 244
 245 void rts5209_init_params(struct rtsx_pcr *pcr)
 246 {
 247         pcr->extra_caps = EXTRA_CAPS_SD_SDR50 |
 248                 EXTRA_CAPS_SD_SDR104 | EXTRA_CAPS_MMC_8BIT;
 249         pcr->num_slots = 2;
 250         pcr->ops = &rts5209_pcr_ops;
 251
 252         pcr->flags = 0;
 253         pcr->card_drive_sel = RTS5209_CARD_DRIVE_DEFAULT;
 254         pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
 255         pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
 256         pcr->aspm_en = ASPM_L1_EN;
 257         pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 16);
 258         pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);
 259
 260         pcr->ic_version = rts5209_get_ic_version(pcr);
 261         pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl;
 262         pcr->sd_pull_ctl_disable_tbl = rts5209_sd_pull_ctl_disable_tbl;
 263         pcr->ms_pull_ctl_enable_tbl = rts5209_ms_pull_ctl_enable_tbl;
 264         pcr->ms_pull_ctl_disable_tbl = rts5209_ms_pull_ctl_disable_tbl;
 265 }