1 // SPDX-License-Identifier: GPL-2.0-only
3 * Apple DART (Device Address Resolution Table) IOMMU driver
5 * Copyright (C) 2021 The Asahi Linux Contributors
7 * Based on arm/arm-smmu/arm-ssmu.c and arm/arm-smmu-v3/arm-smmu-v3.c
8 * Copyright (C) 2013 ARM Limited
9 * Copyright (C) 2015 ARM Limited
10 * and on exynos-iommu.c
11 * Copyright (c) 2011,2016 Samsung Electronics Co., Ltd.
14 #include <linux/atomic.h>
15 #include <linux/bitfield.h>
16 #include <linux/clk.h>
17 #include <linux/dev_printk.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/io-pgtable.h>
22 #include <linux/iommu.h>
23 #include <linux/iopoll.h>
24 #include <linux/module.h>
26 #include <linux/of_address.h>
27 #include <linux/of_iommu.h>
28 #include <linux/of_platform.h>
29 #include <linux/pci.h>
30 #include <linux/platform_device.h>
31 #include <linux/slab.h>
32 #include <linux/swab.h>
33 #include <linux/types.h>
35 #include "dma-iommu.h"
37 #define DART_MAX_STREAMS 256
38 #define DART_MAX_TTBR 4
39 #define MAX_DARTS_PER_DEVICE 2
41 /* Common registers */
43 #define DART_PARAMS1 0x00
44 #define DART_PARAMS1_PAGE_SHIFT GENMASK(27, 24)
46 #define DART_PARAMS2 0x04
47 #define DART_PARAMS2_BYPASS_SUPPORT BIT(0)
49 /* T8020/T6000 registers */
51 #define DART_T8020_STREAM_COMMAND 0x20
52 #define DART_T8020_STREAM_COMMAND_BUSY BIT(2)
53 #define DART_T8020_STREAM_COMMAND_INVALIDATE BIT(20)
55 #define DART_T8020_STREAM_SELECT 0x34
57 #define DART_T8020_ERROR 0x40
58 #define DART_T8020_ERROR_STREAM GENMASK(27, 24)
59 #define DART_T8020_ERROR_CODE GENMASK(11, 0)
60 #define DART_T8020_ERROR_FLAG BIT(31)
62 #define DART_T8020_ERROR_READ_FAULT BIT(4)
63 #define DART_T8020_ERROR_WRITE_FAULT BIT(3)
64 #define DART_T8020_ERROR_NO_PTE BIT(2)
65 #define DART_T8020_ERROR_NO_PMD BIT(1)
66 #define DART_T8020_ERROR_NO_TTBR BIT(0)
68 #define DART_T8020_CONFIG 0x60
69 #define DART_T8020_CONFIG_LOCK BIT(15)
71 #define DART_STREAM_COMMAND_BUSY_TIMEOUT 100
73 #define DART_T8020_ERROR_ADDR_HI 0x54
74 #define DART_T8020_ERROR_ADDR_LO 0x50
76 #define DART_T8020_STREAMS_ENABLE 0xfc
78 #define DART_T8020_TCR 0x100
79 #define DART_T8020_TCR_TRANSLATE_ENABLE BIT(7)
80 #define DART_T8020_TCR_BYPASS_DART BIT(8)
81 #define DART_T8020_TCR_BYPASS_DAPF BIT(12)
83 #define DART_T8020_TTBR 0x200
84 #define DART_T8020_TTBR_VALID BIT(31)
85 #define DART_T8020_TTBR_ADDR_FIELD_SHIFT 0
86 #define DART_T8020_TTBR_SHIFT 12
90 #define DART_T8110_PARAMS3 0x08
91 #define DART_T8110_PARAMS3_PA_WIDTH GENMASK(29, 24)
92 #define DART_T8110_PARAMS3_VA_WIDTH GENMASK(21, 16)
93 #define DART_T8110_PARAMS3_VER_MAJ GENMASK(15, 8)
94 #define DART_T8110_PARAMS3_VER_MIN GENMASK(7, 0)
96 #define DART_T8110_PARAMS4 0x0c
97 #define DART_T8110_PARAMS4_NUM_CLIENTS GENMASK(24, 16)
98 #define DART_T8110_PARAMS4_NUM_SIDS GENMASK(8, 0)
100 #define DART_T8110_TLB_CMD 0x80
101 #define DART_T8110_TLB_CMD_BUSY BIT(31)
102 #define DART_T8110_TLB_CMD_OP GENMASK(10, 8)
103 #define DART_T8110_TLB_CMD_OP_FLUSH_ALL 0
104 #define DART_T8110_TLB_CMD_OP_FLUSH_SID 1
105 #define DART_T8110_TLB_CMD_STREAM GENMASK(7, 0)
107 #define DART_T8110_ERROR 0x100
108 #define DART_T8110_ERROR_STREAM GENMASK(27, 20)
109 #define DART_T8110_ERROR_CODE GENMASK(14, 0)
110 #define DART_T8110_ERROR_FLAG BIT(31)
112 #define DART_T8110_ERROR_MASK 0x104
114 #define DART_T8110_ERROR_READ_FAULT BIT(5)
115 #define DART_T8110_ERROR_WRITE_FAULT BIT(4)
116 #define DART_T8110_ERROR_NO_PTE BIT(3)
117 #define DART_T8110_ERROR_NO_PMD BIT(2)
118 #define DART_T8110_ERROR_NO_PGD BIT(1)
119 #define DART_T8110_ERROR_NO_TTBR BIT(0)
121 #define DART_T8110_ERROR_ADDR_LO 0x170
122 #define DART_T8110_ERROR_ADDR_HI 0x174
124 #define DART_T8110_PROTECT 0x200
125 #define DART_T8110_UNPROTECT 0x204
126 #define DART_T8110_PROTECT_LOCK 0x208
127 #define DART_T8110_PROTECT_TTBR_TCR BIT(0)
129 #define DART_T8110_ENABLE_STREAMS 0xc00
130 #define DART_T8110_DISABLE_STREAMS 0xc20
132 #define DART_T8110_TCR 0x1000
133 #define DART_T8110_TCR_REMAP GENMASK(11, 8)
134 #define DART_T8110_TCR_REMAP_EN BIT(7)
135 #define DART_T8110_TCR_BYPASS_DAPF BIT(2)
136 #define DART_T8110_TCR_BYPASS_DART BIT(1)
137 #define DART_T8110_TCR_TRANSLATE_ENABLE BIT(0)
139 #define DART_T8110_TTBR 0x1400
140 #define DART_T8110_TTBR_VALID BIT(0)
141 #define DART_T8110_TTBR_ADDR_FIELD_SHIFT 2
142 #define DART_T8110_TTBR_SHIFT 14
144 #define DART_TCR(dart, sid) ((dart)->hw->tcr + ((sid) << 2))
146 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \
147 (((dart)->hw->ttbr_count * (sid)) << 2) + \
150 struct apple_dart_stream_map;
158 struct apple_dart_hw {
160 irqreturn_t (*irq_handler)(int irq, void *dev);
161 int (*invalidate_tlb)(struct apple_dart_stream_map *stream_map);
164 enum io_pgtable_fmt fmt;
182 u64 ttbr_addr_field_shift;
188 * Private structure associated with each DART device.
190 * @dev: device struct
191 * @hw: SoC-specific hardware data
192 * @regs: mapped MMIO region
193 * @irq: interrupt number, can be shared with other DARTs
194 * @clks: clocks associated with this DART
195 * @num_clks: number of @clks
196 * @lock: lock for hardware operations involving this dart
197 * @pgsize: pagesize supported by this DART
198 * @supports_bypass: indicates if this DART supports bypass mode
199 * @sid2group: maps stream ids to iommu_groups
200 * @iommu: iommu core device
204 const struct apple_dart_hw *hw;
209 struct clk_bulk_data *clks;
218 u32 supports_bypass : 1;
220 struct iommu_group *sid2group[DART_MAX_STREAMS];
221 struct iommu_device iommu;
223 u32 save_tcr[DART_MAX_STREAMS];
224 u32 save_ttbr[DART_MAX_STREAMS][DART_MAX_TTBR];
228 * Convenience struct to identify streams.
230 * The normal variant is used inside apple_dart_master_cfg which isn't written
232 * The atomic variant is used inside apple_dart_domain where we have to guard
233 * against races from potential parallel calls to attach/detach_device.
234 * Note that even inside the atomic variant the apple_dart pointer is not
235 * protected: This pointer is initialized once under the domain init mutex
236 * and never changed again afterwards. Devices with different dart pointers
237 * cannot be attached to the same domain.
240 * @sid stream id bitmap
242 struct apple_dart_stream_map {
243 struct apple_dart *dart;
244 DECLARE_BITMAP(sidmap, DART_MAX_STREAMS);
246 struct apple_dart_atomic_stream_map {
247 struct apple_dart *dart;
248 atomic_long_t sidmap[BITS_TO_LONGS(DART_MAX_STREAMS)];
252 * This structure is attached to each iommu domain handled by a DART.
254 * @pgtbl_ops: pagetable ops allocated by io-pgtable
255 * @finalized: true if the domain has been completely initialized
256 * @init_lock: protects domain initialization
257 * @stream_maps: streams attached to this domain (valid for DMA/UNMANAGED only)
258 * @domain: core iommu domain pointer
260 struct apple_dart_domain {
261 struct io_pgtable_ops *pgtbl_ops;
264 struct mutex init_lock;
265 struct apple_dart_atomic_stream_map stream_maps[MAX_DARTS_PER_DEVICE];
267 struct iommu_domain domain;
271 * This structure is attached to devices with dev_iommu_priv_set() on of_xlate
272 * and contains a list of streams bound to this device.
273 * So far the worst case seen is a single device with two streams
274 * from different darts, such that this simple static array is enough.
276 * @streams: streams for this device
278 struct apple_dart_master_cfg {
279 struct apple_dart_stream_map stream_maps[MAX_DARTS_PER_DEVICE];
283 * Helper macro to iterate over apple_dart_master_cfg.stream_maps and
284 * apple_dart_domain.stream_maps
286 * @i int used as loop variable
287 * @base pointer to base struct (apple_dart_master_cfg or apple_dart_domain)
288 * @stream pointer to the apple_dart_streams struct for each loop iteration
290 #define for_each_stream_map(i, base, stream_map) \
291 for (i = 0, stream_map = &(base)->stream_maps[0]; \
292 i < MAX_DARTS_PER_DEVICE && stream_map->dart; \
293 stream_map = &(base)->stream_maps[++i])
295 static struct platform_driver apple_dart_driver;
296 static const struct iommu_ops apple_dart_iommu_ops;
298 static struct apple_dart_domain *to_dart_domain(struct iommu_domain *dom)
300 return container_of(dom, struct apple_dart_domain, domain);
304 apple_dart_hw_enable_translation(struct apple_dart_stream_map *stream_map)
306 struct apple_dart *dart = stream_map->dart;
309 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
310 writel(dart->hw->tcr_enabled, dart->regs + DART_TCR(dart, sid));
313 static void apple_dart_hw_disable_dma(struct apple_dart_stream_map *stream_map)
315 struct apple_dart *dart = stream_map->dart;
318 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
319 writel(dart->hw->tcr_disabled, dart->regs + DART_TCR(dart, sid));
323 apple_dart_hw_enable_bypass(struct apple_dart_stream_map *stream_map)
325 struct apple_dart *dart = stream_map->dart;
328 WARN_ON(!stream_map->dart->supports_bypass);
329 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
330 writel(dart->hw->tcr_bypass,
331 dart->regs + DART_TCR(dart, sid));
334 static void apple_dart_hw_set_ttbr(struct apple_dart_stream_map *stream_map,
335 u8 idx, phys_addr_t paddr)
337 struct apple_dart *dart = stream_map->dart;
340 WARN_ON(paddr & ((1 << dart->hw->ttbr_shift) - 1));
341 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
342 writel(dart->hw->ttbr_valid |
343 (paddr >> dart->hw->ttbr_shift) << dart->hw->ttbr_addr_field_shift,
344 dart->regs + DART_TTBR(dart, sid, idx));
347 static void apple_dart_hw_clear_ttbr(struct apple_dart_stream_map *stream_map,
350 struct apple_dart *dart = stream_map->dart;
353 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams)
354 writel(0, dart->regs + DART_TTBR(dart, sid, idx));
358 apple_dart_hw_clear_all_ttbrs(struct apple_dart_stream_map *stream_map)
362 for (i = 0; i < stream_map->dart->hw->ttbr_count; ++i)
363 apple_dart_hw_clear_ttbr(stream_map, i);
367 apple_dart_t8020_hw_stream_command(struct apple_dart_stream_map *stream_map,
374 spin_lock_irqsave(&stream_map->dart->lock, flags);
376 writel(stream_map->sidmap[0], stream_map->dart->regs + DART_T8020_STREAM_SELECT);
377 writel(command, stream_map->dart->regs + DART_T8020_STREAM_COMMAND);
379 ret = readl_poll_timeout_atomic(
380 stream_map->dart->regs + DART_T8020_STREAM_COMMAND, command_reg,
381 !(command_reg & DART_T8020_STREAM_COMMAND_BUSY), 1,
382 DART_STREAM_COMMAND_BUSY_TIMEOUT);
384 spin_unlock_irqrestore(&stream_map->dart->lock, flags);
387 dev_err(stream_map->dart->dev,
388 "busy bit did not clear after command %x for streams %lx\n",
389 command, stream_map->sidmap[0]);
397 apple_dart_t8110_hw_tlb_command(struct apple_dart_stream_map *stream_map,
400 struct apple_dart *dart = stream_map->dart;
405 spin_lock_irqsave(&dart->lock, flags);
407 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) {
408 u32 val = FIELD_PREP(DART_T8110_TLB_CMD_OP, command) |
409 FIELD_PREP(DART_T8110_TLB_CMD_STREAM, sid);
410 writel(val, dart->regs + DART_T8110_TLB_CMD);
412 ret = readl_poll_timeout_atomic(
413 dart->regs + DART_T8110_TLB_CMD, val,
414 !(val & DART_T8110_TLB_CMD_BUSY), 1,
415 DART_STREAM_COMMAND_BUSY_TIMEOUT);
422 spin_unlock_irqrestore(&dart->lock, flags);
425 dev_err(stream_map->dart->dev,
426 "busy bit did not clear after command %x for stream %d\n",
435 apple_dart_t8020_hw_invalidate_tlb(struct apple_dart_stream_map *stream_map)
437 return apple_dart_t8020_hw_stream_command(
438 stream_map, DART_T8020_STREAM_COMMAND_INVALIDATE);
442 apple_dart_t8110_hw_invalidate_tlb(struct apple_dart_stream_map *stream_map)
444 return apple_dart_t8110_hw_tlb_command(
445 stream_map, DART_T8110_TLB_CMD_OP_FLUSH_SID);
448 static int apple_dart_hw_reset(struct apple_dart *dart)
451 struct apple_dart_stream_map stream_map;
454 config = readl(dart->regs + dart->hw->lock);
455 if (config & dart->hw->lock_bit) {
456 dev_err(dart->dev, "DART is locked down until reboot: %08x\n",
461 stream_map.dart = dart;
462 bitmap_zero(stream_map.sidmap, DART_MAX_STREAMS);
463 bitmap_set(stream_map.sidmap, 0, dart->num_streams);
464 apple_dart_hw_disable_dma(&stream_map);
465 apple_dart_hw_clear_all_ttbrs(&stream_map);
467 /* enable all streams globally since TCR is used to control isolation */
468 for (i = 0; i < BITS_TO_U32(dart->num_streams); i++)
469 writel(U32_MAX, dart->regs + dart->hw->enable_streams + 4 * i);
471 /* clear any pending errors before the interrupt is unmasked */
472 writel(readl(dart->regs + dart->hw->error), dart->regs + dart->hw->error);
474 if (dart->hw->type == DART_T8110)
475 writel(0, dart->regs + DART_T8110_ERROR_MASK);
477 return dart->hw->invalidate_tlb(&stream_map);
480 static void apple_dart_domain_flush_tlb(struct apple_dart_domain *domain)
483 struct apple_dart_atomic_stream_map *domain_stream_map;
484 struct apple_dart_stream_map stream_map;
486 for_each_stream_map(i, domain, domain_stream_map) {
487 stream_map.dart = domain_stream_map->dart;
489 for (j = 0; j < BITS_TO_LONGS(stream_map.dart->num_streams); j++)
490 stream_map.sidmap[j] = atomic_long_read(&domain_stream_map->sidmap[j]);
492 stream_map.dart->hw->invalidate_tlb(&stream_map);
496 static void apple_dart_flush_iotlb_all(struct iommu_domain *domain)
498 apple_dart_domain_flush_tlb(to_dart_domain(domain));
501 static void apple_dart_iotlb_sync(struct iommu_domain *domain,
502 struct iommu_iotlb_gather *gather)
504 apple_dart_domain_flush_tlb(to_dart_domain(domain));
507 static int apple_dart_iotlb_sync_map(struct iommu_domain *domain,
508 unsigned long iova, size_t size)
510 apple_dart_domain_flush_tlb(to_dart_domain(domain));
514 static phys_addr_t apple_dart_iova_to_phys(struct iommu_domain *domain,
517 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
518 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops;
523 return ops->iova_to_phys(ops, iova);
526 static int apple_dart_map_pages(struct iommu_domain *domain, unsigned long iova,
527 phys_addr_t paddr, size_t pgsize,
528 size_t pgcount, int prot, gfp_t gfp,
531 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
532 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops;
537 return ops->map_pages(ops, iova, paddr, pgsize, pgcount, prot, gfp,
541 static size_t apple_dart_unmap_pages(struct iommu_domain *domain,
542 unsigned long iova, size_t pgsize,
544 struct iommu_iotlb_gather *gather)
546 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
547 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops;
549 return ops->unmap_pages(ops, iova, pgsize, pgcount, gather);
553 apple_dart_setup_translation(struct apple_dart_domain *domain,
554 struct apple_dart_stream_map *stream_map)
557 struct io_pgtable_cfg *pgtbl_cfg =
558 &io_pgtable_ops_to_pgtable(domain->pgtbl_ops)->cfg;
560 for (i = 0; i < pgtbl_cfg->apple_dart_cfg.n_ttbrs; ++i)
561 apple_dart_hw_set_ttbr(stream_map, i,
562 pgtbl_cfg->apple_dart_cfg.ttbr[i]);
563 for (; i < stream_map->dart->hw->ttbr_count; ++i)
564 apple_dart_hw_clear_ttbr(stream_map, i);
566 apple_dart_hw_enable_translation(stream_map);
567 stream_map->dart->hw->invalidate_tlb(stream_map);
570 static int apple_dart_finalize_domain(struct apple_dart_domain *dart_domain,
571 struct apple_dart_master_cfg *cfg)
573 struct apple_dart *dart = cfg->stream_maps[0].dart;
574 struct io_pgtable_cfg pgtbl_cfg;
578 if (dart->pgsize > PAGE_SIZE)
581 mutex_lock(&dart_domain->init_lock);
583 if (dart_domain->finalized)
586 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
587 dart_domain->stream_maps[i].dart = cfg->stream_maps[i].dart;
588 for (j = 0; j < BITS_TO_LONGS(dart->num_streams); j++)
589 atomic_long_set(&dart_domain->stream_maps[i].sidmap[j],
590 cfg->stream_maps[i].sidmap[j]);
593 pgtbl_cfg = (struct io_pgtable_cfg){
594 .pgsize_bitmap = dart->pgsize,
598 .iommu_dev = dart->dev,
601 dart_domain->pgtbl_ops = alloc_io_pgtable_ops(dart->hw->fmt, &pgtbl_cfg,
602 &dart_domain->domain);
603 if (!dart_domain->pgtbl_ops) {
608 dart_domain->domain.pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;
609 dart_domain->domain.geometry.aperture_start = 0;
610 dart_domain->domain.geometry.aperture_end =
611 (dma_addr_t)DMA_BIT_MASK(dart->ias);
612 dart_domain->domain.geometry.force_aperture = true;
614 dart_domain->finalized = true;
617 mutex_unlock(&dart_domain->init_lock);
622 apple_dart_mod_streams(struct apple_dart_atomic_stream_map *domain_maps,
623 struct apple_dart_stream_map *master_maps,
628 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
629 if (domain_maps[i].dart != master_maps[i].dart)
633 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
634 if (!domain_maps[i].dart)
636 for (j = 0; j < BITS_TO_LONGS(domain_maps[i].dart->num_streams); j++) {
638 atomic_long_or(master_maps[i].sidmap[j],
639 &domain_maps[i].sidmap[j]);
641 atomic_long_and(~master_maps[i].sidmap[j],
642 &domain_maps[i].sidmap[j]);
649 static int apple_dart_domain_add_streams(struct apple_dart_domain *domain,
650 struct apple_dart_master_cfg *cfg)
652 return apple_dart_mod_streams(domain->stream_maps, cfg->stream_maps,
656 static int apple_dart_attach_dev_paging(struct iommu_domain *domain,
660 struct apple_dart_stream_map *stream_map;
661 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
662 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
664 ret = apple_dart_finalize_domain(dart_domain, cfg);
668 ret = apple_dart_domain_add_streams(dart_domain, cfg);
672 for_each_stream_map(i, cfg, stream_map)
673 apple_dart_setup_translation(dart_domain, stream_map);
677 static int apple_dart_attach_dev_identity(struct iommu_domain *domain,
680 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
681 struct apple_dart_stream_map *stream_map;
684 if (!cfg->stream_maps[0].dart->supports_bypass)
687 for_each_stream_map(i, cfg, stream_map)
688 apple_dart_hw_enable_bypass(stream_map);
692 static const struct iommu_domain_ops apple_dart_identity_ops = {
693 .attach_dev = apple_dart_attach_dev_identity,
696 static struct iommu_domain apple_dart_identity_domain = {
697 .type = IOMMU_DOMAIN_IDENTITY,
698 .ops = &apple_dart_identity_ops,
701 static int apple_dart_attach_dev_blocked(struct iommu_domain *domain,
704 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
705 struct apple_dart_stream_map *stream_map;
708 for_each_stream_map(i, cfg, stream_map)
709 apple_dart_hw_disable_dma(stream_map);
713 static const struct iommu_domain_ops apple_dart_blocked_ops = {
714 .attach_dev = apple_dart_attach_dev_blocked,
717 static struct iommu_domain apple_dart_blocked_domain = {
718 .type = IOMMU_DOMAIN_BLOCKED,
719 .ops = &apple_dart_blocked_ops,
722 static struct iommu_device *apple_dart_probe_device(struct device *dev)
724 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
725 struct apple_dart_stream_map *stream_map;
729 return ERR_PTR(-ENODEV);
731 for_each_stream_map(i, cfg, stream_map)
733 dev, stream_map->dart->dev,
734 DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_SUPPLIER);
736 return &cfg->stream_maps[0].dart->iommu;
739 static void apple_dart_release_device(struct device *dev)
741 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
743 dev_iommu_priv_set(dev, NULL);
747 static struct iommu_domain *apple_dart_domain_alloc_paging(struct device *dev)
749 struct apple_dart_domain *dart_domain;
751 dart_domain = kzalloc(sizeof(*dart_domain), GFP_KERNEL);
755 mutex_init(&dart_domain->init_lock);
758 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
761 ret = apple_dart_finalize_domain(dart_domain, cfg);
767 return &dart_domain->domain;
770 static void apple_dart_domain_free(struct iommu_domain *domain)
772 struct apple_dart_domain *dart_domain = to_dart_domain(domain);
774 if (dart_domain->pgtbl_ops)
775 free_io_pgtable_ops(dart_domain->pgtbl_ops);
780 static int apple_dart_of_xlate(struct device *dev, struct of_phandle_args *args)
782 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
783 struct platform_device *iommu_pdev = of_find_device_by_node(args->np);
784 struct apple_dart *dart = platform_get_drvdata(iommu_pdev);
785 struct apple_dart *cfg_dart;
788 if (args->args_count != 1)
793 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
796 dev_iommu_priv_set(dev, cfg);
798 cfg_dart = cfg->stream_maps[0].dart;
800 if (cfg_dart->supports_bypass != dart->supports_bypass)
802 if (cfg_dart->pgsize != dart->pgsize)
806 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
807 if (cfg->stream_maps[i].dart == dart) {
808 set_bit(sid, cfg->stream_maps[i].sidmap);
812 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) {
813 if (!cfg->stream_maps[i].dart) {
814 cfg->stream_maps[i].dart = dart;
815 set_bit(sid, cfg->stream_maps[i].sidmap);
823 static DEFINE_MUTEX(apple_dart_groups_lock);
825 static void apple_dart_release_group(void *iommu_data)
828 struct apple_dart_stream_map *stream_map;
829 struct apple_dart_master_cfg *group_master_cfg = iommu_data;
831 mutex_lock(&apple_dart_groups_lock);
833 for_each_stream_map(i, group_master_cfg, stream_map)
834 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams)
835 stream_map->dart->sid2group[sid] = NULL;
838 mutex_unlock(&apple_dart_groups_lock);
841 static int apple_dart_merge_master_cfg(struct apple_dart_master_cfg *dst,
842 struct apple_dart_master_cfg *src)
845 * We know that this function is only called for groups returned from
846 * pci_device_group and that all Apple Silicon platforms never spread
847 * PCIe devices from the same bus across multiple DARTs such that we can
848 * just assume that both src and dst only have the same single DART.
850 if (src->stream_maps[1].dart)
852 if (dst->stream_maps[1].dart)
854 if (src->stream_maps[0].dart != dst->stream_maps[0].dart)
857 bitmap_or(dst->stream_maps[0].sidmap,
858 dst->stream_maps[0].sidmap,
859 src->stream_maps[0].sidmap,
860 dst->stream_maps[0].dart->num_streams);
864 static struct iommu_group *apple_dart_device_group(struct device *dev)
867 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
868 struct apple_dart_stream_map *stream_map;
869 struct apple_dart_master_cfg *group_master_cfg;
870 struct iommu_group *group = NULL;
871 struct iommu_group *res = ERR_PTR(-EINVAL);
873 mutex_lock(&apple_dart_groups_lock);
875 for_each_stream_map(i, cfg, stream_map) {
876 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams) {
877 struct iommu_group *stream_group =
878 stream_map->dart->sid2group[sid];
880 if (group && group != stream_group) {
881 res = ERR_PTR(-EINVAL);
885 group = stream_group;
890 res = iommu_group_ref_get(group);
896 group = pci_device_group(dev);
899 group = generic_device_group(dev);
901 res = ERR_PTR(-ENOMEM);
905 group_master_cfg = iommu_group_get_iommudata(group);
906 if (group_master_cfg) {
909 ret = apple_dart_merge_master_cfg(group_master_cfg, cfg);
911 dev_err(dev, "Failed to merge DART IOMMU grups.\n");
912 iommu_group_put(group);
917 group_master_cfg = kmemdup(cfg, sizeof(*group_master_cfg),
919 if (!group_master_cfg) {
920 iommu_group_put(group);
924 iommu_group_set_iommudata(group, group_master_cfg,
925 apple_dart_release_group);
928 for_each_stream_map(i, cfg, stream_map)
929 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams)
930 stream_map->dart->sid2group[sid] = group;
935 mutex_unlock(&apple_dart_groups_lock);
939 static int apple_dart_def_domain_type(struct device *dev)
941 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev);
943 if (cfg->stream_maps[0].dart->pgsize > PAGE_SIZE)
944 return IOMMU_DOMAIN_IDENTITY;
945 if (!cfg->stream_maps[0].dart->supports_bypass)
946 return IOMMU_DOMAIN_DMA;
951 #ifndef CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR
952 /* Keep things compiling when CONFIG_PCI_APPLE isn't selected */
953 #define CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR 0
955 #define DOORBELL_ADDR (CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR & PAGE_MASK)
957 static void apple_dart_get_resv_regions(struct device *dev,
958 struct list_head *head)
960 if (IS_ENABLED(CONFIG_PCIE_APPLE) && dev_is_pci(dev)) {
961 struct iommu_resv_region *region;
962 int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
964 region = iommu_alloc_resv_region(DOORBELL_ADDR,
966 IOMMU_RESV_MSI, GFP_KERNEL);
970 list_add_tail(®ion->list, head);
973 iommu_dma_get_resv_regions(dev, head);
976 static const struct iommu_ops apple_dart_iommu_ops = {
977 .identity_domain = &apple_dart_identity_domain,
978 .blocked_domain = &apple_dart_blocked_domain,
979 .domain_alloc_paging = apple_dart_domain_alloc_paging,
980 .probe_device = apple_dart_probe_device,
981 .release_device = apple_dart_release_device,
982 .device_group = apple_dart_device_group,
983 .of_xlate = apple_dart_of_xlate,
984 .def_domain_type = apple_dart_def_domain_type,
985 .get_resv_regions = apple_dart_get_resv_regions,
986 .pgsize_bitmap = -1UL, /* Restricted during dart probe */
987 .owner = THIS_MODULE,
988 .default_domain_ops = &(const struct iommu_domain_ops) {
989 .attach_dev = apple_dart_attach_dev_paging,
990 .map_pages = apple_dart_map_pages,
991 .unmap_pages = apple_dart_unmap_pages,
992 .flush_iotlb_all = apple_dart_flush_iotlb_all,
993 .iotlb_sync = apple_dart_iotlb_sync,
994 .iotlb_sync_map = apple_dart_iotlb_sync_map,
995 .iova_to_phys = apple_dart_iova_to_phys,
996 .free = apple_dart_domain_free,
1000 static irqreturn_t apple_dart_t8020_irq(int irq, void *dev)
1002 struct apple_dart *dart = dev;
1003 const char *fault_name = NULL;
1004 u32 error = readl(dart->regs + DART_T8020_ERROR);
1005 u32 error_code = FIELD_GET(DART_T8020_ERROR_CODE, error);
1006 u32 addr_lo = readl(dart->regs + DART_T8020_ERROR_ADDR_LO);
1007 u32 addr_hi = readl(dart->regs + DART_T8020_ERROR_ADDR_HI);
1008 u64 addr = addr_lo | (((u64)addr_hi) << 32);
1009 u8 stream_idx = FIELD_GET(DART_T8020_ERROR_STREAM, error);
1011 if (!(error & DART_T8020_ERROR_FLAG))
1014 /* there should only be a single bit set but let's use == to be sure */
1015 if (error_code == DART_T8020_ERROR_READ_FAULT)
1016 fault_name = "READ FAULT";
1017 else if (error_code == DART_T8020_ERROR_WRITE_FAULT)
1018 fault_name = "WRITE FAULT";
1019 else if (error_code == DART_T8020_ERROR_NO_PTE)
1020 fault_name = "NO PTE FOR IOVA";
1021 else if (error_code == DART_T8020_ERROR_NO_PMD)
1022 fault_name = "NO PMD FOR IOVA";
1023 else if (error_code == DART_T8020_ERROR_NO_TTBR)
1024 fault_name = "NO TTBR FOR IOVA";
1026 fault_name = "unknown";
1028 dev_err_ratelimited(
1030 "translation fault: status:0x%x stream:%d code:0x%x (%s) at 0x%llx",
1031 error, stream_idx, error_code, fault_name, addr);
1033 writel(error, dart->regs + DART_T8020_ERROR);
1037 static irqreturn_t apple_dart_t8110_irq(int irq, void *dev)
1039 struct apple_dart *dart = dev;
1040 const char *fault_name = NULL;
1041 u32 error = readl(dart->regs + DART_T8110_ERROR);
1042 u32 error_code = FIELD_GET(DART_T8110_ERROR_CODE, error);
1043 u32 addr_lo = readl(dart->regs + DART_T8110_ERROR_ADDR_LO);
1044 u32 addr_hi = readl(dart->regs + DART_T8110_ERROR_ADDR_HI);
1045 u64 addr = addr_lo | (((u64)addr_hi) << 32);
1046 u8 stream_idx = FIELD_GET(DART_T8110_ERROR_STREAM, error);
1048 if (!(error & DART_T8110_ERROR_FLAG))
1051 /* there should only be a single bit set but let's use == to be sure */
1052 if (error_code == DART_T8110_ERROR_READ_FAULT)
1053 fault_name = "READ FAULT";
1054 else if (error_code == DART_T8110_ERROR_WRITE_FAULT)
1055 fault_name = "WRITE FAULT";
1056 else if (error_code == DART_T8110_ERROR_NO_PTE)
1057 fault_name = "NO PTE FOR IOVA";
1058 else if (error_code == DART_T8110_ERROR_NO_PMD)
1059 fault_name = "NO PMD FOR IOVA";
1060 else if (error_code == DART_T8110_ERROR_NO_PGD)
1061 fault_name = "NO PGD FOR IOVA";
1062 else if (error_code == DART_T8110_ERROR_NO_TTBR)
1063 fault_name = "NO TTBR FOR IOVA";
1065 fault_name = "unknown";
1067 dev_err_ratelimited(
1069 "translation fault: status:0x%x stream:%d code:0x%x (%s) at 0x%llx",
1070 error, stream_idx, error_code, fault_name, addr);
1072 writel(error, dart->regs + DART_T8110_ERROR);
1076 static int apple_dart_probe(struct platform_device *pdev)
1080 struct resource *res;
1081 struct apple_dart *dart;
1082 struct device *dev = &pdev->dev;
1084 dart = devm_kzalloc(dev, sizeof(*dart), GFP_KERNEL);
1089 dart->hw = of_device_get_match_data(dev);
1090 spin_lock_init(&dart->lock);
1092 dart->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1093 if (IS_ERR(dart->regs))
1094 return PTR_ERR(dart->regs);
1096 if (resource_size(res) < 0x4000) {
1097 dev_err(dev, "MMIO region too small (%pr)\n", res);
1101 dart->irq = platform_get_irq(pdev, 0);
1105 ret = devm_clk_bulk_get_all(dev, &dart->clks);
1108 dart->num_clks = ret;
1110 ret = clk_bulk_prepare_enable(dart->num_clks, dart->clks);
1114 dart_params[0] = readl(dart->regs + DART_PARAMS1);
1115 dart_params[1] = readl(dart->regs + DART_PARAMS2);
1116 dart->pgsize = 1 << FIELD_GET(DART_PARAMS1_PAGE_SHIFT, dart_params[0]);
1117 dart->supports_bypass = dart_params[1] & DART_PARAMS2_BYPASS_SUPPORT;
1119 switch (dart->hw->type) {
1123 dart->oas = dart->hw->oas;
1124 dart->num_streams = dart->hw->max_sid_count;
1128 dart_params[2] = readl(dart->regs + DART_T8110_PARAMS3);
1129 dart_params[3] = readl(dart->regs + DART_T8110_PARAMS4);
1130 dart->ias = FIELD_GET(DART_T8110_PARAMS3_VA_WIDTH, dart_params[2]);
1131 dart->oas = FIELD_GET(DART_T8110_PARAMS3_PA_WIDTH, dart_params[2]);
1132 dart->num_streams = FIELD_GET(DART_T8110_PARAMS4_NUM_SIDS, dart_params[3]);
1136 if (dart->num_streams > DART_MAX_STREAMS) {
1137 dev_err(&pdev->dev, "Too many streams (%d > %d)\n",
1138 dart->num_streams, DART_MAX_STREAMS);
1140 goto err_clk_disable;
1143 ret = apple_dart_hw_reset(dart);
1145 goto err_clk_disable;
1147 ret = request_irq(dart->irq, dart->hw->irq_handler, IRQF_SHARED,
1148 "apple-dart fault handler", dart);
1150 goto err_clk_disable;
1152 platform_set_drvdata(pdev, dart);
1154 ret = iommu_device_sysfs_add(&dart->iommu, dev, NULL, "apple-dart.%s",
1155 dev_name(&pdev->dev));
1159 ret = iommu_device_register(&dart->iommu, &apple_dart_iommu_ops, dev);
1161 goto err_sysfs_remove;
1165 "DART [pagesize %x, %d streams, bypass support: %d, bypass forced: %d] initialized\n",
1166 dart->pgsize, dart->num_streams, dart->supports_bypass,
1167 dart->pgsize > PAGE_SIZE);
1171 iommu_device_sysfs_remove(&dart->iommu);
1173 free_irq(dart->irq, dart);
1175 clk_bulk_disable_unprepare(dart->num_clks, dart->clks);
1180 static void apple_dart_remove(struct platform_device *pdev)
1182 struct apple_dart *dart = platform_get_drvdata(pdev);
1184 apple_dart_hw_reset(dart);
1185 free_irq(dart->irq, dart);
1187 iommu_device_unregister(&dart->iommu);
1188 iommu_device_sysfs_remove(&dart->iommu);
1190 clk_bulk_disable_unprepare(dart->num_clks, dart->clks);
1193 static const struct apple_dart_hw apple_dart_hw_t8103 = {
1195 .irq_handler = apple_dart_t8020_irq,
1196 .invalidate_tlb = apple_dart_t8020_hw_invalidate_tlb,
1199 .max_sid_count = 16,
1201 .enable_streams = DART_T8020_STREAMS_ENABLE,
1202 .lock = DART_T8020_CONFIG,
1203 .lock_bit = DART_T8020_CONFIG_LOCK,
1205 .error = DART_T8020_ERROR,
1207 .tcr = DART_T8020_TCR,
1208 .tcr_enabled = DART_T8020_TCR_TRANSLATE_ENABLE,
1210 .tcr_bypass = DART_T8020_TCR_BYPASS_DAPF | DART_T8020_TCR_BYPASS_DART,
1212 .ttbr = DART_T8020_TTBR,
1213 .ttbr_valid = DART_T8020_TTBR_VALID,
1214 .ttbr_addr_field_shift = DART_T8020_TTBR_ADDR_FIELD_SHIFT,
1215 .ttbr_shift = DART_T8020_TTBR_SHIFT,
1218 static const struct apple_dart_hw apple_dart_hw_t6000 = {
1220 .irq_handler = apple_dart_t8020_irq,
1221 .invalidate_tlb = apple_dart_t8020_hw_invalidate_tlb,
1224 .max_sid_count = 16,
1226 .enable_streams = DART_T8020_STREAMS_ENABLE,
1227 .lock = DART_T8020_CONFIG,
1228 .lock_bit = DART_T8020_CONFIG_LOCK,
1230 .error = DART_T8020_ERROR,
1232 .tcr = DART_T8020_TCR,
1233 .tcr_enabled = DART_T8020_TCR_TRANSLATE_ENABLE,
1235 .tcr_bypass = DART_T8020_TCR_BYPASS_DAPF | DART_T8020_TCR_BYPASS_DART,
1237 .ttbr = DART_T8020_TTBR,
1238 .ttbr_valid = DART_T8020_TTBR_VALID,
1239 .ttbr_addr_field_shift = DART_T8020_TTBR_ADDR_FIELD_SHIFT,
1240 .ttbr_shift = DART_T8020_TTBR_SHIFT,
1244 static const struct apple_dart_hw apple_dart_hw_t8110 = {
1246 .irq_handler = apple_dart_t8110_irq,
1247 .invalidate_tlb = apple_dart_t8110_hw_invalidate_tlb,
1249 .max_sid_count = 256,
1251 .enable_streams = DART_T8110_ENABLE_STREAMS,
1252 .lock = DART_T8110_PROTECT,
1253 .lock_bit = DART_T8110_PROTECT_TTBR_TCR,
1255 .error = DART_T8110_ERROR,
1257 .tcr = DART_T8110_TCR,
1258 .tcr_enabled = DART_T8110_TCR_TRANSLATE_ENABLE,
1260 .tcr_bypass = DART_T8110_TCR_BYPASS_DAPF | DART_T8110_TCR_BYPASS_DART,
1262 .ttbr = DART_T8110_TTBR,
1263 .ttbr_valid = DART_T8110_TTBR_VALID,
1264 .ttbr_addr_field_shift = DART_T8110_TTBR_ADDR_FIELD_SHIFT,
1265 .ttbr_shift = DART_T8110_TTBR_SHIFT,
1269 static __maybe_unused int apple_dart_suspend(struct device *dev)
1271 struct apple_dart *dart = dev_get_drvdata(dev);
1272 unsigned int sid, idx;
1274 for (sid = 0; sid < dart->num_streams; sid++) {
1275 dart->save_tcr[sid] = readl_relaxed(dart->regs + DART_TCR(dart, sid));
1276 for (idx = 0; idx < dart->hw->ttbr_count; idx++)
1277 dart->save_ttbr[sid][idx] =
1278 readl(dart->regs + DART_TTBR(dart, sid, idx));
1284 static __maybe_unused int apple_dart_resume(struct device *dev)
1286 struct apple_dart *dart = dev_get_drvdata(dev);
1287 unsigned int sid, idx;
1290 ret = apple_dart_hw_reset(dart);
1292 dev_err(dev, "Failed to reset DART on resume\n");
1296 for (sid = 0; sid < dart->num_streams; sid++) {
1297 for (idx = 0; idx < dart->hw->ttbr_count; idx++)
1298 writel(dart->save_ttbr[sid][idx],
1299 dart->regs + DART_TTBR(dart, sid, idx));
1300 writel(dart->save_tcr[sid], dart->regs + DART_TCR(dart, sid));
1306 static DEFINE_SIMPLE_DEV_PM_OPS(apple_dart_pm_ops, apple_dart_suspend, apple_dart_resume);
1308 static const struct of_device_id apple_dart_of_match[] = {
1309 { .compatible = "apple,t8103-dart", .data = &apple_dart_hw_t8103 },
1310 { .compatible = "apple,t8110-dart", .data = &apple_dart_hw_t8110 },
1311 { .compatible = "apple,t6000-dart", .data = &apple_dart_hw_t6000 },
1314 MODULE_DEVICE_TABLE(of, apple_dart_of_match);
1316 static struct platform_driver apple_dart_driver = {
1318 .name = "apple-dart",
1319 .of_match_table = apple_dart_of_match,
1320 .suppress_bind_attrs = true,
1321 .pm = pm_sleep_ptr(&apple_dart_pm_ops),
1323 .probe = apple_dart_probe,
1324 .remove_new = apple_dart_remove,
1327 module_platform_driver(apple_dart_driver);
1329 MODULE_DESCRIPTION("IOMMU API for Apple's DART");
1331 MODULE_LICENSE("GPL v2");