drivers/gpu/drm/i915/display/intel_plane_initial.c

   1 // SPDX-License-Identifier: MIT
   2 /*
   3  * Copyright © 2021 Intel Corporation
   4  */
   5
   6 #include "gem/i915_gem_region.h"
   7 #include "i915_drv.h"
   8 #include "intel_atomic_plane.h"
   9 #include "intel_display.h"
  10 #include "intel_display_types.h"
  11 #include "intel_fb.h"
  12 #include "intel_frontbuffer.h"
  13 #include "intel_plane_initial.h"
  14
  15 static bool
  16 intel_reuse_initial_plane_obj(struct drm_i915_private *i915,
  17                               const struct intel_initial_plane_config *plane_config,
  18                               struct drm_framebuffer **fb,
  19                               struct i915_vma **vma)
  20 {
  21         struct intel_crtc *crtc;
  22
  23         for_each_intel_crtc(&i915->drm, crtc) {
  24                 struct intel_crtc_state *crtc_state =
  25                         to_intel_crtc_state(crtc->base.state);
  26                 struct intel_plane *plane =
  27                         to_intel_plane(crtc->base.primary);
  28                 struct intel_plane_state *plane_state =
  29                         to_intel_plane_state(plane->base.state);
  30
  31                 if (!crtc_state->uapi.active)
  32                         continue;
  33
  34                 if (!plane_state->ggtt_vma)
  35                         continue;
  36
  37                 if (intel_plane_ggtt_offset(plane_state) == plane_config->base) {
  38                         *fb = plane_state->hw.fb;
  39                         *vma = plane_state->ggtt_vma;
  40                         return true;
  41                 }
  42         }
  43
  44         return false;
  45 }
  46
  47 static struct i915_vma *
  48 initial_plane_vma(struct drm_i915_private *i915,
  49                   struct intel_initial_plane_config *plane_config)
  50 {
  51         struct intel_memory_region *mem;
  52         struct drm_i915_gem_object *obj;
  53         struct i915_vma *vma;
  54         resource_size_t phys_base;
  55         u32 base, size;
  56         u64 pinctl;
  57
  58         if (plane_config->size == 0)
  59                 return NULL;
  60
  61         base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
  62         if (IS_DGFX(i915)) {
  63                 gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm;
  64                 gen8_pte_t pte;
  65
  66                 gte += base / I915_GTT_PAGE_SIZE;
  67
  68                 pte = ioread64(gte);
  69                 if (!(pte & GEN12_GGTT_PTE_LM)) {
  70                         drm_err(&i915->drm,
  71                                 "Initial plane programming missing PTE_LM bit\n");
  72                         return NULL;
  73                 }
  74
  75                 phys_base = pte & I915_GTT_PAGE_MASK;
  76                 mem = i915->mm.regions[INTEL_REGION_LMEM_0];
  77
  78                 /*
  79                  * We don't currently expect this to ever be placed in the
  80                  * stolen portion.
  81                  */
  82                 if (phys_base >= resource_size(&mem->region)) {
  83                         drm_err(&i915->drm,
  84                                 "Initial plane programming using invalid range, phys_base=%pa\n",
  85                                 &phys_base);
  86                         return NULL;
  87                 }
  88
  89                 drm_dbg(&i915->drm,
  90                         "Using phys_base=%pa, based on initial plane programming\n",
  91                         &phys_base);
  92         } else {
  93                 phys_base = base;
  94                 mem = i915->mm.stolen_region;
  95         }
  96
  97         if (!mem)
  98                 return NULL;
  99
 100         size = round_up(plane_config->base + plane_config->size,
 101                         mem->min_page_size);
 102         size -= base;
 103
 104         /*
 105          * If the FB is too big, just don't use it since fbdev is not very
 106          * important and we should probably use that space with FBC or other
 107          * features.
 108          */
 109         if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
 110             mem == i915->mm.stolen_region &&
 111             size * 2 > i915->dsm.usable_size)
 112                 return NULL;
 113
 114         obj = i915_gem_object_create_region_at(mem, phys_base, size,
 115                                                I915_BO_ALLOC_USER |
 116                                                I915_BO_PREALLOC);
 117         if (IS_ERR(obj))
 118                 return NULL;
 119
 120         /*
 121          * Mark it WT ahead of time to avoid changing the
 122          * cache_level during fbdev initialization. The
 123          * unbind there would get stuck waiting for rcu.
 124          */
 125         i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?
 126                                             I915_CACHE_WT : I915_CACHE_NONE);
 127
 128         switch (plane_config->tiling) {
 129         case I915_TILING_NONE:
 130                 break;
 131         case I915_TILING_X:
 132         case I915_TILING_Y:
 133                 obj->tiling_and_stride =
 134                         plane_config->fb->base.pitches[0] |
 135                         plane_config->tiling;
 136                 break;
 137         default:
 138                 MISSING_CASE(plane_config->tiling);
 139                 goto err_obj;
 140         }
 141
 142         vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL);
 143         if (IS_ERR(vma))
 144                 goto err_obj;
 145
 146         pinctl = PIN_GLOBAL | PIN_OFFSET_FIXED | base;
 147         if (HAS_GMCH(i915))
 148                 pinctl |= PIN_MAPPABLE;
 149         if (i915_vma_pin(vma, 0, 0, pinctl))
 150                 goto err_obj;
 151
 152         if (i915_gem_object_is_tiled(obj) &&
 153             !i915_vma_is_map_and_fenceable(vma))
 154                 goto err_obj;
 155
 156         return vma;
 157
 158 err_obj:
 159         i915_gem_object_put(obj);
 160         return NULL;
 161 }
 162
 163 static bool
 164 intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
 165                               struct intel_initial_plane_config *plane_config)
 166 {
 167         struct drm_device *dev = crtc->base.dev;
 168         struct drm_i915_private *dev_priv = to_i915(dev);
 169         struct drm_mode_fb_cmd2 mode_cmd = {};
 170         struct drm_framebuffer *fb = &plane_config->fb->base;
 171         struct i915_vma *vma;
 172
 173         switch (fb->modifier) {
 174         case DRM_FORMAT_MOD_LINEAR:
 175         case I915_FORMAT_MOD_X_TILED:
 176         case I915_FORMAT_MOD_Y_TILED:
 177         case I915_FORMAT_MOD_4_TILED:
 178                 break;
 179         default:
 180                 drm_dbg(&dev_priv->drm,
 181                         "Unsupported modifier for initial FB: 0x%llx\n",
 182                         fb->modifier);
 183                 return false;
 184         }
 185
 186         vma = initial_plane_vma(dev_priv, plane_config);
 187         if (!vma)
 188                 return false;
 189
 190         mode_cmd.pixel_format = fb->format->format;
 191         mode_cmd.width = fb->width;
 192         mode_cmd.height = fb->height;
 193         mode_cmd.pitches[0] = fb->pitches[0];
 194         mode_cmd.modifier[0] = fb->modifier;
 195         mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
 196
 197         if (intel_framebuffer_init(to_intel_framebuffer(fb),
 198                                    vma->obj, &mode_cmd)) {
 199                 drm_dbg_kms(&dev_priv->drm, "intel fb init failed\n");
 200                 goto err_vma;
 201         }
 202
 203         plane_config->vma = vma;
 204         return true;
 205
 206 err_vma:
 207         i915_vma_put(vma);
 208         return false;
 209 }
 210
 211 static void
 212 intel_find_initial_plane_obj(struct intel_crtc *crtc,
 213                              struct intel_initial_plane_config *plane_config)
 214 {
 215         struct drm_device *dev = crtc->base.dev;
 216         struct drm_i915_private *dev_priv = to_i915(dev);
 217         struct intel_plane *plane =
 218                 to_intel_plane(crtc->base.primary);
 219         struct intel_plane_state *plane_state =
 220                 to_intel_plane_state(plane->base.state);
 221         struct drm_framebuffer *fb;
 222         struct i915_vma *vma;
 223
 224         /*
 225          * TODO:
 226          *   Disable planes if get_initial_plane_config() failed.
 227          *   Make sure things work if the surface base is not page aligned.
 228          */
 229         if (!plane_config->fb)
 230                 return;
 231
 232         if (intel_alloc_initial_plane_obj(crtc, plane_config)) {
 233                 fb = &plane_config->fb->base;
 234                 vma = plane_config->vma;
 235                 goto valid_fb;
 236         }
 237
 238         /*
 239          * Failed to alloc the obj, check to see if we should share
 240          * an fb with another CRTC instead
 241          */
 242         if (intel_reuse_initial_plane_obj(dev_priv, plane_config, &fb, &vma))
 243                 goto valid_fb;
 244
 245         /*
 246          * We've failed to reconstruct the BIOS FB.  Current display state
 247          * indicates that the primary plane is visible, but has a NULL FB,
 248          * which will lead to problems later if we don't fix it up.  The
 249          * simplest solution is to just disable the primary plane now and
 250          * pretend the BIOS never had it enabled.
 251          */
 252         intel_plane_disable_noatomic(crtc, plane);
 253
 254         return;
 255
 256 valid_fb:
 257         plane_state->uapi.rotation = plane_config->rotation;
 258         intel_fb_fill_view(to_intel_framebuffer(fb),
 259                            plane_state->uapi.rotation, &plane_state->view);
 260
 261         __i915_vma_pin(vma);
 262         plane_state->ggtt_vma = i915_vma_get(vma);
 263         if (intel_plane_uses_fence(plane_state) &&
 264             i915_vma_pin_fence(vma) == 0 && vma->fence)
 265                 plane_state->flags |= PLANE_HAS_FENCE;
 266
 267         plane_state->uapi.src_x = 0;
 268         plane_state->uapi.src_y = 0;
 269         plane_state->uapi.src_w = fb->width << 16;
 270         plane_state->uapi.src_h = fb->height << 16;
 271
 272         plane_state->uapi.crtc_x = 0;
 273         plane_state->uapi.crtc_y = 0;
 274         plane_state->uapi.crtc_w = fb->width;
 275         plane_state->uapi.crtc_h = fb->height;
 276
 277         if (plane_config->tiling)
 278                 dev_priv->preserve_bios_swizzle = true;
 279
 280         plane_state->uapi.fb = fb;
 281         drm_framebuffer_get(fb);
 282
 283         plane_state->uapi.crtc = &crtc->base;
 284         intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);
 285
 286         atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);
 287 }
 288
 289 static void plane_config_fini(struct intel_initial_plane_config *plane_config)
 290 {
 291         if (plane_config->fb) {
 292                 struct drm_framebuffer *fb = &plane_config->fb->base;
 293
 294                 /* We may only have the stub and not a full framebuffer */
 295                 if (drm_framebuffer_read_refcount(fb))
 296                         drm_framebuffer_put(fb);
 297                 else
 298                         kfree(fb);
 299         }
 300
 301         if (plane_config->vma)
 302                 i915_vma_put(plane_config->vma);
 303 }
 304
 305 void intel_crtc_initial_plane_config(struct intel_crtc *crtc)
 306 {
 307         struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 308         struct intel_initial_plane_config plane_config = {};
 309
 310         /*
 311          * Note that reserving the BIOS fb up front prevents us
 312          * from stuffing other stolen allocations like the ring
 313          * on top.  This prevents some ugliness at boot time, and
 314          * can even allow for smooth boot transitions if the BIOS
 315          * fb is large enough for the active pipe configuration.
 316          */
 317         dev_priv->display.funcs.display->get_initial_plane_config(crtc, &plane_config);
 318
 319         /*
 320          * If the fb is shared between multiple heads, we'll
 321          * just get the first one.
 322          */
 323         intel_find_initial_plane_obj(crtc, &plane_config);
 324
 325         plane_config_fini(&plane_config);
 326 }